Attachment 643871 Details for Bug 876001 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 734.97 KB, created by Steevithak on 2012-11-13 02:42:43 UTC

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Creator: Steevithak

Created: 2012-11-13 02:42:43 UTC

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patch

obsolete

>[    26.091] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[    26.091] X Protocol Version 11, Revision 0
>[    26.091] Build Operating System:  2.6.32-220.17.1.el6.x86_64 
>[    26.091] Current Operating System: Linux localhost.localdomain 3.6.6-1.fc17.x86_64 #1 SMP Mon Nov 5 21:59:35 UTC 2012 x86_64
>[    26.092] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.6-1.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 KEYTABLE=us SYSFONT=True rd.lvm.lv=vg/lv_root rd.luks=0 rd.lvm.lv=vg/lv_swap LANG=en_US.UTF-8 rhgb quiet
>[    26.092] Build Date: 20 September 2012  07:51:23AM
>[    26.092] Build ID: xorg-x11-server 1.12.3-2.fc17 
>[    26.092] Current version of pixman: 0.24.4
>[    26.092] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    26.092] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    26.092] (==) Log file: "/var/log/Xorg.0.log", Time: Sun Nov 11 13:41:00 2012
>[    26.118] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    26.118] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    26.118] (==) No Layout section.  Using the first Screen section.
>[    26.118] (==) No screen section available. Using defaults.
>[    26.118] (**) |-->Screen "Default Screen Section" (0)
>[    26.118] (**) |   |-->Monitor "<default monitor>"
>[    26.118] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    26.118] (==) Automatically adding devices
>[    26.118] (==) Automatically enabling devices
>[    26.119] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    26.119] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    26.119] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    26.119] (II) Loader magic: 0x7c6ac0
>[    26.119] (II) Module ABI versions:
>[    26.119] 	X.Org ANSI C Emulation: 0.4
>[    26.119] 	X.Org Video Driver: 12.0
>[    26.119] 	X.Org XInput driver : 16.0
>[    26.119] 	X.Org Server Extension : 6.0
>[    26.120] (--) PCI:*(0:2:0:0) 1002:9553:1028:0413 rev 0, Mem @ 0xd0000000/268435456, 0xcfef0000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    26.120] (II) LoadModule: "extmod"
>[    26.120] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    26.121] (II) Module extmod: vendor="X.Org Foundation"
>[    26.121] 	compiled for 1.12.3, module version = 1.0.0
>[    26.121] 	Module class: X.Org Server Extension
>[    26.121] 	ABI class: X.Org Server Extension, version 6.0
>[    26.121] (II) Loading extension SELinux
>[    26.121] (II) Loading extension MIT-SCREEN-SAVER
>[    26.121] (II) Loading extension XFree86-VidModeExtension
>[    26.121] (II) Loading extension XFree86-DGA
>[    26.121] (II) Loading extension DPMS
>[    26.121] (II) Loading extension XVideo
>[    26.121] (II) Loading extension XVideo-MotionCompensation
>[    26.121] (II) Loading extension X-Resource
>[    26.121] (II) LoadModule: "dbe"
>[    26.121] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    26.122] (II) Module dbe: vendor="X.Org Foundation"
>[    26.122] 	compiled for 1.12.3, module version = 1.0.0
>[    26.122] 	Module class: X.Org Server Extension
>[    26.122] 	ABI class: X.Org Server Extension, version 6.0
>[    26.122] (II) Loading extension DOUBLE-BUFFER
>[    26.122] (II) LoadModule: "glx"
>[    26.122] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    26.122] (II) Module glx: vendor="X.Org Foundation"
>[    26.122] 	compiled for 1.12.3, module version = 1.0.0
>[    26.122] 	ABI class: X.Org Server Extension, version 6.0
>[    26.122] (==) AIGLX enabled
>[    26.122] (II) Loading extension GLX
>[    26.122] (II) LoadModule: "record"
>[    26.122] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    26.122] (II) Module record: vendor="X.Org Foundation"
>[    26.122] 	compiled for 1.12.3, module version = 1.13.0
>[    26.122] 	Module class: X.Org Server Extension
>[    26.122] 	ABI class: X.Org Server Extension, version 6.0
>[    26.122] (II) Loading extension RECORD
>[    26.122] (II) LoadModule: "dri"
>[    26.122] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    26.142] (II) Module dri: vendor="X.Org Foundation"
>[    26.142] 	compiled for 1.12.3, module version = 1.0.0
>[    26.142] 	ABI class: X.Org Server Extension, version 6.0
>[    26.142] (II) Loading extension XFree86-DRI
>[    26.142] (II) LoadModule: "dri2"
>[    26.142] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    26.142] (II) Module dri2: vendor="X.Org Foundation"
>[    26.142] 	compiled for 1.12.3, module version = 1.2.0
>[    26.142] 	ABI class: X.Org Server Extension, version 6.0
>[    26.142] (II) Loading extension DRI2
>[    26.142] (==) Matched ati as autoconfigured driver 0
>[    26.142] (==) Matched vesa as autoconfigured driver 1
>[    26.142] (==) Matched modesetting as autoconfigured driver 2
>[    26.142] (==) Matched fbdev as autoconfigured driver 3
>[    26.142] (==) Assigned the driver to the xf86ConfigLayout
>[    26.142] (II) LoadModule: "ati"
>[    26.143] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    26.143] (II) Module ati: vendor="X.Org Foundation"
>[    26.143] 	compiled for 1.12.0, module version = 6.14.99
>[    26.143] 	Module class: X.Org Video Driver
>[    26.143] 	ABI class: X.Org Video Driver, version 12.0
>[    26.143] (II) LoadModule: "radeon"
>[    26.143] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    26.191] (II) Module radeon: vendor="X.Org Foundation"
>[    26.289] 	compiled for 1.12.0, module version = 6.14.99
>[    26.289] 	Module class: X.Org Video Driver
>[    26.289] 	ABI class: X.Org Video Driver, version 12.0
>[    26.289] (II) LoadModule: "vesa"
>[    26.289] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    26.289] (II) Module vesa: vendor="X.Org Foundation"
>[    26.289] 	compiled for 1.12.0, module version = 2.3.1
>[    26.289] 	Module class: X.Org Video Driver
>[    26.289] 	ABI class: X.Org Video Driver, version 12.0
>[    26.289] (II) LoadModule: "modesetting"
>[    26.439] (WW) Warning, couldn't open module modesetting
>[    26.439] (II) UnloadModule: "modesetting"
>[    26.439] (II) Unloading modesetting
>[    26.439] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    26.439] (II) LoadModule: "fbdev"
>[    26.439] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    26.440] (II) Module fbdev: vendor="X.Org Foundation"
>[    26.440] 	compiled for 1.11.99.901, module version = 0.4.2
>[    26.440] 	ABI class: X.Org Video Driver, version 12.0
>[    26.440] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    26.444] (II) VESA: driver for VESA chipsets: vesa
>[    26.444] (II) FBDEV: driver for framebuffer: fbdev
>[    26.444] (++) using VT number 1
>
>[    26.446] (II) [KMS] Kernel modesetting enabled.
>[    26.446] (WW) Falling back to old probe method for vesa
>[    26.446] (WW) Falling back to old probe method for fbdev
>[    26.446] (II) Loading sub module "fbdevhw"
>[    26.446] (II) LoadModule: "fbdevhw"
>[    26.446] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    26.446] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    26.446] 	compiled for 1.12.3, module version = 0.0.2
>[    26.446] 	ABI class: X.Org Video Driver, version 12.0
>[    26.446] (II) RADEON(0): RADEONPreInit_KMS
>[    26.446] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    26.446] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    26.446] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    26.446] (==) RADEON(0): Default visual is TrueColor
>[    26.447] (==) RADEON(0): RGB weight 888
>[    26.447] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    26.447] (--) RADEON(0): Chipset: "ATI Mobility Radeon 4500 Series" (ChipID = 0x9553)
>[    26.447] (II) RADEON(0): PCIE card detected
>[    26.447] drmOpenDevice: node name is /dev/dri/card0
>[    26.447] drmOpenDevice: open result is 8, (OK)
>[    26.447] drmOpenByBusid: Searching for BusID pci:0000:02:00.0
>[    26.447] drmOpenDevice: node name is /dev/dri/card0
>[    26.447] drmOpenDevice: open result is 8, (OK)
>[    26.447] drmOpenByBusid: drmOpenMinor returns 8
>[    26.447] drmOpenByBusid: drmGetBusid reports pci:0000:02:00.0
>[    26.447] (II) Loading sub module "exa"
>[    26.447] (II) LoadModule: "exa"
>[    26.447] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    26.447] (II) Module exa: vendor="X.Org Foundation"
>[    26.447] 	compiled for 1.12.3, module version = 2.5.0
>[    26.447] 	ABI class: X.Org Video Driver, version 12.0
>[    26.447] (II) RADEON(0): KMS Color Tiling: enabled
>[    26.447] (II) RADEON(0): KMS Pageflipping: enabled
>[    26.447] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    26.463] (II) RADEON(0): Output VGA-0 has no monitor section
>[    26.465] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    26.465] (II) RADEON(0): Output LVDS has no monitor section
>[    26.479] (II) RADEON(0): EDID for output VGA-0
>[    26.481] (II) RADEON(0): EDID for output HDMI-0
>[    26.481] (II) RADEON(0): EDID for output LVDS
>[    26.481] (II) RADEON(0): Manufacturer: LGD  Model: 20b  Serial#: 0
>[    26.481] (II) RADEON(0): Year: 2009  Week: 0
>[    26.481] (II) RADEON(0): EDID Version: 1.3
>[    26.481] (II) RADEON(0): Digital Display Input
>[    26.481] (II) RADEON(0): Max Image Size [cm]: horiz.: 35  vert.: 19
>[    26.481] (II) RADEON(0): Gamma: 2.20
>[    26.481] (II) RADEON(0): No DPMS capabilities specified
>[    26.481] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    26.481] (II) RADEON(0): First detailed timing is preferred mode
>[    26.481] (II) RADEON(0): redX: 0.617 redY: 0.349   greenX: 0.313 greenY: 0.595
>[    26.481] (II) RADEON(0): blueX: 0.151 blueY: 0.056   whiteX: 0.313 whiteY: 0.329
>[    26.481] (II) RADEON(0): Manufacturer's mask: 0
>[    26.481] (II) RADEON(0): Supported detailed timing:
>[    26.481] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    26.481] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    26.481] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    26.481] (II) RADEON(0): Supported detailed timing:
>[    26.481] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    26.481] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    26.481] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    26.481] (II) RADEON(0):  H162K[80]156WF1
>[    26.481] (II) RADEON(0): Unknown vendor-specific block 0
>[    26.481] (II) RADEON(0): EDID (in hex):
>[    26.481] (II) RADEON(0): 	00ffffffffffff0030e40b0200000000
>[    26.481] (II) RADEON(0): 	00130103902313780a15d59e59509826
>[    26.481] (II) RADEON(0): 	0e505400000001010101010101010101
>[    26.481] (II) RADEON(0): 	0101010101011a3680a070381f403020
>[    26.481] (II) RADEON(0): 	350059c21000001b1a3680a070381f40
>[    26.481] (II) RADEON(0): 	3020350059c21000001b000000fe0048
>[    26.482] (II) RADEON(0): 	3136324b803135365746310a00000000
>[    26.482] (II) RADEON(0): 	00000000000000000002010a202000e6
>[    26.482] (II) RADEON(0): Printing probed modes for output LVDS
>[    26.482] (II) RADEON(0): Modeline "1920x1080"x59.9  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    26.482] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[    26.482] (II) RADEON(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz d)
>[    26.482] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    26.482] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    26.482] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    26.482] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    26.482] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    26.482] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    26.482] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    26.482] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    26.482] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    26.482] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    26.482] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    26.482] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    26.482] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    26.482] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    26.482] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    26.482] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    26.482] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    26.482] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    26.482] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    26.482] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    26.482] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    26.482] (II) RADEON(0): Output VGA-0 disconnected
>[    26.482] (II) RADEON(0): Output HDMI-0 disconnected
>[    26.482] (II) RADEON(0): Output LVDS connected
>[    26.482] (II) RADEON(0): Using exact sizes for initial modes
>[    26.482] (II) RADEON(0): Output LVDS using initial mode 1920x1080 +0+0
>[    26.482] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    26.482] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:f7d7000
>[    26.482] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    26.482] (==) RADEON(0): DPI set to (96, 96)
>[    26.482] (II) Loading sub module "fb"
>[    26.482] (II) LoadModule: "fb"
>[    26.482] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    26.482] (II) Module fb: vendor="X.Org Foundation"
>[    26.482] 	compiled for 1.12.3, module version = 1.0.0
>[    26.482] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    26.483] (II) Loading sub module "ramdac"
>[    26.483] (II) LoadModule: "ramdac"
>[    26.483] (II) Module "ramdac" already built-in
>[    26.483] (II) UnloadModule: "vesa"
>[    26.483] (II) Unloading vesa
>[    26.483] (II) UnloadModule: "fbdev"
>[    26.483] (II) Unloading fbdev
>[    26.483] (II) UnloadSubModule: "fbdevhw"
>[    26.483] (II) Unloading fbdevhw
>[    26.483] (--) Depth 24 pixmap format is 32 bpp
>[    26.483] (II) RADEON(0): [DRI2] Setup complete
>[    26.483] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    26.483] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    26.483] (II) RADEON(0): Front buffer size: 8100K
>[    26.483] (II) RADEON(0): VRAM usage limit set to 221119K
>[    26.483] (II) RADEON(0): Initializing backing store
>[    26.483] (==) RADEON(0): Backing store disabled
>[    26.483] (II) RADEON(0): Direct rendering enabled
>[    26.483] (II) RADEON(0): Initializing Acceleration
>[    26.483] (II) RADEON(0): Setting EXA maxPitchBytes
>[    26.483] (II) EXA(0): Driver allocated offscreen pixmaps
>[    26.483] (II) EXA(0): Driver registered support for the following operations:
>[    26.483] (II)         Solid
>[    26.483] (II)         Copy
>[    26.483] (II)         Composite (RENDER acceleration)
>[    26.483] (II)         UploadToScreen
>[    26.483] (II)         DownloadFromScreen
>[    26.483] (II) RADEON(0): Acceleration enabled
>[    26.483] (II) RADEON(0): Initializing DPMS
>[    26.483] (==) RADEON(0): DPMS enabled
>[    26.483] (II) RADEON(0): Initializing Cursor
>[    26.483] (==) RADEON(0): Silken mouse enabled
>[    26.483] (II) RADEON(0): Initializing Xv
>[    26.483] (II) RADEON(0): Set up textured video
>[    26.483] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    26.483] (II) RADEON(0): [XvMC] Extension initialized.
>[    26.483] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    26.483] (II) RADEON(0): Initializing kms color map
>[    26.483] (II) RADEON(0): RADEONScreenInit finished
>[    26.483] (--) RandR disabled
>[    26.483] (II) Initializing built-in extension Generic Event Extension
>[    26.483] (II) Initializing built-in extension SHAPE
>[    26.483] (II) Initializing built-in extension MIT-SHM
>[    26.483] (II) Initializing built-in extension XInputExtension
>[    26.484] (II) Initializing built-in extension XTEST
>[    26.484] (II) Initializing built-in extension BIG-REQUESTS
>[    26.484] (II) Initializing built-in extension SYNC
>[    26.484] (II) Initializing built-in extension XKEYBOARD
>[    26.484] (II) Initializing built-in extension XC-MISC
>[    26.484] (II) Initializing built-in extension XINERAMA
>[    26.484] (II) Initializing built-in extension XFIXES
>[    26.484] (II) Initializing built-in extension RENDER
>[    26.484] (II) Initializing built-in extension RANDR
>[    26.484] (II) Initializing built-in extension COMPOSITE
>[    26.484] (II) Initializing built-in extension DAMAGE
>[    26.486] (II) SELinux: Disabled by boolean
>[    28.062] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    28.062] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    28.062] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    28.062] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    28.063] (II) AIGLX: Loaded and initialized r600
>[    28.063] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    28.065] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    28.255] (II) XKB: Reusing cached keymap
>[    28.260] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    28.260] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    28.260] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    28.260] (II) LoadModule: "evdev"
>[    28.260] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    28.261] (II) Module evdev: vendor="X.Org Foundation"
>[    28.261] 	compiled for 1.12.0, module version = 2.7.0
>[    28.261] 	Module class: X.Org XInput Driver
>[    28.261] 	ABI class: X.Org XInput driver, version 16.0
>[    28.261] (II) Using input driver 'evdev' for 'Power Button'
>[    28.261] 	Option "XkbRules" "evdev"
>[    28.261] 	Option "XkbModel" "pc105+inet"
>[    28.261] 	Option "XkbLayout" "us"
>[    28.261] 	Option "_source" "server/udev"
>[    28.261] 	Option "name" "Power Button"
>[    28.261] 	Option "path" "/dev/input/event3"
>[    28.261] 	Option "device" "/dev/input/event3"
>[    28.261] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    28.261] 	Option "driver" "evdev"
>[    28.261] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.261] (**) Power Button: always reports core events
>[    28.261] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    28.261] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    28.261] (--) evdev: Power Button: Found keys
>[    28.261] (II) evdev: Power Button: Configuring as keyboard
>[    28.261] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    28.261] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    28.261] (**) Option "xkb_rules" "evdev"
>[    28.261] (**) Option "xkb_model" "pc105+inet"
>[    28.261] (**) Option "xkb_layout" "us"
>[    28.261] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.290] (II) config/udev: Adding input device Video Bus (/dev/input/event6)
>[    28.290] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    28.290] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    28.290] (II) Using input driver 'evdev' for 'Video Bus'
>[    28.290] 	Option "XkbRules" "evdev"
>[    28.290] 	Option "XkbModel" "pc105+inet"
>[    28.290] 	Option "XkbLayout" "us"
>[    28.290] 	Option "_source" "server/udev"
>[    28.290] 	Option "name" "Video Bus"
>[    28.290] 	Option "path" "/dev/input/event6"
>[    28.290] 	Option "device" "/dev/input/event6"
>[    28.290] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    28.290] 	Option "driver" "evdev"
>[    28.290] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.291] (**) Video Bus: always reports core events
>[    28.291] (**) evdev: Video Bus: Device: "/dev/input/event6"
>[    28.291] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    28.291] (--) evdev: Video Bus: Found keys
>[    28.291] (II) evdev: Video Bus: Configuring as keyboard
>[    28.291] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    28.291] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    28.291] (**) Option "xkb_rules" "evdev"
>[    28.291] (**) Option "xkb_model" "pc105+inet"
>[    28.291] (**) Option "xkb_layout" "us"
>[    28.291] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.291] (II) XKB: Reusing cached keymap
>[    28.292] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    28.292] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    28.292] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    28.292] (II) Using input driver 'evdev' for 'Power Button'
>[    28.292] 	Option "XkbRules" "evdev"
>[    28.292] 	Option "XkbModel" "pc105+inet"
>[    28.292] 	Option "XkbLayout" "us"
>[    28.292] 	Option "_source" "server/udev"
>[    28.292] 	Option "name" "Power Button"
>[    28.292] 	Option "path" "/dev/input/event0"
>[    28.292] 	Option "device" "/dev/input/event0"
>[    28.292] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    28.292] 	Option "driver" "evdev"
>[    28.292] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.292] (**) Power Button: always reports core events
>[    28.292] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    28.292] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    28.292] (--) evdev: Power Button: Found keys
>[    28.292] (II) evdev: Power Button: Configuring as keyboard
>[    28.292] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    28.292] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    28.293] (**) Option "xkb_rules" "evdev"
>[    28.293] (**) Option "xkb_model" "pc105+inet"
>[    28.293] (**) Option "xkb_layout" "us"
>[    28.293] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.293] (II) XKB: Reusing cached keymap
>[    28.294] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    28.294] (II) No input driver specified, ignoring this device.
>[    28.294] (II) This device may have been added with another device file.
>[    28.294] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    28.294] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    28.294] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    28.294] (II) Using input driver 'evdev' for 'Sleep Button'
>[    28.294] 	Option "XkbRules" "evdev"
>[    28.294] 	Option "XkbModel" "pc105+inet"
>[    28.294] 	Option "XkbLayout" "us"
>[    28.294] 	Option "_source" "server/udev"
>[    28.294] 	Option "name" "Sleep Button"
>[    28.294] 	Option "path" "/dev/input/event1"
>[    28.294] 	Option "device" "/dev/input/event1"
>[    28.294] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    28.294] 	Option "driver" "evdev"
>[    28.294] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.294] (**) Sleep Button: always reports core events
>[    28.294] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    28.294] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    28.294] (--) evdev: Sleep Button: Found keys
>[    28.294] (II) evdev: Sleep Button: Configuring as keyboard
>[    28.294] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    28.294] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    28.294] (**) Option "xkb_rules" "evdev"
>[    28.294] (**) Option "xkb_model" "pc105+inet"
>[    28.294] (**) Option "xkb_layout" "us"
>[    28.294] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.294] (II) XKB: Reusing cached keymap
>[    28.295] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event10)
>[    28.295] (II) No input driver specified, ignoring this device.
>[    28.295] (II) This device may have been added with another device file.
>[    28.295] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event8)
>[    28.295] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    28.295] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    28.295] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    28.295] 	Option "XkbRules" "evdev"
>[    28.295] 	Option "XkbModel" "pc105+inet"
>[    28.295] 	Option "XkbLayout" "us"
>[    28.295] 	Option "_source" "server/udev"
>[    28.295] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    28.295] 	Option "path" "/dev/input/event8"
>[    28.295] 	Option "device" "/dev/input/event8"
>[    28.295] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    28.295] 	Option "driver" "evdev"
>[    28.295] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.295] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    28.295] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event8"
>[    28.295] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x6417
>[    28.295] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    28.295] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    28.295] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    28.295] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 10)
>[    28.295] (**) Option "xkb_rules" "evdev"
>[    28.295] (**) Option "xkb_model" "pc105+inet"
>[    28.295] (**) Option "xkb_layout" "us"
>[    28.295] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.295] (II) XKB: Reusing cached keymap
>[    28.296] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event9)
>[    28.296] (II) No input driver specified, ignoring this device.
>[    28.296] (II) This device may have been added with another device file.
>[    28.296] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    28.296] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    28.296] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    28.296] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    28.296] 	Option "XkbRules" "evdev"
>[    28.296] 	Option "XkbModel" "pc105+inet"
>[    28.296] 	Option "XkbLayout" "us"
>[    28.296] 	Option "_source" "server/udev"
>[    28.296] 	Option "name" "AT Translated Set 2 keyboard"
>[    28.296] 	Option "path" "/dev/input/event4"
>[    28.296] 	Option "device" "/dev/input/event4"
>[    28.296] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    28.296] 	Option "driver" "evdev"
>[    28.296] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.296] (**) AT Translated Set 2 keyboard: always reports core events
>[    28.296] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    28.296] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    28.296] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    28.296] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    28.296] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    28.296] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 11)
>[    28.296] (**) Option "xkb_rules" "evdev"
>[    28.296] (**) Option "xkb_model" "pc105+inet"
>[    28.296] (**) Option "xkb_layout" "us"
>[    28.296] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.296] (II) XKB: Reusing cached keymap
>[    28.297] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    28.297] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    28.297] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    28.297] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    28.297] (II) LoadModule: "synaptics"
>[    28.297] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    28.297] (II) Module synaptics: vendor="X.Org Foundation"
>[    28.297] 	compiled for 1.12.3, module version = 1.6.2
>[    28.297] 	Module class: X.Org XInput Driver
>[    28.297] 	ABI class: X.Org XInput driver, version 16.0
>[    28.297] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    28.297] 	Option "_source" "server/udev"
>[    28.297] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    28.297] 	Option "path" "/dev/input/event5"
>[    28.297] 	Option "device" "/dev/input/event5"
>[    28.297] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    28.297] 	Option "driver" "synaptics"
>[    28.297] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    28.297] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    28.297] (**) Option "Device" "/dev/input/event5"
>[    28.326] (**) Option "Device" "/dev/input/event5"
>[    28.326] port opened successfully
>[    28.326] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5836
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4908
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    28.326] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    28.326] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    28.342] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    28.342] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 12)
>[    28.342] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    28.342] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    28.342] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.036
>[    28.342] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    28.342] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    28.342] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    28.342] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    28.342] (**) Option "Device" "/dev/input/event5"
>[    28.343] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    28.343] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    28.343] (II) No input driver specified, ignoring this device.
>[    28.343] (II) This device may have been added with another device file.
>[    28.344] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event7)
>[    28.344] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    28.344] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    28.344] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    28.344] 	Option "XkbRules" "evdev"
>[    28.344] 	Option "XkbModel" "pc105+inet"
>[    28.344] 	Option "XkbLayout" "us"
>[    28.344] 	Option "_source" "server/udev"
>[    28.345] 	Option "name" "Dell WMI hotkeys"
>[    28.345] 	Option "path" "/dev/input/event7"
>[    28.345] 	Option "device" "/dev/input/event7"
>[    28.345] 	Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    28.345] 	Option "driver" "evdev"
>[    28.345] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    28.345] (**) Dell WMI hotkeys: always reports core events
>[    28.345] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event7"
>[    28.345] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    28.345] (--) evdev: Dell WMI hotkeys: Found keys
>[    28.345] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    28.345] (**) Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    28.345] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 13)
>[    28.345] (**) Option "xkb_rules" "evdev"
>[    28.345] (**) Option "xkb_model" "pc105+inet"
>[    28.345] (**) Option "xkb_layout" "us"
>[    28.345] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    28.345] (II) XKB: Reusing cached keymap
>[    28.355] (II) RADEON(0): RADEONSaveScreen(2)
>[    28.465] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    28.465] (II) RADEON(0): Printing DDC gathered Modelines:
>[    28.466] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    30.568] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    30.568] (II) RADEON(0): Printing DDC gathered Modelines:
>[    30.569] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    33.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2350290]
>[    33.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2350290] width 1920 pitch 7680 (/4 1920)
>[    33.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2350290]
>[    33.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2350290] width 1920 pitch 7680 (/4 1920)
>[    33.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2350290]
>[    33.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2350290] width 1920 pitch 7680 (/4 1920)
>[    33.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2350290]
>[    33.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2350290] width 1920 pitch 7680 (/4 1920)
>[    33.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2350290]
>[    33.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2350290] width 1920 pitch 7680 (/4 1920)
>[    33.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23502f0]
>[    33.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23502f0] width 1920 pitch 7680 (/4 1920)
>[    33.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    33.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    34.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2352100]
>[    34.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2352100] width 1920 pitch 7680 (/4 1920)
>[    34.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23520a0]
>[    34.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23520a0] width 1920 pitch 7680 (/4 1920)
>[    35.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    36.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    36.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    36.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    36.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    37.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    37.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    37.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    37.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    37.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    37.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    37.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    37.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    37.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    38.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    38.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    38.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    38.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    38.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    38.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    39.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2351940]
>[    39.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2351940] width 1920 pitch 7680 (/4 1920)
>[    39.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    39.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23569e0] width 1920 pitch 7680 (/4 1920)
>[    39.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23569e0]
>[    42.249] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    42.249] (II) RADEON(0): Printing DDC gathered Modelines:
>[    42.249] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    44.176] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    44.176] (II) RADEON(0): Printing DDC gathered Modelines:
>[    44.176] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    44.838] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    44.838] (II) RADEON(0): Printing DDC gathered Modelines:
>[    44.838] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    53.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261730]
>[    53.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261730] width 1920 pitch 7680 (/4 1920)
>[    56.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    56.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    57.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e080]
>[    57.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e080] width 1920 pitch 7680 (/4 1920)
>[    57.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    57.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    70.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    70.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    70.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    70.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    71.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    71.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    71.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    71.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    72.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    72.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    72.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    72.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    72.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    72.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    72.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    72.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    72.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    72.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    72.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    72.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    72.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    72.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    72.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    72.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    72.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    72.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    72.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    72.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    73.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    73.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    73.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380010]
>[    73.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380010] width 1920 pitch 7680 (/4 1920)
>[    73.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e0e0]
>[    73.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e0e0] width 1920 pitch 7680 (/4 1920)
>[    77.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380040]
>[    77.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380040] width 1920 pitch 7680 (/4 1920)
>[    77.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ffe0]
>[    77.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ffe0] width 1920 pitch 7680 (/4 1920)
>[    79.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2384950]
>[    79.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2384950] width 1920 pitch 7680 (/4 1920)
>[    79.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23848f0]
>[    79.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23848f0] width 1920 pitch 7680 (/4 1920)
>[    79.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2384950]
>[    79.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2384950] width 1920 pitch 7680 (/4 1920)
>[    79.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23848f0]
>[    79.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23848f0] width 1920 pitch 7680 (/4 1920)
>[    79.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2384950]
>[    79.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2384950] width 1920 pitch 7680 (/4 1920)
>[    79.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23848f0]
>[    79.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23848f0] width 1920 pitch 7680 (/4 1920)
>[    79.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2384950]
>[    79.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2384950] width 1920 pitch 7680 (/4 1920)
>[    80.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23853e0]
>[    80.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23853e0] width 1920 pitch 7680 (/4 1920)
>[    80.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23bfc20]
>[    80.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23bfc20] width 1920 pitch 7680 (/4 1920)
>[    81.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2416720]
>[    81.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2416720] width 1920 pitch 7680 (/4 1920)
>[    81.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2416640]
>[    81.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2416640] width 1920 pitch 7680 (/4 1920)
>[    89.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453fd0]
>[    89.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453fd0] width 1920 pitch 7680 (/4 1920)
>[    89.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483360]
>[    89.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483360] width 1920 pitch 7680 (/4 1920)
>[    99.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453620]
>[    99.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453620] width 1920 pitch 7680 (/4 1920)
>[    99.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464220]
>[    99.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464220] width 1920 pitch 7680 (/4 1920)
>[    99.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c38f0]
>[    99.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c38f0] width 1920 pitch 7680 (/4 1920)
>[    99.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5390]
>[    99.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5390] width 1920 pitch 7680 (/4 1920)
>[    99.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463600]
>[    99.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463600] width 1920 pitch 7680 (/4 1920)
>[    99.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5390]
>[    99.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5390] width 1920 pitch 7680 (/4 1920)
>[    99.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463600]
>[    99.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463600] width 1920 pitch 7680 (/4 1920)
>[    99.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5390]
>[    99.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5390] width 1920 pitch 7680 (/4 1920)
>[    99.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463600]
>[    99.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463600] width 1920 pitch 7680 (/4 1920)
>[    99.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5390]
>[    99.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5390] width 1920 pitch 7680 (/4 1920)
>[    99.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463600]
>[    99.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463600] width 1920 pitch 7680 (/4 1920)
>[    99.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c38f0]
>[    99.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c38f0] width 1920 pitch 7680 (/4 1920)
>[    99.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485910]
>[    99.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485910] width 1920 pitch 7680 (/4 1920)
>[    99.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463600]
>[    99.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463600] width 1920 pitch 7680 (/4 1920)
>[    99.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483360]
>[    99.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483360] width 1920 pitch 7680 (/4 1920)
>[   101.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c38f0]
>[   101.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c38f0] width 1920 pitch 7680 (/4 1920)
>[   105.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4320]
>[   105.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4320] width 1920 pitch 7680 (/4 1920)
>[   112.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cb860]
>[   112.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cb860] width 1920 pitch 7680 (/4 1920)
>[   113.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cba30]
>[   113.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cba30] width 1920 pitch 7680 (/4 1920)
>[   140.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cb300]
>[   140.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cb300] width 1920 pitch 7680 (/4 1920)
>[   140.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c45a0]
>[   140.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c45a0] width 1920 pitch 7680 (/4 1920)
>[   140.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cb300]
>[   140.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cb300] width 1920 pitch 7680 (/4 1920)
>[   140.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238c990]
>[   140.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238c990] width 1920 pitch 7680 (/4 1920)
>[   147.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cac90]
>[   147.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cac90] width 1920 pitch 7680 (/4 1920)
>[   175.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24dfbd0]
>[   175.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24dfbd0] width 1920 pitch 7680 (/4 1920)
>[   175.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247d720]
>[   175.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247d720] width 1920 pitch 7680 (/4 1920)
>[   175.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33340d0]
>[   175.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33340d0] width 1920 pitch 7680 (/4 1920)
>[   175.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c5430]
>[   175.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c5430] width 1920 pitch 7680 (/4 1920)
>[   179.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256c230]
>[   179.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256c230] width 1920 pitch 7680 (/4 1920)
>[   187.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d860]
>[   187.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d860] width 1920 pitch 7680 (/4 1920)
>[   207.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a020]
>[   207.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a020] width 1920 pitch 7680 (/4 1920)
>[   207.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d17e0]
>[   207.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d17e0] width 1920 pitch 7680 (/4 1920)
>[   207.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33340d0]
>[   207.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33340d0] width 1920 pitch 7680 (/4 1920)
>[   207.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463370]
>[   207.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463370] width 1920 pitch 7680 (/4 1920)
>[   207.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419570]
>[   207.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419570] width 1920 pitch 7680 (/4 1920)
>[   207.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d17e0]
>[   207.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d17e0] width 1920 pitch 7680 (/4 1920)
>[   207.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419570]
>[   207.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419570] width 1920 pitch 7680 (/4 1920)
>[   207.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d17e0]
>[   207.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d17e0] width 1920 pitch 7680 (/4 1920)
>[   207.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419570]
>[   207.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419570] width 1920 pitch 7680 (/4 1920)
>[   207.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241f760]
>[   207.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241f760] width 1920 pitch 7680 (/4 1920)
>[   207.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463370]
>[   207.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463370] width 1920 pitch 7680 (/4 1920)
>[   207.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463370]
>[   207.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463370] width 1920 pitch 7680 (/4 1920)
>[   207.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245dbe0]
>[   207.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245dbe0] width 1920 pitch 7680 (/4 1920)
>[   211.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24197c0]
>[   211.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24197c0] width 1920 pitch 7680 (/4 1920)
>[   217.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d17f0]
>[   217.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d17f0] width 1920 pitch 7680 (/4 1920)
>[   221.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3a50]
>[   221.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3a50] width 1920 pitch 7680 (/4 1920)
>[   221.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464540]
>[   221.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464540] width 1920 pitch 7680 (/4 1920)
>[   221.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c45a0]
>[   221.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c45a0] width 1920 pitch 7680 (/4 1920)
>[   221.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261780]
>[   221.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261780] width 1920 pitch 7680 (/4 1920)
>[   221.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c45a0]
>[   221.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c45a0] width 1920 pitch 7680 (/4 1920)
>[   221.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261780]
>[   221.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261780] width 1920 pitch 7680 (/4 1920)
>[   221.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c45a0]
>[   221.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c45a0] width 1920 pitch 7680 (/4 1920)
>[   221.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261780]
>[   221.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261780] width 1920 pitch 7680 (/4 1920)
>[   221.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c45a0]
>[   221.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c45a0] width 1920 pitch 7680 (/4 1920)
>[   221.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261780]
>[   221.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261780] width 1920 pitch 7680 (/4 1920)
>[   221.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454110]
>[   221.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454110] width 1920 pitch 7680 (/4 1920)
>[   221.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33340d0]
>[   221.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33340d0] width 1920 pitch 7680 (/4 1920)
>[   221.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33340d0]
>[   221.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33340d0] width 1920 pitch 7680 (/4 1920)
>[   221.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261730]
>[   221.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261730] width 1920 pitch 7680 (/4 1920)
>[   223.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0a80]
>[   223.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0a80] width 1920 pitch 7680 (/4 1920)
>[   232.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f750]
>[   232.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f750] width 1920 pitch 7680 (/4 1920)
>[   247.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3830]
>[   247.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3830] width 1920 pitch 7680 (/4 1920)
>[   247.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245ef40]
>[   247.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245ef40] width 1920 pitch 7680 (/4 1920)
>[   247.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2525160]
>[   247.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2525160] width 1920 pitch 7680 (/4 1920)
>[   247.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0ae0]
>[   247.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0ae0] width 1920 pitch 7680 (/4 1920)
>[   247.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   247.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0ae0]
>[   247.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0ae0] width 1920 pitch 7680 (/4 1920)
>[   247.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   247.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0ae0]
>[   247.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0ae0] width 1920 pitch 7680 (/4 1920)
>[   247.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   247.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0ae0]
>[   247.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0ae0] width 1920 pitch 7680 (/4 1920)
>[   247.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   247.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24197c0]
>[   247.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24197c0] width 1920 pitch 7680 (/4 1920)
>[   247.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   247.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   247.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   251.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c85c0]
>[   251.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c85c0] width 1920 pitch 7680 (/4 1920)
>[   262.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2478d90]
>[   262.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2478d90] width 1920 pitch 7680 (/4 1920)
>[   276.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466550]
>[   276.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466550] width 1920 pitch 7680 (/4 1920)
>[   276.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8f40]
>[   276.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8f40] width 1920 pitch 7680 (/4 1920)
>[   276.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419660]
>[   276.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419660] width 1920 pitch 7680 (/4 1920)
>[   276.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   276.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   276.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419660]
>[   276.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419660] width 1920 pitch 7680 (/4 1920)
>[   276.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   276.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   276.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419660]
>[   276.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419660] width 1920 pitch 7680 (/4 1920)
>[   276.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   276.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   276.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419660]
>[   276.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419660] width 1920 pitch 7680 (/4 1920)
>[   276.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   276.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   276.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477790]
>[   276.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477790] width 1920 pitch 7680 (/4 1920)
>[   276.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d0770]
>[   276.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d0770] width 1920 pitch 7680 (/4 1920)
>[   277.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419660]
>[   277.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419660] width 1920 pitch 7680 (/4 1920)
>[   279.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e7830]
>[   279.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e7830] width 1920 pitch 7680 (/4 1920)
>[   310.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24620c0]
>[   310.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24620c0] width 1920 pitch 7680 (/4 1920)
>[   310.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e53d0]
>[   310.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e53d0] width 1920 pitch 7680 (/4 1920)
>[   310.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24197c0]
>[   310.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24197c0] width 1920 pitch 7680 (/4 1920)
>[   310.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453f70]
>[   310.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453f70] width 1920 pitch 7680 (/4 1920)
>[   313.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e6820]
>[   313.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e6820] width 1920 pitch 7680 (/4 1920)
>[   322.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c870]
>[   322.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c870] width 1920 pitch 7680 (/4 1920)
>[   337.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245ceb0]
>[   337.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245ceb0] width 1920 pitch 7680 (/4 1920)
>[   337.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c870]
>[   337.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c870] width 1920 pitch 7680 (/4 1920)
>[   340.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25261d0]
>[   340.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25261d0] width 1920 pitch 7680 (/4 1920)
>[   340.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463970]
>[   340.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463970] width 1920 pitch 7680 (/4 1920)
>[   340.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25261d0]
>[   340.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25261d0] width 1920 pitch 7680 (/4 1920)
>[   340.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c9b0]
>[   340.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c9b0] width 1920 pitch 7680 (/4 1920)
>[   344.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524c20]
>[   344.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524c20] width 1920 pitch 7680 (/4 1920)
>[   352.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23792c0]
>[   352.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23792c0] width 1920 pitch 7680 (/4 1920)
>[   367.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466d10]
>[   367.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466d10] width 1920 pitch 7680 (/4 1920)
>[   367.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d4ce0]
>[   367.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d4ce0] width 1920 pitch 7680 (/4 1920)
>[   368.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245dc30]
>[   368.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245dc30] width 1920 pitch 7680 (/4 1920)
>[   368.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237d150]
>[   368.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237d150] width 1920 pitch 7680 (/4 1920)
>[   368.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   368.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   368.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245dbe0]
>[   368.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245dbe0] width 1920 pitch 7680 (/4 1920)
>[   371.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33379c0]
>[   371.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33379c0] width 1920 pitch 7680 (/4 1920)
>[   382.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2452c30]
>[   382.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2452c30] width 1920 pitch 7680 (/4 1920)
>[   397.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e43f0]
>[   397.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e43f0] width 1920 pitch 7680 (/4 1920)
>[   397.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f9b0]
>[   397.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f9b0] width 1920 pitch 7680 (/4 1920)
>[   397.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   397.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   397.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f9b0]
>[   397.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f9b0] width 1920 pitch 7680 (/4 1920)
>[   397.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   397.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   397.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f9b0]
>[   397.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f9b0] width 1920 pitch 7680 (/4 1920)
>[   397.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   397.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   397.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f9b0]
>[   397.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f9b0] width 1920 pitch 7680 (/4 1920)
>[   397.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   397.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   397.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f9b0]
>[   397.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f9b0] width 1920 pitch 7680 (/4 1920)
>[   397.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419810]
>[   398.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419810] width 1920 pitch 7680 (/4 1920)
>[   398.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2379470]
>[   398.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2379470] width 1920 pitch 7680 (/4 1920)
>[   398.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e53c0]
>[   398.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e53c0] width 1920 pitch 7680 (/4 1920)
>[   398.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2416ea0]
>[   398.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2416ea0] width 1920 pitch 7680 (/4 1920)
>[   398.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454080]
>[   398.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454080] width 1920 pitch 7680 (/4 1920)
>[   400.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24dffd0]
>[   400.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24dffd0] width 1920 pitch 7680 (/4 1920)
>[   412.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2467b30]
>[   412.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2467b30] width 1920 pitch 7680 (/4 1920)
>[   423.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6d60]
>[   423.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6d60] width 1920 pitch 7680 (/4 1920)
>[   423.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f910]
>[   423.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f910] width 1920 pitch 7680 (/4 1920)
>[   423.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24540d0]
>[   423.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24540d0] width 1920 pitch 7680 (/4 1920)
>[   423.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f910]
>[   423.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f910] width 1920 pitch 7680 (/4 1920)
>[   423.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24540d0]
>[   423.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24540d0] width 1920 pitch 7680 (/4 1920)
>[   423.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f910]
>[   423.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f910] width 1920 pitch 7680 (/4 1920)
>[   423.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24540d0]
>[   423.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24540d0] width 1920 pitch 7680 (/4 1920)
>[   423.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f910]
>[   423.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f910] width 1920 pitch 7680 (/4 1920)
>[   423.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24540d0]
>[   423.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24540d0] width 1920 pitch 7680 (/4 1920)
>[   423.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f910]
>[   423.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f910] width 1920 pitch 7680 (/4 1920)
>[   423.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24539a0]
>[   423.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24539a0] width 1920 pitch 7680 (/4 1920)
>[   423.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453f60]
>[   423.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453f60] width 1920 pitch 7680 (/4 1920)
>[   423.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24539a0]
>[   423.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24539a0] width 1920 pitch 7680 (/4 1920)
>[   425.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2462f10]
>[   425.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2462f10] width 1920 pitch 7680 (/4 1920)
>[   427.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526010]
>[   427.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526010] width 1920 pitch 7680 (/4 1920)
>[   453.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468ca0]
>[   453.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468ca0] width 1920 pitch 7680 (/4 1920)
>[   453.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5a50]
>[   453.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5a50] width 1920 pitch 7680 (/4 1920)
>[   453.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241e210]
>[   453.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241e210] width 1920 pitch 7680 (/4 1920)
>[   453.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ce0a0]
>[   453.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ce0a0] width 1920 pitch 7680 (/4 1920)
>[   453.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25263d0]
>[   453.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25263d0] width 1920 pitch 7680 (/4 1920)
>[   453.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2379470]
>[   453.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2379470] width 1920 pitch 7680 (/4 1920)
>[   453.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24539a0]
>[   453.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24539a0] width 1920 pitch 7680 (/4 1920)
>[   453.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e0850]
>[   453.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e0850] width 1920 pitch 7680 (/4 1920)
>[   453.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5a50]
>[   453.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5a50] width 1920 pitch 7680 (/4 1920)
>[   453.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e0850]
>[   453.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e0850] width 1920 pitch 7680 (/4 1920)
>[   453.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2379470]
>[   453.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2379470] width 1920 pitch 7680 (/4 1920)
>[   453.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2379470]
>[   453.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2379470] width 1920 pitch 7680 (/4 1920)
>[   453.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d63b0]
>[   453.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d63b0] width 1920 pitch 7680 (/4 1920)
>[   453.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24539a0]
>[   453.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24539a0] width 1920 pitch 7680 (/4 1920)
>[   455.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2462eb0]
>[   455.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2462eb0] width 1920 pitch 7680 (/4 1920)
>[   481.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2478a80]
>[   481.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2478a80] width 1920 pitch 7680 (/4 1920)
>[   481.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f880]
>[   481.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f880] width 1920 pitch 7680 (/4 1920)
>[   481.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   481.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3070]
>[   481.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3070] width 1920 pitch 7680 (/4 1920)
>[   484.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ca960]
>[   484.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ca960] width 1920 pitch 7680 (/4 1920)
>[   511.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4fd0]
>[   511.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4fd0] width 1920 pitch 7680 (/4 1920)
>[   511.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524ee0]
>[   511.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524ee0] width 1920 pitch 7680 (/4 1920)
>[   511.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4fd0]
>[   511.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4fd0] width 1920 pitch 7680 (/4 1920)
>[   511.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463020]
>[   511.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463020] width 1920 pitch 7680 (/4 1920)
>[   513.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2418340]
>[   513.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2418340] width 1920 pitch 7680 (/4 1920)
>[   546.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6110]
>[   546.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6110] width 1920 pitch 7680 (/4 1920)
>[   546.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463020]
>[   546.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463020] width 1920 pitch 7680 (/4 1920)
>[   546.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24504a0]
>[   546.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24504a0] width 1920 pitch 7680 (/4 1920)
>[   546.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453f70]
>[   546.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453f70] width 1920 pitch 7680 (/4 1920)
>[   548.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24795c0]
>[   548.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24795c0] width 1920 pitch 7680 (/4 1920)
>[   574.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2455f10]
>[   574.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2455f10] width 1920 pitch 7680 (/4 1920)
>[   574.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417370]
>[   574.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417370] width 1920 pitch 7680 (/4 1920)
>[   574.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417310]
>[   574.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417310] width 1920 pitch 7680 (/4 1920)
>[   574.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417370]
>[   574.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417370] width 1920 pitch 7680 (/4 1920)
>[   574.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417310]
>[   574.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417310] width 1920 pitch 7680 (/4 1920)
>[   574.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417370]
>[   574.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417370] width 1920 pitch 7680 (/4 1920)
>[   574.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417310]
>[   574.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417310] width 1920 pitch 7680 (/4 1920)
>[   574.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417370]
>[   574.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417370] width 1920 pitch 7680 (/4 1920)
>[   574.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417310]
>[   574.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417310] width 1920 pitch 7680 (/4 1920)
>[   574.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417370]
>[   574.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417370] width 1920 pitch 7680 (/4 1920)
>[   574.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417310]
>[   574.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417310] width 1920 pitch 7680 (/4 1920)
>[   574.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463020]
>[   574.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463020] width 1920 pitch 7680 (/4 1920)
>[   574.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453f70]
>[   574.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453f70] width 1920 pitch 7680 (/4 1920)
>[   577.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2453f10]
>[   577.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2453f10] width 1920 pitch 7680 (/4 1920)
>[   578.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   578.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   578.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   578.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   578.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   579.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   579.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   579.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   579.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   579.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   579.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   580.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   580.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   580.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421040]
>[   580.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421040] width 1920 pitch 7680 (/4 1920)
>[   580.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   580.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   580.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   580.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3410]
>[   581.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3410] width 1920 pitch 7680 (/4 1920)
>[   581.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   581.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3410]
>[   581.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3410] width 1920 pitch 7680 (/4 1920)
>[   581.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   581.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3410]
>[   581.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3410] width 1920 pitch 7680 (/4 1920)
>[   581.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   581.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   581.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   581.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   581.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   581.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   581.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c1e80]
>[   581.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c1e80] width 1920 pitch 7680 (/4 1920)
>[   581.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237e1b0]
>[   581.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237e1b0] width 1920 pitch 7680 (/4 1920)
>[   586.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468840]
>[   586.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468840] width 1920 pitch 7680 (/4 1920)
>[   586.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2455ed0]
>[   586.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2455ed0] width 1920 pitch 7680 (/4 1920)
>[   586.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8840]
>[   587.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8840] width 1920 pitch 7680 (/4 1920)
>[   587.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2455ed0]
>[   587.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2455ed0] width 1920 pitch 7680 (/4 1920)
>[   592.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aeeb0]
>[   592.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aeeb0] width 1920 pitch 7680 (/4 1920)
>[   607.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4510]
>[   607.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4510] width 1920 pitch 7680 (/4 1920)
>[   622.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4510]
>[   622.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4510] width 1920 pitch 7680 (/4 1920)
>[   637.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4510]
>[   637.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4510] width 1920 pitch 7680 (/4 1920)
>[   637.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4400]
>[   637.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4400] width 1920 pitch 7680 (/4 1920)
>[   652.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4510]
>[   652.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4510] width 1920 pitch 7680 (/4 1920)
>[   757.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0750]
>[   757.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0750] width 1920 pitch 7680 (/4 1920)
>[   757.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249fea0]
>[   757.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249fea0] width 1920 pitch 7680 (/4 1920)
>[   772.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2494720]
>[   772.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2494720] width 1920 pitch 7680 (/4 1920)
>[   787.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a7be0]
>[   787.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a7be0] width 1920 pitch 7680 (/4 1920)
>[   847.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b1470]
>[   847.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b1470] width 1920 pitch 7680 (/4 1920)
>[   862.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26167c0]
>[   862.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26167c0] width 1920 pitch 7680 (/4 1920)
>[   877.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250de70]
>[   877.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250de70] width 1920 pitch 7680 (/4 1920)
>[   948.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aca900]
>[   948.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aca900] width 1920 pitch 7680 (/4 1920)
>[   998.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cc260]
>[   998.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cc260] width 1920 pitch 7680 (/4 1920)
>[   998.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b1e80]
>[   998.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b1e80] width 1920 pitch 7680 (/4 1920)
>[   998.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248a3e0]
>[   998.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248a3e0] width 1920 pitch 7680 (/4 1920)
>[   998.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b1e80]
>[   998.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b1e80] width 1920 pitch 7680 (/4 1920)
>[  1010.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b39740]
>[  1010.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b39740] width 1920 pitch 7680 (/4 1920)
>[  1015.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30790]
>[  1015.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30790] width 1920 pitch 7680 (/4 1920)
>[  1015.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2431c20]
>[  1015.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2431c20] width 1920 pitch 7680 (/4 1920)
>[  1015.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248a3e0]
>[  1015.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248a3e0] width 1920 pitch 7680 (/4 1920)
>[  1023.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435460]
>[  1023.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435460] width 1920 pitch 7680 (/4 1920)
>[  1192.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866e40]
>[  1192.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866e40] width 1920 pitch 7680 (/4 1920)
>[  1207.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae5780]
>[  1207.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae5780] width 1920 pitch 7680 (/4 1920)
>[  1222.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37283a0]
>[  1222.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37283a0] width 1920 pitch 7680 (/4 1920)
>[  1237.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b0e0]
>[  1237.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b0e0] width 1920 pitch 7680 (/4 1920)
>[  1327.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aaeef0]
>[  1327.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aaeef0] width 1920 pitch 7680 (/4 1920)
>[  1342.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2659550]
>[  1342.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2659550] width 1920 pitch 7680 (/4 1920)
>[  1387.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1387.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1402.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d540]
>[  1402.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d540] width 1920 pitch 7680 (/4 1920)
>[  1417.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d640]
>[  1417.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d640] width 1920 pitch 7680 (/4 1920)
>[  1432.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e5510]
>[  1432.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e5510] width 1920 pitch 7680 (/4 1920)
>[  1462.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1462.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1477.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aef000]
>[  1477.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aef000] width 1920 pitch 7680 (/4 1920)
>[  1492.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712ea0]
>[  1492.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712ea0] width 1920 pitch 7680 (/4 1920)
>[  1507.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1507.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1522.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712ea0]
>[  1522.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712ea0] width 1920 pitch 7680 (/4 1920)
>[  1537.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1537.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1567.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712ea0]
>[  1567.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712ea0] width 1920 pitch 7680 (/4 1920)
>[  1582.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aef000]
>[  1582.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aef000] width 1920 pitch 7680 (/4 1920)
>[  1597.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e5510]
>[  1597.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e5510] width 1920 pitch 7680 (/4 1920)
>[  1627.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aef000]
>[  1627.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aef000] width 1920 pitch 7680 (/4 1920)
>[  1642.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e5510]
>[  1642.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e5510] width 1920 pitch 7680 (/4 1920)
>[  1657.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1657.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1672.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aef000]
>[  1672.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aef000] width 1920 pitch 7680 (/4 1920)
>[  1687.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874830]
>[  1687.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874830] width 1920 pitch 7680 (/4 1920)
>[  1702.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aef000]
>[  1702.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aef000] width 1920 pitch 7680 (/4 1920)
>[  1747.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874830]
>[  1747.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874830] width 1920 pitch 7680 (/4 1920)
>[  1882.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874830]
>[  1882.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874830] width 1920 pitch 7680 (/4 1920)
>[  1897.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382cd00]
>[  1897.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382cd00] width 1920 pitch 7680 (/4 1920)
>[  1935.180] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  1935.180] (II) RADEON(0): Printing DDC gathered Modelines:
>[  1935.180] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  2025.410] (II) RADEON(0): RADEONSaveScreen(2)
>[  2025.410] (II) RADEON(0): RADEONSaveScreen(0)
>[  3722.661] (II) RADEON(0): RADEONSaveScreen(1)
>[  3723.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2188060]
>[  3723.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2188060] width 1920 pitch 7680 (/4 1920)
>[  3738.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3833a50]
>[  3738.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3833a50] width 1920 pitch 7680 (/4 1920)
>[  3753.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab4e40]
>[  3753.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab4e40] width 1920 pitch 7680 (/4 1920)
>[  3798.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3826260]
>[  3798.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3826260] width 1920 pitch 7680 (/4 1920)
>[  3828.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3833a50]
>[  3828.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3833a50] width 1920 pitch 7680 (/4 1920)
>[  3843.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22de280]
>[  3843.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22de280] width 1920 pitch 7680 (/4 1920)
>[  3843.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3833a50]
>[  3843.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3833a50] width 1920 pitch 7680 (/4 1920)
>[  3858.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4c90]
>[  3858.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4c90] width 1920 pitch 7680 (/4 1920)
>[  3873.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2600]
>[  3873.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2600] width 1920 pitch 7680 (/4 1920)
>[  3873.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438f80]
>[  3873.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438f80] width 1920 pitch 7680 (/4 1920)
>[  3888.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e2600]
>[  3888.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e2600] width 1920 pitch 7680 (/4 1920)
>[  3918.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251edd0]
>[  3918.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251edd0] width 1920 pitch 7680 (/4 1920)
>[  3933.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f5510]
>[  3933.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f5510] width 1920 pitch 7680 (/4 1920)
>[  3993.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7260]
>[  3993.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7260] width 1920 pitch 7680 (/4 1920)
>[  3993.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370ea20]
>[  3993.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370ea20] width 1920 pitch 7680 (/4 1920)
>[  4008.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7260]
>[  4008.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7260] width 1920 pitch 7680 (/4 1920)
>[  4023.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fcb90]
>[  4023.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fcb90] width 1920 pitch 7680 (/4 1920)
>[  4023.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f8e20]
>[  4023.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f8e20] width 1920 pitch 7680 (/4 1920)
>[  4053.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ffc60]
>[  4053.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ffc60] width 1920 pitch 7680 (/4 1920)
>[  4083.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d0280]
>[  4083.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d0280] width 1920 pitch 7680 (/4 1920)
>[  4083.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aedd70]
>[  4083.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aedd70] width 1920 pitch 7680 (/4 1920)
>[  4098.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3864770]
>[  4098.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3864770] width 1920 pitch 7680 (/4 1920)
>[  4128.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b0190]
>[  4128.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b0190] width 1920 pitch 7680 (/4 1920)
>[  4158.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3879940]
>[  4158.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3879940] width 1920 pitch 7680 (/4 1920)
>[  4173.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37056a0]
>[  4173.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37056a0] width 1920 pitch 7680 (/4 1920)
>[  4203.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aedd70]
>[  4203.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aedd70] width 1920 pitch 7680 (/4 1920)
>[  4218.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aedd70]
>[  4218.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aedd70] width 1920 pitch 7680 (/4 1920)
>[  4233.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37db920]
>[  4233.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37db920] width 1920 pitch 7680 (/4 1920)
>[  4278.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38544b0]
>[  4278.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38544b0] width 1920 pitch 7680 (/4 1920)
>[  4293.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3877d40]
>[  4293.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3877d40] width 1920 pitch 7680 (/4 1920)
>[  4323.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3703150]
>[  4323.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3703150] width 1920 pitch 7680 (/4 1920)
>[  4338.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae7e20]
>[  4338.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae7e20] width 1920 pitch 7680 (/4 1920)
>[  4428.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2188060]
>[  4428.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2188060] width 1920 pitch 7680 (/4 1920)
>[  4443.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2512630]
>[  4443.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2512630] width 1920 pitch 7680 (/4 1920)
>[  4458.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261f860]
>[  4458.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261f860] width 1920 pitch 7680 (/4 1920)
>[  4473.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4780]
>[  4473.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4780] width 1920 pitch 7680 (/4 1920)
>[  4487.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f6840]
>[  4487.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f6840] width 1920 pitch 7680 (/4 1920)
>[  4487.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c3fa0]
>[  4487.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c3fa0] width 1920 pitch 7680 (/4 1920)
>[  4488.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37db3b0]
>[  4488.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37db3b0] width 1920 pitch 7680 (/4 1920)
>[  4499.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad2d10]
>[  4499.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad2d10] width 1920 pitch 7680 (/4 1920)
>[  4499.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f6060]
>[  4499.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f6060] width 1920 pitch 7680 (/4 1920)
>[  4499.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad2d10]
>[  4499.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad2d10] width 1920 pitch 7680 (/4 1920)
>[  4499.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f6060]
>[  4499.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f6060] width 1920 pitch 7680 (/4 1920)
>[  4499.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad2d10]
>[  4499.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad2d10] width 1920 pitch 7680 (/4 1920)
>[  4503.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad2d10]
>[  4503.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad2d10] width 1920 pitch 7680 (/4 1920)
>[  4533.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4310]
>[  4533.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4310] width 1920 pitch 7680 (/4 1920)
>[  4563.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9ba0]
>[  4563.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9ba0] width 1920 pitch 7680 (/4 1920)
>[  4578.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f8480]
>[  4578.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f8480] width 1920 pitch 7680 (/4 1920)
>[  4578.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370e910]
>[  4578.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370e910] width 1920 pitch 7680 (/4 1920)
>[  4593.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664c30]
>[  4593.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664c30] width 1920 pitch 7680 (/4 1920)
>[  4598.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f4c30]
>[  4598.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f4c30] width 1920 pitch 7680 (/4 1920)
>[  4623.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c042a0]
>[  4623.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c042a0] width 1920 pitch 7680 (/4 1920)
>[  4662.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2653d10]
>[  4662.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2653d10] width 1920 pitch 7680 (/4 1920)
>[  4662.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb410]
>[  4662.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb410] width 1920 pitch 7680 (/4 1920)
>[  4662.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2653d10]
>[  4662.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2653d10] width 1920 pitch 7680 (/4 1920)
>[  4662.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb410]
>[  4662.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb410] width 1920 pitch 7680 (/4 1920)
>[  4662.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2653d10]
>[  4662.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2653d10] width 1920 pitch 7680 (/4 1920)
>[  4691.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3825510]
>[  4691.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3825510] width 1920 pitch 7680 (/4 1920)
>[  4698.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aba280]
>[  4698.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aba280] width 1920 pitch 7680 (/4 1920)
>[  4698.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263eff0]
>[  4698.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263eff0] width 1920 pitch 7680 (/4 1920)
>[  4714.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3825510]
>[  4714.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3825510] width 1920 pitch 7680 (/4 1920)
>[  4715.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239f840]
>[  4715.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239f840] width 1920 pitch 7680 (/4 1920)
>[  4715.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3970]
>[  4715.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3970] width 1920 pitch 7680 (/4 1920)
>[  4715.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664c30]
>[  4715.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664c30] width 1920 pitch 7680 (/4 1920)
>[  4749.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370b3c0]
>[  4749.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370b3c0] width 1920 pitch 7680 (/4 1920)
>[  4770.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d1300]
>[  4770.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d1300] width 1920 pitch 7680 (/4 1920)
>[  4771.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243be80]
>[  4771.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243be80] width 1920 pitch 7680 (/4 1920)
>[  4771.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a16c0]
>[  4771.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a16c0] width 1920 pitch 7680 (/4 1920)
>[  4788.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243be80]
>[  4788.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243be80] width 1920 pitch 7680 (/4 1920)
>[  4803.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2663bb0]
>[  4803.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2663bb0] width 1920 pitch 7680 (/4 1920)
>[  4837.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34e90]
>[  4837.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34e90] width 1920 pitch 7680 (/4 1920)
>[  4857.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c03000]
>[  4857.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c03000] width 1920 pitch 7680 (/4 1920)
>[  4884.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5fc0]
>[  4884.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5fc0] width 1920 pitch 7680 (/4 1920)
>[  4884.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2620c80]
>[  4884.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2620c80] width 1920 pitch 7680 (/4 1920)
>[  4884.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ee3a0]
>[  4885.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ee3a0] width 1920 pitch 7680 (/4 1920)
>[  4885.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2620c80]
>[  4885.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2620c80] width 1920 pitch 7680 (/4 1920)
>[  4889.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4110]
>[  4889.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4110] width 1920 pitch 7680 (/4 1920)
>[  4889.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b260]
>[  4889.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b260] width 1920 pitch 7680 (/4 1920)
>[  4889.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37136b0]
>[  4889.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37136b0] width 1920 pitch 7680 (/4 1920)
>[  4889.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b407d0]
>[  4889.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b407d0] width 1920 pitch 7680 (/4 1920)
>[  4905.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38760a0]
>[  4905.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38760a0] width 1920 pitch 7680 (/4 1920)
>[  4934.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38760a0]
>[  4934.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38760a0] width 1920 pitch 7680 (/4 1920)
>[  4934.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc340]
>[  4934.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc340] width 1920 pitch 7680 (/4 1920)
>[  4934.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b21ae0]
>[  4934.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b21ae0] width 1920 pitch 7680 (/4 1920)
>[  4934.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc340]
>[  4934.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc340] width 1920 pitch 7680 (/4 1920)
>[  4952.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b1e70]
>[  4952.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b1e70] width 1920 pitch 7680 (/4 1920)
>[  5028.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f0990]
>[  5028.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f0990] width 1920 pitch 7680 (/4 1920)
>[  5043.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519d30]
>[  5043.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519d30] width 1920 pitch 7680 (/4 1920)
>[  5056.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3869320]
>[  5056.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3869320] width 1920 pitch 7680 (/4 1920)
>[  5057.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3825be0]
>[  5057.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3825be0] width 1920 pitch 7680 (/4 1920)
>[  5057.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d20c0]
>[  5057.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d20c0] width 1920 pitch 7680 (/4 1920)
>[  5068.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bffa0]
>[  5068.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bffa0] width 1920 pitch 7680 (/4 1920)
>[  5079.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cce80]
>[  5079.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cce80] width 1920 pitch 7680 (/4 1920)
>[  5079.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cce80]
>[  5079.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cce80] width 1920 pitch 7680 (/4 1920)
>[  5079.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263eff0]
>[  5079.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263eff0] width 1920 pitch 7680 (/4 1920)
>[  5079.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243be80]
>[  5079.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243be80] width 1920 pitch 7680 (/4 1920)
>[  5108.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad4f00]
>[  5108.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad4f00] width 1920 pitch 7680 (/4 1920)
>[  5133.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab8a0]
>[  5133.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab8a0] width 1920 pitch 7680 (/4 1920)
>[  5133.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eef60]
>[  5133.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eef60] width 1920 pitch 7680 (/4 1920)
>[  5148.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261d3f0]
>[  5148.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261d3f0] width 1920 pitch 7680 (/4 1920)
>[  5193.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39248a0]
>[  5193.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39248a0] width 1920 pitch 7680 (/4 1920)
>[  5208.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26033a0]
>[  5208.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26033a0] width 1920 pitch 7680 (/4 1920)
>[  5253.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39248a0]
>[  5253.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39248a0] width 1920 pitch 7680 (/4 1920)
>[  5283.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26033a0]
>[  5283.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26033a0] width 1920 pitch 7680 (/4 1920)
>[  5358.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386a5d0]
>[  5358.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386a5d0] width 1920 pitch 7680 (/4 1920)
>[  5373.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866f20]
>[  5373.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866f20] width 1920 pitch 7680 (/4 1920)
>[  5377.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251a2a0]
>[  5377.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251a2a0] width 1920 pitch 7680 (/4 1920)
>[  5377.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386a5d0]
>[  5377.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386a5d0] width 1920 pitch 7680 (/4 1920)
>[  5377.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2431c20]
>[  5377.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2431c20] width 1920 pitch 7680 (/4 1920)
>[  5377.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386a5d0]
>[  5377.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386a5d0] width 1920 pitch 7680 (/4 1920)
>[  5377.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2431c20]
>[  5377.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2431c20] width 1920 pitch 7680 (/4 1920)
>[  5377.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248a3e0]
>[  5377.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248a3e0] width 1920 pitch 7680 (/4 1920)
>[  5377.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b358d0]
>[  5377.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b358d0] width 1920 pitch 7680 (/4 1920)
>[  5377.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248a3e0]
>[  5377.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248a3e0] width 1920 pitch 7680 (/4 1920)
>[  5377.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b358d0]
>[  5377.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b358d0] width 1920 pitch 7680 (/4 1920)
>[  5377.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248a3e0]
>[  5377.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248a3e0] width 1920 pitch 7680 (/4 1920)
>[  5433.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad7850]
>[  5433.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad7850] width 1920 pitch 7680 (/4 1920)
>[  5448.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370b160]
>[  5448.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370b160] width 1920 pitch 7680 (/4 1920)
>[  5478.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f58c0]
>[  5478.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f58c0] width 1920 pitch 7680 (/4 1920)
>[  5493.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dd950]
>[  5493.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dd950] width 1920 pitch 7680 (/4 1920)
>[  5523.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab4350]
>[  5523.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab4350] width 1920 pitch 7680 (/4 1920)
>[  5553.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3804490]
>[  5553.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3804490] width 1920 pitch 7680 (/4 1920)
>[  5628.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d0560]
>[  5628.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d0560] width 1920 pitch 7680 (/4 1920)
>[  5643.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249fdf0]
>[  5643.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249fdf0] width 1920 pitch 7680 (/4 1920)
>[  5786.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3f250]
>[  5786.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3f250] width 1920 pitch 7680 (/4 1920)
>[  5800.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0950]
>[  5800.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0950] width 1920 pitch 7680 (/4 1920)
>[  5800.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5800.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37080b0]
>[  5800.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37080b0] width 1920 pitch 7680 (/4 1920)
>[  5800.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5800.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37080b0]
>[  5800.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37080b0] width 1920 pitch 7680 (/4 1920)
>[  5800.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5800.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37080b0]
>[  5800.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37080b0] width 1920 pitch 7680 (/4 1920)
>[  5800.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5800.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37080b0]
>[  5800.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37080b0] width 1920 pitch 7680 (/4 1920)
>[  5800.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5800.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37080b0]
>[  5800.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37080b0] width 1920 pitch 7680 (/4 1920)
>[  5800.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d7c0]
>[  5800.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d7c0] width 1920 pitch 7680 (/4 1920)
>[  5810.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24aea10]
>[  5810.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24aea10] width 1920 pitch 7680 (/4 1920)
>[  5810.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[  5810.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[  5810.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c38b0]
>[  5810.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c38b0] width 1920 pitch 7680 (/4 1920)
>[  5810.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[  5810.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[  5810.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c38b0]
>[  5810.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c38b0] width 1920 pitch 7680 (/4 1920)
>[  5810.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[  5810.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[  5810.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c38b0]
>[  5810.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c38b0] width 1920 pitch 7680 (/4 1920)
>[  5810.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[  5810.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[  5810.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c38b0]
>[  5810.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c38b0] width 1920 pitch 7680 (/4 1920)
>[  5810.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[  5810.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[  5810.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c38b0]
>[  5810.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c38b0] width 1920 pitch 7680 (/4 1920)
>[  5811.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b260]
>[  5811.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b260] width 1920 pitch 7680 (/4 1920)
>[  5811.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37136b0]
>[  5811.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37136b0] width 1920 pitch 7680 (/4 1920)
>[  5823.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d3de0]
>[  5823.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d3de0] width 1920 pitch 7680 (/4 1920)
>[  5853.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b18fc0]
>[  5853.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b18fc0] width 1920 pitch 7680 (/4 1920)
>[  5868.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e970]
>[  5868.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e970] width 1920 pitch 7680 (/4 1920)
>[  6033.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bba0]
>[  6033.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bba0] width 1920 pitch 7680 (/4 1920)
>[  6048.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7190]
>[  6048.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7190] width 1920 pitch 7680 (/4 1920)
>[  6213.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad1710]
>[  6213.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad1710] width 1920 pitch 7680 (/4 1920)
>[  6254.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0c180]
>[  6254.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0c180] width 1920 pitch 7680 (/4 1920)
>[  6254.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b328f0]
>[  6254.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b328f0] width 1920 pitch 7680 (/4 1920)
>[  6255.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6255.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6255.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6255.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6255.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6255.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6255.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6255.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6255.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6255.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6255.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6255.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6255.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6255.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6255.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6255.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6255.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6255.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6256.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6256.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6256.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6256.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6256.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6256.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6256.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250bc40]
>[  6256.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250bc40] width 1920 pitch 7680 (/4 1920)
>[  6256.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aef20]
>[  6256.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aef20] width 1920 pitch 7680 (/4 1920)
>[  6256.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250bc40]
>[  6256.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250bc40] width 1920 pitch 7680 (/4 1920)
>[  6256.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2390]
>[  6256.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2390] width 1920 pitch 7680 (/4 1920)
>[  6257.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b39e40]
>[  6257.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b39e40] width 1920 pitch 7680 (/4 1920)
>[  6257.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x242add0]
>[  6257.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x242add0] width 1920 pitch 7680 (/4 1920)
>[  6257.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3877ec0]
>[  6257.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3877ec0] width 1920 pitch 7680 (/4 1920)
>[  6257.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495960]
>[  6257.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495960] width 1920 pitch 7680 (/4 1920)
>[  6257.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab8a0]
>[  6257.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab8a0] width 1920 pitch 7680 (/4 1920)
>[  6257.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495960]
>[  6257.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495960] width 1920 pitch 7680 (/4 1920)
>[  6257.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[  6257.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[  6257.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495960]
>[  6257.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495960] width 1920 pitch 7680 (/4 1920)
>[  6257.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[  6257.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[  6257.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495960]
>[  6257.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495960] width 1920 pitch 7680 (/4 1920)
>[  6257.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ba450]
>[  6257.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ba450] width 1920 pitch 7680 (/4 1920)
>[  6258.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432090]
>[  6258.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432090] width 1920 pitch 7680 (/4 1920)
>[  6258.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ba450]
>[  6258.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ba450] width 1920 pitch 7680 (/4 1920)
>[  6258.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913110]
>[  6258.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913110] width 1920 pitch 7680 (/4 1920)
>[  6363.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9460]
>[  6363.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9460] width 1920 pitch 7680 (/4 1920)
>[  6378.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9460]
>[  6378.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9460] width 1920 pitch 7680 (/4 1920)
>[  6393.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d4440]
>[  6393.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d4440] width 1920 pitch 7680 (/4 1920)
>[  6453.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249b2c0]
>[  6453.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249b2c0] width 1920 pitch 7680 (/4 1920)
>[  6468.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868160]
>[  6468.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868160] width 1920 pitch 7680 (/4 1920)
>[  6483.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe5b0]
>[  6483.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe5b0] width 1920 pitch 7680 (/4 1920)
>[  6498.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe5b0]
>[  6498.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe5b0] width 1920 pitch 7680 (/4 1920)
>[  6524.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248ccb0]
>[  6524.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248ccb0] width 1920 pitch 7680 (/4 1920)
>[  6525.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38042d0]
>[  6525.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38042d0] width 1920 pitch 7680 (/4 1920)
>[  6543.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263e720]
>[  6543.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263e720] width 1920 pitch 7680 (/4 1920)
>[  6565.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3260]
>[  6565.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3260] width 1920 pitch 7680 (/4 1920)
>[  6588.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1650]
>[  6588.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1650] width 1920 pitch 7680 (/4 1920)
>[  6661.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3717620]
>[  6661.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3717620] width 1920 pitch 7680 (/4 1920)
>[  6663.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495590]
>[  6663.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495590] width 1920 pitch 7680 (/4 1920)
>[  6670.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2439c30]
>[  6670.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2439c30] width 1920 pitch 7680 (/4 1920)
>[  6672.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495590]
>[  6672.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495590] width 1920 pitch 7680 (/4 1920)
>[  6693.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35a10]
>[  6693.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35a10] width 1920 pitch 7680 (/4 1920)
>[  6708.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab6b30]
>[  6708.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab6b30] width 1920 pitch 7680 (/4 1920)
>[  6753.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7260]
>[  6753.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7260] width 1920 pitch 7680 (/4 1920)
>[  6754.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2422450]
>[  6755.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2422450] width 1920 pitch 7680 (/4 1920)
>[  6768.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245e4a0]
>[  6768.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245e4a0] width 1920 pitch 7680 (/4 1920)
>[  6798.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ffde0]
>[  6798.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ffde0] width 1920 pitch 7680 (/4 1920)
>[  6802.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2476090]
>[  6802.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2476090] width 1920 pitch 7680 (/4 1920)
>[  6903.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459f60]
>[  6903.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459f60] width 1920 pitch 7680 (/4 1920)
>[  6903.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a5e0]
>[  6903.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a5e0] width 1920 pitch 7680 (/4 1920)
>[  6906.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6906.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6906.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6906.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6906.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6906.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6906.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6906.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6906.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6906.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6906.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6906.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6906.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6906.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6906.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6906.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6906.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6906.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6907.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6907.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6907.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6907.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6907.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6907.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6907.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1b30]
>[  6908.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1b30] width 1920 pitch 7680 (/4 1920)
>[  6911.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6911.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6911.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b570]
>[  6912.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b570] width 1920 pitch 7680 (/4 1920)
>[  6912.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6912.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6912.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b570]
>[  6912.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b570] width 1920 pitch 7680 (/4 1920)
>[  6912.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6912.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6912.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b570]
>[  6912.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b570] width 1920 pitch 7680 (/4 1920)
>[  6912.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  6912.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  6912.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b570]
>[  6912.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b570] width 1920 pitch 7680 (/4 1920)
>[  6912.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23927c0]
>[  6912.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23927c0] width 1920 pitch 7680 (/4 1920)
>[  6933.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2415620]
>[  6933.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2415620] width 1920 pitch 7680 (/4 1920)
>[  6933.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2445c90]
>[  6933.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2445c90] width 1920 pitch 7680 (/4 1920)
>[  6958.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2620570]
>[  6958.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2620570] width 1920 pitch 7680 (/4 1920)
>[  6963.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26209f0]
>[  6963.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26209f0] width 1920 pitch 7680 (/4 1920)
>[  6978.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d4850]
>[  6978.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d4850] width 1920 pitch 7680 (/4 1920)
>[  6993.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ba820]
>[  6993.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ba820] width 1920 pitch 7680 (/4 1920)
>[  6993.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b20e00]
>[  6993.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b20e00] width 1920 pitch 7680 (/4 1920)
>[  7008.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b20e00]
>[  7008.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b20e00] width 1920 pitch 7680 (/4 1920)
>[  7028.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ba820]
>[  7028.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ba820] width 1920 pitch 7680 (/4 1920)
>[  7034.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2432a80]
>[  7034.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2432a80] width 1920 pitch 7680 (/4 1920)
>[  7044.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2491850]
>[  7044.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2491850] width 1920 pitch 7680 (/4 1920)
>[  7046.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aefa40]
>[  7046.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aefa40] width 1920 pitch 7680 (/4 1920)
>[  7053.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913700]
>[  7053.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913700] width 1920 pitch 7680 (/4 1920)
>[  7068.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602470]
>[  7068.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602470] width 1920 pitch 7680 (/4 1920)
>[  7083.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f820]
>[  7083.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f820] width 1920 pitch 7680 (/4 1920)
>[  7098.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608c30]
>[  7098.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608c30] width 1920 pitch 7680 (/4 1920)
>[  7124.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3858c60]
>[  7124.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3858c60] width 1920 pitch 7680 (/4 1920)
>[  7124.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117c0]
>[  7124.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117c0] width 1920 pitch 7680 (/4 1920)
>[  7124.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239bed0]
>[  7124.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239bed0] width 1920 pitch 7680 (/4 1920)
>[  7125.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117c0]
>[  7125.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117c0] width 1920 pitch 7680 (/4 1920)
>[  7125.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239bed0]
>[  7125.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239bed0] width 1920 pitch 7680 (/4 1920)
>[  7134.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e5510]
>[  7134.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e5510] width 1920 pitch 7680 (/4 1920)
>[  7146.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae47f0]
>[  7146.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae47f0] width 1920 pitch 7680 (/4 1920)
>[  7203.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2445580]
>[  7203.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2445580] width 1920 pitch 7680 (/4 1920)
>[  7233.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2445580]
>[  7233.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2445580] width 1920 pitch 7680 (/4 1920)
>[  7235.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260b800]
>[  7235.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260b800] width 1920 pitch 7680 (/4 1920)
>[  7236.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f87c0]
>[  7236.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f87c0] width 1920 pitch 7680 (/4 1920)
>[  7248.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cfdd0]
>[  7248.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cfdd0] width 1920 pitch 7680 (/4 1920)
>[  7248.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372b760]
>[  7248.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372b760] width 1920 pitch 7680 (/4 1920)
>[  7293.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f1810]
>[  7293.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f1810] width 1920 pitch 7680 (/4 1920)
>[  7306.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b570]
>[  7306.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b570] width 1920 pitch 7680 (/4 1920)
>[  7307.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cbe0]
>[  7307.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cbe0] width 1920 pitch 7680 (/4 1920)
>[  7313.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3823d20]
>[  7313.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3823d20] width 1920 pitch 7680 (/4 1920)
>[  7323.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c490]
>[  7323.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c490] width 1920 pitch 7680 (/4 1920)
>[  7338.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c490]
>[  7338.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c490] width 1920 pitch 7680 (/4 1920)
>[  7343.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b20700]
>[  7343.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b20700] width 1920 pitch 7680 (/4 1920)
>[  7348.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f950]
>[  7348.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f950] width 1920 pitch 7680 (/4 1920)
>[  7401.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfdae0]
>[  7401.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfdae0] width 1920 pitch 7680 (/4 1920)
>[  7413.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916dd0]
>[  7413.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916dd0] width 1920 pitch 7680 (/4 1920)
>[  7422.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38055a0]
>[  7422.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38055a0] width 1920 pitch 7680 (/4 1920)
>[  7428.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24abb70]
>[  7428.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24abb70] width 1920 pitch 7680 (/4 1920)
>[  7449.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b5f00]
>[  7449.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b5f00] width 1920 pitch 7680 (/4 1920)
>[  7456.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463bd0]
>[  7456.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463bd0] width 1920 pitch 7680 (/4 1920)
>[  7517.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4710]
>[  7517.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4710] width 1920 pitch 7680 (/4 1920)
>[  7522.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520300]
>[  7523.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520300] width 1920 pitch 7680 (/4 1920)
>[  7600.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fa170]
>[  7600.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fa170] width 1920 pitch 7680 (/4 1920)
>[  7600.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261c210]
>[  7600.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261c210] width 1920 pitch 7680 (/4 1920)
>[  7600.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7600.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[  7600.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[  7600.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7600.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[  7600.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[  7600.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7600.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[  7600.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[  7600.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7600.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[  7600.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[  7600.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7600.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[  7600.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[  7600.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[  7600.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[  7608.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2620110]
>[  7608.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2620110] width 1920 pitch 7680 (/4 1920)
>[  7614.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb4e0]
>[  7614.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb4e0] width 1920 pitch 7680 (/4 1920)
>[  7623.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9e7f0]
>[  7623.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9e7f0] width 1920 pitch 7680 (/4 1920)
>[  7625.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249e3e0]
>[  7625.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249e3e0] width 1920 pitch 7680 (/4 1920)
>[  7638.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3823310]
>[  7638.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3823310] width 1920 pitch 7680 (/4 1920)
>[  7638.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fccb0]
>[  7638.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fccb0] width 1920 pitch 7680 (/4 1920)
>[  7643.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921f30]
>[  7643.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921f30] width 1920 pitch 7680 (/4 1920)
>[  7653.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fdf30]
>[  7653.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fdf30] width 1920 pitch 7680 (/4 1920)
>[  7658.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641970]
>[  7658.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641970] width 1920 pitch 7680 (/4 1920)
>[  7668.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d15f0]
>[  7668.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d15f0] width 1920 pitch 7680 (/4 1920)
>[  7676.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c4460]
>[  7676.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c4460] width 1920 pitch 7680 (/4 1920)
>[  7698.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0ff10]
>[  7698.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0ff10] width 1920 pitch 7680 (/4 1920)
>[  7713.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acf0f0]
>[  7713.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acf0f0] width 1920 pitch 7680 (/4 1920)
>[  7773.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919a70]
>[  7773.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919a70] width 1920 pitch 7680 (/4 1920)
>[  7788.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37df380]
>[  7788.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37df380] width 1920 pitch 7680 (/4 1920)
>[  7818.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385e0a0]
>[  7818.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385e0a0] width 1920 pitch 7680 (/4 1920)
>[  7818.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aaac20]
>[  7818.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aaac20] width 1920 pitch 7680 (/4 1920)
>[  7833.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3716060]
>[  7833.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3716060] width 1920 pitch 7680 (/4 1920)
>[  7878.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39231b0]
>[  7878.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39231b0] width 1920 pitch 7680 (/4 1920)
>[  7893.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aadd0]
>[  7893.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aadd0] width 1920 pitch 7680 (/4 1920)
>[  7923.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371e1c0]
>[  7923.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371e1c0] width 1920 pitch 7680 (/4 1920)
>[  7930.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d80]
>[  7930.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d80] width 1920 pitch 7680 (/4 1920)
>[  7953.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aced0]
>[  7953.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aced0] width 1920 pitch 7680 (/4 1920)
>[  7998.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2610230]
>[  7998.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2610230] width 1920 pitch 7680 (/4 1920)
>[  8013.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad1710]
>[  8013.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad1710] width 1920 pitch 7680 (/4 1920)
>[  8043.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cba50]
>[  8043.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cba50] width 1920 pitch 7680 (/4 1920)
>[  8058.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2396c60]
>[  8058.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2396c60] width 1920 pitch 7680 (/4 1920)
>[  8060.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25028a0]
>[  8060.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25028a0] width 1920 pitch 7680 (/4 1920)
>[  8093.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26266e0]
>[  8093.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26266e0] width 1920 pitch 7680 (/4 1920)
>[  8099.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496de0]
>[  8099.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496de0] width 1920 pitch 7680 (/4 1920)
>[  8103.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a8530]
>[  8103.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a8530] width 1920 pitch 7680 (/4 1920)
>[  8108.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b11c80]
>[  8108.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b11c80] width 1920 pitch 7680 (/4 1920)
>[  8114.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8114.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8133.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d60b0]
>[  8133.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d60b0] width 1920 pitch 7680 (/4 1920)
>[  8140.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8140.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8140.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8140.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8140.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8140.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8140.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8140.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8140.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8140.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8140.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8140.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8140.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8140.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8141.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8141.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8141.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8141.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8141.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8141.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8141.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8142.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8142.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8142.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8142.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8142.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8142.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8142.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8142.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8142.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8142.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8142.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8142.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8142.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8142.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382bc0]
>[  8142.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382bc0] width 1920 pitch 7680 (/4 1920)
>[  8142.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[  8142.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[  8142.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3877ac0]
>[  8142.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3877ac0] width 1920 pitch 7680 (/4 1920)
>[  8142.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2621400]
>[  8142.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2621400] width 1920 pitch 7680 (/4 1920)
>[  8148.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465d20]
>[  8148.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465d20] width 1920 pitch 7680 (/4 1920)
>[  8148.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4e00]
>[  8148.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4e00] width 1920 pitch 7680 (/4 1920)
>[  8148.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465d20]
>[  8148.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465d20] width 1920 pitch 7680 (/4 1920)
>[  8163.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a9ca0]
>[  8163.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a9ca0] width 1920 pitch 7680 (/4 1920)
>[  8178.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa280]
>[  8178.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa280] width 1920 pitch 7680 (/4 1920)
>[  8193.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39adad0]
>[  8193.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39adad0] width 1920 pitch 7680 (/4 1920)
>[  8202.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635f50]
>[  8202.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635f50] width 1920 pitch 7680 (/4 1920)
>[  8202.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263e790]
>[  8202.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263e790] width 1920 pitch 7680 (/4 1920)
>[  8238.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2510790]
>[  8238.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2510790] width 1920 pitch 7680 (/4 1920)
>[  8253.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9970]
>[  8253.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9970] width 1920 pitch 7680 (/4 1920)
>[  8298.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488c90]
>[  8298.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488c90] width 1920 pitch 7680 (/4 1920)
>[  8313.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9970]
>[  8313.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9970] width 1920 pitch 7680 (/4 1920)
>[  8328.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803430]
>[  8328.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803430] width 1920 pitch 7680 (/4 1920)
>[  8334.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2398730]
>[  8334.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2398730] width 1920 pitch 7680 (/4 1920)
>[  8343.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5d10]
>[  8343.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5d10] width 1920 pitch 7680 (/4 1920)
>[  8343.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370d160]
>[  8343.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370d160] width 1920 pitch 7680 (/4 1920)
>[  8358.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3729f80]
>[  8358.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3729f80] width 1920 pitch 7680 (/4 1920)
>[  8358.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723720]
>[  8358.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723720] width 1920 pitch 7680 (/4 1920)
>[  8372.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5d10]
>[  8372.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5d10] width 1920 pitch 7680 (/4 1920)
>[  8373.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5d10]
>[  8373.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5d10] width 1920 pitch 7680 (/4 1920)
>[  8379.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915120]
>[  8379.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915120] width 1920 pitch 7680 (/4 1920)
>[  8384.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2440200]
>[  8384.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2440200] width 1920 pitch 7680 (/4 1920)
>[  8388.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2440200]
>[  8388.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2440200] width 1920 pitch 7680 (/4 1920)
>[  8413.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37275c0]
>[  8413.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37275c0] width 1920 pitch 7680 (/4 1920)
>[  8422.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3870ba0]
>[  8422.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3870ba0] width 1920 pitch 7680 (/4 1920)
>[  8433.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723720]
>[  8433.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723720] width 1920 pitch 7680 (/4 1920)
>[  8443.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b46d0]
>[  8443.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b46d0] width 1920 pitch 7680 (/4 1920)
>[  8448.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f6060]
>[  8448.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f6060] width 1920 pitch 7680 (/4 1920)
>[  8453.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d410]
>[  8453.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d410] width 1920 pitch 7680 (/4 1920)
>[  8483.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3703b90]
>[  8483.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3703b90] width 1920 pitch 7680 (/4 1920)
>[  8504.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b22930]
>[  8504.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b22930] width 1920 pitch 7680 (/4 1920)
>[  8508.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2422660]
>[  8508.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2422660] width 1920 pitch 7680 (/4 1920)
>[  8513.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3701d40]
>[  8513.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3701d40] width 1920 pitch 7680 (/4 1920)
>[  8520.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cdae0]
>[  8520.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cdae0] width 1920 pitch 7680 (/4 1920)
>[  8538.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fb10]
>[  8538.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fb10] width 1920 pitch 7680 (/4 1920)
>[  8549.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26242e0]
>[  8549.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26242e0] width 1920 pitch 7680 (/4 1920)
>[  8553.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eccb0]
>[  8553.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eccb0] width 1920 pitch 7680 (/4 1920)
>[  8580.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520b70]
>[  8580.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520b70] width 1920 pitch 7680 (/4 1920)
>[  8583.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d60b0]
>[  8583.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d60b0] width 1920 pitch 7680 (/4 1920)
>[  8613.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[  8613.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[  8613.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c630]
>[  8613.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c630] width 1920 pitch 7680 (/4 1920)
>[  8628.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15910]
>[  8628.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15910] width 1920 pitch 7680 (/4 1920)
>[  8673.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265a900]
>[  8673.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265a900] width 1920 pitch 7680 (/4 1920)
>[  8673.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1950]
>[  8673.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1950] width 1920 pitch 7680 (/4 1920)
>[  8703.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26094f0]
>[  8703.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26094f0] width 1920 pitch 7680 (/4 1920)
>[  8898.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[  8898.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[  8913.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38235f0]
>[  8913.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38235f0] width 1920 pitch 7680 (/4 1920)
>[  8928.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad5e80]
>[  8928.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad5e80] width 1920 pitch 7680 (/4 1920)
>[  8943.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7900]
>[  8943.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7900] width 1920 pitch 7680 (/4 1920)
>[  9078.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3811290]
>[  9078.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3811290] width 1920 pitch 7680 (/4 1920)
>[  9093.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad9290]
>[  9093.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad9290] width 1920 pitch 7680 (/4 1920)
>[  9094.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fd460]
>[  9094.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fd460] width 1920 pitch 7680 (/4 1920)
>[  9153.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3839710]
>[  9153.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3839710] width 1920 pitch 7680 (/4 1920)
>[  9168.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[  9168.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[  9179.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b9c90]
>[  9179.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b9c90] width 1920 pitch 7680 (/4 1920)
>[  9198.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846fb0]
>[  9198.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846fb0] width 1920 pitch 7680 (/4 1920)
>[  9218.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919610]
>[  9218.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919610] width 1920 pitch 7680 (/4 1920)
>[  9218.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251e810]
>[  9218.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251e810] width 1920 pitch 7680 (/4 1920)
>[  9218.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846fb0]
>[  9218.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846fb0] width 1920 pitch 7680 (/4 1920)
>[  9218.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3812050]
>[  9218.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3812050] width 1920 pitch 7680 (/4 1920)
>[  9243.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846fb0]
>[  9243.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846fb0] width 1920 pitch 7680 (/4 1920)
>[  9258.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9258.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9273.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371c380]
>[  9273.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371c380] width 1920 pitch 7680 (/4 1920)
>[  9281.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d3150]
>[  9281.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d3150] width 1920 pitch 7680 (/4 1920)
>[  9322.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489750]
>[  9322.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489750] width 1920 pitch 7680 (/4 1920)
>[  9322.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9322.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9322.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9322.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9322.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9322.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9322.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9322.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9322.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9322.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9322.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9322.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9322.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9322.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9322.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9322.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9322.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9325.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a7d70]
>[  9325.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a7d70] width 1920 pitch 7680 (/4 1920)
>[  9344.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a64300]
>[  9344.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a64300] width 1920 pitch 7680 (/4 1920)
>[  9344.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9344.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9344.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf3e0]
>[  9344.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf3e0] width 1920 pitch 7680 (/4 1920)
>[  9344.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37028a0]
>[  9345.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37028a0] width 1920 pitch 7680 (/4 1920)
>[  9498.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ac6f0]
>[  9498.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ac6f0] width 1920 pitch 7680 (/4 1920)
>[  9498.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25152e0]
>[  9498.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25152e0] width 1920 pitch 7680 (/4 1920)
>[  9513.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262dc40]
>[  9513.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262dc40] width 1920 pitch 7680 (/4 1920)
>[  9599.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24bb790]
>[  9599.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24bb790] width 1920 pitch 7680 (/4 1920)
>[  9633.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263d310]
>[  9633.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263d310] width 1920 pitch 7680 (/4 1920)
>[  9648.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f93b0]
>[  9648.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f93b0] width 1920 pitch 7680 (/4 1920)
>[  9648.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263d310]
>[  9648.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263d310] width 1920 pitch 7680 (/4 1920)
>[  9660.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249a410]
>[  9660.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249a410] width 1920 pitch 7680 (/4 1920)
>[  9660.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24224a0]
>[  9660.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24224a0] width 1920 pitch 7680 (/4 1920)
>[  9660.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35850]
>[  9660.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35850] width 1920 pitch 7680 (/4 1920)
>[  9660.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5b0]
>[  9660.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5b0] width 1920 pitch 7680 (/4 1920)
>[  9660.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35850]
>[  9660.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35850] width 1920 pitch 7680 (/4 1920)
>[  9660.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5b0]
>[  9660.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5b0] width 1920 pitch 7680 (/4 1920)
>[  9660.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35850]
>[  9660.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35850] width 1920 pitch 7680 (/4 1920)
>[  9660.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5b0]
>[  9660.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5b0] width 1920 pitch 7680 (/4 1920)
>[  9660.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35850]
>[  9660.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35850] width 1920 pitch 7680 (/4 1920)
>[  9660.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5b0]
>[  9660.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5b0] width 1920 pitch 7680 (/4 1920)
>[  9683.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727bb0]
>[  9683.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727bb0] width 1920 pitch 7680 (/4 1920)
>[  9708.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f2a30]
>[  9708.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f2a30] width 1920 pitch 7680 (/4 1920)
>[  9708.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2388a40]
>[  9708.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2388a40] width 1920 pitch 7680 (/4 1920)
>[  9723.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f2a30]
>[  9723.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f2a30] width 1920 pitch 7680 (/4 1920)
>[  9758.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634160]
>[  9758.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634160] width 1920 pitch 7680 (/4 1920)
>[  9759.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613ba0]
>[  9759.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613ba0] width 1920 pitch 7680 (/4 1920)
>[  9759.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[  9759.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[  9759.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6160]
>[  9759.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6160] width 1920 pitch 7680 (/4 1920)
>[  9759.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[  9759.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[  9759.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6160]
>[  9759.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6160] width 1920 pitch 7680 (/4 1920)
>[  9759.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[  9759.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[  9759.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6160]
>[  9759.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6160] width 1920 pitch 7680 (/4 1920)
>[  9759.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[  9759.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[  9759.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6160]
>[  9759.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6160] width 1920 pitch 7680 (/4 1920)
>[  9759.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[  9759.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[  9759.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6160]
>[  9759.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6160] width 1920 pitch 7680 (/4 1920)
>[  9858.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be2040]
>[  9858.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be2040] width 1920 pitch 7680 (/4 1920)
>[  9873.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3814740]
>[  9873.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3814740] width 1920 pitch 7680 (/4 1920)
>[  9888.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f1fa0]
>[  9888.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f1fa0] width 1920 pitch 7680 (/4 1920)
>[  9978.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3815050]
>[  9978.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3815050] width 1920 pitch 7680 (/4 1920)
>[  9993.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496ad0]
>[  9993.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496ad0] width 1920 pitch 7680 (/4 1920)
>[ 10113.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3863a60]
>[ 10113.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3863a60] width 1920 pitch 7680 (/4 1920)
>[ 10128.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dccf0]
>[ 10128.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dccf0] width 1920 pitch 7680 (/4 1920)
>[ 10128.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25152e0]
>[ 10128.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25152e0] width 1920 pitch 7680 (/4 1920)
>[ 10158.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a64190]
>[ 10158.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a64190] width 1920 pitch 7680 (/4 1920)
>[ 10160.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2444810]
>[ 10160.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2444810] width 1920 pitch 7680 (/4 1920)
>[ 10188.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 10188.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 10189.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912a50]
>[ 10189.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912a50] width 1920 pitch 7680 (/4 1920)
>[ 10218.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8310]
>[ 10218.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8310] width 1920 pitch 7680 (/4 1920)
>[ 10223.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842c20]
>[ 10223.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842c20] width 1920 pitch 7680 (/4 1920)
>[ 10223.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c5ac0]
>[ 10223.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c5ac0] width 1920 pitch 7680 (/4 1920)
>[ 10223.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 10223.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 10223.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d36c0]
>[ 10223.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d36c0] width 1920 pitch 7680 (/4 1920)
>[ 10223.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 10223.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 10223.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d36c0]
>[ 10223.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d36c0] width 1920 pitch 7680 (/4 1920)
>[ 10223.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 10223.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 10223.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d36c0]
>[ 10223.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d36c0] width 1920 pitch 7680 (/4 1920)
>[ 10223.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 10224.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 10248.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b24880]
>[ 10248.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b24880] width 1920 pitch 7680 (/4 1920)
>[ 10263.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10263.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10278.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261b4e0]
>[ 10278.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261b4e0] width 1920 pitch 7680 (/4 1920)
>[ 10278.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3861150]
>[ 10278.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3861150] width 1920 pitch 7680 (/4 1920)
>[ 10278.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[ 10278.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[ 10278.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38596f0]
>[ 10278.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38596f0] width 1920 pitch 7680 (/4 1920)
>[ 10278.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[ 10278.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[ 10278.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38596f0]
>[ 10278.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38596f0] width 1920 pitch 7680 (/4 1920)
>[ 10278.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[ 10278.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[ 10278.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38596f0]
>[ 10278.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38596f0] width 1920 pitch 7680 (/4 1920)
>[ 10278.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264a180]
>[ 10278.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264a180] width 1920 pitch 7680 (/4 1920)
>[ 10279.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38596f0]
>[ 10279.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38596f0] width 1920 pitch 7680 (/4 1920)
>[ 10289.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b680]
>[ 10289.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b680] width 1920 pitch 7680 (/4 1920)
>[ 10289.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae51b0]
>[ 10289.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae51b0] width 1920 pitch 7680 (/4 1920)
>[ 10289.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a10f0]
>[ 10290.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a10f0] width 1920 pitch 7680 (/4 1920)
>[ 10290.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe750]
>[ 10290.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe750] width 1920 pitch 7680 (/4 1920)
>[ 10290.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a10f0]
>[ 10290.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a10f0] width 1920 pitch 7680 (/4 1920)
>[ 10290.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe750]
>[ 10290.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe750] width 1920 pitch 7680 (/4 1920)
>[ 10290.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a10f0]
>[ 10290.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a10f0] width 1920 pitch 7680 (/4 1920)
>[ 10290.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe750]
>[ 10290.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe750] width 1920 pitch 7680 (/4 1920)
>[ 10290.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a10f0]
>[ 10290.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a10f0] width 1920 pitch 7680 (/4 1920)
>[ 10290.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe750]
>[ 10290.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe750] width 1920 pitch 7680 (/4 1920)
>[ 10290.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a10f0]
>[ 10290.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a10f0] width 1920 pitch 7680 (/4 1920)
>[ 10290.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe750]
>[ 10290.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe750] width 1920 pitch 7680 (/4 1920)
>[ 10293.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f4e00]
>[ 10293.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f4e00] width 1920 pitch 7680 (/4 1920)
>[ 10293.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664c30]
>[ 10293.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664c30] width 1920 pitch 7680 (/4 1920)
>[ 10293.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10293.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38235f0]
>[ 10293.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38235f0] width 1920 pitch 7680 (/4 1920)
>[ 10293.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10293.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38235f0]
>[ 10293.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38235f0] width 1920 pitch 7680 (/4 1920)
>[ 10293.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10293.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38235f0]
>[ 10293.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38235f0] width 1920 pitch 7680 (/4 1920)
>[ 10293.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10293.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38235f0]
>[ 10293.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38235f0] width 1920 pitch 7680 (/4 1920)
>[ 10293.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10293.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9f6a0]
>[ 10293.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9f6a0] width 1920 pitch 7680 (/4 1920)
>[ 10293.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cefd0]
>[ 10293.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cefd0] width 1920 pitch 7680 (/4 1920)
>[ 10308.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421b10]
>[ 10308.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421b10] width 1920 pitch 7680 (/4 1920)
>[ 10323.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421b10]
>[ 10323.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421b10] width 1920 pitch 7680 (/4 1920)
>[ 10529.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c6090]
>[ 10529.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c6090] width 1920 pitch 7680 (/4 1920)
>[ 10548.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3853e40]
>[ 10548.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3853e40] width 1920 pitch 7680 (/4 1920)
>[ 10578.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ae810]
>[ 10578.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ae810] width 1920 pitch 7680 (/4 1920)
>[ 10579.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397ce40]
>[ 10579.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397ce40] width 1920 pitch 7680 (/4 1920)
>[ 10668.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971be0]
>[ 10668.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971be0] width 1920 pitch 7680 (/4 1920)
>[ 10670.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371f5c0]
>[ 10670.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371f5c0] width 1920 pitch 7680 (/4 1920)
>[ 10670.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397f9e0]
>[ 10670.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397f9e0] width 1920 pitch 7680 (/4 1920)
>[ 10670.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10670.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10674.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3976690]
>[ 10674.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3976690] width 1920 pitch 7680 (/4 1920)
>[ 10678.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8ff0]
>[ 10678.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8ff0] width 1920 pitch 7680 (/4 1920)
>[ 10681.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39942c0]
>[ 10681.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39942c0] width 1920 pitch 7680 (/4 1920)
>[ 10681.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39942c0]
>[ 10681.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39942c0] width 1920 pitch 7680 (/4 1920)
>[ 10682.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3415290]
>[ 10682.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3415290] width 1920 pitch 7680 (/4 1920)
>[ 10682.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3413230]
>[ 10682.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3413230] width 1920 pitch 7680 (/4 1920)
>[ 10683.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbf40]
>[ 10683.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbf40] width 1920 pitch 7680 (/4 1920)
>[ 10687.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3413410]
>[ 10687.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3413410] width 1920 pitch 7680 (/4 1920)
>[ 10687.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3413230]
>[ 10687.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3413230] width 1920 pitch 7680 (/4 1920)
>[ 10687.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10687.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10687.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10687.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10687.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10687.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10687.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10687.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10687.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10687.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10687.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10687.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10687.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10687.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10687.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10687.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10688.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10688.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10689.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10689.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10690.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39985f0]
>[ 10690.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39985f0] width 1920 pitch 7680 (/4 1920)
>[ 10690.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10690.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10690.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10690.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10690.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10690.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10690.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10690.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10690.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10690.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10690.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10690.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10690.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10690.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10690.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10690.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10690.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10690.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10690.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dbc60]
>[ 10690.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dbc60] width 1920 pitch 7680 (/4 1920)
>[ 10699.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe0a0]
>[ 10699.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe0a0] width 1920 pitch 7680 (/4 1920)
>[ 10743.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399a690]
>[ 10743.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399a690] width 1920 pitch 7680 (/4 1920)
>[ 10743.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d5e70]
>[ 10743.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d5e70] width 1920 pitch 7680 (/4 1920)
>[ 10753.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3728640]
>[ 10753.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3728640] width 1920 pitch 7680 (/4 1920)
>[ 10753.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 10753.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 10753.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10753.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10753.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 10753.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 10753.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10753.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10753.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 10753.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 10753.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10753.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10753.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 10753.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 10753.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10753.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10753.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 10753.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 10754.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38116b0]
>[ 10754.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38116b0] width 1920 pitch 7680 (/4 1920)
>[ 10758.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d1c20]
>[ 10758.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d1c20] width 1920 pitch 7680 (/4 1920)
>[ 10802.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3831f90]
>[ 10802.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3831f90] width 1920 pitch 7680 (/4 1920)
>[ 10802.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10802.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc460]
>[ 10802.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc460] width 1920 pitch 7680 (/4 1920)
>[ 10802.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10802.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc460]
>[ 10802.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc460] width 1920 pitch 7680 (/4 1920)
>[ 10802.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10802.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc460]
>[ 10802.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc460] width 1920 pitch 7680 (/4 1920)
>[ 10802.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10802.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc460]
>[ 10802.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc460] width 1920 pitch 7680 (/4 1920)
>[ 10802.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10802.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cc460]
>[ 10802.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cc460] width 1920 pitch 7680 (/4 1920)
>[ 10802.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cc90]
>[ 10802.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cc90] width 1920 pitch 7680 (/4 1920)
>[ 10803.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a57d0]
>[ 10803.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a57d0] width 1920 pitch 7680 (/4 1920)
>[ 10803.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922f00]
>[ 10803.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922f00] width 1920 pitch 7680 (/4 1920)
>[ 10812.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da390]
>[ 10812.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da390] width 1920 pitch 7680 (/4 1920)
>[ 10848.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aea6f0]
>[ 10848.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aea6f0] width 1920 pitch 7680 (/4 1920)
>[ 10863.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be9ce0]
>[ 10863.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be9ce0] width 1920 pitch 7680 (/4 1920)
>[ 10938.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c35f0]
>[ 10938.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c35f0] width 1920 pitch 7680 (/4 1920)
>[ 10953.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e2c0]
>[ 10953.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e2c0] width 1920 pitch 7680 (/4 1920)
>[ 10968.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c35f0]
>[ 10968.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c35f0] width 1920 pitch 7680 (/4 1920)
>[ 10983.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac71a0]
>[ 10983.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac71a0] width 1920 pitch 7680 (/4 1920)
>[ 10998.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c35f0]
>[ 10998.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c35f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918e90]
>[ 11007.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918e90] width 1920 pitch 7680 (/4 1920)
>[ 11007.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39854f0]
>[ 11007.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39854f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868590]
>[ 11007.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868590] width 1920 pitch 7680 (/4 1920)
>[ 11007.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39854f0]
>[ 11007.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39854f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868590]
>[ 11007.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868590] width 1920 pitch 7680 (/4 1920)
>[ 11007.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39854f0]
>[ 11007.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39854f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868590]
>[ 11007.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868590] width 1920 pitch 7680 (/4 1920)
>[ 11007.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39854f0]
>[ 11007.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39854f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868590]
>[ 11007.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868590] width 1920 pitch 7680 (/4 1920)
>[ 11007.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39854f0]
>[ 11007.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39854f0] width 1920 pitch 7680 (/4 1920)
>[ 11007.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868590]
>[ 11007.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868590] width 1920 pitch 7680 (/4 1920)
>[ 11013.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be270]
>[ 11013.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be270] width 1920 pitch 7680 (/4 1920)
>[ 11016.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1c60]
>[ 11016.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1c60] width 1920 pitch 7680 (/4 1920)
>[ 11073.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4870]
>[ 11073.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4870] width 1920 pitch 7680 (/4 1920)
>[ 11088.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2627d10]
>[ 11088.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2627d10] width 1920 pitch 7680 (/4 1920)
>[ 11118.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0ada0]
>[ 11118.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0ada0] width 1920 pitch 7680 (/4 1920)
>[ 11133.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cb6c0]
>[ 11133.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cb6c0] width 1920 pitch 7680 (/4 1920)
>[ 11148.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d80]
>[ 11148.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d80] width 1920 pitch 7680 (/4 1920)
>[ 11163.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662b30]
>[ 11163.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662b30] width 1920 pitch 7680 (/4 1920)
>[ 11166.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37116e0]
>[ 11166.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37116e0] width 1920 pitch 7680 (/4 1920)
>[ 11166.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11166.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6f10]
>[ 11166.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6f10] width 1920 pitch 7680 (/4 1920)
>[ 11166.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11166.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6f10]
>[ 11166.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6f10] width 1920 pitch 7680 (/4 1920)
>[ 11166.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11166.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6f10]
>[ 11166.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6f10] width 1920 pitch 7680 (/4 1920)
>[ 11166.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11166.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6f10]
>[ 11166.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6f10] width 1920 pitch 7680 (/4 1920)
>[ 11166.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11166.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6f10]
>[ 11166.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6f10] width 1920 pitch 7680 (/4 1920)
>[ 11166.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243acb0]
>[ 11166.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243acb0] width 1920 pitch 7680 (/4 1920)
>[ 11169.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ac450]
>[ 11169.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ac450] width 1920 pitch 7680 (/4 1920)
>[ 11213.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a99a0]
>[ 11213.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a99a0] width 1920 pitch 7680 (/4 1920)
>[ 11213.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987210]
>[ 11213.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987210] width 1920 pitch 7680 (/4 1920)
>[ 11215.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ab430]
>[ 11215.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ab430] width 1920 pitch 7680 (/4 1920)
>[ 11215.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a99a0]
>[ 11215.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a99a0] width 1920 pitch 7680 (/4 1920)
>[ 11215.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457d60]
>[ 11215.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457d60] width 1920 pitch 7680 (/4 1920)
>[ 11215.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a99a0]
>[ 11215.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a99a0] width 1920 pitch 7680 (/4 1920)
>[ 11215.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457d60]
>[ 11215.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457d60] width 1920 pitch 7680 (/4 1920)
>[ 11215.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a99a0]
>[ 11215.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a99a0] width 1920 pitch 7680 (/4 1920)
>[ 11215.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11215.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11215.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b5f90]
>[ 11215.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b5f90] width 1920 pitch 7680 (/4 1920)
>[ 11215.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26276f0]
>[ 11215.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26276f0] width 1920 pitch 7680 (/4 1920)
>[ 11215.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c35f0]
>[ 11215.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c35f0] width 1920 pitch 7680 (/4 1920)
>[ 11215.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26276f0]
>[ 11215.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26276f0] width 1920 pitch 7680 (/4 1920)
>[ 11215.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635350]
>[ 11215.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635350] width 1920 pitch 7680 (/4 1920)
>[ 11215.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38523e0]
>[ 11215.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38523e0] width 1920 pitch 7680 (/4 1920)
>[ 11223.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f4130]
>[ 11223.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f4130] width 1920 pitch 7680 (/4 1920)
>[ 11223.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38260e0]
>[ 11223.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38260e0] width 1920 pitch 7680 (/4 1920)
>[ 11238.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243b470]
>[ 11238.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243b470] width 1920 pitch 7680 (/4 1920)
>[ 11257.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd280]
>[ 11257.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd280] width 1920 pitch 7680 (/4 1920)
>[ 11258.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11258.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11258.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11258.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11258.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11258.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3718a20]
>[ 11258.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3718a20] width 1920 pitch 7680 (/4 1920)
>[ 11258.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11258.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11268.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2398cb0]
>[ 11268.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2398cb0] width 1920 pitch 7680 (/4 1920)
>[ 11268.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca330]
>[ 11268.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca330] width 1920 pitch 7680 (/4 1920)
>[ 11283.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fb90]
>[ 11283.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fb90] width 1920 pitch 7680 (/4 1920)
>[ 11323.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x372d4b0]
>[ 11323.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x372d4b0] width 1920 pitch 7680 (/4 1920)
>[ 11323.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11323.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11323.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11323.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11323.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11323.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11323.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11323.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11323.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11323.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11323.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11323.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11323.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11323.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4330]
>[ 11323.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4330] width 1920 pitch 7680 (/4 1920)
>[ 11323.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b06d90]
>[ 11323.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b06d90] width 1920 pitch 7680 (/4 1920)
>[ 11328.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2435820]
>[ 11328.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2435820] width 1920 pitch 7680 (/4 1920)
>[ 11330.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2569500]
>[ 11330.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2569500] width 1920 pitch 7680 (/4 1920)
>[ 11343.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a5a20]
>[ 11343.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a5a20] width 1920 pitch 7680 (/4 1920)
>[ 11343.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481990]
>[ 11343.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481990] width 1920 pitch 7680 (/4 1920)
>[ 11343.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11343.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874e50]
>[ 11343.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874e50] width 1920 pitch 7680 (/4 1920)
>[ 11343.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11343.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874e50]
>[ 11343.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874e50] width 1920 pitch 7680 (/4 1920)
>[ 11343.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11343.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874e50]
>[ 11343.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874e50] width 1920 pitch 7680 (/4 1920)
>[ 11343.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11343.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874e50]
>[ 11343.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874e50] width 1920 pitch 7680 (/4 1920)
>[ 11343.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11343.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874e50]
>[ 11343.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874e50] width 1920 pitch 7680 (/4 1920)
>[ 11343.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3803a40]
>[ 11343.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3803a40] width 1920 pitch 7680 (/4 1920)
>[ 11370.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37adfe0]
>[ 11370.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37adfe0] width 1920 pitch 7680 (/4 1920)
>[ 11372.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397db10]
>[ 11372.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397db10] width 1920 pitch 7680 (/4 1920)
>[ 11372.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3bb0]
>[ 11372.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3bb0] width 1920 pitch 7680 (/4 1920)
>[ 11372.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243a460]
>[ 11372.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243a460] width 1920 pitch 7680 (/4 1920)
>[ 11372.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3bb0]
>[ 11372.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3bb0] width 1920 pitch 7680 (/4 1920)
>[ 11372.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243a460]
>[ 11372.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243a460] width 1920 pitch 7680 (/4 1920)
>[ 11372.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3bb0]
>[ 11372.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3bb0] width 1920 pitch 7680 (/4 1920)
>[ 11372.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243a460]
>[ 11372.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243a460] width 1920 pitch 7680 (/4 1920)
>[ 11372.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3bb0]
>[ 11372.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3bb0] width 1920 pitch 7680 (/4 1920)
>[ 11372.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378da50]
>[ 11372.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378da50] width 1920 pitch 7680 (/4 1920)
>[ 11372.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ab2d0]
>[ 11372.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ab2d0] width 1920 pitch 7680 (/4 1920)
>[ 11372.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aca740]
>[ 11372.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aca740] width 1920 pitch 7680 (/4 1920)
>[ 11372.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b3bb0]
>[ 11372.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b3bb0] width 1920 pitch 7680 (/4 1920)
>[ 11373.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377d600]
>[ 11373.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377d600] width 1920 pitch 7680 (/4 1920)
>[ 11374.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b5b00]
>[ 11374.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b5b00] width 1920 pitch 7680 (/4 1920)
>[ 11374.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b8e80]
>[ 11374.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b8e80] width 1920 pitch 7680 (/4 1920)
>[ 11374.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b5b00]
>[ 11374.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b5b00] width 1920 pitch 7680 (/4 1920)
>[ 11374.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377e760]
>[ 11374.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377e760] width 1920 pitch 7680 (/4 1920)
>[ 11374.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b5b00]
>[ 11374.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b5b00] width 1920 pitch 7680 (/4 1920)
>[ 11374.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x377f030]
>[ 11374.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x377f030] width 1920 pitch 7680 (/4 1920)
>[ 11374.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378dd70]
>[ 11374.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378dd70] width 1920 pitch 7680 (/4 1920)
>[ 11374.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af4210]
>[ 11374.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af4210] width 1920 pitch 7680 (/4 1920)
>[ 11374.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3780dd0]
>[ 11374.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3780dd0] width 1920 pitch 7680 (/4 1920)
>[ 11374.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3780dd0]
>[ 11374.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3780dd0] width 1920 pitch 7680 (/4 1920)
>[ 11374.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3780dd0]
>[ 11374.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3780dd0] width 1920 pitch 7680 (/4 1920)
>[ 11374.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a013d0]
>[ 11374.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a013d0] width 1920 pitch 7680 (/4 1920)
>[ 11374.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e350]
>[ 11374.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e350] width 1920 pitch 7680 (/4 1920)
>[ 11374.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03330]
>[ 11374.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03330] width 1920 pitch 7680 (/4 1920)
>[ 11388.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3410530]
>[ 11388.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3410530] width 1920 pitch 7680 (/4 1920)
>[ 11388.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e7650]
>[ 11388.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e7650] width 1920 pitch 7680 (/4 1920)
>[ 11394.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245fd30]
>[ 11394.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245fd30] width 1920 pitch 7680 (/4 1920)
>[ 11406.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ed220]
>[ 11406.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ed220] width 1920 pitch 7680 (/4 1920)
>[ 11448.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c5f90]
>[ 11448.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c5f90] width 1920 pitch 7680 (/4 1920)
>[ 11463.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf310]
>[ 11463.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf310] width 1920 pitch 7680 (/4 1920)
>[ 11523.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eb640]
>[ 11523.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eb640] width 1920 pitch 7680 (/4 1920)
>[ 11553.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3996860]
>[ 11553.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3996860] width 1920 pitch 7680 (/4 1920)
>[ 11628.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3422c40]
>[ 11628.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3422c40] width 1920 pitch 7680 (/4 1920)
>[ 11643.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3422c40]
>[ 11643.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3422c40] width 1920 pitch 7680 (/4 1920)
>[ 11658.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239cf40]
>[ 11658.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239cf40] width 1920 pitch 7680 (/4 1920)
>[ 11673.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ab4e0]
>[ 11673.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ab4e0] width 1920 pitch 7680 (/4 1920)
>[ 11687.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c58e0]
>[ 11687.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c58e0] width 1920 pitch 7680 (/4 1920)
>[ 11687.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390a7b0]
>[ 11687.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390a7b0] width 1920 pitch 7680 (/4 1920)
>[ 11687.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ace9a0]
>[ 11687.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ace9a0] width 1920 pitch 7680 (/4 1920)
>[ 11687.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2492000]
>[ 11687.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2492000] width 1920 pitch 7680 (/4 1920)
>[ 11687.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ace9a0]
>[ 11687.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ace9a0] width 1920 pitch 7680 (/4 1920)
>[ 11687.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2492000]
>[ 11687.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2492000] width 1920 pitch 7680 (/4 1920)
>[ 11687.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ace9a0]
>[ 11687.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ace9a0] width 1920 pitch 7680 (/4 1920)
>[ 11687.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2492000]
>[ 11687.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2492000] width 1920 pitch 7680 (/4 1920)
>[ 11687.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ace9a0]
>[ 11687.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ace9a0] width 1920 pitch 7680 (/4 1920)
>[ 11687.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2492000]
>[ 11687.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2492000] width 1920 pitch 7680 (/4 1920)
>[ 11690.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c6270]
>[ 11690.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c6270] width 1920 pitch 7680 (/4 1920)
>[ 11690.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3815050]
>[ 11690.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3815050] width 1920 pitch 7680 (/4 1920)
>[ 11690.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11690.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11690.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c990]
>[ 11690.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c990] width 1920 pitch 7680 (/4 1920)
>[ 11690.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11691.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11691.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c990]
>[ 11691.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c990] width 1920 pitch 7680 (/4 1920)
>[ 11691.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11691.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11691.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c990]
>[ 11691.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c990] width 1920 pitch 7680 (/4 1920)
>[ 11691.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11691.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11691.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c990]
>[ 11691.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c990] width 1920 pitch 7680 (/4 1920)
>[ 11691.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11691.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11691.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c990]
>[ 11691.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c990] width 1920 pitch 7680 (/4 1920)
>[ 11691.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d38d0]
>[ 11691.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d38d0] width 1920 pitch 7680 (/4 1920)
>[ 11703.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39942c0]
>[ 11703.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39942c0] width 1920 pitch 7680 (/4 1920)
>[ 11718.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 11718.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 11733.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38523e0]
>[ 11733.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38523e0] width 1920 pitch 7680 (/4 1920)
>[ 11748.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39abc80]
>[ 11748.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39abc80] width 1920 pitch 7680 (/4 1920)
>[ 11791.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bb40]
>[ 11791.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bb40] width 1920 pitch 7680 (/4 1920)
>[ 11794.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9d50]
>[ 11794.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9d50] width 1920 pitch 7680 (/4 1920)
>[ 11794.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248fae0]
>[ 11794.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248fae0] width 1920 pitch 7680 (/4 1920)
>[ 11794.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2d30]
>[ 11794.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2d30] width 1920 pitch 7680 (/4 1920)
>[ 11794.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b7b30]
>[ 11794.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b7b30] width 1920 pitch 7680 (/4 1920)
>[ 11794.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2d30]
>[ 11795.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2d30] width 1920 pitch 7680 (/4 1920)
>[ 11795.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b7b30]
>[ 11795.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b7b30] width 1920 pitch 7680 (/4 1920)
>[ 11795.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2d30]
>[ 11795.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2d30] width 1920 pitch 7680 (/4 1920)
>[ 11795.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b7b30]
>[ 11795.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b7b30] width 1920 pitch 7680 (/4 1920)
>[ 11795.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2d30]
>[ 11795.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2d30] width 1920 pitch 7680 (/4 1920)
>[ 11795.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b7b30]
>[ 11795.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b7b30] width 1920 pitch 7680 (/4 1920)
>[ 11795.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2d30]
>[ 11795.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2d30] width 1920 pitch 7680 (/4 1920)
>[ 11889.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f55e0]
>[ 11889.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f55e0] width 1920 pitch 7680 (/4 1920)
>[ 11889.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f5470]
>[ 11889.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f5470] width 1920 pitch 7680 (/4 1920)
>[ 11889.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1040]
>[ 11889.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1040] width 1920 pitch 7680 (/4 1920)
>[ 11889.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4870]
>[ 11889.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4870] width 1920 pitch 7680 (/4 1920)
>[ 11889.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1040]
>[ 11889.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1040] width 1920 pitch 7680 (/4 1920)
>[ 11889.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4870]
>[ 11889.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4870] width 1920 pitch 7680 (/4 1920)
>[ 11889.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1040]
>[ 11889.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1040] width 1920 pitch 7680 (/4 1920)
>[ 11889.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4870]
>[ 11889.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4870] width 1920 pitch 7680 (/4 1920)
>[ 11889.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1040]
>[ 11889.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1040] width 1920 pitch 7680 (/4 1920)
>[ 11889.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e4870]
>[ 11889.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e4870] width 1920 pitch 7680 (/4 1920)
>[ 11898.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2630fe0]
>[ 11898.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2630fe0] width 1920 pitch 7680 (/4 1920)
>[ 11913.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 11913.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 12003.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3659c90]
>[ 12003.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3659c90] width 1920 pitch 7680 (/4 1920)
>[ 12033.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d5690]
>[ 12033.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d5690] width 1920 pitch 7680 (/4 1920)
>[ 12048.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3792e60]
>[ 12048.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3792e60] width 1920 pitch 7680 (/4 1920)
>[ 12078.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c60e0]
>[ 12078.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c60e0] width 1920 pitch 7680 (/4 1920)
>[ 12084.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6280]
>[ 12084.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6280] width 1920 pitch 7680 (/4 1920)
>[ 12091.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468700]
>[ 12091.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468700] width 1920 pitch 7680 (/4 1920)
>[ 12093.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f3f20]
>[ 12093.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f3f20] width 1920 pitch 7680 (/4 1920)
>[ 12095.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee120]
>[ 12095.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee120] width 1920 pitch 7680 (/4 1920)
>[ 12095.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb810]
>[ 12095.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb810] width 1920 pitch 7680 (/4 1920)
>[ 12095.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b05390]
>[ 12095.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b05390] width 1920 pitch 7680 (/4 1920)
>[ 12095.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb810]
>[ 12095.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb810] width 1920 pitch 7680 (/4 1920)
>[ 12095.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d37d0]
>[ 12095.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d37d0] width 1920 pitch 7680 (/4 1920)
>[ 12095.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c2c0]
>[ 12095.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c2c0] width 1920 pitch 7680 (/4 1920)
>[ 12095.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bfd00]
>[ 12095.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bfd00] width 1920 pitch 7680 (/4 1920)
>[ 12095.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2493a60]
>[ 12095.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2493a60] width 1920 pitch 7680 (/4 1920)
>[ 12095.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bfd00]
>[ 12095.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bfd00] width 1920 pitch 7680 (/4 1920)
>[ 12095.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bfd00]
>[ 12095.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bfd00] width 1920 pitch 7680 (/4 1920)
>[ 12095.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2493a60]
>[ 12095.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2493a60] width 1920 pitch 7680 (/4 1920)
>[ 12123.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518f40]
>[ 12123.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518f40] width 1920 pitch 7680 (/4 1920)
>[ 12138.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc2a0]
>[ 12138.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc2a0] width 1920 pitch 7680 (/4 1920)
>[ 12153.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249ffc0]
>[ 12153.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249ffc0] width 1920 pitch 7680 (/4 1920)
>[ 12168.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc2a0]
>[ 12168.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc2a0] width 1920 pitch 7680 (/4 1920)
>[ 12183.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc2a0]
>[ 12183.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc2a0] width 1920 pitch 7680 (/4 1920)
>[ 12183.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d1a70]
>[ 12183.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d1a70] width 1920 pitch 7680 (/4 1920)
>[ 12190.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249ffc0]
>[ 12190.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249ffc0] width 1920 pitch 7680 (/4 1920)
>[ 12190.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[ 12190.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[ 12190.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24991f0]
>[ 12190.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24991f0] width 1920 pitch 7680 (/4 1920)
>[ 12190.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4db0]
>[ 12190.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4db0] width 1920 pitch 7680 (/4 1920)
>[ 12190.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24991f0]
>[ 12190.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24991f0] width 1920 pitch 7680 (/4 1920)
>[ 12190.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4db0]
>[ 12190.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4db0] width 1920 pitch 7680 (/4 1920)
>[ 12190.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24991f0]
>[ 12190.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24991f0] width 1920 pitch 7680 (/4 1920)
>[ 12190.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4db0]
>[ 12190.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4db0] width 1920 pitch 7680 (/4 1920)
>[ 12190.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24991f0]
>[ 12190.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24991f0] width 1920 pitch 7680 (/4 1920)
>[ 12190.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b4db0]
>[ 12190.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b4db0] width 1920 pitch 7680 (/4 1920)
>[ 12190.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24991f0]
>[ 12190.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24991f0] width 1920 pitch 7680 (/4 1920)
>[ 12198.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387a320]
>[ 12198.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387a320] width 1920 pitch 7680 (/4 1920)
>[ 12228.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249ffc0]
>[ 12228.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249ffc0] width 1920 pitch 7680 (/4 1920)
>[ 12243.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248aac0]
>[ 12243.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248aac0] width 1920 pitch 7680 (/4 1920)
>[ 12337.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a1510]
>[ 12337.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a1510] width 1920 pitch 7680 (/4 1920)
>[ 12363.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397dcd0]
>[ 12363.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397dcd0] width 1920 pitch 7680 (/4 1920)
>[ 12393.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2e00]
>[ 12393.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2e00] width 1920 pitch 7680 (/4 1920)
>[ 12423.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35140]
>[ 12423.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35140] width 1920 pitch 7680 (/4 1920)
>[ 12438.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b181d0]
>[ 12438.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b181d0] width 1920 pitch 7680 (/4 1920)
>[ 12483.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2643590]
>[ 12483.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2643590] width 1920 pitch 7680 (/4 1920)
>[ 12498.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad90b0]
>[ 12498.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad90b0] width 1920 pitch 7680 (/4 1920)
>[ 12574.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fc170]
>[ 12574.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fc170] width 1920 pitch 7680 (/4 1920)
>[ 12574.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634d40]
>[ 12574.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634d40] width 1920 pitch 7680 (/4 1920)
>[ 12574.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24757c0]
>[ 12574.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24757c0] width 1920 pitch 7680 (/4 1920)
>[ 12574.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634d40]
>[ 12574.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634d40] width 1920 pitch 7680 (/4 1920)
>[ 12574.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24757c0]
>[ 12574.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24757c0] width 1920 pitch 7680 (/4 1920)
>[ 12574.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634d40]
>[ 12574.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634d40] width 1920 pitch 7680 (/4 1920)
>[ 12574.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24757c0]
>[ 12574.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24757c0] width 1920 pitch 7680 (/4 1920)
>[ 12574.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634d40]
>[ 12574.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634d40] width 1920 pitch 7680 (/4 1920)
>[ 12574.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24757c0]
>[ 12574.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24757c0] width 1920 pitch 7680 (/4 1920)
>[ 12574.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634d40]
>[ 12574.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634d40] width 1920 pitch 7680 (/4 1920)
>[ 12574.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24757c0]
>[ 12574.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24757c0] width 1920 pitch 7680 (/4 1920)
>[ 12613.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a1400]
>[ 12613.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a1400] width 1920 pitch 7680 (/4 1920)
>[ 12613.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24826e0]
>[ 12613.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24826e0] width 1920 pitch 7680 (/4 1920)
>[ 12614.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12614.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12614.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12614.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12614.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12614.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12614.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12614.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12614.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12614.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12614.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12614.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12614.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12614.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12614.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12614.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12614.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12614.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12615.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12615.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12615.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12615.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12615.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12615.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12615.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381a90]
>[ 12615.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381a90] width 1920 pitch 7680 (/4 1920)
>[ 12615.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12615.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12615.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381a90]
>[ 12615.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381a90] width 1920 pitch 7680 (/4 1920)
>[ 12615.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12615.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12615.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12615.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12615.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381a90]
>[ 12615.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381a90] width 1920 pitch 7680 (/4 1920)
>[ 12615.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 12615.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 12615.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 12615.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 12615.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381a90]
>[ 12616.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381a90] width 1920 pitch 7680 (/4 1920)
>[ 12616.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd160]
>[ 12616.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd160] width 1920 pitch 7680 (/4 1920)
>[ 12616.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae7290]
>[ 12616.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae7290] width 1920 pitch 7680 (/4 1920)
>[ 12616.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f2a0]
>[ 12616.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f2a0] width 1920 pitch 7680 (/4 1920)
>[ 12616.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae7290]
>[ 12616.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae7290] width 1920 pitch 7680 (/4 1920)
>[ 12616.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f2a0]
>[ 12616.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f2a0] width 1920 pitch 7680 (/4 1920)
>[ 12616.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae7290]
>[ 12616.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae7290] width 1920 pitch 7680 (/4 1920)
>[ 12616.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f2a0]
>[ 12616.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f2a0] width 1920 pitch 7680 (/4 1920)
>[ 12616.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380be80]
>[ 12616.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380be80] width 1920 pitch 7680 (/4 1920)
>[ 12616.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f2a0]
>[ 12616.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f2a0] width 1920 pitch 7680 (/4 1920)
>[ 12616.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380be80]
>[ 12616.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380be80] width 1920 pitch 7680 (/4 1920)
>[ 12616.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249f2a0]
>[ 12616.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249f2a0] width 1920 pitch 7680 (/4 1920)
>[ 12616.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380be80]
>[ 12616.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380be80] width 1920 pitch 7680 (/4 1920)
>[ 12619.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36db0]
>[ 12619.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36db0] width 1920 pitch 7680 (/4 1920)
>[ 12632.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505970]
>[ 12632.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505970] width 1920 pitch 7680 (/4 1920)
>[ 12633.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd1a0]
>[ 12633.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd1a0] width 1920 pitch 7680 (/4 1920)
>[ 12648.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370fb40]
>[ 12648.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370fb40] width 1920 pitch 7680 (/4 1920)
>[ 12699.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12699.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12699.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12699.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12699.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12699.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12699.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12699.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12699.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12699.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12699.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12699.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12700.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12700.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12753.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12753.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12798.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12798.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12813.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12813.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12828.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12828.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12873.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12873.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12918.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12918.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12948.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12948.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 12963.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 12963.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 12978.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 12978.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 13023.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 13023.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 13038.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 13038.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 13053.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 13053.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 13068.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 13068.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 13098.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 13098.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 13113.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 13113.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 13128.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 13128.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 13218.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866bd0]
>[ 13218.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866bd0] width 1920 pitch 7680 (/4 1920)
>[ 13233.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262b1c0]
>[ 13233.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262b1c0] width 1920 pitch 7680 (/4 1920)
>[ 13299.251] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 13299.252] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13299.252] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 13389.402] (II) RADEON(0): RADEONSaveScreen(2)
>[ 13389.402] (II) RADEON(0): RADEONSaveScreen(0)
>[ 14570.944] (II) RADEON(0): RADEONSaveScreen(1)
>[ 14571.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370fb40]
>[ 14571.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370fb40] width 1920 pitch 7680 (/4 1920)
>[ 14575.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f67f0]
>[ 14575.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f67f0] width 1920 pitch 7680 (/4 1920)
>[ 14575.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370fb40]
>[ 14575.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370fb40] width 1920 pitch 7680 (/4 1920)
>[ 14601.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3380]
>[ 14601.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3380] width 1920 pitch 7680 (/4 1920)
>[ 14614.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14614.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14614.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14614.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14614.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14614.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4d20]
>[ 14614.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4d20] width 1920 pitch 7680 (/4 1920)
>[ 14614.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263cf90]
>[ 14614.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263cf90] width 1920 pitch 7680 (/4 1920)
>[ 14616.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c1920]
>[ 14616.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c1920] width 1920 pitch 7680 (/4 1920)
>[ 14616.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382b770]
>[ 14616.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382b770] width 1920 pitch 7680 (/4 1920)
>[ 14617.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c1920]
>[ 14617.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c1920] width 1920 pitch 7680 (/4 1920)
>[ 14617.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380fb30]
>[ 14617.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380fb30] width 1920 pitch 7680 (/4 1920)
>[ 14617.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdb50]
>[ 14617.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdb50] width 1920 pitch 7680 (/4 1920)
>[ 14617.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382b770]
>[ 14617.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382b770] width 1920 pitch 7680 (/4 1920)
>[ 14617.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdb50]
>[ 14617.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdb50] width 1920 pitch 7680 (/4 1920)
>[ 14617.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61ec0]
>[ 14617.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61ec0] width 1920 pitch 7680 (/4 1920)
>[ 14617.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdb50]
>[ 14617.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdb50] width 1920 pitch 7680 (/4 1920)
>[ 14617.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61ec0]
>[ 14617.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61ec0] width 1920 pitch 7680 (/4 1920)
>[ 14617.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdb50]
>[ 14617.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdb50] width 1920 pitch 7680 (/4 1920)
>[ 14617.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61ec0]
>[ 14617.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61ec0] width 1920 pitch 7680 (/4 1920)
>[ 14618.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acb830]
>[ 14618.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acb830] width 1920 pitch 7680 (/4 1920)
>[ 14618.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39842d0]
>[ 14618.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39842d0] width 1920 pitch 7680 (/4 1920)
>[ 14618.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25045e0]
>[ 14618.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25045e0] width 1920 pitch 7680 (/4 1920)
>[ 14622.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac2c40]
>[ 14622.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac2c40] width 1920 pitch 7680 (/4 1920)
>[ 14623.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fed70]
>[ 14623.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fed70] width 1920 pitch 7680 (/4 1920)
>[ 14631.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24599c0]
>[ 14631.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24599c0] width 1920 pitch 7680 (/4 1920)
>[ 14632.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 14632.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 14632.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24599c0]
>[ 14632.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24599c0] width 1920 pitch 7680 (/4 1920)
>[ 14632.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083d0]
>[ 14632.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083d0] width 1920 pitch 7680 (/4 1920)
>[ 14646.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be1d0]
>[ 14646.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be1d0] width 1920 pitch 7680 (/4 1920)
>[ 14661.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36b05a0]
>[ 14661.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36b05a0] width 1920 pitch 7680 (/4 1920)
>[ 14674.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340d420]
>[ 14674.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340d420] width 1920 pitch 7680 (/4 1920)
>[ 14676.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf6cb0]
>[ 14676.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf6cb0] width 1920 pitch 7680 (/4 1920)
>[ 14677.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f3ea0]
>[ 14677.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f3ea0] width 1920 pitch 7680 (/4 1920)
>[ 14677.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39125e0]
>[ 14677.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39125e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14677.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14677.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f3ea0]
>[ 14677.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f3ea0] width 1920 pitch 7680 (/4 1920)
>[ 14677.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602000]
>[ 14677.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602000] width 1920 pitch 7680 (/4 1920)
>[ 14678.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14678.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14678.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ddf40]
>[ 14678.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ddf40] width 1920 pitch 7680 (/4 1920)
>[ 14678.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14678.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14678.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9610]
>[ 14678.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9610] width 1920 pitch 7680 (/4 1920)
>[ 14678.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14678.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14678.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9610]
>[ 14678.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9610] width 1920 pitch 7680 (/4 1920)
>[ 14678.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14678.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14678.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9610]
>[ 14678.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9610] width 1920 pitch 7680 (/4 1920)
>[ 14678.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14678.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14678.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9610]
>[ 14678.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9610] width 1920 pitch 7680 (/4 1920)
>[ 14678.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14678.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9610]
>[ 14679.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9610] width 1920 pitch 7680 (/4 1920)
>[ 14679.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14679.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14679.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14679.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14679.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14679.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14679.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14679.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14679.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14679.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14679.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14679.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14679.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee850]
>[ 14679.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee850] width 1920 pitch 7680 (/4 1920)
>[ 14679.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa7e0]
>[ 14679.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa7e0] width 1920 pitch 7680 (/4 1920)
>[ 14679.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340cf30]
>[ 14679.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340cf30] width 1920 pitch 7680 (/4 1920)
>[ 14679.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24415a0]
>[ 14679.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24415a0] width 1920 pitch 7680 (/4 1920)
>[ 14679.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340cf30]
>[ 14679.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340cf30] width 1920 pitch 7680 (/4 1920)
>[ 14736.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36be140]
>[ 14736.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36be140] width 1920 pitch 7680 (/4 1920)
>[ 14751.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b17290]
>[ 14751.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b17290] width 1920 pitch 7680 (/4 1920)
>[ 14841.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae32d0]
>[ 14841.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae32d0] width 1920 pitch 7680 (/4 1920)
>[ 14856.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b17290]
>[ 14856.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b17290] width 1920 pitch 7680 (/4 1920)
>[ 14886.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae32d0]
>[ 14886.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae32d0] width 1920 pitch 7680 (/4 1920)
>[ 14901.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b17290]
>[ 14901.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b17290] width 1920 pitch 7680 (/4 1920)
>[ 14916.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae32d0]
>[ 14916.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae32d0] width 1920 pitch 7680 (/4 1920)
>[ 14961.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842e80]
>[ 14961.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842e80] width 1920 pitch 7680 (/4 1920)
>[ 14991.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39743d0]
>[ 14991.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39743d0] width 1920 pitch 7680 (/4 1920)
>[ 15006.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842e80]
>[ 15006.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842e80] width 1920 pitch 7680 (/4 1920)
>[ 15036.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39743d0]
>[ 15036.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39743d0] width 1920 pitch 7680 (/4 1920)
>[ 15051.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842e80]
>[ 15051.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842e80] width 1920 pitch 7680 (/4 1920)
>[ 15081.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39743d0]
>[ 15081.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39743d0] width 1920 pitch 7680 (/4 1920)
>[ 15111.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842e80]
>[ 15111.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842e80] width 1920 pitch 7680 (/4 1920)
>[ 15156.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39743d0]
>[ 15156.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39743d0] width 1920 pitch 7680 (/4 1920)
>[ 15171.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ac69c0]
>[ 15171.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ac69c0] width 1920 pitch 7680 (/4 1920)
>[ 15261.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a8480]
>[ 15261.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a8480] width 1920 pitch 7680 (/4 1920)
>[ 15306.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3842e80]
>[ 15306.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3842e80] width 1920 pitch 7680 (/4 1920)
>[ 15471.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15471.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15486.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15486.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15546.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15546.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15561.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15561.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15621.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15621.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15636.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15636.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15651.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15651.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15681.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15681.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15696.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15696.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15711.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15711.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15726.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15726.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15741.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15741.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15816.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15816.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15846.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988ed0]
>[ 15846.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988ed0] width 1920 pitch 7680 (/4 1920)
>[ 15951.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2612740]
>[ 15951.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2612740] width 1920 pitch 7680 (/4 1920)
>[ 15951.717] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 15951.717] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 15951.717] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 15966.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988d10]
>[ 15966.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988d10] width 1920 pitch 7680 (/4 1920)
>[ 16041.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c41f0]
>[ 16041.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c41f0] width 1920 pitch 7680 (/4 1920)
>[ 16056.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988d10]
>[ 16056.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988d10] width 1920 pitch 7680 (/4 1920)
>[ 16101.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c41f0]
>[ 16101.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c41f0] width 1920 pitch 7680 (/4 1920)
>[ 16116.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3e40]
>[ 16116.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3e40] width 1920 pitch 7680 (/4 1920)
>[ 16146.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2260120]
>[ 16146.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2260120] width 1920 pitch 7680 (/4 1920)
>[ 16161.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dff40]
>[ 16161.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dff40] width 1920 pitch 7680 (/4 1920)
>[ 16191.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2260120]
>[ 16191.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2260120] width 1920 pitch 7680 (/4 1920)
>[ 16221.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dff40]
>[ 16221.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dff40] width 1920 pitch 7680 (/4 1920)
>[ 16296.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2260120]
>[ 16296.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2260120] width 1920 pitch 7680 (/4 1920)
>[ 16326.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700190]
>[ 16326.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700190] width 1920 pitch 7680 (/4 1920)
>[ 16371.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dff40]
>[ 16371.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dff40] width 1920 pitch 7680 (/4 1920)
>[ 16386.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e0280]
>[ 16386.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e0280] width 1920 pitch 7680 (/4 1920)
>[ 16431.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700190]
>[ 16431.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700190] width 1920 pitch 7680 (/4 1920)
>[ 16476.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a08d10]
>[ 16476.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a08d10] width 1920 pitch 7680 (/4 1920)
>[ 16507.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abdca0]
>[ 16507.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abdca0] width 1920 pitch 7680 (/4 1920)
>[ 16511.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16511.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16511.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505970]
>[ 16511.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505970] width 1920 pitch 7680 (/4 1920)
>[ 16512.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a09340]
>[ 16512.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a09340] width 1920 pitch 7680 (/4 1920)
>[ 16521.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386df50]
>[ 16521.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386df50] width 1920 pitch 7680 (/4 1920)
>[ 16534.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16534.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16551.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914d60]
>[ 16551.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914d60] width 1920 pitch 7680 (/4 1920)
>[ 16551.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16551.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16566.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914d60]
>[ 16566.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914d60] width 1920 pitch 7680 (/4 1920)
>[ 16581.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16581.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16596.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914d60]
>[ 16596.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914d60] width 1920 pitch 7680 (/4 1920)
>[ 16686.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914d60]
>[ 16686.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914d60] width 1920 pitch 7680 (/4 1920)
>[ 16701.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16701.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16791.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16791.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16806.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775e80]
>[ 16806.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775e80] width 1920 pitch 7680 (/4 1920)
>[ 16809.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16809.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16809.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16809.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16809.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16809.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16809.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16809.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16809.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16809.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16809.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16809.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16809.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16809.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16809.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16809.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16809.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16810.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25127c0]
>[ 16810.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25127c0] width 1920 pitch 7680 (/4 1920)
>[ 16810.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16810.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16810.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775e80]
>[ 16810.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775e80] width 1920 pitch 7680 (/4 1920)
>[ 16810.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16810.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16810.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775e80]
>[ 16810.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775e80] width 1920 pitch 7680 (/4 1920)
>[ 16810.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16810.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16810.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775e80]
>[ 16810.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775e80] width 1920 pitch 7680 (/4 1920)
>[ 16810.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9cb0]
>[ 16810.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9cb0] width 1920 pitch 7680 (/4 1920)
>[ 16810.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3775e80]
>[ 16810.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3775e80] width 1920 pitch 7680 (/4 1920)
>[ 16810.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914d60]
>[ 16810.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914d60] width 1920 pitch 7680 (/4 1920)
>[ 16821.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d1950]
>[ 16821.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d1950] width 1920 pitch 7680 (/4 1920)
>[ 16836.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243cd90]
>[ 16836.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243cd90] width 1920 pitch 7680 (/4 1920)
>[ 16851.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7570]
>[ 16851.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7570] width 1920 pitch 7680 (/4 1920)
>[ 16887.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ce350]
>[ 16887.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ce350] width 1920 pitch 7680 (/4 1920)
>[ 16896.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433290]
>[ 16896.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433290] width 1920 pitch 7680 (/4 1920)
>[ 16911.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15770]
>[ 16911.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15770] width 1920 pitch 7680 (/4 1920)
>[ 16911.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922f00]
>[ 16911.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922f00] width 1920 pitch 7680 (/4 1920)
>[ 16926.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15770]
>[ 16926.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15770] width 1920 pitch 7680 (/4 1920)
>[ 16941.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922f00]
>[ 16941.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922f00] width 1920 pitch 7680 (/4 1920)
>[ 16941.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15770]
>[ 16941.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15770] width 1920 pitch 7680 (/4 1920)
>[ 16971.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aca420]
>[ 16971.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aca420] width 1920 pitch 7680 (/4 1920)
>[ 16971.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dea00]
>[ 16971.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dea00] width 1920 pitch 7680 (/4 1920)
>[ 16986.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243a530]
>[ 16986.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243a530] width 1920 pitch 7680 (/4 1920)
>[ 17001.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15770]
>[ 17001.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15770] width 1920 pitch 7680 (/4 1920)
>[ 17001.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243a530]
>[ 17001.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243a530] width 1920 pitch 7680 (/4 1920)
>[ 17016.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15770]
>[ 17016.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15770] width 1920 pitch 7680 (/4 1920)
>[ 17106.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641380]
>[ 17106.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641380] width 1920 pitch 7680 (/4 1920)
>[ 17121.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0ba50]
>[ 17121.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0ba50] width 1920 pitch 7680 (/4 1920)
>[ 17122.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641380]
>[ 17122.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641380] width 1920 pitch 7680 (/4 1920)
>[ 17166.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c24c0]
>[ 17166.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c24c0] width 1920 pitch 7680 (/4 1920)
>[ 17196.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f5130]
>[ 17196.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f5130] width 1920 pitch 7680 (/4 1920)
>[ 17331.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01170]
>[ 17331.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01170] width 1920 pitch 7680 (/4 1920)
>[ 17332.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370c120]
>[ 17332.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370c120] width 1920 pitch 7680 (/4 1920)
>[ 17346.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c10]
>[ 17346.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c10] width 1920 pitch 7680 (/4 1920)
>[ 17376.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c10]
>[ 17376.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c10] width 1920 pitch 7680 (/4 1920)
>[ 17391.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f28b0]
>[ 17391.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f28b0] width 1920 pitch 7680 (/4 1920)
>[ 17406.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238e310]
>[ 17406.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238e310] width 1920 pitch 7680 (/4 1920)
>[ 17436.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8e50]
>[ 17436.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8e50] width 1920 pitch 7680 (/4 1920)
>[ 17465.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3875be0]
>[ 17465.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3875be0] width 1920 pitch 7680 (/4 1920)
>[ 17466.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3875be0]
>[ 17466.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3875be0] width 1920 pitch 7680 (/4 1920)
>[ 17481.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c10]
>[ 17481.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c10] width 1920 pitch 7680 (/4 1920)
>[ 17496.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17496.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17500.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17500.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17500.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17500.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17500.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17500.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17501.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17501.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17501.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17501.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17501.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17501.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17501.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17501.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17501.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17501.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17501.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17501.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17501.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17501.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17501.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17501.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17501.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17501.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17501.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17501.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17502.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17502.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17502.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520230]
>[ 17502.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520230] width 1920 pitch 7680 (/4 1920)
>[ 17502.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17502.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17502.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d1e80]
>[ 17502.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d1e80] width 1920 pitch 7680 (/4 1920)
>[ 17502.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[ 17502.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[ 17502.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391880]
>[ 17502.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391880] width 1920 pitch 7680 (/4 1920)
>[ 17502.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[ 17502.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[ 17502.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391880]
>[ 17502.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391880] width 1920 pitch 7680 (/4 1920)
>[ 17502.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9df0]
>[ 17502.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9df0] width 1920 pitch 7680 (/4 1920)
>[ 17502.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391880]
>[ 17503.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391880] width 1920 pitch 7680 (/4 1920)
>[ 17503.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8e50]
>[ 17503.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8e50] width 1920 pitch 7680 (/4 1920)
>[ 17511.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae9520]
>[ 17511.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae9520] width 1920 pitch 7680 (/4 1920)
>[ 17541.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651390]
>[ 17541.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651390] width 1920 pitch 7680 (/4 1920)
>[ 17556.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aca660]
>[ 17556.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aca660] width 1920 pitch 7680 (/4 1920)
>[ 17571.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651390]
>[ 17571.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651390] width 1920 pitch 7680 (/4 1920)
>[ 17586.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e8a0]
>[ 17586.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e8a0] width 1920 pitch 7680 (/4 1920)
>[ 17586.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f6f90]
>[ 17586.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f6f90] width 1920 pitch 7680 (/4 1920)
>[ 17601.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0c50]
>[ 17601.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0c50] width 1920 pitch 7680 (/4 1920)
>[ 17601.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26136e0]
>[ 17601.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26136e0] width 1920 pitch 7680 (/4 1920)
>[ 17616.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c10]
>[ 17616.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c10] width 1920 pitch 7680 (/4 1920)
>[ 17616.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495700]
>[ 17616.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495700] width 1920 pitch 7680 (/4 1920)
>[ 17631.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c10]
>[ 17631.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c10] width 1920 pitch 7680 (/4 1920)
>[ 17721.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f220]
>[ 17721.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f220] width 1920 pitch 7680 (/4 1920)
>[ 17736.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9770]
>[ 17736.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9770] width 1920 pitch 7680 (/4 1920)
>[ 17736.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245f220]
>[ 17736.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245f220] width 1920 pitch 7680 (/4 1920)
>[ 17796.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b2570]
>[ 17796.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b2570] width 1920 pitch 7680 (/4 1920)
>[ 17796.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0a110]
>[ 17796.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0a110] width 1920 pitch 7680 (/4 1920)
>[ 17811.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b2570]
>[ 17811.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b2570] width 1920 pitch 7680 (/4 1920)
>[ 18063.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18063.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18063.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18063.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18064.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18064.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18064.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18064.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18064.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18064.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18064.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18064.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18064.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18064.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18064.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18064.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18065.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18065.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18065.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb880]
>[ 18065.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb880] width 1920 pitch 7680 (/4 1920)
>[ 18065.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fbe00]
>[ 18065.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fbe00] width 1920 pitch 7680 (/4 1920)
>[ 18066.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496cf0]
>[ 18066.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496cf0] width 1920 pitch 7680 (/4 1920)
>[ 18066.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7520]
>[ 18066.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7520] width 1920 pitch 7680 (/4 1920)
>[ 18066.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2645350]
>[ 18066.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2645350] width 1920 pitch 7680 (/4 1920)
>[ 18066.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b13f40]
>[ 18066.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b13f40] width 1920 pitch 7680 (/4 1920)
>[ 18066.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf2f0]
>[ 18066.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf2f0] width 1920 pitch 7680 (/4 1920)
>[ 18066.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a0c50]
>[ 18066.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a0c50] width 1920 pitch 7680 (/4 1920)
>[ 18066.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4eb0]
>[ 18066.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4eb0] width 1920 pitch 7680 (/4 1920)
>[ 18066.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab7d50]
>[ 18066.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab7d50] width 1920 pitch 7680 (/4 1920)
>[ 18066.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2645350]
>[ 18066.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2645350] width 1920 pitch 7680 (/4 1920)
>[ 18071.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x383cea0]
>[ 18071.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x383cea0] width 1920 pitch 7680 (/4 1920)
>[ 18126.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18126.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18126.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18126.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18141.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18141.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18396.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18396.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18411.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18411.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18426.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18426.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18441.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18441.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18516.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18516.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18531.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18531.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18546.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18546.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18561.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18561.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18696.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3e9a0]
>[ 18696.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3e9a0] width 1920 pitch 7680 (/4 1920)
>[ 18711.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399ac80]
>[ 18711.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399ac80] width 1920 pitch 7680 (/4 1920)
>[ 18726.218] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 18726.219] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 18726.219] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 18741.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af9d80]
>[ 18741.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af9d80] width 1920 pitch 7680 (/4 1920)
>[ 18756.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e8a0]
>[ 18756.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e8a0] width 1920 pitch 7680 (/4 1920)
>[ 18831.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e8a0]
>[ 18831.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e8a0] width 1920 pitch 7680 (/4 1920)
>[ 18831.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2424bd0]
>[ 18831.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2424bd0] width 1920 pitch 7680 (/4 1920)
>[ 18846.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e8a0]
>[ 18846.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e8a0] width 1920 pitch 7680 (/4 1920)
>[ 18862.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602320]
>[ 18862.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602320] width 1920 pitch 7680 (/4 1920)
>[ 18876.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8e50]
>[ 18876.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8e50] width 1920 pitch 7680 (/4 1920)
>[ 18891.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602080]
>[ 18891.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602080] width 1920 pitch 7680 (/4 1920)
>[ 18891.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2498810]
>[ 18891.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2498810] width 1920 pitch 7680 (/4 1920)
>[ 18906.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391880]
>[ 18906.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391880] width 1920 pitch 7680 (/4 1920)
>[ 19056.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b238c0]
>[ 19056.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b238c0] width 1920 pitch 7680 (/4 1920)
>[ 19071.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e0ae0]
>[ 19071.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e0ae0] width 1920 pitch 7680 (/4 1920)
>[ 19071.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e0ae0]
>[ 19071.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e0ae0] width 1920 pitch 7680 (/4 1920)
>[ 19086.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e0ae0]
>[ 19086.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e0ae0] width 1920 pitch 7680 (/4 1920)
>[ 19101.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2443000]
>[ 19101.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2443000] width 1920 pitch 7680 (/4 1920)
>[ 19116.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb490]
>[ 19116.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb490] width 1920 pitch 7680 (/4 1920)
>[ 19131.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39865f0]
>[ 19131.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39865f0] width 1920 pitch 7680 (/4 1920)
>[ 19146.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b670]
>[ 19146.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b670] width 1920 pitch 7680 (/4 1920)
>[ 19160.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24140e0]
>[ 19160.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24140e0] width 1920 pitch 7680 (/4 1920)
>[ 19160.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3d70]
>[ 19160.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3d70] width 1920 pitch 7680 (/4 1920)
>[ 19162.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d67b0]
>[ 19162.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d67b0] width 1920 pitch 7680 (/4 1920)
>[ 19176.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3ce0]
>[ 19176.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3ce0] width 1920 pitch 7680 (/4 1920)
>[ 19206.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919f00]
>[ 19206.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919f00] width 1920 pitch 7680 (/4 1920)
>[ 19221.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238de60]
>[ 19221.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238de60] width 1920 pitch 7680 (/4 1920)
>[ 19251.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398d940]
>[ 19251.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398d940] width 1920 pitch 7680 (/4 1920)
>[ 19476.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd5b60]
>[ 19476.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd5b60] width 1920 pitch 7680 (/4 1920)
>[ 19476.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fd080]
>[ 19476.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fd080] width 1920 pitch 7680 (/4 1920)
>[ 19491.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f18c0]
>[ 19491.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f18c0] width 1920 pitch 7680 (/4 1920)
>[ 19506.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e7c70]
>[ 19506.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e7c70] width 1920 pitch 7680 (/4 1920)
>[ 19521.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ace810]
>[ 19521.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ace810] width 1920 pitch 7680 (/4 1920)
>[ 19525.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3659e50]
>[ 19525.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3659e50] width 1920 pitch 7680 (/4 1920)
>[ 19536.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x376ee70]
>[ 19536.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x376ee70] width 1920 pitch 7680 (/4 1920)
>[ 19551.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b01150]
>[ 19551.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b01150] width 1920 pitch 7680 (/4 1920)
>[ 19611.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bab520]
>[ 19611.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bab520] width 1920 pitch 7680 (/4 1920)
>[ 19626.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397e080]
>[ 19626.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397e080] width 1920 pitch 7680 (/4 1920)
>[ 19671.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2523540]
>[ 19671.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2523540] width 1920 pitch 7680 (/4 1920)
>[ 19686.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ace810]
>[ 19686.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ace810] width 1920 pitch 7680 (/4 1920)
>[ 19701.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b2350]
>[ 19701.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b2350] width 1920 pitch 7680 (/4 1920)
>[ 19716.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3710d50]
>[ 19716.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3710d50] width 1920 pitch 7680 (/4 1920)
>[ 19731.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f18c0]
>[ 19731.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f18c0] width 1920 pitch 7680 (/4 1920)
>[ 19791.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3710d50]
>[ 19791.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3710d50] width 1920 pitch 7680 (/4 1920)
>[ 19806.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f18c0]
>[ 19806.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f18c0] width 1920 pitch 7680 (/4 1920)
>[ 19971.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250cc60]
>[ 19971.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250cc60] width 1920 pitch 7680 (/4 1920)
>[ 19986.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc140]
>[ 19986.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc140] width 1920 pitch 7680 (/4 1920)
>[ 20031.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250cc60]
>[ 20031.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250cc60] width 1920 pitch 7680 (/4 1920)
>[ 20046.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250cc60]
>[ 20046.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250cc60] width 1920 pitch 7680 (/4 1920)
>[ 20061.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2467570]
>[ 20061.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2467570] width 1920 pitch 7680 (/4 1920)
>[ 20076.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20076.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20106.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238de60]
>[ 20106.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238de60] width 1920 pitch 7680 (/4 1920)
>[ 20121.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20121.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20136.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3660]
>[ 20136.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3660] width 1920 pitch 7680 (/4 1920)
>[ 20151.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8ee0]
>[ 20151.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8ee0] width 1920 pitch 7680 (/4 1920)
>[ 20166.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3660]
>[ 20166.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3660] width 1920 pitch 7680 (/4 1920)
>[ 20181.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8ee0]
>[ 20181.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8ee0] width 1920 pitch 7680 (/4 1920)
>[ 20196.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3660]
>[ 20196.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3660] width 1920 pitch 7680 (/4 1920)
>[ 20211.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8ee0]
>[ 20211.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8ee0] width 1920 pitch 7680 (/4 1920)
>[ 20226.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3660]
>[ 20226.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3660] width 1920 pitch 7680 (/4 1920)
>[ 20286.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8ee0]
>[ 20286.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8ee0] width 1920 pitch 7680 (/4 1920)
>[ 20451.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3710d50]
>[ 20451.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3710d50] width 1920 pitch 7680 (/4 1920)
>[ 20466.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8ee0]
>[ 20466.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8ee0] width 1920 pitch 7680 (/4 1920)
>[ 20468.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a97c0]
>[ 20468.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a97c0] width 1920 pitch 7680 (/4 1920)
>[ 20470.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20470.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6fe0]
>[ 20470.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6fe0] width 1920 pitch 7680 (/4 1920)
>[ 20470.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24382f0]
>[ 20470.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24382f0] width 1920 pitch 7680 (/4 1920)
>[ 20473.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20473.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20474.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e4e0]
>[ 20474.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e4e0] width 1920 pitch 7680 (/4 1920)
>[ 20474.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660a70]
>[ 20474.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660a70] width 1920 pitch 7680 (/4 1920)
>[ 20491.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20491.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20491.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20491.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20491.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20491.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20491.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20491.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20491.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20491.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20491.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20491.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20491.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20491.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20491.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20491.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20491.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20491.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20491.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20492.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20492.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20492.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20492.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20492.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20492.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20492.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20492.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20492.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20492.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20492.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20492.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20492.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20498.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20498.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20498.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20498.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20499.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20499.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20499.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20499.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20499.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262d470]
>[ 20499.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262d470] width 1920 pitch 7680 (/4 1920)
>[ 20499.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 20499.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 20500.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2495590]
>[ 20500.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2495590] width 1920 pitch 7680 (/4 1920)
>[ 20500.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aafa10]
>[ 20500.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aafa10] width 1920 pitch 7680 (/4 1920)
>[ 20500.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc6e0]
>[ 20500.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc6e0] width 1920 pitch 7680 (/4 1920)
>[ 20500.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23290]
>[ 20500.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23290] width 1920 pitch 7680 (/4 1920)
>[ 20500.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f89b0]
>[ 20500.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f89b0] width 1920 pitch 7680 (/4 1920)
>[ 20500.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26389a0]
>[ 20500.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26389a0] width 1920 pitch 7680 (/4 1920)
>[ 20500.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea890]
>[ 20500.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea890] width 1920 pitch 7680 (/4 1920)
>[ 20500.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2431c20]
>[ 20500.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2431c20] width 1920 pitch 7680 (/4 1920)
>[ 20500.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664440]
>[ 20500.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664440] width 1920 pitch 7680 (/4 1920)
>[ 20500.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2431c20]
>[ 20500.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2431c20] width 1920 pitch 7680 (/4 1920)
>[ 20511.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33380e0]
>[ 20511.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33380e0] width 1920 pitch 7680 (/4 1920)
>[ 20556.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2429600]
>[ 20556.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2429600] width 1920 pitch 7680 (/4 1920)
>[ 20571.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adbfa0]
>[ 20571.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adbfa0] width 1920 pitch 7680 (/4 1920)
>[ 20601.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abb770]
>[ 20601.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abb770] width 1920 pitch 7680 (/4 1920)
>[ 20616.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d85c0]
>[ 20616.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d85c0] width 1920 pitch 7680 (/4 1920)
>[ 20631.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad5e80]
>[ 20631.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad5e80] width 1920 pitch 7680 (/4 1920)
>[ 20646.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24165e0]
>[ 20646.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24165e0] width 1920 pitch 7680 (/4 1920)
>[ 20661.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f7900]
>[ 20661.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f7900] width 1920 pitch 7680 (/4 1920)
>[ 20691.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474710]
>[ 20691.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474710] width 1920 pitch 7680 (/4 1920)
>[ 20706.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249a3e0]
>[ 20706.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249a3e0] width 1920 pitch 7680 (/4 1920)
>[ 20719.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260c290]
>[ 20719.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260c290] width 1920 pitch 7680 (/4 1920)
>[ 20719.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20719.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20719.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20719.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20719.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20719.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20719.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20719.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20719.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20719.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20719.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20720.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20720.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20720.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20720.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20721.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20721.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20721.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20721.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20721.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20721.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20721.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20721.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20721.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20721.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20722.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20722.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20722.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20722.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20723.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20723.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20723.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20723.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20723.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20723.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20723.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20723.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20724.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20724.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20724.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20724.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20724.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20724.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20724.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20724.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20724.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20724.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20724.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20724.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20724.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20724.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20724.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20728.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x371ae60]
>[ 20728.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x371ae60] width 1920 pitch 7680 (/4 1920)
>[ 20728.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414320]
>[ 20728.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414320] width 1920 pitch 7680 (/4 1920)
>[ 20734.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20734.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20735.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39801f0]
>[ 20735.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39801f0] width 1920 pitch 7680 (/4 1920)
>[ 20735.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc250]
>[ 20735.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc250] width 1920 pitch 7680 (/4 1920)
>[ 20736.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243d740]
>[ 20736.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243d740] width 1920 pitch 7680 (/4 1920)
>[ 20739.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2491a10]
>[ 20739.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2491a10] width 1920 pitch 7680 (/4 1920)
>[ 20739.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385f0e0]
>[ 20739.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385f0e0] width 1920 pitch 7680 (/4 1920)
>[ 20739.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20739.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20739.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20739.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20739.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263b710]
>[ 20740.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263b710] width 1920 pitch 7680 (/4 1920)
>[ 20740.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2ab0]
>[ 20740.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2ab0] width 1920 pitch 7680 (/4 1920)
>[ 20740.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e92b0]
>[ 20740.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e92b0] width 1920 pitch 7680 (/4 1920)
>[ 20747.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc800]
>[ 20747.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc800] width 1920 pitch 7680 (/4 1920)
>[ 20758.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2395100]
>[ 20758.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2395100] width 1920 pitch 7680 (/4 1920)
>[ 20796.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3712cc0]
>[ 20796.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3712cc0] width 1920 pitch 7680 (/4 1920)
>[ 20826.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1c90]
>[ 20826.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1c90] width 1920 pitch 7680 (/4 1920)
>[ 21006.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc520]
>[ 21006.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc520] width 1920 pitch 7680 (/4 1920)
>[ 21036.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2605ad0]
>[ 21036.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2605ad0] width 1920 pitch 7680 (/4 1920)
>[ 21096.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bc030]
>[ 21096.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bc030] width 1920 pitch 7680 (/4 1920)
>[ 21111.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866490]
>[ 21111.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866490] width 1920 pitch 7680 (/4 1920)
>[ 21126.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365c520]
>[ 21126.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365c520] width 1920 pitch 7680 (/4 1920)
>[ 21141.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b388d0]
>[ 21141.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b388d0] width 1920 pitch 7680 (/4 1920)
>[ 21171.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b02b60]
>[ 21171.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b02b60] width 1920 pitch 7680 (/4 1920)
>[ 21175.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913e90]
>[ 21175.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913e90] width 1920 pitch 7680 (/4 1920)
>[ 21186.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad8500]
>[ 21186.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad8500] width 1920 pitch 7680 (/4 1920)
>[ 21201.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad8500]
>[ 21201.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad8500] width 1920 pitch 7680 (/4 1920)
>[ 21216.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38577a0]
>[ 21216.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38577a0] width 1920 pitch 7680 (/4 1920)
>[ 21246.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ca140]
>[ 21246.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ca140] width 1920 pitch 7680 (/4 1920)
>[ 21291.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384df60]
>[ 21291.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384df60] width 1920 pitch 7680 (/4 1920)
>[ 21303.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21303.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21303.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bf300]
>[ 21303.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bf300] width 1920 pitch 7680 (/4 1920)
>[ 21303.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0450]
>[ 21303.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0450] width 1920 pitch 7680 (/4 1920)
>[ 21303.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bf300]
>[ 21303.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bf300] width 1920 pitch 7680 (/4 1920)
>[ 21303.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad9ca0]
>[ 21303.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad9ca0] width 1920 pitch 7680 (/4 1920)
>[ 21303.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913ef0]
>[ 21303.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913ef0] width 1920 pitch 7680 (/4 1920)
>[ 21303.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9880]
>[ 21303.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9880] width 1920 pitch 7680 (/4 1920)
>[ 21303.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21303.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21303.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0450]
>[ 21303.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0450] width 1920 pitch 7680 (/4 1920)
>[ 21303.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21303.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21303.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0450]
>[ 21303.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0450] width 1920 pitch 7680 (/4 1920)
>[ 21306.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9880]
>[ 21306.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9880] width 1920 pitch 7680 (/4 1920)
>[ 21336.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21336.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21344.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be67d0]
>[ 21344.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be67d0] width 1920 pitch 7680 (/4 1920)
>[ 21351.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2670]
>[ 21351.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2670] width 1920 pitch 7680 (/4 1920)
>[ 21366.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26345b0]
>[ 21366.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26345b0] width 1920 pitch 7680 (/4 1920)
>[ 21370.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b20110]
>[ 21370.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b20110] width 1920 pitch 7680 (/4 1920)
>[ 21384.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cdc80]
>[ 21384.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cdc80] width 1920 pitch 7680 (/4 1920)
>[ 21384.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b20110]
>[ 21384.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b20110] width 1920 pitch 7680 (/4 1920)
>[ 21384.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3970030]
>[ 21384.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3970030] width 1920 pitch 7680 (/4 1920)
>[ 21384.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8410]
>[ 21384.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8410] width 1920 pitch 7680 (/4 1920)
>[ 21384.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3970030]
>[ 21384.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3970030] width 1920 pitch 7680 (/4 1920)
>[ 21384.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8410]
>[ 21385.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8410] width 1920 pitch 7680 (/4 1920)
>[ 21385.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3970030]
>[ 21385.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3970030] width 1920 pitch 7680 (/4 1920)
>[ 21385.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8410]
>[ 21385.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8410] width 1920 pitch 7680 (/4 1920)
>[ 21385.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3970030]
>[ 21385.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3970030] width 1920 pitch 7680 (/4 1920)
>[ 21385.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8410]
>[ 21385.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8410] width 1920 pitch 7680 (/4 1920)
>[ 21411.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fd290]
>[ 21411.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fd290] width 1920 pitch 7680 (/4 1920)
>[ 21426.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236eb70]
>[ 21426.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236eb70] width 1920 pitch 7680 (/4 1920)
>[ 21436.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243e170]
>[ 21436.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243e170] width 1920 pitch 7680 (/4 1920)
>[ 21436.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21436.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 21436.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 21436.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21436.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 21436.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 21436.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21436.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 21436.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 21436.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21436.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 21436.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 21436.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21436.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 21436.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 21436.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3783fb0]
>[ 21436.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3783fb0] width 1920 pitch 7680 (/4 1920)
>[ 21442.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeb810]
>[ 21442.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeb810] width 1920 pitch 7680 (/4 1920)
>[ 21469.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abcfa0]
>[ 21469.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abcfa0] width 1920 pitch 7680 (/4 1920)
>[ 21469.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21469.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8130]
>[ 21469.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8130] width 1920 pitch 7680 (/4 1920)
>[ 21469.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21469.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8130]
>[ 21469.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8130] width 1920 pitch 7680 (/4 1920)
>[ 21469.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21469.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8130]
>[ 21469.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8130] width 1920 pitch 7680 (/4 1920)
>[ 21469.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21469.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8130]
>[ 21469.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8130] width 1920 pitch 7680 (/4 1920)
>[ 21469.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21469.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c8130]
>[ 21469.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c8130] width 1920 pitch 7680 (/4 1920)
>[ 21469.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 21469.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 21475.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fbd60]
>[ 21475.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fbd60] width 1920 pitch 7680 (/4 1920)
>[ 21517.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x383b5a0]
>[ 21517.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x383b5a0] width 1920 pitch 7680 (/4 1920)
>[ 21517.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387e330]
>[ 21517.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387e330] width 1920 pitch 7680 (/4 1920)
>[ 21517.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8510]
>[ 21518.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8510] width 1920 pitch 7680 (/4 1920)
>[ 21518.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387e330]
>[ 21518.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387e330] width 1920 pitch 7680 (/4 1920)
>[ 21526.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b13b0]
>[ 21526.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b13b0] width 1920 pitch 7680 (/4 1920)
>[ 21551.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983520]
>[ 21551.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983520] width 1920 pitch 7680 (/4 1920)
>[ 21551.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ade1f0]
>[ 21551.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ade1f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21551.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21551.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21551.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21551.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21551.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21551.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21551.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21551.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21551.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e3a20]
>[ 21551.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e3a20] width 1920 pitch 7680 (/4 1920)
>[ 21551.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e37f0]
>[ 21551.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e37f0] width 1920 pitch 7680 (/4 1920)
>[ 21562.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c65f0]
>[ 21562.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c65f0] width 1920 pitch 7680 (/4 1920)
>[ 21631.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34114e0]
>[ 21631.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34114e0] width 1920 pitch 7680 (/4 1920)
>[ 21631.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b4000]
>[ 21631.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b4000] width 1920 pitch 7680 (/4 1920)
>[ 21631.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37bae50]
>[ 21631.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37bae50] width 1920 pitch 7680 (/4 1920)
>[ 21631.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660890]
>[ 21631.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660890] width 1920 pitch 7680 (/4 1920)
>[ 21631.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399afc0]
>[ 21631.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399afc0] width 1920 pitch 7680 (/4 1920)
>[ 21631.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660890]
>[ 21631.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660890] width 1920 pitch 7680 (/4 1920)
>[ 21631.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399afc0]
>[ 21631.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399afc0] width 1920 pitch 7680 (/4 1920)
>[ 21631.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660890]
>[ 21631.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660890] width 1920 pitch 7680 (/4 1920)
>[ 21631.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399afc0]
>[ 21631.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399afc0] width 1920 pitch 7680 (/4 1920)
>[ 21631.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660890]
>[ 21631.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660890] width 1920 pitch 7680 (/4 1920)
>[ 21631.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399afc0]
>[ 21631.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399afc0] width 1920 pitch 7680 (/4 1920)
>[ 21631.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2660890]
>[ 21631.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2660890] width 1920 pitch 7680 (/4 1920)
>[ 21631.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399afc0]
>[ 21632.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399afc0] width 1920 pitch 7680 (/4 1920)
>[ 21666.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383fc0]
>[ 21666.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383fc0] width 1920 pitch 7680 (/4 1920)
>[ 21675.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38242f0]
>[ 21675.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38242f0] width 1920 pitch 7680 (/4 1920)
>[ 21681.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba3140]
>[ 21681.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba3140] width 1920 pitch 7680 (/4 1920)
>[ 21726.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21726.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21741.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2438e70]
>[ 21741.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2438e70] width 1920 pitch 7680 (/4 1920)
>[ 21786.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23958d0]
>[ 21786.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23958d0] width 1920 pitch 7680 (/4 1920)
>[ 21792.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b184d0]
>[ 21792.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b184d0] width 1920 pitch 7680 (/4 1920)
>[ 21792.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dd6c0]
>[ 21792.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dd6c0] width 1920 pitch 7680 (/4 1920)
>[ 21792.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21792.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21792.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b184d0]
>[ 21792.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b184d0] width 1920 pitch 7680 (/4 1920)
>[ 21793.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21793.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21793.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b184d0]
>[ 21793.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b184d0] width 1920 pitch 7680 (/4 1920)
>[ 21793.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21793.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21793.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b184d0]
>[ 21793.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b184d0] width 1920 pitch 7680 (/4 1920)
>[ 21793.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21793.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21793.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b184d0]
>[ 21793.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b184d0] width 1920 pitch 7680 (/4 1920)
>[ 21793.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cb1a0]
>[ 21793.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cb1a0] width 1920 pitch 7680 (/4 1920)
>[ 21801.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c04780]
>[ 21801.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c04780] width 1920 pitch 7680 (/4 1920)
>[ 21806.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370c120]
>[ 21806.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370c120] width 1920 pitch 7680 (/4 1920)
>[ 21835.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449560]
>[ 21835.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449560] width 1920 pitch 7680 (/4 1920)
>[ 21835.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aba40]
>[ 21835.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aba40] width 1920 pitch 7680 (/4 1920)
>[ 21835.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[ 21835.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[ 21835.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449560]
>[ 21835.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449560] width 1920 pitch 7680 (/4 1920)
>[ 21835.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[ 21835.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[ 21835.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449560]
>[ 21835.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449560] width 1920 pitch 7680 (/4 1920)
>[ 21835.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[ 21835.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[ 21835.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449560]
>[ 21835.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449560] width 1920 pitch 7680 (/4 1920)
>[ 21835.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[ 21835.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[ 21835.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2449560]
>[ 21835.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2449560] width 1920 pitch 7680 (/4 1920)
>[ 21835.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9c0]
>[ 21835.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9c0] width 1920 pitch 7680 (/4 1920)
>[ 21840.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b232f0]
>[ 21840.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b232f0] width 1920 pitch 7680 (/4 1920)
>[ 21868.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37112a0]
>[ 21868.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37112a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21868.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a28a0]
>[ 21868.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a28a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21868.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a28a0]
>[ 21868.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a28a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21868.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a28a0]
>[ 21868.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a28a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21868.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a28a0]
>[ 21868.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a28a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21868.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a28a0]
>[ 21868.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a28a0] width 1920 pitch 7680 (/4 1920)
>[ 21868.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2383f30]
>[ 21868.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2383f30] width 1920 pitch 7680 (/4 1920)
>[ 21925.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9be0]
>[ 21925.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9be0] width 1920 pitch 7680 (/4 1920)
>[ 21996.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ac130]
>[ 21996.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ac130] width 1920 pitch 7680 (/4 1920)
>[ 22011.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384f740]
>[ 22011.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384f740] width 1920 pitch 7680 (/4 1920)
>[ 22056.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec920]
>[ 22056.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec920] width 1920 pitch 7680 (/4 1920)
>[ 22071.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bba0]
>[ 22071.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bba0] width 1920 pitch 7680 (/4 1920)
>[ 22101.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2429f70]
>[ 22101.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2429f70] width 1920 pitch 7680 (/4 1920)
>[ 22116.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e89c0]
>[ 22116.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e89c0] width 1920 pitch 7680 (/4 1920)
>[ 22206.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624020]
>[ 22206.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624020] width 1920 pitch 7680 (/4 1920)
>[ 22221.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2437220]
>[ 22221.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2437220] width 1920 pitch 7680 (/4 1920)
>[ 22326.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a2f30]
>[ 22326.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a2f30] width 1920 pitch 7680 (/4 1920)
>[ 22341.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fdeb0]
>[ 22341.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fdeb0] width 1920 pitch 7680 (/4 1920)
>[ 22371.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2635b30]
>[ 22371.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2635b30] width 1920 pitch 7680 (/4 1920)
>[ 22398.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2000]
>[ 22398.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2000] width 1920 pitch 7680 (/4 1920)
>[ 22398.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2426740]
>[ 22398.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2426740] width 1920 pitch 7680 (/4 1920)
>[ 22401.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c6b40]
>[ 22401.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c6b40] width 1920 pitch 7680 (/4 1920)
>[ 22423.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fce0]
>[ 22423.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fce0] width 1920 pitch 7680 (/4 1920)
>[ 22431.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d6a50]
>[ 22431.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d6a50] width 1920 pitch 7680 (/4 1920)
>[ 22446.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bec390]
>[ 22446.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bec390] width 1920 pitch 7680 (/4 1920)
>[ 22459.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22459.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22459.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cdb90]
>[ 22459.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cdb90] width 1920 pitch 7680 (/4 1920)
>[ 22459.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22459.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cdb90]
>[ 22459.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cdb90] width 1920 pitch 7680 (/4 1920)
>[ 22459.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22459.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cdb90]
>[ 22459.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cdb90] width 1920 pitch 7680 (/4 1920)
>[ 22459.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22459.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cdb90]
>[ 22459.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cdb90] width 1920 pitch 7680 (/4 1920)
>[ 22459.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bef7a0]
>[ 22459.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bef7a0] width 1920 pitch 7680 (/4 1920)
>[ 22469.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37e7220]
>[ 22469.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37e7220] width 1920 pitch 7680 (/4 1920)
>[ 22506.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3780190]
>[ 22506.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3780190] width 1920 pitch 7680 (/4 1920)
>[ 22506.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc0d0]
>[ 22506.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc0d0] width 1920 pitch 7680 (/4 1920)
>[ 22506.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6ab0]
>[ 22506.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6ab0] width 1920 pitch 7680 (/4 1920)
>[ 22506.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc0d0]
>[ 22506.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc0d0] width 1920 pitch 7680 (/4 1920)
>[ 22506.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6ab0]
>[ 22506.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6ab0] width 1920 pitch 7680 (/4 1920)
>[ 22506.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc0d0]
>[ 22506.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc0d0] width 1920 pitch 7680 (/4 1920)
>[ 22506.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6ab0]
>[ 22506.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6ab0] width 1920 pitch 7680 (/4 1920)
>[ 22506.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc0d0]
>[ 22506.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc0d0] width 1920 pitch 7680 (/4 1920)
>[ 22506.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6ab0]
>[ 22506.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6ab0] width 1920 pitch 7680 (/4 1920)
>[ 22506.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acc0d0]
>[ 22506.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acc0d0] width 1920 pitch 7680 (/4 1920)
>[ 22510.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24365a0]
>[ 22510.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24365a0] width 1920 pitch 7680 (/4 1920)
>[ 22526.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d6da0]
>[ 22526.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d6da0] width 1920 pitch 7680 (/4 1920)
>[ 22526.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 22526.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 22526.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b05790]
>[ 22526.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b05790] width 1920 pitch 7680 (/4 1920)
>[ 22526.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 22526.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 22533.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26648c0]
>[ 22533.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26648c0] width 1920 pitch 7680 (/4 1920)
>[ 22538.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3709840]
>[ 22538.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3709840] width 1920 pitch 7680 (/4 1920)
>[ 22538.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473070]
>[ 22538.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473070] width 1920 pitch 7680 (/4 1920)
>[ 22538.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24998b0]
>[ 22538.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24998b0] width 1920 pitch 7680 (/4 1920)
>[ 22538.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473070]
>[ 22538.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473070] width 1920 pitch 7680 (/4 1920)
>[ 22538.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24998b0]
>[ 22538.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24998b0] width 1920 pitch 7680 (/4 1920)
>[ 22538.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473070]
>[ 22538.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473070] width 1920 pitch 7680 (/4 1920)
>[ 22538.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24998b0]
>[ 22538.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24998b0] width 1920 pitch 7680 (/4 1920)
>[ 22538.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473070]
>[ 22538.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473070] width 1920 pitch 7680 (/4 1920)
>[ 22538.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24998b0]
>[ 22538.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24998b0] width 1920 pitch 7680 (/4 1920)
>[ 22538.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473070]
>[ 22538.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473070] width 1920 pitch 7680 (/4 1920)
>[ 22538.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24998b0]
>[ 22538.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24998b0] width 1920 pitch 7680 (/4 1920)
>[ 22635.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab8360]
>[ 22635.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab8360] width 1920 pitch 7680 (/4 1920)
>[ 22651.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3789310]
>[ 22651.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3789310] width 1920 pitch 7680 (/4 1920)
>[ 22651.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff070]
>[ 22651.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff070] width 1920 pitch 7680 (/4 1920)
>[ 22651.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d90]
>[ 22651.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d90] width 1920 pitch 7680 (/4 1920)
>[ 22651.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff070]
>[ 22651.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff070] width 1920 pitch 7680 (/4 1920)
>[ 22651.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d90]
>[ 22651.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d90] width 1920 pitch 7680 (/4 1920)
>[ 22651.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff070]
>[ 22651.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff070] width 1920 pitch 7680 (/4 1920)
>[ 22651.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d90]
>[ 22651.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d90] width 1920 pitch 7680 (/4 1920)
>[ 22651.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff070]
>[ 22651.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff070] width 1920 pitch 7680 (/4 1920)
>[ 22651.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3727d90]
>[ 22652.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3727d90] width 1920 pitch 7680 (/4 1920)
>[ 22652.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff070]
>[ 22652.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff070] width 1920 pitch 7680 (/4 1920)
>[ 22684.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37875c0]
>[ 22684.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37875c0] width 1920 pitch 7680 (/4 1920)
>[ 22686.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2626a90]
>[ 22686.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2626a90] width 1920 pitch 7680 (/4 1920)
>[ 22686.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2626a90]
>[ 22686.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2626a90] width 1920 pitch 7680 (/4 1920)
>[ 22701.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6f020]
>[ 22701.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6f020] width 1920 pitch 7680 (/4 1920)
>[ 22715.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390a70]
>[ 22715.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390a70] width 1920 pitch 7680 (/4 1920)
>[ 22715.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3786da0]
>[ 22715.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3786da0] width 1920 pitch 7680 (/4 1920)
>[ 22715.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390a70]
>[ 22715.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390a70] width 1920 pitch 7680 (/4 1920)
>[ 22715.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3786da0]
>[ 22715.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3786da0] width 1920 pitch 7680 (/4 1920)
>[ 22715.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390a70]
>[ 22715.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390a70] width 1920 pitch 7680 (/4 1920)
>[ 22715.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3786da0]
>[ 22715.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3786da0] width 1920 pitch 7680 (/4 1920)
>[ 22715.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390a70]
>[ 22715.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390a70] width 1920 pitch 7680 (/4 1920)
>[ 22715.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3786da0]
>[ 22715.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3786da0] width 1920 pitch 7680 (/4 1920)
>[ 22715.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390a70]
>[ 22715.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390a70] width 1920 pitch 7680 (/4 1920)
>[ 22715.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3786da0]
>[ 22716.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3786da0] width 1920 pitch 7680 (/4 1920)
>[ 22716.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6f020]
>[ 22716.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6f020] width 1920 pitch 7680 (/4 1920)
>[ 22716.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3787560]
>[ 22716.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3787560] width 1920 pitch 7680 (/4 1920)
>[ 22716.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6f020]
>[ 22716.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6f020] width 1920 pitch 7680 (/4 1920)
>[ 22731.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fe080]
>[ 22731.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fe080] width 1920 pitch 7680 (/4 1920)
>[ 22732.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466690]
>[ 22732.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466690] width 1920 pitch 7680 (/4 1920)
>[ 22746.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421b90]
>[ 22746.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421b90] width 1920 pitch 7680 (/4 1920)
>[ 22776.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2466690]
>[ 22776.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2466690] width 1920 pitch 7680 (/4 1920)
>[ 22776.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23290]
>[ 22776.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23290] width 1920 pitch 7680 (/4 1920)
>[ 22791.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 22791.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 22796.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8510]
>[ 22796.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8510] width 1920 pitch 7680 (/4 1920)
>[ 22796.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36da9c0]
>[ 22796.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36da9c0] width 1920 pitch 7680 (/4 1920)
>[ 22796.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfd090]
>[ 22796.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfd090] width 1920 pitch 7680 (/4 1920)
>[ 22796.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3850870]
>[ 22796.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3850870] width 1920 pitch 7680 (/4 1920)
>[ 22796.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382750]
>[ 22796.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382750] width 1920 pitch 7680 (/4 1920)
>[ 22796.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3850870]
>[ 22796.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3850870] width 1920 pitch 7680 (/4 1920)
>[ 22796.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382750]
>[ 22796.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382750] width 1920 pitch 7680 (/4 1920)
>[ 22796.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3850870]
>[ 22796.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3850870] width 1920 pitch 7680 (/4 1920)
>[ 22796.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382750]
>[ 22796.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382750] width 1920 pitch 7680 (/4 1920)
>[ 22796.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3850870]
>[ 22796.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3850870] width 1920 pitch 7680 (/4 1920)
>[ 22796.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2382750]
>[ 22796.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2382750] width 1920 pitch 7680 (/4 1920)
>[ 22796.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3850870]
>[ 22796.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3850870] width 1920 pitch 7680 (/4 1920)
>[ 22806.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249e600]
>[ 22806.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249e600] width 1920 pitch 7680 (/4 1920)
>[ 22806.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2421b90]
>[ 22806.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2421b90] width 1920 pitch 7680 (/4 1920)
>[ 22821.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b25e30]
>[ 22821.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b25e30] width 1920 pitch 7680 (/4 1920)
>[ 22853.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385e4e0]
>[ 22853.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385e4e0] width 1920 pitch 7680 (/4 1920)
>[ 22853.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23aa6f0]
>[ 22853.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23aa6f0] width 1920 pitch 7680 (/4 1920)
>[ 22853.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acdf00]
>[ 22853.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acdf00] width 1920 pitch 7680 (/4 1920)
>[ 22853.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c06a0]
>[ 22853.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c06a0] width 1920 pitch 7680 (/4 1920)
>[ 22853.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acdf00]
>[ 22853.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acdf00] width 1920 pitch 7680 (/4 1920)
>[ 22853.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c06a0]
>[ 22853.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c06a0] width 1920 pitch 7680 (/4 1920)
>[ 22853.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acdf00]
>[ 22853.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acdf00] width 1920 pitch 7680 (/4 1920)
>[ 22853.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c06a0]
>[ 22853.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c06a0] width 1920 pitch 7680 (/4 1920)
>[ 22853.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acdf00]
>[ 22853.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acdf00] width 1920 pitch 7680 (/4 1920)
>[ 22853.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c06a0]
>[ 22853.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c06a0] width 1920 pitch 7680 (/4 1920)
>[ 22881.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2437220]
>[ 22881.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2437220] width 1920 pitch 7680 (/4 1920)
>[ 22896.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261d060]
>[ 22896.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261d060] width 1920 pitch 7680 (/4 1920)
>[ 22898.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251cda0]
>[ 22898.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251cda0] width 1920 pitch 7680 (/4 1920)
>[ 22903.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ada280]
>[ 22903.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ada280] width 1920 pitch 7680 (/4 1920)
>[ 22903.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240a210]
>[ 22903.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240a210] width 1920 pitch 7680 (/4 1920)
>[ 22903.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386bd90]
>[ 22903.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386bd90] width 1920 pitch 7680 (/4 1920)
>[ 22903.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b01e00]
>[ 22903.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b01e00] width 1920 pitch 7680 (/4 1920)
>[ 22903.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3721a50]
>[ 22903.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3721a50] width 1920 pitch 7680 (/4 1920)
>[ 22914.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c06170]
>[ 22914.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c06170] width 1920 pitch 7680 (/4 1920)
>[ 22916.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca130]
>[ 22916.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca130] width 1920 pitch 7680 (/4 1920)
>[ 22921.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801fc0]
>[ 22921.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801fc0] width 1920 pitch 7680 (/4 1920)
>[ 22922.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d3e80]
>[ 22922.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d3e80] width 1920 pitch 7680 (/4 1920)
>[ 22922.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d3e80]
>[ 22922.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d3e80] width 1920 pitch 7680 (/4 1920)
>[ 22923.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d4370]
>[ 22923.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d4370] width 1920 pitch 7680 (/4 1920)
>[ 22926.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3805f60]
>[ 22926.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3805f60] width 1920 pitch 7680 (/4 1920)
>[ 22941.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2acf200]
>[ 22941.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2acf200] width 1920 pitch 7680 (/4 1920)
>[ 22945.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264eba0]
>[ 22945.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264eba0] width 1920 pitch 7680 (/4 1920)
>[ 22948.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f45e0]
>[ 22948.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f45e0] width 1920 pitch 7680 (/4 1920)
>[ 22952.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700460]
>[ 22952.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700460] width 1920 pitch 7680 (/4 1920)
>[ 22952.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f3700]
>[ 22952.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f3700] width 1920 pitch 7680 (/4 1920)
>[ 22952.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fbd20]
>[ 22952.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fbd20] width 1920 pitch 7680 (/4 1920)
>[ 22952.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f3700]
>[ 22952.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f3700] width 1920 pitch 7680 (/4 1920)
>[ 22954.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9de60]
>[ 22954.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9de60] width 1920 pitch 7680 (/4 1920)
>[ 22955.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37859b0]
>[ 22955.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37859b0] width 1920 pitch 7680 (/4 1920)
>[ 22964.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d220]
>[ 22964.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d220] width 1920 pitch 7680 (/4 1920)
>[ 22969.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9de60]
>[ 22969.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9de60] width 1920 pitch 7680 (/4 1920)
>[ 22969.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641a00]
>[ 22969.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641a00] width 1920 pitch 7680 (/4 1920)
>[ 22969.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d220]
>[ 22969.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d220] width 1920 pitch 7680 (/4 1920)
>[ 22969.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641a00]
>[ 22969.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641a00] width 1920 pitch 7680 (/4 1920)
>[ 22969.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244d220]
>[ 22969.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244d220] width 1920 pitch 7680 (/4 1920)
>[ 22978.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3847e20]
>[ 22978.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3847e20] width 1920 pitch 7680 (/4 1920)
>[ 22978.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35e4ae0]
>[ 22978.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35e4ae0] width 1920 pitch 7680 (/4 1920)
>[ 22979.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261c480]
>[ 22979.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261c480] width 1920 pitch 7680 (/4 1920)
>[ 22979.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5a20]
>[ 22979.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5a20] width 1920 pitch 7680 (/4 1920)
>[ 22979.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a607a0]
>[ 22979.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a607a0] width 1920 pitch 7680 (/4 1920)
>[ 23037.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cb90]
>[ 23037.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cb90] width 1920 pitch 7680 (/4 1920)
>[ 23037.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b650]
>[ 23037.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b650] width 1920 pitch 7680 (/4 1920)
>[ 23037.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641a00]
>[ 23037.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641a00] width 1920 pitch 7680 (/4 1920)
>[ 23037.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b650]
>[ 23037.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b650] width 1920 pitch 7680 (/4 1920)
>[ 23038.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641a00]
>[ 23038.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641a00] width 1920 pitch 7680 (/4 1920)
>[ 23043.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39111d0]
>[ 23043.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39111d0] width 1920 pitch 7680 (/4 1920)
>[ 23043.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c63a0]
>[ 23043.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c63a0] width 1920 pitch 7680 (/4 1920)
>[ 23043.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd00f0]
>[ 23043.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd00f0] width 1920 pitch 7680 (/4 1920)
>[ 23043.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f9580]
>[ 23043.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f9580] width 1920 pitch 7680 (/4 1920)
>[ 23050.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cc40]
>[ 23050.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cc40] width 1920 pitch 7680 (/4 1920)
>[ 23106.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236e6d0]
>[ 23106.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236e6d0] width 1920 pitch 7680 (/4 1920)
>[ 23121.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ff1d0]
>[ 23121.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ff1d0] width 1920 pitch 7680 (/4 1920)
>[ 23144.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b1270]
>[ 23144.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b1270] width 1920 pitch 7680 (/4 1920)
>[ 23166.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488450]
>[ 23166.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488450] width 1920 pitch 7680 (/4 1920)
>[ 23181.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488450]
>[ 23181.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488450] width 1920 pitch 7680 (/4 1920)
>[ 23196.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afb220]
>[ 23196.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afb220] width 1920 pitch 7680 (/4 1920)
>[ 23226.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2647300]
>[ 23226.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2647300] width 1920 pitch 7680 (/4 1920)
>[ 23241.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382f930]
>[ 23241.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382f930] width 1920 pitch 7680 (/4 1920)
>[ 23256.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38265a0]
>[ 23256.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38265a0] width 1920 pitch 7680 (/4 1920)
>[ 23271.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382f930]
>[ 23271.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382f930] width 1920 pitch 7680 (/4 1920)
>[ 23301.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afa6c0]
>[ 23301.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afa6c0] width 1920 pitch 7680 (/4 1920)
>[ 23316.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992790]
>[ 23316.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992790] width 1920 pitch 7680 (/4 1920)
>[ 23331.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399fe70]
>[ 23331.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399fe70] width 1920 pitch 7680 (/4 1920)
>[ 23346.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b03160]
>[ 23346.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b03160] width 1920 pitch 7680 (/4 1920)
>[ 23361.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5c10]
>[ 23361.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5c10] width 1920 pitch 7680 (/4 1920)
>[ 23376.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380e620]
>[ 23376.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380e620] width 1920 pitch 7680 (/4 1920)
>[ 23391.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9240]
>[ 23391.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9240] width 1920 pitch 7680 (/4 1920)
>[ 23436.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad6b0]
>[ 23436.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad6b0] width 1920 pitch 7680 (/4 1920)
>[ 23451.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24594d0]
>[ 23451.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24594d0] width 1920 pitch 7680 (/4 1920)
>[ 23451.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399a2d0]
>[ 23451.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399a2d0] width 1920 pitch 7680 (/4 1920)
>[ 23466.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384eb60]
>[ 23466.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384eb60] width 1920 pitch 7680 (/4 1920)
>[ 23481.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21763f0]
>[ 23481.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21763f0] width 1920 pitch 7680 (/4 1920)
>[ 23552.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67a90]
>[ 23552.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67a90] width 1920 pitch 7680 (/4 1920)
>[ 23552.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910290]
>[ 23553.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910290] width 1920 pitch 7680 (/4 1920)
>[ 23553.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37883b0]
>[ 23553.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37883b0] width 1920 pitch 7680 (/4 1920)
>[ 23553.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33aefb0]
>[ 23553.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33aefb0] width 1920 pitch 7680 (/4 1920)
>[ 23553.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ac4b0]
>[ 23553.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ac4b0] width 1920 pitch 7680 (/4 1920)
>[ 23553.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33aefb0]
>[ 23553.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33aefb0] width 1920 pitch 7680 (/4 1920)
>[ 23553.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ac4b0]
>[ 23553.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ac4b0] width 1920 pitch 7680 (/4 1920)
>[ 23553.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33aefb0]
>[ 23553.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33aefb0] width 1920 pitch 7680 (/4 1920)
>[ 23553.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ac4b0]
>[ 23553.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ac4b0] width 1920 pitch 7680 (/4 1920)
>[ 23553.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33aefb0]
>[ 23553.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33aefb0] width 1920 pitch 7680 (/4 1920)
>[ 23554.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2426760]
>[ 23554.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2426760] width 1920 pitch 7680 (/4 1920)
>[ 23554.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457c70]
>[ 23555.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457c70] width 1920 pitch 7680 (/4 1920)
>[ 23555.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23555.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23555.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cde50]
>[ 23555.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cde50] width 1920 pitch 7680 (/4 1920)
>[ 23555.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23555.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23555.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cde50]
>[ 23555.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cde50] width 1920 pitch 7680 (/4 1920)
>[ 23555.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23555.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23555.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cde50]
>[ 23555.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cde50] width 1920 pitch 7680 (/4 1920)
>[ 23555.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23555.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23555.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cde50]
>[ 23555.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cde50] width 1920 pitch 7680 (/4 1920)
>[ 23555.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23555.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23555.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36cde50]
>[ 23555.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36cde50] width 1920 pitch 7680 (/4 1920)
>[ 23556.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67a90]
>[ 23556.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67a90] width 1920 pitch 7680 (/4 1920)
>[ 23556.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457c70]
>[ 23556.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457c70] width 1920 pitch 7680 (/4 1920)
>[ 23556.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457c70]
>[ 23556.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457c70] width 1920 pitch 7680 (/4 1920)
>[ 23556.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1f80]
>[ 23556.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1f80] width 1920 pitch 7680 (/4 1920)
>[ 23556.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1f80]
>[ 23556.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1f80] width 1920 pitch 7680 (/4 1920)
>[ 23556.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1f80]
>[ 23556.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1f80] width 1920 pitch 7680 (/4 1920)
>[ 23556.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23556.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1f80]
>[ 23556.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1f80] width 1920 pitch 7680 (/4 1920)
>[ 23556.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ad4d0]
>[ 23556.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ad4d0] width 1920 pitch 7680 (/4 1920)
>[ 23557.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e1f80]
>[ 23557.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e1f80] width 1920 pitch 7680 (/4 1920)
>[ 23558.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457c70]
>[ 23558.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457c70] width 1920 pitch 7680 (/4 1920)
>[ 23558.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 23558.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 23558.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265d3a0]
>[ 23558.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265d3a0] width 1920 pitch 7680 (/4 1920)
>[ 23558.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 23558.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 23558.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265d3a0]
>[ 23558.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265d3a0] width 1920 pitch 7680 (/4 1920)
>[ 23558.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 23558.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 23558.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265d3a0]
>[ 23558.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265d3a0] width 1920 pitch 7680 (/4 1920)
>[ 23558.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 23558.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 23558.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265d3a0]
>[ 23558.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265d3a0] width 1920 pitch 7680 (/4 1920)
>[ 23558.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502940]
>[ 23558.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502940] width 1920 pitch 7680 (/4 1920)
>[ 23558.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265d3a0]
>[ 23558.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265d3a0] width 1920 pitch 7680 (/4 1920)
>[ 23558.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b020]
>[ 23558.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b020] width 1920 pitch 7680 (/4 1920)
>[ 23571.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9e0f0]
>[ 23571.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9e0f0] width 1920 pitch 7680 (/4 1920)
>[ 23586.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239ffb0]
>[ 23586.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239ffb0] width 1920 pitch 7680 (/4 1920)
>[ 23616.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857f20]
>[ 23616.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857f20] width 1920 pitch 7680 (/4 1920)
>[ 23631.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243fdb0]
>[ 23631.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243fdb0] width 1920 pitch 7680 (/4 1920)
>[ 23646.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35f8d90]
>[ 23646.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35f8d90] width 1920 pitch 7680 (/4 1920)
>[ 23661.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33c3bf0]
>[ 23661.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33c3bf0] width 1920 pitch 7680 (/4 1920)
>[ 23676.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad7220]
>[ 23676.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad7220] width 1920 pitch 7680 (/4 1920)
>[ 23691.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b238c0]
>[ 23691.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b238c0] width 1920 pitch 7680 (/4 1920)
>[ 23706.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea890]
>[ 23706.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea890] width 1920 pitch 7680 (/4 1920)
>[ 23721.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b660]
>[ 23721.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b660] width 1920 pitch 7680 (/4 1920)
>[ 23789.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9ee60]
>[ 23789.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9ee60] width 1920 pitch 7680 (/4 1920)
>[ 23789.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2394930]
>[ 23789.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2394930] width 1920 pitch 7680 (/4 1920)
>[ 23789.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910290]
>[ 23789.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910290] width 1920 pitch 7680 (/4 1920)
>[ 23789.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2394930]
>[ 23789.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2394930] width 1920 pitch 7680 (/4 1920)
>[ 23789.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910290]
>[ 23789.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910290] width 1920 pitch 7680 (/4 1920)
>[ 23789.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2394930]
>[ 23789.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2394930] width 1920 pitch 7680 (/4 1920)
>[ 23789.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23789.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23789.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25257c0]
>[ 23789.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25257c0] width 1920 pitch 7680 (/4 1920)
>[ 23789.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23789.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23789.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25257c0]
>[ 23789.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25257c0] width 1920 pitch 7680 (/4 1920)
>[ 23789.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39103e0]
>[ 23789.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39103e0] width 1920 pitch 7680 (/4 1920)
>[ 23791.315] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23791.315] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23791.315] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 23791.329] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23791.330] (II) RADEON(0): RADEONSaveScreen(0)
>[ 23792.304] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23792.304] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23792.304] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 23794.761] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 23794.761] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 23794.761] (II) RADEON(0): Ok, leaving now...
>[ 23799.725] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 23799.725] (II) RADEON(0): RADEONEnterVT_KMS
>[ 23799.748] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23799.748] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23799.748] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 23799.753] (II) RADEON(0): RADEONSaveScreen(2)
>[ 23799.753] (II) RADEON(0): RADEONSaveScreen(1)
>[ 23799.754] (**) Option "Device" "/dev/input/event5"
>[ 23799.754] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 23800.370] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23800.370] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23800.370] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24029.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3852020]
>[ 24029.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3852020] width 1920 pitch 7680 (/4 1920)
>[ 24029.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38749a0]
>[ 24030.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38749a0] width 1920 pitch 7680 (/4 1920)
>[ 24037.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 24037.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 24040.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3994e70]
>[ 24040.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3994e70] width 1920 pitch 7680 (/4 1920)
>[ 24070.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33b2800]
>[ 24070.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33b2800] width 1920 pitch 7680 (/4 1920)
>[ 24091.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c9390]
>[ 24091.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c9390] width 1920 pitch 7680 (/4 1920)
>[ 24097.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24951a0]
>[ 24097.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24951a0] width 1920 pitch 7680 (/4 1920)
>[ 24097.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250fcd0]
>[ 24097.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250fcd0] width 1920 pitch 7680 (/4 1920)
>[ 24097.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b19ce0]
>[ 24097.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b19ce0] width 1920 pitch 7680 (/4 1920)
>[ 24097.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2619b80]
>[ 24097.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2619b80] width 1920 pitch 7680 (/4 1920)
>[ 24097.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b940]
>[ 24097.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b940] width 1920 pitch 7680 (/4 1920)
>[ 24097.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2619b80]
>[ 24097.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2619b80] width 1920 pitch 7680 (/4 1920)
>[ 24097.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b940]
>[ 24097.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b940] width 1920 pitch 7680 (/4 1920)
>[ 24097.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2619b80]
>[ 24097.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2619b80] width 1920 pitch 7680 (/4 1920)
>[ 24097.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386b940]
>[ 24097.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386b940] width 1920 pitch 7680 (/4 1920)
>[ 24098.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2619b80]
>[ 24098.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2619b80] width 1920 pitch 7680 (/4 1920)
>[ 24100.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3280]
>[ 24100.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3280] width 1920 pitch 7680 (/4 1920)
>[ 24150.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab1fa0]
>[ 24150.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab1fa0] width 1920 pitch 7680 (/4 1920)
>[ 24160.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c9780]
>[ 24160.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c9780] width 1920 pitch 7680 (/4 1920)
>[ 24175.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3716d40]
>[ 24175.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3716d40] width 1920 pitch 7680 (/4 1920)
>[ 24176.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab8860]
>[ 24176.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab8860] width 1920 pitch 7680 (/4 1920)
>[ 24220.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248fd10]
>[ 24220.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248fd10] width 1920 pitch 7680 (/4 1920)
>[ 24223.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d00]
>[ 24223.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d00] width 1920 pitch 7680 (/4 1920)
>[ 24223.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24223.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24223.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aceae0]
>[ 24223.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aceae0] width 1920 pitch 7680 (/4 1920)
>[ 24223.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24223.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24223.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aceae0]
>[ 24223.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aceae0] width 1920 pitch 7680 (/4 1920)
>[ 24223.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24223.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24223.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aceae0]
>[ 24223.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aceae0] width 1920 pitch 7680 (/4 1920)
>[ 24223.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24223.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24224.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aceae0]
>[ 24224.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aceae0] width 1920 pitch 7680 (/4 1920)
>[ 24224.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24224.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24224.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aceae0]
>[ 24224.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aceae0] width 1920 pitch 7680 (/4 1920)
>[ 24224.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6e30]
>[ 24224.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6e30] width 1920 pitch 7680 (/4 1920)
>[ 24250.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515250]
>[ 24250.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515250] width 1920 pitch 7680 (/4 1920)
>[ 24265.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d0b0]
>[ 24265.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d0b0] width 1920 pitch 7680 (/4 1920)
>[ 24310.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b21ae0]
>[ 24310.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b21ae0] width 1920 pitch 7680 (/4 1920)
>[ 24370.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d730]
>[ 24370.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d730] width 1920 pitch 7680 (/4 1920)
>[ 24385.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d730]
>[ 24385.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d730] width 1920 pitch 7680 (/4 1920)
>[ 24400.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f98c0]
>[ 24400.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f98c0] width 1920 pitch 7680 (/4 1920)
>[ 24415.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f98c0]
>[ 24415.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f98c0] width 1920 pitch 7680 (/4 1920)
>[ 24430.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x382d730]
>[ 24430.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x382d730] width 1920 pitch 7680 (/4 1920)
>[ 24460.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3864130]
>[ 24460.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3864130] width 1920 pitch 7680 (/4 1920)
>[ 24475.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2397cf0]
>[ 24475.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2397cf0] width 1920 pitch 7680 (/4 1920)
>[ 24490.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384d8b0]
>[ 24490.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384d8b0] width 1920 pitch 7680 (/4 1920)
>[ 24505.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b12b60]
>[ 24505.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b12b60] width 1920 pitch 7680 (/4 1920)
>[ 24535.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2624160]
>[ 24535.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2624160] width 1920 pitch 7680 (/4 1920)
>[ 24565.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3815260]
>[ 24565.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3815260] width 1920 pitch 7680 (/4 1920)
>[ 24580.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d36c0]
>[ 24580.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d36c0] width 1920 pitch 7680 (/4 1920)
>[ 24580.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38257e0]
>[ 24580.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38257e0] width 1920 pitch 7680 (/4 1920)
>[ 24610.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3866490]
>[ 24610.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3866490] width 1920 pitch 7680 (/4 1920)
>[ 24610.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3814d00]
>[ 24610.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3814d00] width 1920 pitch 7680 (/4 1920)
>[ 24625.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24543c0]
>[ 24625.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24543c0] width 1920 pitch 7680 (/4 1920)
>[ 24656.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2619680]
>[ 24656.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2619680] width 1920 pitch 7680 (/4 1920)
>[ 24670.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24805f0]
>[ 24670.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24805f0] width 1920 pitch 7680 (/4 1920)
>[ 24670.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0ada0]
>[ 24670.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0ada0] width 1920 pitch 7680 (/4 1920)
>[ 24685.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261a830]
>[ 24685.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261a830] width 1920 pitch 7680 (/4 1920)
>[ 24745.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3874fe0]
>[ 24745.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3874fe0] width 1920 pitch 7680 (/4 1920)
>[ 24760.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cd2a0]
>[ 24760.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cd2a0] width 1920 pitch 7680 (/4 1920)
>[ 24760.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37c8bc0]
>[ 24760.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37c8bc0] width 1920 pitch 7680 (/4 1920)
>[ 24790.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250e220]
>[ 24790.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250e220] width 1920 pitch 7680 (/4 1920)
>[ 24792.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x370ee30]
>[ 24792.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x370ee30] width 1920 pitch 7680 (/4 1920)
>[ 24805.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916a00]
>[ 24805.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916a00] width 1920 pitch 7680 (/4 1920)
>[ 24820.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36eacc0]
>[ 24820.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36eacc0] width 1920 pitch 7680 (/4 1920)
>[ 24820.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b420]
>[ 24820.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b420] width 1920 pitch 7680 (/4 1920)
>[ 24835.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b420]
>[ 24835.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b420] width 1920 pitch 7680 (/4 1920)
>[ 24867.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38228d0]
>[ 24867.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38228d0] width 1920 pitch 7680 (/4 1920)
>[ 24867.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab5e40]
>[ 24867.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab5e40] width 1920 pitch 7680 (/4 1920)
>[ 24867.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3706dd0]
>[ 24867.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3706dd0] width 1920 pitch 7680 (/4 1920)
>[ 24867.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cddc0]
>[ 24867.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cddc0] width 1920 pitch 7680 (/4 1920)
>[ 24867.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723ab0]
>[ 24867.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723ab0] width 1920 pitch 7680 (/4 1920)
>[ 24867.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cddc0]
>[ 24867.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cddc0] width 1920 pitch 7680 (/4 1920)
>[ 24867.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723ab0]
>[ 24867.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723ab0] width 1920 pitch 7680 (/4 1920)
>[ 24867.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cddc0]
>[ 24868.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cddc0] width 1920 pitch 7680 (/4 1920)
>[ 24868.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723ab0]
>[ 24868.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723ab0] width 1920 pitch 7680 (/4 1920)
>[ 24868.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cddc0]
>[ 24868.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cddc0] width 1920 pitch 7680 (/4 1920)
>[ 24868.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3723ab0]
>[ 24868.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3723ab0] width 1920 pitch 7680 (/4 1920)
>[ 24868.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cddc0]
>[ 24868.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cddc0] width 1920 pitch 7680 (/4 1920)
>[ 24925.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507c60]
>[ 24925.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507c60] width 1920 pitch 7680 (/4 1920)
>[ 24940.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a85e0]
>[ 24940.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a85e0] width 1920 pitch 7680 (/4 1920)
>[ 24957.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b35ee0]
>[ 24957.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b35ee0] width 1920 pitch 7680 (/4 1920)
>[ 24958.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24951a0]
>[ 24958.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24951a0] width 1920 pitch 7680 (/4 1920)
>[ 24958.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 24958.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 24958.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24951a0]
>[ 24958.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24951a0] width 1920 pitch 7680 (/4 1920)
>[ 25000.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e92b0]
>[ 25000.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e92b0] width 1920 pitch 7680 (/4 1920)
>[ 25015.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3704de0]
>[ 25015.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3704de0] width 1920 pitch 7680 (/4 1920)
>[ 25045.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12a40]
>[ 25045.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12a40] width 1920 pitch 7680 (/4 1920)
>[ 25060.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b14ce0]
>[ 25060.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b14ce0] width 1920 pitch 7680 (/4 1920)
>[ 25105.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x376e1d0]
>[ 25105.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x376e1d0] width 1920 pitch 7680 (/4 1920)
>[ 25120.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b19670]
>[ 25120.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b19670] width 1920 pitch 7680 (/4 1920)
>[ 25125.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857d00]
>[ 25125.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857d00] width 1920 pitch 7680 (/4 1920)
>[ 25129.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f3e30]
>[ 25129.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f3e30] width 1920 pitch 7680 (/4 1920)
>[ 25129.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38465a0]
>[ 25129.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38465a0] width 1920 pitch 7680 (/4 1920)
>[ 25129.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4aa0]
>[ 25129.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4aa0] width 1920 pitch 7680 (/4 1920)
>[ 25129.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38465a0]
>[ 25129.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38465a0] width 1920 pitch 7680 (/4 1920)
>[ 25129.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4aa0]
>[ 25129.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4aa0] width 1920 pitch 7680 (/4 1920)
>[ 25129.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38465a0]
>[ 25129.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38465a0] width 1920 pitch 7680 (/4 1920)
>[ 25129.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4aa0]
>[ 25129.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4aa0] width 1920 pitch 7680 (/4 1920)
>[ 25129.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38465a0]
>[ 25130.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38465a0] width 1920 pitch 7680 (/4 1920)
>[ 25369.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ee680]
>[ 25369.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ee680] width 1920 pitch 7680 (/4 1920)
>[ 25375.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3422af0]
>[ 25375.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3422af0] width 1920 pitch 7680 (/4 1920)
>[ 25390.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2425fc0]
>[ 25390.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2425fc0] width 1920 pitch 7680 (/4 1920)
>[ 25394.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632820]
>[ 25394.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632820] width 1920 pitch 7680 (/4 1920)
>[ 25394.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aee70]
>[ 25394.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aee70] width 1920 pitch 7680 (/4 1920)
>[ 25394.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397c880]
>[ 25394.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397c880] width 1920 pitch 7680 (/4 1920)
>[ 25394.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aee70]
>[ 25394.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aee70] width 1920 pitch 7680 (/4 1920)
>[ 25394.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397c880]
>[ 25394.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397c880] width 1920 pitch 7680 (/4 1920)
>[ 25394.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37aee70]
>[ 25394.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37aee70] width 1920 pitch 7680 (/4 1920)
>[ 25394.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2455000]
>[ 25394.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2455000] width 1920 pitch 7680 (/4 1920)
>[ 25394.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39afaa0]
>[ 25394.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39afaa0] width 1920 pitch 7680 (/4 1920)
>[ 25394.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c78a0]
>[ 25394.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c78a0] width 1920 pitch 7680 (/4 1920)
>[ 25394.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39afaa0]
>[ 25394.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39afaa0] width 1920 pitch 7680 (/4 1920)
>[ 25394.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c78a0]
>[ 25394.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c78a0] width 1920 pitch 7680 (/4 1920)
>[ 25394.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39afaa0]
>[ 25394.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39afaa0] width 1920 pitch 7680 (/4 1920)
>[ 25394.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c78a0]
>[ 25394.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c78a0] width 1920 pitch 7680 (/4 1920)
>[ 25405.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378cca0]
>[ 25405.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378cca0] width 1920 pitch 7680 (/4 1920)
>[ 25405.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f55c0]
>[ 25405.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f55c0] width 1920 pitch 7680 (/4 1920)
>[ 25475.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe6c0]
>[ 25475.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe6c0] width 1920 pitch 7680 (/4 1920)
>[ 25495.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dee60]
>[ 25495.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dee60] width 1920 pitch 7680 (/4 1920)
>[ 25498.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2abe6c0]
>[ 25498.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2abe6c0] width 1920 pitch 7680 (/4 1920)
>[ 25498.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f04d0]
>[ 25498.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f04d0] width 1920 pitch 7680 (/4 1920)
>[ 25498.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25498.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25498.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e440]
>[ 25498.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e440] width 1920 pitch 7680 (/4 1920)
>[ 25498.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25498.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25498.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e440]
>[ 25498.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e440] width 1920 pitch 7680 (/4 1920)
>[ 25498.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25498.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25498.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e440]
>[ 25498.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e440] width 1920 pitch 7680 (/4 1920)
>[ 25498.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25498.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25510.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25510.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25540.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bed880]
>[ 25540.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bed880] width 1920 pitch 7680 (/4 1920)
>[ 25555.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x34218b0]
>[ 25555.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x34218b0] width 1920 pitch 7680 (/4 1920)
>[ 25585.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634de0]
>[ 25585.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634de0] width 1920 pitch 7680 (/4 1920)
>[ 25600.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469970]
>[ 25600.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469970] width 1920 pitch 7680 (/4 1920)
>[ 25645.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ac1e0]
>[ 25645.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ac1e0] width 1920 pitch 7680 (/4 1920)
>[ 25660.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2609b70]
>[ 25660.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2609b70] width 1920 pitch 7680 (/4 1920)
>[ 25690.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae930]
>[ 25690.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae930] width 1920 pitch 7680 (/4 1920)
>[ 25705.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37be740]
>[ 25705.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37be740] width 1920 pitch 7680 (/4 1920)
>[ 25720.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8d50]
>[ 25720.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8d50] width 1920 pitch 7680 (/4 1920)
>[ 25750.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250b540]
>[ 25750.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250b540] width 1920 pitch 7680 (/4 1920)
>[ 25752.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24807a0]
>[ 25752.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24807a0] width 1920 pitch 7680 (/4 1920)
>[ 25752.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25752.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25752.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25752.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25752.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25752.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e840]
>[ 25752.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e840] width 1920 pitch 7680 (/4 1920)
>[ 25752.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38da980]
>[ 25752.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38da980] width 1920 pitch 7680 (/4 1920)
>[ 25755.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x204ada0]
>[ 25755.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x204ada0] width 1920 pitch 7680 (/4 1920)
>[ 25765.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390cc00]
>[ 25765.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390cc00] width 1920 pitch 7680 (/4 1920)
>[ 25780.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f9c20]
>[ 25780.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f9c20] width 1920 pitch 7680 (/4 1920)
>[ 25795.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b1e0]
>[ 25795.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b1e0] width 1920 pitch 7680 (/4 1920)
>[ 25855.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2456d90]
>[ 25855.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2456d90] width 1920 pitch 7680 (/4 1920)
>[ 25870.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ee9a0]
>[ 25870.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ee9a0] width 1920 pitch 7680 (/4 1920)
>[ 25878.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3330320]
>[ 25878.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3330320] width 1920 pitch 7680 (/4 1920)
>[ 25878.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aca0d0]
>[ 25878.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aca0d0] width 1920 pitch 7680 (/4 1920)
>[ 25878.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb3d0]
>[ 25878.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb3d0] width 1920 pitch 7680 (/4 1920)
>[ 25878.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459a40]
>[ 25878.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459a40] width 1920 pitch 7680 (/4 1920)
>[ 25878.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb3d0]
>[ 25878.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb3d0] width 1920 pitch 7680 (/4 1920)
>[ 25878.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459a40]
>[ 25878.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459a40] width 1920 pitch 7680 (/4 1920)
>[ 25878.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb3d0]
>[ 25878.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb3d0] width 1920 pitch 7680 (/4 1920)
>[ 25878.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459a40]
>[ 25878.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459a40] width 1920 pitch 7680 (/4 1920)
>[ 25878.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb3d0]
>[ 25878.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb3d0] width 1920 pitch 7680 (/4 1920)
>[ 25878.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459a40]
>[ 25878.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459a40] width 1920 pitch 7680 (/4 1920)
>[ 25878.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36bb3d0]
>[ 25879.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36bb3d0] width 1920 pitch 7680 (/4 1920)
>[ 25885.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459a40]
>[ 25885.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459a40] width 1920 pitch 7680 (/4 1920)
>[ 25890.328] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25890.329] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25890.329] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25890.336] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25890.336] (II) RADEON(0): RADEONSaveScreen(0)
>[ 25891.298] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25891.298] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25891.298] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25893.550] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 25893.550] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 25893.550] (II) RADEON(0): Ok, leaving now...
>[ 25898.203] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 25898.203] (II) RADEON(0): RADEONEnterVT_KMS
>[ 25898.222] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25898.222] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25898.222] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25898.227] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25898.227] (II) RADEON(0): RADEONSaveScreen(1)
>[ 25898.228] (**) Option "Device" "/dev/input/event5"
>[ 25898.228] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 25898.404] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[ 25898.404] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[ 25898.404] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[ 25898.404] 	Option "XkbRules" "evdev"
>[ 25898.404] 	Option "XkbModel" "evdev"
>[ 25898.404] 	Option "XkbLayout" "us"
>[ 25898.404] 	Option "_source" "server/udev"
>[ 25898.404] 	Option "name" "Dell Dell USB Optical Mouse"
>[ 25898.404] 	Option "path" "/dev/input/event11"
>[ 25898.404] 	Option "device" "/dev/input/event11"
>[ 25898.404] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[ 25898.404] 	Option "driver" "evdev"
>[ 25898.404] (**) Dell Dell USB Optical Mouse: always reports core events
>[ 25898.404] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[ 25898.404] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[ 25898.404] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[ 25898.404] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[ 25898.404] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[ 25898.404] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[ 25898.404] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[ 25898.404] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[ 25898.404] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[ 25898.404] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 25898.404] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[ 25898.404] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[ 25898.405] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[ 25898.405] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[ 25898.405] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[ 25898.405] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[ 25898.405] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[ 25898.407] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[ 25898.407] (II) No input driver specified, ignoring this device.
>[ 25898.407] (II) This device may have been added with another device file.
>[ 25898.825] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25898.825] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25898.825] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25937.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x378cd40]
>[ 25937.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x378cd40] width 1920 pitch 7680 (/4 1920)
>[ 25943.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25943.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399e1f0]
>[ 25943.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399e1f0] width 1920 pitch 7680 (/4 1920)
>[ 25943.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2414610]
>[ 25943.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2414610] width 1920 pitch 7680 (/4 1920)
>[ 25944.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e4f90]
>[ 25944.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e4f90] width 1920 pitch 7680 (/4 1920)
>[ 25944.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2381430]
>[ 25944.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2381430] width 1920 pitch 7680 (/4 1920)
>[ 25944.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384e440]
>[ 25944.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384e440] width 1920 pitch 7680 (/4 1920)
>[ 25947.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acf220]
>[ 25947.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acf220] width 1920 pitch 7680 (/4 1920)
>[ 25975.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be4120]
>[ 25975.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be4120] width 1920 pitch 7680 (/4 1920)
>[ 25990.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad6780]
>[ 25990.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad6780] width 1920 pitch 7680 (/4 1920)
>[ 26037.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d9790]
>[ 26037.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d9790] width 1920 pitch 7680 (/4 1920)
>[ 26050.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39afaa0]
>[ 26050.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39afaa0] width 1920 pitch 7680 (/4 1920)
>[ 26155.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9b0]
>[ 26155.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9b0] width 1920 pitch 7680 (/4 1920)
>[ 26170.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700130]
>[ 26170.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700130] width 1920 pitch 7680 (/4 1920)
>[ 26185.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dbff0]
>[ 26185.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dbff0] width 1920 pitch 7680 (/4 1920)
>[ 26215.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 26215.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 26230.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 26230.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 26260.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26260.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26275.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26275.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26290.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 26290.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 26290.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9b0]
>[ 26290.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9b0] width 1920 pitch 7680 (/4 1920)
>[ 26305.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 26305.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 26320.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700130]
>[ 26320.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700130] width 1920 pitch 7680 (/4 1920)
>[ 26530.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9b0]
>[ 26530.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9b0] width 1920 pitch 7680 (/4 1920)
>[ 26545.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26545.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26560.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 26560.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 26575.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 26575.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 26590.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26590.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26605.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3440]
>[ 26605.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3440] width 1920 pitch 7680 (/4 1920)
>[ 26620.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 26620.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 26635.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3440]
>[ 26635.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3440] width 1920 pitch 7680 (/4 1920)
>[ 26650.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26650.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26665.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 26665.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 26695.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 26695.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 26710.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3440]
>[ 26710.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3440] width 1920 pitch 7680 (/4 1920)
>[ 26860.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dbff0]
>[ 26860.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dbff0] width 1920 pitch 7680 (/4 1920)
>[ 26875.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dbff0]
>[ 26875.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dbff0] width 1920 pitch 7680 (/4 1920)
>[ 26890.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640250]
>[ 26890.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640250] width 1920 pitch 7680 (/4 1920)
>[ 26905.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f9360]
>[ 26905.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f9360] width 1920 pitch 7680 (/4 1920)
>[ 27280.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 27280.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 27310.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700130]
>[ 27310.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700130] width 1920 pitch 7680 (/4 1920)
>[ 27400.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dbff0]
>[ 27400.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dbff0] width 1920 pitch 7680 (/4 1920)
>[ 27415.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700130]
>[ 27415.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700130] width 1920 pitch 7680 (/4 1920)
>[ 27430.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 27430.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 27445.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 27445.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 27475.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b234e0]
>[ 27475.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b234e0] width 1920 pitch 7680 (/4 1920)
>[ 27505.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 27505.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 27520.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dbff0]
>[ 27520.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dbff0] width 1920 pitch 7680 (/4 1920)
>[ 27535.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3700130]
>[ 27535.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3700130] width 1920 pitch 7680 (/4 1920)
>[ 27576.149] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 27576.149] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27576.149] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 27595.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bd60]
>[ 27595.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bd60] width 1920 pitch 7680 (/4 1920)
>[ 27610.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 27610.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 27760.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 27760.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 27775.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f9360]
>[ 27775.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f9360] width 1920 pitch 7680 (/4 1920)
>[ 28030.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 28030.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 28045.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 28045.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 28090.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 28090.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 28105.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c5f90]
>[ 28105.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c5f90] width 1920 pitch 7680 (/4 1920)
>[ 28120.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b1400]
>[ 28120.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b1400] width 1920 pitch 7680 (/4 1920)
>[ 28120.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c5f90]
>[ 28120.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c5f90] width 1920 pitch 7680 (/4 1920)
>[ 28135.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c5f90]
>[ 28135.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c5f90] width 1920 pitch 7680 (/4 1920)
>[ 28182.918] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 28182.918] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 28182.918] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 28225.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28225.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28240.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28240.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28315.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28315.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28345.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f80]
>[ 28345.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f80] width 1920 pitch 7680 (/4 1920)
>[ 28360.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f80]
>[ 28360.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f80] width 1920 pitch 7680 (/4 1920)
>[ 28375.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28375.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28405.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28405.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28420.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28420.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28480.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b34340]
>[ 28480.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b34340] width 1920 pitch 7680 (/4 1920)
>[ 28510.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28510.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28645.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066b0]
>[ 28645.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066b0] width 1920 pitch 7680 (/4 1920)
>[ 28675.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f80]
>[ 28675.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f80] width 1920 pitch 7680 (/4 1920)
>[ 28780.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f80]
>[ 28780.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f80] width 1920 pitch 7680 (/4 1920)
>[ 28795.228] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 28795.228] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 28795.228] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 28795.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f60]
>[ 28795.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f60] width 1920 pitch 7680 (/4 1920)
>[ 28870.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22dec10]
>[ 28870.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22dec10] width 1920 pitch 7680 (/4 1920)
>[ 28885.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9fd10]
>[ 28885.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9fd10] width 1920 pitch 7680 (/4 1920)
>[ 28915.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 28915.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 28930.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 28930.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 28975.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857d90]
>[ 28975.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857d90] width 1920 pitch 7680 (/4 1920)
>[ 28990.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c3a30]
>[ 28990.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c3a30] width 1920 pitch 7680 (/4 1920)
>[ 29080.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 29080.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 29095.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acff0]
>[ 29095.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acff0] width 1920 pitch 7680 (/4 1920)
>[ 29170.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15b80]
>[ 29170.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15b80] width 1920 pitch 7680 (/4 1920)
>[ 29185.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e4db0]
>[ 29185.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e4db0] width 1920 pitch 7680 (/4 1920)
>[ 29200.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 29200.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 29215.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 29215.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 29245.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 29245.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 29260.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496bc0]
>[ 29260.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496bc0] width 1920 pitch 7680 (/4 1920)
>[ 29320.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38378a0]
>[ 29320.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38378a0] width 1920 pitch 7680 (/4 1920)
>[ 29335.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 29335.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 29365.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 29365.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 29380.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992390]
>[ 29380.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992390] width 1920 pitch 7680 (/4 1920)
>[ 29405.090] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 29405.090] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 29405.090] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 29545.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8b80]
>[ 29545.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8b80] width 1920 pitch 7680 (/4 1920)
>[ 29560.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 29560.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 29575.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0f6e0]
>[ 29575.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0f6e0] width 1920 pitch 7680 (/4 1920)
>[ 29590.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 29590.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 29680.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38323f0]
>[ 29680.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38323f0] width 1920 pitch 7680 (/4 1920)
>[ 29725.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c7900]
>[ 29725.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c7900] width 1920 pitch 7680 (/4 1920)
>[ 29830.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd04f0]
>[ 29830.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd04f0] width 1920 pitch 7680 (/4 1920)
>[ 29845.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36c7900]
>[ 29845.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36c7900] width 1920 pitch 7680 (/4 1920)
>[ 29890.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420010]
>[ 29890.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420010] width 1920 pitch 7680 (/4 1920)
>[ 29905.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926b60]
>[ 29905.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926b60] width 1920 pitch 7680 (/4 1920)
>[ 29965.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639420]
>[ 29965.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639420] width 1920 pitch 7680 (/4 1920)
>[ 29980.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639420]
>[ 29980.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639420] width 1920 pitch 7680 (/4 1920)
>[ 30010.038] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 30010.038] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 30010.038] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 30100.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd04f0]
>[ 30100.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd04f0] width 1920 pitch 7680 (/4 1920)
>[ 30130.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 30130.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 30205.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 30205.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 30220.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 30220.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 30325.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be7290]
>[ 30325.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be7290] width 1920 pitch 7680 (/4 1920)
>[ 30340.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5800]
>[ 30340.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5800] width 1920 pitch 7680 (/4 1920)
>[ 30475.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23c3a30]
>[ 30475.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23c3a30] width 1920 pitch 7680 (/4 1920)
>[ 30490.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857d90]
>[ 30490.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857d90] width 1920 pitch 7680 (/4 1920)
>[ 30610.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249d740]
>[ 30610.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249d740] width 1920 pitch 7680 (/4 1920)
>[ 30640.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b48d0]
>[ 30640.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b48d0] width 1920 pitch 7680 (/4 1920)
>[ 30685.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38378a0]
>[ 30685.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38378a0] width 1920 pitch 7680 (/4 1920)
>[ 30700.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 30700.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 30745.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b9f0]
>[ 30745.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b9f0] width 1920 pitch 7680 (/4 1920)
>[ 30760.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d5d00]
>[ 30760.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d5d00] width 1920 pitch 7680 (/4 1920)
>[ 30910.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bee240]
>[ 30910.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bee240] width 1920 pitch 7680 (/4 1920)
>[ 30940.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38378a0]
>[ 30940.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38378a0] width 1920 pitch 7680 (/4 1920)
>[ 31000.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639420]
>[ 31000.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639420] width 1920 pitch 7680 (/4 1920)
>[ 31015.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d97d0]
>[ 31015.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d97d0] width 1920 pitch 7680 (/4 1920)
>[ 31030.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37248c0]
>[ 31030.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37248c0] width 1920 pitch 7680 (/4 1920)
>[ 31060.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b7a0]
>[ 31060.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b7a0] width 1920 pitch 7680 (/4 1920)
>[ 31080.641] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 31080.641] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 31080.641] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 31170.396] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31170.397] (II) RADEON(0): RADEONSaveScreen(0)
>[ 31193.878] (II) RADEON(0): RADEONSaveScreen(1)
>[ 31194.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2447d50]
>[ 31194.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2447d50] width 1920 pitch 7680 (/4 1920)
>[ 31254.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe2c0]
>[ 31254.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe2c0] width 1920 pitch 7680 (/4 1920)
>[ 31269.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390caa0]
>[ 31269.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390caa0] width 1920 pitch 7680 (/4 1920)
>[ 31359.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf360]
>[ 31359.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf360] width 1920 pitch 7680 (/4 1920)
>[ 31374.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf360]
>[ 31374.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf360] width 1920 pitch 7680 (/4 1920)
>[ 31389.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31389.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31404.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31404.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31449.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31449.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31453.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31453.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31454.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf360]
>[ 31454.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf360] width 1920 pitch 7680 (/4 1920)
>[ 31464.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31464.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31509.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31509.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31554.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31554.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31569.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31569.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31584.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31584.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31869.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 31869.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 31884.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cf360]
>[ 31884.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cf360] width 1920 pitch 7680 (/4 1920)
>[ 32004.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2433680]
>[ 32004.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2433680] width 1920 pitch 7680 (/4 1920)
>[ 32019.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38466a0]
>[ 32019.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38466a0] width 1920 pitch 7680 (/4 1920)
>[ 32058.731] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 32058.731] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 32058.731] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 32149.417] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32149.417] (II) RADEON(0): RADEONSaveScreen(0)
>[ 35648.382] (II) RADEON(0): RADEONSaveScreen(1)
>[ 35659.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab5f0]
>[ 35659.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab5f0] width 1920 pitch 7680 (/4 1920)
>[ 35664.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 35664.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 35679.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 35679.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 36099.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a4620]
>[ 36099.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a4620] width 1920 pitch 7680 (/4 1920)
>[ 36114.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 36114.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 36129.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 36129.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 36144.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 36144.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 36219.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab5f0]
>[ 36219.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab5f0] width 1920 pitch 7680 (/4 1920)
>[ 36234.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 36234.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 36249.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab5f0]
>[ 36249.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab5f0] width 1920 pitch 7680 (/4 1920)
>[ 36264.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab5f0]
>[ 36264.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab5f0] width 1920 pitch 7680 (/4 1920)
>[ 36266.852] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 36266.852] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 36266.852] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 36294.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 36294.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 36309.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 36309.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 36384.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbdd60]
>[ 36384.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbdd60] width 1920 pitch 7680 (/4 1920)
>[ 36399.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262ab60]
>[ 36399.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262ab60] width 1920 pitch 7680 (/4 1920)
>[ 36504.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ce4d0]
>[ 36504.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ce4d0] width 1920 pitch 7680 (/4 1920)
>[ 36519.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262ab60]
>[ 36519.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262ab60] width 1920 pitch 7680 (/4 1920)
>[ 36534.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cce00]
>[ 36534.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cce00] width 1920 pitch 7680 (/4 1920)
>[ 36549.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2622050]
>[ 36549.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2622050] width 1920 pitch 7680 (/4 1920)
>[ 36864.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b10]
>[ 36864.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b10] width 1920 pitch 7680 (/4 1920)
>[ 36909.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b03b0]
>[ 36909.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b03b0] width 1920 pitch 7680 (/4 1920)
>[ 36954.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2622050]
>[ 36954.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2622050] width 1920 pitch 7680 (/4 1920)
>[ 36969.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387b7b0]
>[ 36969.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387b7b0] width 1920 pitch 7680 (/4 1920)
>[ 36999.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24407f0]
>[ 36999.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24407f0] width 1920 pitch 7680 (/4 1920)
>[ 37014.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aac420]
>[ 37014.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aac420] width 1920 pitch 7680 (/4 1920)
>[ 37239.022] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 37239.022] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 37239.022] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 37389.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x262ab60]
>[ 37389.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x262ab60] width 1920 pitch 7680 (/4 1920)
>[ 37404.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3716c50]
>[ 37404.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3716c50] width 1920 pitch 7680 (/4 1920)
>[ 37569.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0720]
>[ 37569.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0720] width 1920 pitch 7680 (/4 1920)
>[ 37584.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0720]
>[ 37584.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0720] width 1920 pitch 7680 (/4 1920)
>[ 37599.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385a7e0]
>[ 37599.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385a7e0] width 1920 pitch 7680 (/4 1920)
>[ 37614.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe2c0]
>[ 37614.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe2c0] width 1920 pitch 7680 (/4 1920)
>[ 37644.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fce0]
>[ 37644.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fce0] width 1920 pitch 7680 (/4 1920)
>[ 37659.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 37659.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 37779.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0720]
>[ 37779.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0720] width 1920 pitch 7680 (/4 1920)
>[ 37794.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0720]
>[ 37794.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0720] width 1920 pitch 7680 (/4 1920)
>[ 37824.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0720]
>[ 37824.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0720] width 1920 pitch 7680 (/4 1920)
>[ 37839.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2417780]
>[ 37839.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2417780] width 1920 pitch 7680 (/4 1920)
>[ 37843.867] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 37843.867] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 37843.867] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 37934.416] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37934.416] (II) RADEON(0): RADEONSaveScreen(0)
>[ 37980.502] (II) RADEON(0): RADEONSaveScreen(1)
>[ 37981.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397e640]
>[ 37981.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397e640] width 1920 pitch 7680 (/4 1920)
>[ 38071.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496bc0]
>[ 38071.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496bc0] width 1920 pitch 7680 (/4 1920)
>[ 38086.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fea0]
>[ 38086.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fea0] width 1920 pitch 7680 (/4 1920)
>[ 38116.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b10]
>[ 38116.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b10] width 1920 pitch 7680 (/4 1920)
>[ 38131.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fea0]
>[ 38131.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fea0] width 1920 pitch 7680 (/4 1920)
>[ 38221.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24acf30]
>[ 38221.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24acf30] width 1920 pitch 7680 (/4 1920)
>[ 38251.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38626b0]
>[ 38251.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38626b0] width 1920 pitch 7680 (/4 1920)
>[ 38311.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4060]
>[ 38311.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4060] width 1920 pitch 7680 (/4 1920)
>[ 38326.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc160]
>[ 38326.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc160] width 1920 pitch 7680 (/4 1920)
>[ 38356.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2621b10]
>[ 38356.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2621b10] width 1920 pitch 7680 (/4 1920)
>[ 38371.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39731b0]
>[ 38371.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39731b0] width 1920 pitch 7680 (/4 1920)
>[ 38371.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38323f0]
>[ 38371.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38323f0] width 1920 pitch 7680 (/4 1920)
>[ 38446.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38626b0]
>[ 38446.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38626b0] width 1920 pitch 7680 (/4 1920)
>[ 38476.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8c30]
>[ 38476.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8c30] width 1920 pitch 7680 (/4 1920)
>[ 38584.703] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 38584.703] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 38584.703] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 38716.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39228a0]
>[ 38716.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39228a0] width 1920 pitch 7680 (/4 1920)
>[ 38731.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x225a180]
>[ 38731.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x225a180] width 1920 pitch 7680 (/4 1920)
>[ 38776.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37fc230]
>[ 38776.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37fc230] width 1920 pitch 7680 (/4 1920)
>[ 38791.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36ce4d0]
>[ 38791.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36ce4d0] width 1920 pitch 7680 (/4 1920)
>[ 38926.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39228a0]
>[ 38926.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39228a0] width 1920 pitch 7680 (/4 1920)
>[ 38941.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2625070]
>[ 38941.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2625070] width 1920 pitch 7680 (/4 1920)
>[ 39136.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249eea0]
>[ 39136.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249eea0] width 1920 pitch 7680 (/4 1920)
>[ 39151.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39731b0]
>[ 39151.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39731b0] width 1920 pitch 7680 (/4 1920)
>[ 39196.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e9840]
>[ 39196.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e9840] width 1920 pitch 7680 (/4 1920)
>[ 39211.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385a790]
>[ 39211.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385a790] width 1920 pitch 7680 (/4 1920)
>[ 39556.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2434c70]
>[ 39556.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2434c70] width 1920 pitch 7680 (/4 1920)
>[ 39571.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0f80]
>[ 39571.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0f80] width 1920 pitch 7680 (/4 1920)
>[ 39646.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8c90]
>[ 39646.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8c90] width 1920 pitch 7680 (/4 1920)
>[ 39661.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c00f90]
>[ 39661.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c00f90] width 1920 pitch 7680 (/4 1920)
>[ 39691.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ff240]
>[ 39691.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ff240] width 1920 pitch 7680 (/4 1920)
>[ 39706.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2434c70]
>[ 39706.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2434c70] width 1920 pitch 7680 (/4 1920)
>[ 39856.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f78d0]
>[ 39856.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f78d0] width 1920 pitch 7680 (/4 1920)
>[ 39871.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24499d0]
>[ 39871.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24499d0] width 1920 pitch 7680 (/4 1920)
>[ 39901.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3861be0]
>[ 39901.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3861be0] width 1920 pitch 7680 (/4 1920)
>[ 39916.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24499d0]
>[ 39916.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24499d0] width 1920 pitch 7680 (/4 1920)
>[ 40021.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 40021.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 40036.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24499d0]
>[ 40036.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24499d0] width 1920 pitch 7680 (/4 1920)
>[ 40081.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae5260]
>[ 40081.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae5260] width 1920 pitch 7680 (/4 1920)
>[ 40088.245] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 40088.245] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 40088.245] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 40096.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26584f0]
>[ 40096.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26584f0] width 1920 pitch 7680 (/4 1920)
>[ 40102.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387dac0]
>[ 40102.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387dac0] width 1920 pitch 7680 (/4 1920)
>[ 40126.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dce80]
>[ 40126.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dce80] width 1920 pitch 7680 (/4 1920)
>[ 40141.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9a0]
>[ 40141.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9a0] width 1920 pitch 7680 (/4 1920)
>[ 40246.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 40246.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 40261.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39105b0]
>[ 40261.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39105b0] width 1920 pitch 7680 (/4 1920)
>[ 40276.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ac3610]
>[ 40276.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ac3610] width 1920 pitch 7680 (/4 1920)
>[ 40291.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9a0]
>[ 40291.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9a0] width 1920 pitch 7680 (/4 1920)
>[ 40366.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b4f60]
>[ 40366.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b4f60] width 1920 pitch 7680 (/4 1920)
>[ 40381.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fd820]
>[ 40381.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fd820] width 1920 pitch 7680 (/4 1920)
>[ 40531.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e9840]
>[ 40531.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e9840] width 1920 pitch 7680 (/4 1920)
>[ 40561.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b9f0]
>[ 40561.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b9f0] width 1920 pitch 7680 (/4 1920)
>[ 40576.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be7290]
>[ 40576.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be7290] width 1920 pitch 7680 (/4 1920)
>[ 40591.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26584f0]
>[ 40591.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26584f0] width 1920 pitch 7680 (/4 1920)
>[ 40651.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385a790]
>[ 40651.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385a790] width 1920 pitch 7680 (/4 1920)
>[ 40666.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b7a0]
>[ 40666.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b7a0] width 1920 pitch 7680 (/4 1920)
>[ 40681.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fd820]
>[ 40681.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fd820] width 1920 pitch 7680 (/4 1920)
>[ 40696.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbdd60]
>[ 40696.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbdd60] width 1920 pitch 7680 (/4 1920)
>[ 40702.772] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 40702.772] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 40702.772] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 40816.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857d90]
>[ 40816.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857d90] width 1920 pitch 7680 (/4 1920)
>[ 40831.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd04f0]
>[ 40831.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd04f0] width 1920 pitch 7680 (/4 1920)
>[ 40906.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3338030]
>[ 40906.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3338030] width 1920 pitch 7680 (/4 1920)
>[ 40936.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37f1c30]
>[ 40936.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37f1c30] width 1920 pitch 7680 (/4 1920)
>[ 41161.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26584f0]
>[ 41161.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26584f0] width 1920 pitch 7680 (/4 1920)
>[ 41176.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cbd40]
>[ 41176.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cbd40] width 1920 pitch 7680 (/4 1920)
>[ 41311.173] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 41311.173] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 41311.173] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 41341.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ff240]
>[ 41341.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ff240] width 1920 pitch 7680 (/4 1920)
>[ 41356.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e99f0]
>[ 41356.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e99f0] width 1920 pitch 7680 (/4 1920)
>[ 41461.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3861be0]
>[ 41461.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3861be0] width 1920 pitch 7680 (/4 1920)
>[ 41476.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 41476.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 41521.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe2c0]
>[ 41521.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe2c0] width 1920 pitch 7680 (/4 1920)
>[ 41536.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc0c0]
>[ 41536.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc0c0] width 1920 pitch 7680 (/4 1920)
>[ 41566.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 41566.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 41581.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a9f1c0]
>[ 41581.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a9f1c0] width 1920 pitch 7680 (/4 1920)
>[ 41626.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 41626.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 41641.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 41641.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 41701.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e9840]
>[ 41701.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e9840] width 1920 pitch 7680 (/4 1920)
>[ 41716.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3400]
>[ 41716.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3400] width 1920 pitch 7680 (/4 1920)
>[ 41896.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 41896.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 41911.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5c60]
>[ 41911.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5c60] width 1920 pitch 7680 (/4 1920)
>[ 41986.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cafc0]
>[ 41986.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cafc0] width 1920 pitch 7680 (/4 1920)
>[ 42001.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2434c40]
>[ 42001.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2434c40] width 1920 pitch 7680 (/4 1920)
>[ 42016.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3857d90]
>[ 42016.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3857d90] width 1920 pitch 7680 (/4 1920)
>[ 42031.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b7a0]
>[ 42031.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b7a0] width 1920 pitch 7680 (/4 1920)
>[ 42046.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dce80]
>[ 42046.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dce80] width 1920 pitch 7680 (/4 1920)
>[ 42061.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 42061.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 42091.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3994da0]
>[ 42091.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3994da0] width 1920 pitch 7680 (/4 1920)
>[ 42106.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae3f30]
>[ 42106.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae3f30] width 1920 pitch 7680 (/4 1920)
>[ 42121.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2423e00]
>[ 42121.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2423e00] width 1920 pitch 7680 (/4 1920)
>[ 42136.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b10]
>[ 42136.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b10] width 1920 pitch 7680 (/4 1920)
>[ 42151.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 42151.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 42271.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca840]
>[ 42271.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca840] width 1920 pitch 7680 (/4 1920)
>[ 42286.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25f9310]
>[ 42286.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25f9310] width 1920 pitch 7680 (/4 1920)
>[ 42305.198] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 42305.198] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 42305.198] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 42316.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae4090]
>[ 42316.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae4090] width 1920 pitch 7680 (/4 1920)
>[ 42331.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ffcc0]
>[ 42331.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ffcc0] width 1920 pitch 7680 (/4 1920)
>[ 42346.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cf360]
>[ 42346.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cf360] width 1920 pitch 7680 (/4 1920)
>[ 42376.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3861be0]
>[ 42376.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3861be0] width 1920 pitch 7680 (/4 1920)
>[ 42421.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5800]
>[ 42421.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5800] width 1920 pitch 7680 (/4 1920)
>[ 42436.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36f3400]
>[ 42436.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36f3400] width 1920 pitch 7680 (/4 1920)
>[ 42451.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38624f0]
>[ 42451.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38624f0] width 1920 pitch 7680 (/4 1920)
>[ 42466.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f78d0]
>[ 42466.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f78d0] width 1920 pitch 7680 (/4 1920)
>[ 42541.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8b70]
>[ 42541.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8b70] width 1920 pitch 7680 (/4 1920)
>[ 42556.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cdba0]
>[ 42556.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cdba0] width 1920 pitch 7680 (/4 1920)
>[ 42676.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfa1d0]
>[ 42676.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfa1d0] width 1920 pitch 7680 (/4 1920)
>[ 42691.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e4db0]
>[ 42691.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e4db0] width 1920 pitch 7680 (/4 1920)
>[ 42736.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38624f0]
>[ 42736.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38624f0] width 1920 pitch 7680 (/4 1920)
>[ 42751.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b9f0]
>[ 42751.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b9f0] width 1920 pitch 7680 (/4 1920)
>[ 42841.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38624f0]
>[ 42841.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38624f0] width 1920 pitch 7680 (/4 1920)
>[ 42856.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fd820]
>[ 42856.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fd820] width 1920 pitch 7680 (/4 1920)
>[ 43036.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab48a0]
>[ 43036.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab48a0] width 1920 pitch 7680 (/4 1920)
>[ 43051.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239e4e0]
>[ 43051.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239e4e0] width 1920 pitch 7680 (/4 1920)
>[ 43111.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x380bd40]
>[ 43111.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x380bd40] width 1920 pitch 7680 (/4 1920)
>[ 43126.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cd9a0]
>[ 43126.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cd9a0] width 1920 pitch 7680 (/4 1920)
>[ 43156.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab490]
>[ 43156.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab490] width 1920 pitch 7680 (/4 1920)
>[ 43171.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26118e0]
>[ 43171.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26118e0] width 1920 pitch 7680 (/4 1920)
>[ 43216.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38624f0]
>[ 43216.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38624f0] width 1920 pitch 7680 (/4 1920)
>[ 43231.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913570]
>[ 43231.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913570] width 1920 pitch 7680 (/4 1920)
>[ 43246.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe2c0]
>[ 43246.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe2c0] width 1920 pitch 7680 (/4 1920)
>[ 43261.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3708ec0]
>[ 43261.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3708ec0] width 1920 pitch 7680 (/4 1920)
>[ 43291.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260dbc0]
>[ 43291.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260dbc0] width 1920 pitch 7680 (/4 1920)
>[ 43306.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad9820]
>[ 43306.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad9820] width 1920 pitch 7680 (/4 1920)
>[ 43441.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38624f0]
>[ 43441.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38624f0] width 1920 pitch 7680 (/4 1920)
>[ 43446.736] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 43446.736] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 43446.736] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 43456.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca6d0]
>[ 43456.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca6d0] width 1920 pitch 7680 (/4 1920)
>[ 43666.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cbd40]
>[ 43666.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cbd40] width 1920 pitch 7680 (/4 1920)
>[ 43681.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc160]
>[ 43681.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc160] width 1920 pitch 7680 (/4 1920)
>[ 43726.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245e8c0]
>[ 43726.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245e8c0] width 1920 pitch 7680 (/4 1920)
>[ 43741.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24293a0]
>[ 43741.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24293a0] width 1920 pitch 7680 (/4 1920)
>[ 43741.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23cdb50]
>[ 43741.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23cdb50] width 1920 pitch 7680 (/4 1920)
>[ 43801.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x365b7a0]
>[ 43801.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x365b7a0] width 1920 pitch 7680 (/4 1920)
>[ 43831.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bfe0]
>[ 43831.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bfe0] width 1920 pitch 7680 (/4 1920)
>[ 43876.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260dbc0]
>[ 43876.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260dbc0] width 1920 pitch 7680 (/4 1920)
>[ 43891.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39228a0]
>[ 43891.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39228a0] width 1920 pitch 7680 (/4 1920)
>[ 43906.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37dc160]
>[ 43906.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37dc160] width 1920 pitch 7680 (/4 1920)
>[ 43921.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fa100]
>[ 43921.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fa100] width 1920 pitch 7680 (/4 1920)
>[ 43951.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b10]
>[ 43951.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b10] width 1920 pitch 7680 (/4 1920)
>[ 43966.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fa100]
>[ 43966.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fa100] width 1920 pitch 7680 (/4 1920)
>[ 44051.094] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 44051.094] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 44051.094] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 44056.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25fa100]
>[ 44056.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25fa100] width 1920 pitch 7680 (/4 1920)
>[ 44071.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39228a0]
>[ 44071.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39228a0] width 1920 pitch 7680 (/4 1920)
>[ 44101.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f4720]
>[ 44101.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f4720] width 1920 pitch 7680 (/4 1920)
>[ 44116.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cce00]
>[ 44116.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cce00] width 1920 pitch 7680 (/4 1920)
>[ 44281.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3338030]
>[ 44281.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3338030] width 1920 pitch 7680 (/4 1920)
>[ 44296.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x243c940]
>[ 44296.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x243c940] width 1920 pitch 7680 (/4 1920)
>[ 44311.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b620]
>[ 44311.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b620] width 1920 pitch 7680 (/4 1920)
>[ 44386.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36db590]
>[ 44386.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36db590] width 1920 pitch 7680 (/4 1920)
>[ 44401.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23b5100]
>[ 44401.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23b5100] width 1920 pitch 7680 (/4 1920)
>[ 44446.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c9a0]
>[ 44446.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c9a0] width 1920 pitch 7680 (/4 1920)
>[ 44461.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38691f0]
>[ 44461.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38691f0] width 1920 pitch 7680 (/4 1920)
>[ 44506.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b620]
>[ 44506.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b620] width 1920 pitch 7680 (/4 1920)
>[ 44521.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236ea50]
>[ 44521.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236ea50] width 1920 pitch 7680 (/4 1920)
>[ 44581.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbdd60]
>[ 44581.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbdd60] width 1920 pitch 7680 (/4 1920)
>[ 44596.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f4740]
>[ 44596.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f4740] width 1920 pitch 7680 (/4 1920)
>[ 44611.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b660]
>[ 44611.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b660] width 1920 pitch 7680 (/4 1920)
>[ 44626.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c8c0]
>[ 44626.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c8c0] width 1920 pitch 7680 (/4 1920)
>[ 44641.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 44641.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 44656.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 44656.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 44671.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 44671.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 44701.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c8c0]
>[ 44701.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c8c0] width 1920 pitch 7680 (/4 1920)
>[ 44716.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 44716.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 44731.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 44731.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 44746.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de460]
>[ 44746.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de460] width 1920 pitch 7680 (/4 1920)
>[ 44776.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b660]
>[ 44776.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b660] width 1920 pitch 7680 (/4 1920)
>[ 44791.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c8c0]
>[ 44791.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c8c0] width 1920 pitch 7680 (/4 1920)
>[ 44836.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b660]
>[ 44836.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b660] width 1920 pitch 7680 (/4 1920)
>[ 44851.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 44851.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 44866.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 44866.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 44881.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad1fd0]
>[ 44881.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad1fd0] width 1920 pitch 7680 (/4 1920)
>[ 44956.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 44956.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 44971.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ae70]
>[ 44971.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ae70] width 1920 pitch 7680 (/4 1920)
>[ 44986.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b660]
>[ 44986.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b660] width 1920 pitch 7680 (/4 1920)
>[ 45031.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 45031.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 45091.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 45091.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 45106.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45106.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45196.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 45196.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 45211.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x35fdab0]
>[ 45211.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x35fdab0] width 1920 pitch 7680 (/4 1920)
>[ 45226.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 45226.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 45316.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 45316.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 45331.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ad1fd0]
>[ 45331.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ad1fd0] width 1920 pitch 7680 (/4 1920)
>[ 45346.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45346.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45391.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45391.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45406.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c8c0]
>[ 45406.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c8c0] width 1920 pitch 7680 (/4 1920)
>[ 45421.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de460]
>[ 45421.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de460] width 1920 pitch 7680 (/4 1920)
>[ 45436.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45436.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45446.113] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 45446.113] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 45446.113] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 45451.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b660]
>[ 45451.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b660] width 1920 pitch 7680 (/4 1920)
>[ 45511.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 45511.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 45541.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 45541.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 45556.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45556.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45571.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45571.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45586.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 45586.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 45601.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 45601.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 45676.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801150]
>[ 45676.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801150] width 1920 pitch 7680 (/4 1920)
>[ 45691.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c8c0]
>[ 45691.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c8c0] width 1920 pitch 7680 (/4 1920)
>[ 45706.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e36a0]
>[ 45706.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e36a0] width 1920 pitch 7680 (/4 1920)
>[ 45736.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 45736.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 45751.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801150]
>[ 45751.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801150] width 1920 pitch 7680 (/4 1920)
>[ 45766.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 45766.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 45826.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 45826.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 45841.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 45841.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 45871.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801150]
>[ 45871.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801150] width 1920 pitch 7680 (/4 1920)
>[ 45886.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801150]
>[ 45886.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801150] width 1920 pitch 7680 (/4 1920)
>[ 45931.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 45931.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 45961.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 45961.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 45976.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 45976.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 45991.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de460]
>[ 45991.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de460] width 1920 pitch 7680 (/4 1920)
>[ 46006.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 46006.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 46021.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 46021.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 46036.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3801150]
>[ 46036.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3801150] width 1920 pitch 7680 (/4 1920)
>[ 46052.234] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 46052.234] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 46052.234] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 46111.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36e36a0]
>[ 46111.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36e36a0] width 1920 pitch 7680 (/4 1920)
>[ 46126.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 46126.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 46201.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399eaf0]
>[ 46201.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399eaf0] width 1920 pitch 7680 (/4 1920)
>[ 46231.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 46231.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 46246.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 46246.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 46246.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 46246.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 46261.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 46261.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 46306.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 46306.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 46351.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ae70]
>[ 46351.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ae70] width 1920 pitch 7680 (/4 1920)
>[ 46366.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 46366.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 46366.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 46366.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 46381.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 46381.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 46411.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 46411.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 46501.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 46501.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 46546.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992330]
>[ 46546.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992330] width 1920 pitch 7680 (/4 1920)
>[ 46561.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 46561.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 46606.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 46606.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 46661.215] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 46661.215] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 46661.215] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 46726.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 46726.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 46756.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385ba80]
>[ 46756.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385ba80] width 1920 pitch 7680 (/4 1920)
>[ 46786.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 46786.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 46891.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 46891.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 46906.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 46906.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 46921.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 46921.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 46936.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385ba80]
>[ 46936.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385ba80] width 1920 pitch 7680 (/4 1920)
>[ 46966.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3827fa0]
>[ 46966.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3827fa0] width 1920 pitch 7680 (/4 1920)
>[ 46981.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 46981.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 46996.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 46996.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 47041.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 47041.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 47071.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 47071.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 47071.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d9080]
>[ 47071.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d9080] width 1920 pitch 7680 (/4 1920)
>[ 47086.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 47086.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 47131.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 47131.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 47176.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385ba80]
>[ 47176.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385ba80] width 1920 pitch 7680 (/4 1920)
>[ 47191.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 47191.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 47221.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 47221.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 47221.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 47221.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 47236.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 47236.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 47251.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 47251.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 47296.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 47296.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 47311.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 47311.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 47326.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385ba80]
>[ 47326.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385ba80] width 1920 pitch 7680 (/4 1920)
>[ 47356.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 47356.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 47476.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 47476.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 47506.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2462a10]
>[ 47506.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2462a10] width 1920 pitch 7680 (/4 1920)
>[ 47566.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 47566.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 47581.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf9de0]
>[ 47581.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf9de0] width 1920 pitch 7680 (/4 1920)
>[ 47596.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 47596.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 47656.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37718e0]
>[ 47656.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37718e0] width 1920 pitch 7680 (/4 1920)
>[ 47686.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 47686.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 47701.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fd580]
>[ 47701.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fd580] width 1920 pitch 7680 (/4 1920)
>[ 47706.989] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 47706.989] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 47706.989] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 47716.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 47716.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 47797.409] (II) RADEON(0): RADEONSaveScreen(2)
>[ 47797.409] (II) RADEON(0): RADEONSaveScreen(0)
>[ 47876.395] (II) RADEON(0): RADEONSaveScreen(1)
>[ 47877.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502490]
>[ 47877.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502490] width 1920 pitch 7680 (/4 1920)
>[ 47892.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 47892.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 47937.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 47937.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 47967.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 47967.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 47982.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 47982.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 47997.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 47997.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 48027.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 48027.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 48042.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 48042.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 48057.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 48057.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 48072.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385ba80]
>[ 48072.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385ba80] width 1920 pitch 7680 (/4 1920)
>[ 48087.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 48087.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 48117.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 48117.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 48177.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 48177.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 48177.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 48177.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 48207.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48207.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48252.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502a40]
>[ 48252.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502a40] width 1920 pitch 7680 (/4 1920)
>[ 48267.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921b30]
>[ 48267.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921b30] width 1920 pitch 7680 (/4 1920)
>[ 48297.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 48297.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 48312.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3337bb0]
>[ 48312.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3337bb0] width 1920 pitch 7680 (/4 1920)
>[ 48372.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 48372.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 48387.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 48387.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 48417.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 48417.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 48462.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 48462.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 48477.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48477.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48492.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 48492.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 48507.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 48507.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 48522.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 48522.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 48567.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 48567.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 48597.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 48597.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 48612.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 48612.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 48627.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 48627.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 48732.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bfcd70]
>[ 48732.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bfcd70] width 1920 pitch 7680 (/4 1920)
>[ 48747.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48747.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48762.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 48762.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 48777.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48777.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48807.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48807.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48822.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 48822.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 48852.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 48852.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 48867.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61070]
>[ 48867.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61070] width 1920 pitch 7680 (/4 1920)
>[ 48882.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48882.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48897.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d0ff0]
>[ 48897.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d0ff0] width 1920 pitch 7680 (/4 1920)
>[ 48942.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a12550]
>[ 48942.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a12550] width 1920 pitch 7680 (/4 1920)
>[ 48957.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 48957.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 48972.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 48972.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 48987.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 48987.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 49002.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49002.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49017.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b7dd0]
>[ 49017.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b7dd0] width 1920 pitch 7680 (/4 1920)
>[ 49122.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 49122.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 49122.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49122.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49137.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49137.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49152.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 49152.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 49167.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f9db0]
>[ 49167.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f9db0] width 1920 pitch 7680 (/4 1920)
>[ 49302.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 49302.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 49317.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 49317.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 49332.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37d17d0]
>[ 49332.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37d17d0] width 1920 pitch 7680 (/4 1920)
>[ 49347.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49347.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49389.315] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 49389.315] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 49389.315] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 49452.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49452.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49497.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49497.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49512.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49512.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49527.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340e6e0]
>[ 49527.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340e6e0] width 1920 pitch 7680 (/4 1920)
>[ 49557.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49557.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49572.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49572.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49587.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49587.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49602.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49602.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49617.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49617.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49632.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49632.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49677.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49677.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49692.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49692.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49722.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49722.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49737.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x340e6e0]
>[ 49737.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x340e6e0] width 1920 pitch 7680 (/4 1920)
>[ 49767.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49767.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49842.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49842.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49857.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49857.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49872.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49872.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49917.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 49917.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 49932.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 49932.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 49962.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x239fe40]
>[ 49962.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x239fe40] width 1920 pitch 7680 (/4 1920)
>[ 49977.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 49977.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 49992.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 49992.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 50052.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50052.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50172.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aae8c0]
>[ 50172.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aae8c0] width 1920 pitch 7680 (/4 1920)
>[ 50187.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 50187.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 50217.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50217.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50232.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aae8c0]
>[ 50232.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aae8c0] width 1920 pitch 7680 (/4 1920)
>[ 50277.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50277.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50292.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50292.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50307.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50307.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50337.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50337.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50517.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50517.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50532.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50532.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50577.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 50577.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 50592.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c3e0]
>[ 50592.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c3e0] width 1920 pitch 7680 (/4 1920)
>[ 50607.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50607.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50622.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 50622.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 50652.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50652.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50682.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca750]
>[ 50682.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca750] width 1920 pitch 7680 (/4 1920)
>[ 50697.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50697.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50742.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50742.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50742.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50742.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50757.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 50757.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 50862.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50862.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 50907.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50907.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50922.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50922.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50937.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f0990]
>[ 50937.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f0990] width 1920 pitch 7680 (/4 1920)
>[ 50967.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 50967.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 50982.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 50982.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 50997.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 50997.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51012.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 51012.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51027.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fc910]
>[ 51027.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fc910] width 1920 pitch 7680 (/4 1920)
>[ 51042.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51042.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51057.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51057.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51072.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 51072.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51087.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51087.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51102.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 51102.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 51132.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5cb0]
>[ 51132.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5cb0] width 1920 pitch 7680 (/4 1920)
>[ 51147.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 51147.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 51162.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 51162.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51177.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51177.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51207.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b10050]
>[ 51207.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b10050] width 1920 pitch 7680 (/4 1920)
>[ 51208.855] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 51208.855] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 51208.855] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 51299.414] (II) RADEON(0): RADEONSaveScreen(2)
>[ 51299.414] (II) RADEON(0): RADEONSaveScreen(0)
>[ 51356.603] (II) RADEON(0): RADEONSaveScreen(1)
>[ 51357.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51357.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51372.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb3c0]
>[ 51372.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 51387.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 51387.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 51402.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb3c0]
>[ 51402.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 51417.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51417.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51432.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51432.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51447.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 51447.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51462.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 51462.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 51522.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51522.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51537.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 51537.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 51582.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 51582.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 51597.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399eaf0]
>[ 51597.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399eaf0] width 1920 pitch 7680 (/4 1920)
>[ 51642.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51642.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51657.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51657.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51672.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51672.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51687.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb3c0]
>[ 51687.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 51732.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51732.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51747.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 51747.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 51792.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51792.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51837.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 51837.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 51852.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 51852.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 51867.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb3c0]
>[ 51867.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 51882.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51882.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51927.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 51927.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 51957.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 51957.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 51972.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 51972.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 51987.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c3e0]
>[ 51987.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c3e0] width 1920 pitch 7680 (/4 1920)
>[ 52002.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 52002.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 52017.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 52017.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 52032.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 52032.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 52047.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 52047.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 52062.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 52062.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 52077.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c3e0]
>[ 52077.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c3e0] width 1920 pitch 7680 (/4 1920)
>[ 52092.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 52092.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 52137.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 52137.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 52152.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 52152.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 52167.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 52167.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 52182.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a7cc0]
>[ 52182.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a7cc0] width 1920 pitch 7680 (/4 1920)
>[ 52197.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c3e0]
>[ 52197.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c3e0] width 1920 pitch 7680 (/4 1920)
>[ 52227.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 52227.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 52272.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 52272.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 52287.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 52287.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 52317.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c3e0]
>[ 52317.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c3e0] width 1920 pitch 7680 (/4 1920)
>[ 52347.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52347.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 52377.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b303d0]
>[ 52377.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b303d0] width 1920 pitch 7680 (/4 1920)
>[ 52407.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 52407.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 52422.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b23480]
>[ 52422.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b23480] width 1920 pitch 7680 (/4 1920)
>[ 52531.363] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 52531.363] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 52531.363] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 52541.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 52541.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 52542.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52542.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 52542.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23a25a0]
>[ 52542.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23a25a0] width 1920 pitch 7680 (/4 1920)
>[ 52572.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52572.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 52662.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 52662.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 52707.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 52707.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 52722.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 52722.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 52752.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 52752.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 52767.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 52767.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 52797.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 52797.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 52812.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 52812.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 52827.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52827.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 52857.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 52857.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 52872.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 52872.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 52887.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52887.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 52992.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 52992.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 53007.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 53007.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 53037.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 53037.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 53052.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 53052.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 53127.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 53127.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 53142.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 53142.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 53217.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 53217.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 53232.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 53232.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 53262.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 53262.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 53277.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 53277.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 53292.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 53292.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 53352.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53352.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53367.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 53367.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 53397.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 53397.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 53412.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 53412.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 53457.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1250]
>[ 53457.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1250] width 1920 pitch 7680 (/4 1920)
>[ 53472.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2639ea0]
>[ 53472.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2639ea0] width 1920 pitch 7680 (/4 1920)
>[ 53487.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c5d0]
>[ 53487.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c5d0] width 1920 pitch 7680 (/4 1920)
>[ 53502.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef060]
>[ 53502.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef060] width 1920 pitch 7680 (/4 1920)
>[ 53517.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53517.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53547.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2638560]
>[ 53547.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2638560] width 1920 pitch 7680 (/4 1920)
>[ 53547.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53547.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53562.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390190]
>[ 53562.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390190] width 1920 pitch 7680 (/4 1920)
>[ 53577.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53577.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53592.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53592.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53622.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53622.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53637.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53637.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53667.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53667.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53682.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53682.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53697.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53697.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53727.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53727.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53742.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251c2f0]
>[ 53742.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251c2f0] width 1920 pitch 7680 (/4 1920)
>[ 53772.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f1280]
>[ 53772.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f1280] width 1920 pitch 7680 (/4 1920)
>[ 53787.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eea60]
>[ 53787.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eea60] width 1920 pitch 7680 (/4 1920)
>[ 53802.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53802.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53817.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 53817.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 53877.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53877.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 53892.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 53892.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54012.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54012.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54027.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54027.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54042.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3828660]
>[ 54042.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3828660] width 1920 pitch 7680 (/4 1920)
>[ 54057.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bd60]
>[ 54057.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bd60] width 1920 pitch 7680 (/4 1920)
>[ 54072.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54072.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54117.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54117.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54147.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3875250]
>[ 54147.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3875250] width 1920 pitch 7680 (/4 1920)
>[ 54222.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54222.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54297.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ef10]
>[ 54297.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ef10] width 1920 pitch 7680 (/4 1920)
>[ 54312.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54312.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54372.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54372.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54372.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ff400]
>[ 54372.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ff400] width 1920 pitch 7680 (/4 1920)
>[ 54387.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2602680]
>[ 54387.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2602680] width 1920 pitch 7680 (/4 1920)
>[ 54402.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54402.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54417.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37ca790]
>[ 54417.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37ca790] width 1920 pitch 7680 (/4 1920)
>[ 54432.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54432.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54447.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54447.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54477.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb3c0]
>[ 54477.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb3c0] width 1920 pitch 7680 (/4 1920)
>[ 54492.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54492.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54537.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54537.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54552.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54552.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54567.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54567.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54582.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54582.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54597.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f1280]
>[ 54597.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f1280] width 1920 pitch 7680 (/4 1920)
>[ 54627.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54627.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54672.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390180]
>[ 54672.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390180] width 1920 pitch 7680 (/4 1920)
>[ 54687.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54687.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54702.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54702.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54717.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54717.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54732.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54732.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54762.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aae870]
>[ 54762.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aae870] width 1920 pitch 7680 (/4 1920)
>[ 54777.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390180]
>[ 54777.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390180] width 1920 pitch 7680 (/4 1920)
>[ 54792.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa770]
>[ 54792.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa770] width 1920 pitch 7680 (/4 1920)
>[ 54807.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54807.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54822.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 54822.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 54837.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244aab0]
>[ 54837.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244aab0] width 1920 pitch 7680 (/4 1920)
>[ 54927.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54927.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54942.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23448d0]
>[ 54942.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23448d0] width 1920 pitch 7680 (/4 1920)
>[ 54957.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54957.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 54972.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 54972.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 55002.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23448d0]
>[ 55002.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23448d0] width 1920 pitch 7680 (/4 1920)
>[ 55017.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 55017.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 55032.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55032.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55047.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55047.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55062.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6ce0]
>[ 55062.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6ce0] width 1920 pitch 7680 (/4 1920)
>[ 55077.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b6d20]
>[ 55077.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b6d20] width 1920 pitch 7680 (/4 1920)
>[ 55092.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37b6ce0]
>[ 55092.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37b6ce0] width 1920 pitch 7680 (/4 1920)
>[ 55197.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fcbb0]
>[ 55197.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fcbb0] width 1920 pitch 7680 (/4 1920)
>[ 55227.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55227.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55242.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3865000]
>[ 55242.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3865000] width 1920 pitch 7680 (/4 1920)
>[ 55257.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55257.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55272.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55272.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55287.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aa770]
>[ 55287.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aa770] width 1920 pitch 7680 (/4 1920)
>[ 55347.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ac9e90]
>[ 55347.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ac9e90] width 1920 pitch 7680 (/4 1920)
>[ 55362.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55362.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55377.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634c50]
>[ 55377.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634c50] width 1920 pitch 7680 (/4 1920)
>[ 55452.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3460]
>[ 55452.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3460] width 1920 pitch 7680 (/4 1920)
>[ 55467.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3460]
>[ 55467.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3460] width 1920 pitch 7680 (/4 1920)
>[ 55482.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3460]
>[ 55482.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3460] width 1920 pitch 7680 (/4 1920)
>[ 55497.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33af130]
>[ 55497.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33af130] width 1920 pitch 7680 (/4 1920)
>[ 55512.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55512.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 55527.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24354f0]
>[ 55527.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24354f0] width 1920 pitch 7680 (/4 1920)
>[ 55542.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33af130]
>[ 55542.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33af130] width 1920 pitch 7680 (/4 1920)
>[ 55557.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e99f0]
>[ 55557.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e99f0] width 1920 pitch 7680 (/4 1920)
>[ 55692.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24354f0]
>[ 55692.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24354f0] width 1920 pitch 7680 (/4 1920)
>[ 55707.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab5c0]
>[ 55707.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab5c0] width 1920 pitch 7680 (/4 1920)
>[ 55752.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3460]
>[ 55752.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3460] width 1920 pitch 7680 (/4 1920)
>[ 55767.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55767.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 55782.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33af130]
>[ 55782.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33af130] width 1920 pitch 7680 (/4 1920)
>[ 55797.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3707f80]
>[ 55797.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3707f80] width 1920 pitch 7680 (/4 1920)
>[ 55812.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x33af130]
>[ 55812.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x33af130] width 1920 pitch 7680 (/4 1920)
>[ 55827.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55827.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 55842.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55842.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 55857.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24354f0]
>[ 55857.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24354f0] width 1920 pitch 7680 (/4 1920)
>[ 55932.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3875250]
>[ 55932.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3875250] width 1920 pitch 7680 (/4 1920)
>[ 55947.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55947.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 55962.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3460]
>[ 55962.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3460] width 1920 pitch 7680 (/4 1920)
>[ 55992.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 55992.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56037.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56037.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56052.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56052.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56067.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56067.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56082.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56082.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56097.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56097.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56112.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ac9fb0]
>[ 56112.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ac9fb0] width 1920 pitch 7680 (/4 1920)
>[ 56142.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f1280]
>[ 56142.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f1280] width 1920 pitch 7680 (/4 1920)
>[ 56157.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2637300]
>[ 56157.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2637300] width 1920 pitch 7680 (/4 1920)
>[ 56172.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56172.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56187.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6b70]
>[ 56187.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6b70] width 1920 pitch 7680 (/4 1920)
>[ 56247.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250eaa0]
>[ 56247.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250eaa0] width 1920 pitch 7680 (/4 1920)
>[ 56277.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3981680]
>[ 56277.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3981680] width 1920 pitch 7680 (/4 1920)
>[ 56292.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dc390]
>[ 56292.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dc390] width 1920 pitch 7680 (/4 1920)
>[ 56337.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36d5660]
>[ 56337.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36d5660] width 1920 pitch 7680 (/4 1920)
>[ 56352.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37eeab0]
>[ 56352.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37eeab0] width 1920 pitch 7680 (/4 1920)
>[ 56367.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245cf10]
>[ 56367.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245cf10] width 1920 pitch 7680 (/4 1920)
>[ 56382.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3917260]
>[ 56382.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3917260] width 1920 pitch 7680 (/4 1920)
>[ 56382.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39af940]
>[ 56382.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39af940] width 1920 pitch 7680 (/4 1920)
>[ 56397.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24688f0]
>[ 56397.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24688f0] width 1920 pitch 7680 (/4 1920)
>[ 56412.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56412.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56442.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ac35e0]
>[ 56442.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ac35e0] width 1920 pitch 7680 (/4 1920)
>[ 56487.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3917260]
>[ 56487.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3917260] width 1920 pitch 7680 (/4 1920)
>[ 56502.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 56502.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 56517.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24354f0]
>[ 56517.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24354f0] width 1920 pitch 7680 (/4 1920)
>[ 56532.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23879a0]
>[ 56532.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23879a0] width 1920 pitch 7680 (/4 1920)
>[ 56607.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cbd40]
>[ 56607.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cbd40] width 1920 pitch 7680 (/4 1920)
>[ 56622.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2482690]
>[ 56622.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2482690] width 1920 pitch 7680 (/4 1920)
>[ 56637.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61070]
>[ 56637.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61070] width 1920 pitch 7680 (/4 1920)
>[ 56652.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aae8c0]
>[ 56652.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aae8c0] width 1920 pitch 7680 (/4 1920)
>[ 56667.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f9da0]
>[ 56667.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f9da0] width 1920 pitch 7680 (/4 1920)
>[ 56697.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dd540]
>[ 56697.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dd540] width 1920 pitch 7680 (/4 1920)
>[ 56712.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36dd540]
>[ 56712.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36dd540] width 1920 pitch 7680 (/4 1920)
>[ 56727.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515fa0]
>[ 56727.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515fa0] width 1920 pitch 7680 (/4 1920)
>[ 56757.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ff400]
>[ 56757.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ff400] width 1920 pitch 7680 (/4 1920)
>[ 56787.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3810e90]
>[ 56787.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3810e90] width 1920 pitch 7680 (/4 1920)
>[ 56802.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39aee20]
>[ 56802.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39aee20] width 1920 pitch 7680 (/4 1920)
>[ 56952.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651390]
>[ 56952.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651390] width 1920 pitch 7680 (/4 1920)
>[ 56967.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x36fcbb0]
>[ 56967.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x36fcbb0] width 1920 pitch 7680 (/4 1920)
>[ 56982.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab4750]
>[ 56982.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab4750] width 1920 pitch 7680 (/4 1920)
>[ 56997.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3716c90]
>[ 56997.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3716c90] width 1920 pitch 7680 (/4 1920)
>[ 57027.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab47c0]
>[ 57027.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab47c0] width 1920 pitch 7680 (/4 1920)
>[ 57042.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 57042.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 57057.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 57057.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 57102.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8b90]
>[ 57102.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8b90] width 1920 pitch 7680 (/4 1920)
>[ 57117.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 57117.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 57132.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 57132.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 57147.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3869f70]
>[ 57147.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3869f70] width 1920 pitch 7680 (/4 1920)
>[ 57162.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973bd0]
>[ 57162.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973bd0] width 1920 pitch 7680 (/4 1920)
>[ 57222.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cf5b0]
>[ 57222.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cf5b0] width 1920 pitch 7680 (/4 1920)
>[ 57237.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e99e0]
>[ 57237.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e99e0] width 1920 pitch 7680 (/4 1920)
>[ 57312.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244f870]
>[ 57312.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244f870] width 1920 pitch 7680 (/4 1920)
>[ 57327.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3917260]
>[ 57327.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3917260] width 1920 pitch 7680 (/4 1920)
>[ 57357.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b3fb90]
>[ 57357.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b3fb90] width 1920 pitch 7680 (/4 1920)
>[ 57371.512] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57371.512] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57371.512] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57371.533] (II) RADEON(0): RADEONSaveScreen(2)
>[ 57371.533] (II) RADEON(0): RADEONSaveScreen(0)
>[ 57372.510] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57372.510] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57372.510] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57375.179] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 57375.179] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 57375.179] (II) RADEON(0): Ok, leaving now...
>[ 57380.232] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[ 57380.233] (II) evdev: Dell Dell USB Optical Mouse: Close
>[ 57380.233] (II) UnloadModule: "evdev"
>[ 57380.249] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 57380.249] (II) RADEON(0): RADEONEnterVT_KMS
>[ 57380.273] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57380.273] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57380.273] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57380.278] (II) RADEON(0): RADEONSaveScreen(2)
>[ 57380.278] (II) RADEON(0): RADEONSaveScreen(1)
>[ 57380.279] (**) Option "Device" "/dev/input/event5"
>[ 57380.279] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 57380.968] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57380.968] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57380.968] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57439.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d3f30]
>[ 57439.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d3f30] width 1920 pitch 7680 (/4 1920)
>[ 57447.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a64710]
>[ 57447.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a64710] width 1920 pitch 7680 (/4 1920)
>[ 57462.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380090]
>[ 57462.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380090] width 1920 pitch 7680 (/4 1920)
>[ 57492.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37a71f0]
>[ 57492.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37a71f0] width 1920 pitch 7680 (/4 1920)
>[ 57492.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399eaf0]
>[ 57492.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399eaf0] width 1920 pitch 7680 (/4 1920)
>[ 57507.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249c260]
>[ 57507.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249c260] width 1920 pitch 7680 (/4 1920)
>[ 57522.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38792a0]
>[ 57522.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38792a0] width 1920 pitch 7680 (/4 1920)
>[ 57522.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be5bb0]
>[ 57522.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be5bb0] width 1920 pitch 7680 (/4 1920)
>[ 57537.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2380090]
>[ 57537.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2380090] width 1920 pitch 7680 (/4 1920)
>[ 57552.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab47c0]
>[ 57552.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab47c0] width 1920 pitch 7680 (/4 1920)
>[ 57552.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d8530]
>[ 57552.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d8530] width 1920 pitch 7680 (/4 1920)
>[ 57582.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beff30]
>[ 57582.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beff30] width 1920 pitch 7680 (/4 1920)
>[ 57582.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beff30]
>[ 57582.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beff30] width 1920 pitch 7680 (/4 1920)
>[ 57586.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adebe0]
>[ 57586.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adebe0] width 1920 pitch 7680 (/4 1920)
>[ 57586.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d3f30]
>[ 57586.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d3f30] width 1920 pitch 7680 (/4 1920)
>[ 57586.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a64710]
>[ 57586.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a64710] width 1920 pitch 7680 (/4 1920)
>[ 57587.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x37cec30]
>[ 57587.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x37cec30] width 1920 pitch 7680 (/4 1920)
>[ 57593.573] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57593.573] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57593.573] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57593.576] (II) RADEON(0): RADEONSaveScreen(2)
>[ 57593.576] (II) RADEON(0): RADEONSaveScreen(0)
>[ 57594.522] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.522] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.522] 
>[ 57594.522] Backtrace:
>[ 57594.523] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.523] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.523] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.523] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.523] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.523] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.523] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.523] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 57594.523] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.523] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 57594.523] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x348bc03658]
>[ 57594.523] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x348bc076fd]
>[ 57594.523] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0x7b7dc) [0x7f97da8ff7dc]
>[ 57594.523] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xd3583) [0x7f97da957583]
>[ 57594.523] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 57594.523] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 57594.523] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f97dba59000+0x1af36) [0x7f97dba73f36]
>[ 57594.523] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57594.523] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.523] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.523] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.523] 
>[ 57594.546] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.546] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.546] 
>[ 57594.546] Backtrace:
>[ 57594.607] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.607] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.607] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.607] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.607] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.607] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.607] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.607] 7: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 57594.607] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x348bc03658]
>[ 57594.607] 9: /lib64/libdrm.so.2 (drmModeGetConnector+0xbe) [0x348bc0704e]
>[ 57594.607] 10: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xd5e01) [0x7f97da959e01]
>[ 57594.607] 11: /usr/bin/Xorg (xf86ProbeOutputModes+0xfb) [0x4b280b]
>[ 57594.607] 12: /usr/bin/Xorg (0x400000+0xbc1ec) [0x4bc1ec]
>[ 57594.607] 13: /usr/bin/Xorg (RRGetInfo+0x82) [0x4e8642]
>[ 57594.607] 14: /usr/bin/Xorg (0x400000+0xecc65) [0x4ecc65]
>[ 57594.607] 15: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57594.607] 16: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.607] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.607] 18: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.607] 
>[ 57594.615] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.615] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.615] 
>[ 57594.615] Backtrace:
>[ 57594.615] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.615] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.615] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.615] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.615] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.615] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.615] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.615] 7: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 57594.615] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x348bc03658]
>[ 57594.615] 9: /lib64/libdrm.so.2 (drmModeGetConnector+0x55) [0x348bc06fe5]
>[ 57594.615] 10: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xd5e01) [0x7f97da959e01]
>[ 57594.615] 11: /usr/bin/Xorg (xf86ProbeOutputModes+0xfb) [0x4b280b]
>[ 57594.616] 12: /usr/bin/Xorg (0x400000+0xbc1ec) [0x4bc1ec]
>[ 57594.616] 13: /usr/bin/Xorg (RRGetInfo+0x82) [0x4e8642]
>[ 57594.616] 14: /usr/bin/Xorg (0x400000+0xecc65) [0x4ecc65]
>[ 57594.616] 15: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57594.616] 16: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.616] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.616] 18: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.616] 
>[ 57594.618] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57594.618] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57594.618] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57594.673] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.673] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.673] 
>[ 57594.673] Backtrace:
>[ 57594.673] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.673] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.673] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.673] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.673] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.673] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.673] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.673] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57594.673] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57594.673] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57594.673] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.673] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.673] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.673] 
>[ 57594.709] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.709] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.709] 
>[ 57594.709] Backtrace:
>[ 57594.709] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.709] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.709] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.709] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.709] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.709] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.709] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.709] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57594.709] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57594.709] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57594.709] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.709] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.709] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.709] 
>[ 57594.768] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.768] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.768] 
>[ 57594.768] Backtrace:
>[ 57594.768] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.768] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.768] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.768] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.769] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.769] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.769] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.769] 7: /usr/bin/Xorg (miDoCopy+0x0) [0x54f850]
>[ 57594.769] 8: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x8706) [0x7f97d9e58706]
>[ 57594.769] 9: /usr/bin/Xorg (0x400000+0x10523d) [0x50523d]
>[ 57594.769] 10: /usr/bin/Xorg (0x400000+0xd8edf) [0x4d8edf]
>[ 57594.769] 11: /usr/bin/Xorg (0x400000+0xda3c5) [0x4da3c5]
>[ 57594.769] 12: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57594.769] 13: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.770] 14: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.770] 15: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.770] 
>[ 57594.853] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.853] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.853] 
>[ 57594.853] Backtrace:
>[ 57594.853] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.853] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.853] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.853] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.853] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.853] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.853] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.853] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57594.853] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57594.853] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57594.853] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.853] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.853] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.853] 
>[ 57594.984] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57594.984] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57594.984] 
>[ 57594.984] Backtrace:
>[ 57594.984] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57594.984] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57594.985] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57594.985] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57594.985] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57594.985] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57594.985] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57594.985] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57594.985] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57594.985] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57594.985] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57594.985] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57594.985] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57594.985] 
>[ 57595.056] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.056] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.056] 
>[ 57595.056] Backtrace:
>[ 57595.056] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.056] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.056] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.056] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.056] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.057] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.057] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.057] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.057] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.057] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.057] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.057] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.057] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.057] 
>[ 57595.116] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.116] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.116] 
>[ 57595.116] Backtrace:
>[ 57595.116] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.116] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.116] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.116] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.117] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.117] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.117] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.117] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.117] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.117] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.117] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.117] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.117] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.117] 
>[ 57595.224] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.224] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.224] 
>[ 57595.224] Backtrace:
>[ 57595.224] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.224] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.224] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.224] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.224] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.224] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.224] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.224] 7: /lib64/libpixman-1.so.0 (pixman_region_n_rects+0x10) [0x3b476478f0]
>[ 57595.224] 8: /usr/bin/Xorg (miComputeCompositeRegion+0x2da) [0x4f29fa]
>[ 57595.224] 9: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xdbf3) [0x7f97d9e5dbf3]
>[ 57595.224] 10: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xe4ac) [0x7f97d9e5e4ac]
>[ 57595.224] 11: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xc477) [0x7f97d9e5c477]
>[ 57595.224] 12: /usr/bin/Xorg (0x400000+0x1023cd) [0x5023cd]
>[ 57595.224] 13: /usr/bin/Xorg (0x400000+0xfb5b6) [0x4fb5b6]
>[ 57595.224] 14: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57595.224] 15: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.224] 16: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.224] 17: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.224] 
>[ 57595.332] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.332] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.332] 
>[ 57595.332] Backtrace:
>[ 57595.332] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.332] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.332] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.332] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.332] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.332] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.332] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.332] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.332] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.333] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.333] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.333] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.333] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.333] 
>[ 57595.392] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.392] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.392] 
>[ 57595.392] Backtrace:
>[ 57595.392] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.392] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.392] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.392] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.393] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.393] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.393] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.393] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.393] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.393] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.393] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.393] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.393] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.393] 
>[ 57595.452] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.452] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.452] 
>[ 57595.452] Backtrace:
>[ 57595.452] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.452] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.452] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.452] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.452] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.452] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.452] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.452] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.452] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.452] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.452] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.452] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.452] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.452] 
>[ 57595.560] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.560] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.560] 
>[ 57595.560] Backtrace:
>[ 57595.561] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.561] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.561] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.561] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.561] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.561] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.561] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.561] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.561] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.561] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.561] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.561] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.561] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.561] 
>[ 57595.608] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.608] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.608] 
>[ 57595.608] Backtrace:
>[ 57595.608] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.608] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.608] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.608] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.609] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.609] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.609] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.609] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.609] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.609] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.609] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.609] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.609] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.609] 
>[ 57595.673] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.673] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.673] 
>[ 57595.673] Backtrace:
>[ 57595.673] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.673] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.673] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.673] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.673] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.673] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.673] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.673] 7: /lib64/libc.so.6 (0x3b3e200000+0x144a2b) [0x3b3e344a2b]
>[ 57595.673] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xad167) [0x7f97da931167]
>[ 57595.673] 9: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x5a7b) [0x7f97d9e55a7b]
>[ 57595.673] 10: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x7c75) [0x7f97d9e57c75]
>[ 57595.673] 11: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xe15d) [0x7f97d9e5e15d]
>[ 57595.673] 12: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xeb1a) [0x7f97d9e5eb1a]
>[ 57595.673] 13: /usr/bin/Xorg (0x400000+0x102139) [0x502139]
>[ 57595.673] 14: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xf95f) [0x7f97d9e5f95f]
>[ 57595.673] 15: /usr/bin/Xorg (0x400000+0xfbc7b) [0x4fbc7b]
>[ 57595.673] 16: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57595.673] 17: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.673] 18: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.673] 19: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.673] 
>[ 57595.764] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.764] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.764] 
>[ 57595.764] Backtrace:
>[ 57595.764] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.764] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.764] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.764] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.764] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.764] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.764] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.764] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.764] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.764] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.764] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.764] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.764] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.764] 
>[ 57595.812] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.812] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.812] 
>[ 57595.812] Backtrace:
>[ 57595.812] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.812] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.812] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.812] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.812] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.812] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.812] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.812] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57595.812] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57595.812] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57595.812] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.812] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.812] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.812] 
>[ 57595.972] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.972] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.972] 
>[ 57595.972] Backtrace:
>[ 57595.972] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.972] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.972] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.972] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.972] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.972] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.972] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.972] 7: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 57595.972] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x348bc03658]
>[ 57595.972] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x348bc058cc]
>[ 57595.972] 10: /lib64/libdrm_radeon.so.1 (0x7f97da679000+0x215c) [0x7f97da67b15c]
>[ 57595.972] 11: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0x99036) [0x7f97da91d036]
>[ 57595.972] 12: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x7ac3) [0x7f97d9e57ac3]
>[ 57595.972] 13: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x7cb8) [0x7f97d9e57cb8]
>[ 57595.972] 14: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xe15d) [0x7f97d9e5e15d]
>[ 57595.972] 15: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xeb1a) [0x7f97d9e5eb1a]
>[ 57595.972] 16: /usr/bin/Xorg (0x400000+0x102139) [0x502139]
>[ 57595.972] 17: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xf95f) [0x7f97d9e5f95f]
>[ 57595.972] 18: /usr/bin/Xorg (0x400000+0xfbc7b) [0x4fbc7b]
>[ 57595.972] 19: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57595.972] 20: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.973] 21: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.973] 22: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.973] 
>[ 57595.973] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57595.973] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57595.973] 
>[ 57595.973] Backtrace:
>[ 57595.973] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57595.973] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57595.973] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57595.973] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57595.973] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57595.973] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57595.973] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57595.973] 7: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 57595.973] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x348bc03658]
>[ 57595.973] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x348bc058cc]
>[ 57595.973] 10: /lib64/libdrm_radeon.so.1 (0x7f97da679000+0x215c) [0x7f97da67b15c]
>[ 57595.973] 11: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0x99036) [0x7f97da91d036]
>[ 57595.973] 12: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x7ac3) [0x7f97d9e57ac3]
>[ 57595.973] 13: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0x7cb8) [0x7f97d9e57cb8]
>[ 57595.973] 14: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xe15d) [0x7f97d9e5e15d]
>[ 57595.973] 15: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xeb1a) [0x7f97d9e5eb1a]
>[ 57595.973] 16: /usr/bin/Xorg (0x400000+0x102139) [0x502139]
>[ 57595.973] 17: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xf95f) [0x7f97d9e5f95f]
>[ 57595.973] 18: /usr/bin/Xorg (0x400000+0xfbc7b) [0x4fbc7b]
>[ 57595.973] 19: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57595.973] 20: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57595.973] 21: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57595.973] 22: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57595.973] 
>[ 57596.184] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.184] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.184] 
>[ 57596.184] Backtrace:
>[ 57596.184] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.184] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.184] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.184] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.184] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.184] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.184] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.184] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.184] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.184] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.184] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.184] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.184] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.184] 
>[ 57596.232] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.232] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.232] 
>[ 57596.232] Backtrace:
>[ 57596.232] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.232] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.232] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.232] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.232] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.232] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.232] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.232] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.232] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.232] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.232] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.232] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.232] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.232] 
>[ 57596.329] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.329] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.329] 
>[ 57596.329] Backtrace:
>[ 57596.329] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.329] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.329] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.329] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.329] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.329] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.329] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.329] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.329] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.329] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.329] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.329] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.329] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.329] 
>[ 57596.423] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.423] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.423] 
>[ 57596.423] Backtrace:
>[ 57596.424] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.424] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.424] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.424] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.424] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.424] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.424] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.424] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.424] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.424] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.424] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.424] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.424] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.424] 
>[ 57596.567] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.567] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.567] 
>[ 57596.567] Backtrace:
>[ 57596.567] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.567] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.567] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.567] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.567] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.567] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.567] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.567] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.567] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.567] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.567] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.567] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.567] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.567] 
>[ 57596.602] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.602] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.602] 
>[ 57596.602] Backtrace:
>[ 57596.603] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.603] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.603] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.603] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.603] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.603] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.603] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.603] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.603] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.603] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.603] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.603] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.603] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.603] 
>[ 57596.650] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.650] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.650] 
>[ 57596.650] Backtrace:
>[ 57596.651] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.651] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.651] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.651] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.651] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.651] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.651] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.651] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57596.651] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57596.651] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57596.651] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.651] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.655] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.662] 
>[ 57596.759] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57596.759] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57596.759] 
>[ 57596.759] Backtrace:
>[ 57596.759] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57596.759] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57596.759] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57596.759] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57596.759] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57596.759] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57596.759] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57596.759] 7: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xaa700) [0x7f97da92e700]
>[ 57596.759] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f97da884000+0xaa8bf) [0x7f97da92e8bf]
>[ 57596.759] 9: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xdfc9) [0x7f97d9e5dfc9]
>[ 57596.759] 10: /usr/lib64/xorg/modules/libexa.so (0x7f97d9e50000+0xf39b) [0x7f97d9e5f39b]
>[ 57596.759] 11: /usr/bin/Xorg (0x400000+0x102139) [0x502139]
>[ 57596.759] 12: /usr/bin/Xorg (0x400000+0xfb0a4) [0x4fb0a4]
>[ 57596.759] 13: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 57596.759] 14: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57596.759] 15: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57596.759] 16: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57596.759] 
>[ 57597.130] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.130] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.130] 
>[ 57597.130] Backtrace:
>[ 57597.130] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.130] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.130] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.130] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.130] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.130] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.130] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.131] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.131] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.131] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.131] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.131] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.131] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.131] 
>[ 57597.274] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.274] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.274] 
>[ 57597.274] Backtrace:
>[ 57597.274] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.274] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.274] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.274] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.274] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.274] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.274] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.274] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.275] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.275] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.275] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.275] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.275] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.275] 
>[ 57597.310] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.310] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.310] 
>[ 57597.310] Backtrace:
>[ 57597.310] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.310] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.310] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.310] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.310] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.310] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.310] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.310] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.311] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.311] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.311] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.311] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.311] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.311] 
>[ 57597.365] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.365] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.365] 
>[ 57597.365] Backtrace:
>[ 57597.365] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.365] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.365] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.365] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.365] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.365] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.366] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.366] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.366] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.366] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.366] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.366] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.366] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.366] 
>[ 57597.527] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.527] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.527] 
>[ 57597.527] Backtrace:
>[ 57597.527] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.527] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.527] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.527] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.527] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.527] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.527] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.527] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.527] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.527] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.528] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.528] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.528] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.528] 
>[ 57597.562] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.562] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.562] 
>[ 57597.562] Backtrace:
>[ 57597.562] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.562] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.562] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.562] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.562] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.562] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.562] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.562] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.562] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.562] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.562] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.562] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.562] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.562] 
>[ 57597.646] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.646] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.646] 
>[ 57597.646] Backtrace:
>[ 57597.646] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.646] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.646] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.646] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.646] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.646] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.646] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.646] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.646] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.646] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.646] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.646] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.646] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.646] 
>[ 57597.694] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.694] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.694] 
>[ 57597.694] Backtrace:
>[ 57597.694] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.694] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.694] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.694] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.694] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.694] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.694] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.694] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.694] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.695] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.695] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.695] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.695] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.695] 
>[ 57597.754] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.754] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.754] 
>[ 57597.754] Backtrace:
>[ 57597.754] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.754] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.754] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.754] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.754] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.754] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.754] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.754] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.754] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.754] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.754] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.754] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.754] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.754] 
>[ 57597.802] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.802] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.802] 
>[ 57597.802] Backtrace:
>[ 57597.802] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.803] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.803] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.803] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.803] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.803] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.803] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.803] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.803] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.803] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.803] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.803] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.803] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.803] 
>[ 57597.945] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 57597.946] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 57597.946] 
>[ 57597.946] Backtrace:
>[ 57597.946] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 57597.946] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x2e77) [0x7f97d74dae77]
>[ 57597.946] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x4563) [0x7f97d74dc563]
>[ 57597.946] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f97d74d8000+0x6fa4) [0x7f97d74defa4]
>[ 57597.946] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 57597.946] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 57597.946] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 57597.946] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 57597.946] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 57597.946] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 57597.946] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 57597.946] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 57597.946] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 57597.946]

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Attachments on bug 876001: 643869 | 643870 | 643871 | 643872 | 643873 | 643874