Attachment 644197 Details for Bug 876243 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 5.91 MB, created by Mikhail on 2012-11-13 16:13:01 UTC

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Creator: Mikhail

Created: 2012-11-13 16:13:01 UTC

Size: 5.91 MB

patch

obsolete

>[    21.622] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[    21.622] X Protocol Version 11, Revision 0
>[    21.622] Build Operating System:  2.6.32-279.2.1.el6.x86_64 
>[    21.622] Current Operating System: Linux telecon17l.afbank.ru 3.6.6-1.fc17.i686.PAE #1 SMP Mon Nov 5 22:05:54 UTC 2012 i686
>[    21.622] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.6.6-1.fc17.i686.PAE root=UUID=28c4fb37-efd4-4b65-9a6b-6ba64eafec52 ro rd.md=0 rd.lvm=0 rd.dm=0 SYSFONT=True KEYTABLE=us rd.luks=0 LANG=en_US.UTF-8 rhgb quiet
>[    21.622] Build Date: 20 September 2012  07:52:02AM
>[    21.622] Build ID: xorg-x11-server 1.12.3-2.fc17 
>[    21.622] Current version of pixman: 0.24.4
>[    21.622] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    21.622] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    21.622] (==) Log file: "/var/log/Xorg.0.log", Time: Thu Nov  8 13:32:39 2012
>[    21.631] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    21.631] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    21.632] (==) No Layout section.  Using the first Screen section.
>[    21.632] (==) No screen section available. Using defaults.
>[    21.632] (**) |-->Screen "Default Screen Section" (0)
>[    21.632] (**) |   |-->Monitor "<default monitor>"
>[    21.632] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    21.632] (==) Automatically adding devices
>[    21.632] (==) Automatically enabling devices
>[    21.632] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    21.632] (==) ModulePath set to "/usr/lib/xorg/modules"
>[    21.632] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    21.632] (II) Loader magic: 0x8224580
>[    21.632] (II) Module ABI versions:
>[    21.632] 	X.Org ANSI C Emulation: 0.4
>[    21.632] 	X.Org Video Driver: 12.0
>[    21.632] 	X.Org XInput driver : 16.0
>[    21.632] 	X.Org Server Extension : 6.0
>[    21.635] (--) PCI:*(0:1:0:0) 1002:6759:174b:e193 rev 0, Mem @ 0xc0000000/268435456, 0xd0200000/131072, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    21.635] (II) LoadModule: "extmod"
>[    21.645] (II) Loading /usr/lib/xorg/modules/extensions/libextmod.so
>[    21.646] (II) Module extmod: vendor="X.Org Foundation"
>[    21.646] 	compiled for 1.12.3, module version = 1.0.0
>[    21.646] 	Module class: X.Org Server Extension
>[    21.646] 	ABI class: X.Org Server Extension, version 6.0
>[    21.646] (II) Loading extension SELinux
>[    21.646] (II) Loading extension MIT-SCREEN-SAVER
>[    21.646] (II) Loading extension XFree86-VidModeExtension
>[    21.646] (II) Loading extension XFree86-DGA
>[    21.646] (II) Loading extension DPMS
>[    21.646] (II) Loading extension XVideo
>[    21.646] (II) Loading extension XVideo-MotionCompensation
>[    21.646] (II) Loading extension X-Resource
>[    21.646] (II) LoadModule: "dbe"
>[    21.646] (II) Loading /usr/lib/xorg/modules/extensions/libdbe.so
>[    21.647] (II) Module dbe: vendor="X.Org Foundation"
>[    21.647] 	compiled for 1.12.3, module version = 1.0.0
>[    21.647] 	Module class: X.Org Server Extension
>[    21.647] 	ABI class: X.Org Server Extension, version 6.0
>[    21.647] (II) Loading extension DOUBLE-BUFFER
>[    21.647] (II) LoadModule: "glx"
>[    21.647] (II) Loading /usr/lib/xorg/modules/extensions/libglx.so
>[    21.647] (II) Module glx: vendor="X.Org Foundation"
>[    21.647] 	compiled for 1.12.3, module version = 1.0.0
>[    21.647] 	ABI class: X.Org Server Extension, version 6.0
>[    21.647] (==) AIGLX enabled
>[    21.647] (II) Loading extension GLX
>[    21.647] (II) LoadModule: "record"
>[    21.648] (II) Loading /usr/lib/xorg/modules/extensions/librecord.so
>[    21.648] (II) Module record: vendor="X.Org Foundation"
>[    21.648] 	compiled for 1.12.3, module version = 1.13.0
>[    21.648] 	Module class: X.Org Server Extension
>[    21.648] 	ABI class: X.Org Server Extension, version 6.0
>[    21.648] (II) Loading extension RECORD
>[    21.648] (II) LoadModule: "dri"
>[    21.648] (II) Loading /usr/lib/xorg/modules/extensions/libdri.so
>[    21.649] (II) Module dri: vendor="X.Org Foundation"
>[    21.649] 	compiled for 1.12.3, module version = 1.0.0
>[    21.649] 	ABI class: X.Org Server Extension, version 6.0
>[    21.649] (II) Loading extension XFree86-DRI
>[    21.649] (II) LoadModule: "dri2"
>[    21.649] (II) Loading /usr/lib/xorg/modules/extensions/libdri2.so
>[    21.649] (II) Module dri2: vendor="X.Org Foundation"
>[    21.649] 	compiled for 1.12.3, module version = 1.2.0
>[    21.649] 	ABI class: X.Org Server Extension, version 6.0
>[    21.649] (II) Loading extension DRI2
>[    21.650] (==) Matched ati as autoconfigured driver 0
>[    21.650] (==) Matched vesa as autoconfigured driver 1
>[    21.650] (==) Matched modesetting as autoconfigured driver 2
>[    21.650] (==) Matched fbdev as autoconfigured driver 3
>[    21.650] (==) Assigned the driver to the xf86ConfigLayout
>[    21.650] (II) LoadModule: "ati"
>[    21.650] (II) Loading /usr/lib/xorg/modules/drivers/ati_drv.so
>[    21.650] (II) Module ati: vendor="X.Org Foundation"
>[    21.650] 	compiled for 1.12.0, module version = 6.14.99
>[    21.650] 	Module class: X.Org Video Driver
>[    21.650] 	ABI class: X.Org Video Driver, version 12.0
>[    21.650] (II) LoadModule: "radeon"
>[    21.650] (II) Loading /usr/lib/xorg/modules/drivers/radeon_drv.so
>[    21.651] (II) Module radeon: vendor="X.Org Foundation"
>[    21.651] 	compiled for 1.12.0, module version = 6.14.99
>[    21.651] 	Module class: X.Org Video Driver
>[    21.651] 	ABI class: X.Org Video Driver, version 12.0
>[    21.651] (II) LoadModule: "vesa"
>[    21.651] (II) Loading /usr/lib/xorg/modules/drivers/vesa_drv.so
>[    21.651] (II) Module vesa: vendor="X.Org Foundation"
>[    21.651] 	compiled for 1.12.0, module version = 2.3.1
>[    21.651] 	Module class: X.Org Video Driver
>[    21.651] 	ABI class: X.Org Video Driver, version 12.0
>[    21.651] (II) LoadModule: "modesetting"
>[    21.652] (WW) Warning, couldn't open module modesetting
>[    21.652] (II) UnloadModule: "modesetting"
>[    21.652] (II) Unloading modesetting
>[    21.652] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    21.652] (II) LoadModule: "fbdev"
>[    21.652] (II) Loading /usr/lib/xorg/modules/drivers/fbdev_drv.so
>[    21.653] (II) Module fbdev: vendor="X.Org Foundation"
>[    21.653] 	compiled for 1.11.99.901, module version = 0.4.2
>[    21.653] 	ABI class: X.Org Video Driver, version 12.0
>[    21.653] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    21.657] (II) VESA: driver for VESA chipsets: vesa
>[    21.657] (II) FBDEV: driver for framebuffer: fbdev
>[    21.657] (++) using VT number 1
>
>[    21.657] (II) [KMS] Kernel modesetting enabled.
>[    21.658] (WW) Falling back to old probe method for vesa
>[    21.658] (WW) Falling back to old probe method for fbdev
>[    21.658] (II) Loading sub module "fbdevhw"
>[    21.658] (II) LoadModule: "fbdevhw"
>[    21.658] (II) Loading /usr/lib/xorg/modules/libfbdevhw.so
>[    21.658] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    21.658] 	compiled for 1.12.3, module version = 0.0.2
>[    21.658] 	ABI class: X.Org Video Driver, version 12.0
>[    21.658] (II) RADEON(0): RADEONPreInit_KMS
>[    21.658] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    21.658] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    21.658] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    21.658] (==) RADEON(0): Default visual is TrueColor
>[    21.658] (==) RADEON(0): RGB weight 888
>[    21.658] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    21.658] (--) RADEON(0): Chipset: "TURKS" (ChipID = 0x6759)
>[    21.658] (II) RADEON(0): PCIE card detected
>[    21.658] drmOpenDevice: node name is /dev/dri/card0
>[    21.658] drmOpenDevice: open result is 8, (OK)
>[    21.658] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[    21.658] drmOpenDevice: node name is /dev/dri/card0
>[    21.658] drmOpenDevice: open result is 8, (OK)
>[    21.658] drmOpenByBusid: drmOpenMinor returns 8
>[    21.658] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[    21.658] (II) Loading sub module "exa"
>[    21.658] (II) LoadModule: "exa"
>[    21.658] (II) Loading /usr/lib/xorg/modules/libexa.so
>[    21.658] (II) Module exa: vendor="X.Org Foundation"
>[    21.658] 	compiled for 1.12.3, module version = 2.5.0
>[    21.658] 	ABI class: X.Org Video Driver, version 12.0
>[    21.658] (II) RADEON(0): KMS Color Tiling: enabled
>[    21.658] (II) RADEON(0): KMS Pageflipping: enabled
>[    21.658] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    21.661] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    21.691] (II) RADEON(0): Output DVI-0 has no monitor section
>[    21.722] (II) RADEON(0): Output VGA-0 has no monitor section
>[    21.724] (II) RADEON(0): EDID for output HDMI-0
>[    21.754] (II) RADEON(0): EDID for output DVI-0
>[    21.754] (II) RADEON(0): Manufacturer: GSM  Model: 4b70  Serial#: 27925
>[    21.754] (II) RADEON(0): Year: 2008  Week: 3
>[    21.754] (II) RADEON(0): EDID Version: 1.3
>[    21.754] (II) RADEON(0): Digital Display Input
>[    21.754] (II) RADEON(0): Max Image Size [cm]: horiz.: 41  vert.: 26
>[    21.754] (II) RADEON(0): Gamma: 2.20
>[    21.754] (II) RADEON(0): DPMS capabilities: StandBy Suspend Off
>[    21.754] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    21.754] (II) RADEON(0): First detailed timing is preferred mode
>[    21.754] (II) RADEON(0): redX: 0.639 redY: 0.342   greenX: 0.297 greenY: 0.615
>[    21.754] (II) RADEON(0): blueX: 0.146 blueY: 0.068   whiteX: 0.313 whiteY: 0.329
>[    21.754] (II) RADEON(0): Supported established timings:
>[    21.754] (II) RADEON(0): 720x400@70Hz
>[    21.754] (II) RADEON(0): 640x480@60Hz
>[    21.754] (II) RADEON(0): 640x480@75Hz
>[    21.754] (II) RADEON(0): 800x600@56Hz
>[    21.754] (II) RADEON(0): 800x600@60Hz
>[    21.754] (II) RADEON(0): 800x600@75Hz
>[    21.754] (II) RADEON(0): 832x624@75Hz
>[    21.754] (II) RADEON(0): 1024x768@60Hz
>[    21.754] (II) RADEON(0): 1024x768@70Hz
>[    21.754] (II) RADEON(0): 1024x768@75Hz
>[    21.754] (II) RADEON(0): 1280x1024@75Hz
>[    21.754] (II) RADEON(0): 1152x864@75Hz
>[    21.755] (II) RADEON(0): Manufacturer's mask: 0
>[    21.755] (II) RADEON(0): Supported standard timings:
>[    21.755] (II) RADEON(0): #0: hsize: 1440  vsize 900  refresh: 60  vid: 149
>[    21.755] (II) RADEON(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>[    21.755] (II) RADEON(0): #2: hsize: 1280  vsize 960  refresh: 60  vid: 16513
>[    21.755] (II) RADEON(0): #3: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>[    21.755] (II) RADEON(0): Supported detailed timing:
>[    21.755] (II) RADEON(0): clock: 106.5 MHz   Image Size:  408 x 255 mm
>[    21.755] (II) RADEON(0): h_active: 1440  h_sync: 1520  h_sync_end 1672 h_blank_end 1904 h_border: 0
>[    21.755] (II) RADEON(0): v_active: 900  v_sync: 903  v_sync_end 909 v_blanking: 934 v_border: 0
>[    21.755] (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 145 MHz
>[    21.755] (II) RADEON(0): Monitor name: W1942
>[    21.755] (II) RADEON(0): Monitor name: 
>[    21.755] (II) RADEON(0): EDID (in hex):
>[    21.755] (II) RADEON(0): 	00ffffffffffff001e6d704b156d0000
>[    21.755] (II) RADEON(0): 	03120103ea291a78eaa2a5a3574c9d25
>[    21.755] (II) RADEON(0): 	115054a76f80950081808140714f0101
>[    21.755] (II) RADEON(0): 	0101010101019a29a0d0518422305098
>[    21.755] (II) RADEON(0): 	360098ff1000001c000000fd00384b1e
>[    21.755] (II) RADEON(0): 	530e000a202020202020000000fc0057
>[    21.755] (II) RADEON(0): 	313934320a20202020202020000000fc
>[    21.755] (II) RADEON(0): 	000a2020202020202020202020200046
>[    21.755] (II) RADEON(0): Printing probed modes for output DVI-0
>[    21.755] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[    21.755] (II) RADEON(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1440x900"x75.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1366x768"x60.0   85.89  1366 1439 1583 1800  768 769 772 795 -hsync +vsync (47.7 kHz)
>[    21.755] (II) RADEON(0): Modeline "1360x768"x60.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x800"x74.9  106.50  1280 1360 1488 1696  800 803 809 838 -hsync +vsync (62.8 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 +hsync -vsync (49.3 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x768"x74.9  102.25  1280 1360 1488 1696  768 771 778 805 +hsync -vsync (60.3 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1280x768"x60.0   68.25  1280 1328 1360 1440  768 771 778 790 +hsync -vsync (47.4 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    21.755] (II) RADEON(0): Modeline "1024x576"x60.0   46.97  1024 1064 1168 1312  576 577 580 597 -hsync +vsync (35.8 kHz)
>[    21.755] (II) RADEON(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    21.755] (II) RADEON(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    21.755] (II) RADEON(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    21.755] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    21.755] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    21.755] (II) RADEON(0): Modeline "848x480"x60.0   33.75  848 864 976 1088  480 486 494 517 +hsync +vsync (31.0 kHz e)
>[    21.755] (II) RADEON(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    21.755] (II) RADEON(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    21.755] (II) RADEON(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    21.755] (II) RADEON(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    21.786] (II) RADEON(0): EDID for output VGA-0
>[    21.786] (II) RADEON(0): Manufacturer: GSM  Model: 4b6f  Serial#: 196512
>[    21.786] (II) RADEON(0): Year: 2008  Week: 1
>[    21.786] (II) RADEON(0): EDID Version: 1.3
>[    21.786] (II) RADEON(0): Analog Display Input,  Input Voltage Level: 0.700/0.700 V
>[    21.786] (II) RADEON(0): Sync:  Separate  SyncOnGreen
>[    21.786] (II) RADEON(0): Max Image Size [cm]: horiz.: 41  vert.: 26
>[    21.786] (II) RADEON(0): Gamma: 2.20
>[    21.786] (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>[    21.786] (II) RADEON(0): First detailed timing is preferred mode
>[    21.786] (II) RADEON(0): redX: 0.639 redY: 0.342   greenX: 0.297 greenY: 0.615
>[    21.786] (II) RADEON(0): blueX: 0.146 blueY: 0.068   whiteX: 0.313 whiteY: 0.329
>[    21.786] (II) RADEON(0): Supported established timings:
>[    21.786] (II) RADEON(0): 720x400@70Hz
>[    21.786] (II) RADEON(0): 640x480@60Hz
>[    21.786] (II) RADEON(0): 640x480@75Hz
>[    21.786] (II) RADEON(0): 800x600@56Hz
>[    21.786] (II) RADEON(0): 800x600@60Hz
>[    21.786] (II) RADEON(0): 800x600@75Hz
>[    21.786] (II) RADEON(0): 832x624@75Hz
>[    21.786] (II) RADEON(0): 1024x768@60Hz
>[    21.786] (II) RADEON(0): 1024x768@70Hz
>[    21.786] (II) RADEON(0): 1024x768@75Hz
>[    21.786] (II) RADEON(0): 1280x1024@75Hz
>[    21.786] (II) RADEON(0): 1152x864@75Hz
>[    21.786] (II) RADEON(0): Manufacturer's mask: 0
>[    21.786] (II) RADEON(0): Supported standard timings:
>[    21.786] (II) RADEON(0): #0: hsize: 1440  vsize 900  refresh: 75  vid: 3989
>[    21.786] (II) RADEON(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>[    21.786] (II) RADEON(0): #2: hsize: 1280  vsize 960  refresh: 60  vid: 16513
>[    21.786] (II) RADEON(0): #3: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>[    21.786] (II) RADEON(0): Supported detailed timing:
>[    21.786] (II) RADEON(0): clock: 106.5 MHz   Image Size:  408 x 255 mm
>[    21.786] (II) RADEON(0): h_active: 1440  h_sync: 1520  h_sync_end 1672 h_blank_end 1904 h_border: 0
>[    21.786] (II) RADEON(0): v_active: 900  v_sync: 903  v_sync_end 909 v_blanking: 934 v_border: 0
>[    21.786] (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 145 MHz
>[    21.786] (II) RADEON(0): Monitor name: W1942
>[    21.786] (II) RADEON(0): Monitor name: 
>[    21.786] (II) RADEON(0): EDID (in hex):
>[    21.786] (II) RADEON(0): 	00ffffffffffff001e6d6f4ba0ff0200
>[    21.786] (II) RADEON(0): 	011201036a291a78eaa2a5a3574c9d25
>[    21.786] (II) RADEON(0): 	115054a76f80950f81808140714f0101
>[    21.786] (II) RADEON(0): 	0101010101019a29a0d0518422305098
>[    21.786] (II) RADEON(0): 	360098ff1000001c000000fd00384b1e
>[    21.786] (II) RADEON(0): 	530e000a202020202020000000fc0057
>[    21.786] (II) RADEON(0): 	313934320a20202020202020000000fc
>[    21.786] (II) RADEON(0): 	000a202020202020202020202020009b
>[    21.786] (II) RADEON(0): Printing probed modes for output VGA-0
>[    21.786] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[    21.786] (II) RADEON(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1440x900"x75.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1366x768"x60.0   85.89  1366 1439 1583 1800  768 769 772 795 -hsync +vsync (47.7 kHz)
>[    21.786] (II) RADEON(0): Modeline "1360x768"x60.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x800"x74.9  106.50  1280 1360 1488 1696  800 803 809 838 -hsync +vsync (62.8 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 +hsync -vsync (49.7 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x768"x74.9  102.25  1280 1360 1488 1696  768 771 778 805 +hsync -vsync (60.3 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1280x768"x59.9   79.50  1280 1344 1472 1664  768 771 778 798 -hsync +vsync (47.8 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    21.786] (II) RADEON(0): Modeline "1024x576"x60.0   46.97  1024 1064 1168 1312  576 577 580 597 -hsync +vsync (35.8 kHz)
>[    21.786] (II) RADEON(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    21.786] (II) RADEON(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    21.786] (II) RADEON(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    21.786] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    21.786] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    21.786] (II) RADEON(0): Modeline "848x480"x60.0   33.75  848 864 976 1088  480 486 494 517 +hsync +vsync (31.0 kHz e)
>[    21.786] (II) RADEON(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    21.786] (II) RADEON(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    21.786] (II) RADEON(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    21.786] (II) RADEON(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    21.786] (II) RADEON(0): Output HDMI-0 disconnected
>[    21.786] (II) RADEON(0): Output DVI-0 connected
>[    21.786] (II) RADEON(0): Output VGA-0 connected
>[    21.786] (II) RADEON(0): Using spanning desktop for initial modes
>[    21.787] (II) RADEON(0): Output DVI-0 using initial mode 1440x900 +0+0
>[    21.787] (II) RADEON(0): Output VGA-0 using initial mode 1440x900 +1440+0
>[    21.787] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    21.787] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:80000000 visible:faac000
>[    21.787] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    21.787] (==) RADEON(0): DPI set to (96, 96)
>[    21.787] (II) Loading sub module "fb"
>[    21.787] (II) LoadModule: "fb"
>[    21.787] (II) Loading /usr/lib/xorg/modules/libfb.so
>[    21.787] (II) Module fb: vendor="X.Org Foundation"
>[    21.787] 	compiled for 1.12.3, module version = 1.0.0
>[    21.787] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    21.787] (II) Loading sub module "ramdac"
>[    21.787] (II) LoadModule: "ramdac"
>[    21.787] (II) Module "ramdac" already built-in
>[    21.787] (II) UnloadModule: "vesa"
>[    21.787] (II) Unloading vesa
>[    21.787] (II) UnloadModule: "fbdev"
>[    21.787] (II) Unloading fbdev
>[    21.787] (II) UnloadSubModule: "fbdevhw"
>[    21.787] (II) Unloading fbdevhw
>[    21.787] (--) Depth 24 pixmap format is 32 bpp
>[    21.787] (II) RADEON(0): [DRI2] Setup complete
>[    21.787] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    21.787] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    21.787] (II) RADEON(0): Front buffer size: 10172K
>[    21.787] (II) RADEON(0): VRAM usage limit set to 221864K
>[    21.787] (II) RADEON(0): Initializing backing store
>[    21.787] (==) RADEON(0): Backing store disabled
>[    21.787] (II) RADEON(0): Direct rendering enabled
>[    21.787] (II) RADEON(0): Initializing Acceleration
>[    21.787] (II) RADEON(0): Setting EXA maxPitchBytes
>[    21.787] (II) EXA(0): Driver allocated offscreen pixmaps
>[    21.787] (II) EXA(0): Driver registered support for the following operations:
>[    21.787] (II)         Solid
>[    21.788] (II)         Copy
>[    21.788] (II)         Composite (RENDER acceleration)
>[    21.788] (II)         UploadToScreen
>[    21.788] (II)         DownloadFromScreen
>[    21.788] (II) RADEON(0): Acceleration enabled
>[    21.788] (II) RADEON(0): Initializing DPMS
>[    21.788] (==) RADEON(0): DPMS enabled
>[    21.788] (II) RADEON(0): Initializing Cursor
>[    21.788] (==) RADEON(0): Silken mouse enabled
>[    21.788] (II) RADEON(0): Initializing Xv
>[    21.788] (II) RADEON(0): Set up textured video
>[    21.788] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    21.788] (II) RADEON(0): [XvMC] Extension initialized.
>[    21.788] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    21.788] (II) RADEON(0): Initializing kms color map
>[    21.788] (II) RADEON(0): RADEONScreenInit finished
>[    21.788] (--) RandR disabled
>[    21.788] (II) Initializing built-in extension Generic Event Extension
>[    21.788] (II) Initializing built-in extension SHAPE
>[    21.788] (II) Initializing built-in extension MIT-SHM
>[    21.788] (II) Initializing built-in extension XInputExtension
>[    21.788] (II) Initializing built-in extension XTEST
>[    21.788] (II) Initializing built-in extension BIG-REQUESTS
>[    21.788] (II) Initializing built-in extension SYNC
>[    21.788] (II) Initializing built-in extension XKEYBOARD
>[    21.788] (II) Initializing built-in extension XC-MISC
>[    21.788] (II) Initializing built-in extension XINERAMA
>[    21.788] (II) Initializing built-in extension XFIXES
>[    21.788] (II) Initializing built-in extension RENDER
>[    21.788] (II) Initializing built-in extension RANDR
>[    21.788] (II) Initializing built-in extension COMPOSITE
>[    21.788] (II) Initializing built-in extension DAMAGE
>[    21.789] (II) SELinux: Disabled by boolean
>[    22.307] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    22.307] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    22.307] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    22.307] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    22.308] (II) AIGLX: Loaded and initialized r600
>[    22.308] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    22.317] (II) RADEON(0): Setting screen physical size to 761 x 238
>[    22.395] (II) XKB: Reusing cached keymap
>[    22.398] (II) config/udev: Adding input device Power Button (/dev/input/event1)
>[    22.398] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    22.398] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    22.398] (II) LoadModule: "evdev"
>[    22.398] (II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>[    22.398] (II) Module evdev: vendor="X.Org Foundation"
>[    22.398] 	compiled for 1.12.0, module version = 2.7.0
>[    22.398] 	Module class: X.Org XInput Driver
>[    22.398] 	ABI class: X.Org XInput driver, version 16.0
>[    22.398] (II) Using input driver 'evdev' for 'Power Button'
>[    22.398] 	Option "XkbRules" "evdev"
>[    22.398] 	Option "XkbModel" "pc105+inet"
>[    22.398] 	Option "XkbLayout" "us"
>[    22.398] 	Option "_source" "server/udev"
>[    22.398] 	Option "name" "Power Button"
>[    22.398] 	Option "path" "/dev/input/event1"
>[    22.398] 	Option "device" "/dev/input/event1"
>[    22.398] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1"
>[    22.398] 	Option "driver" "evdev"
>[    22.398] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    22.398] (**) Power Button: always reports core events
>[    22.398] (**) evdev: Power Button: Device: "/dev/input/event1"
>[    22.398] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    22.398] (--) evdev: Power Button: Found keys
>[    22.398] (II) evdev: Power Button: Configuring as keyboard
>[    22.398] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1"
>[    22.399] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    22.399] (**) Option "xkb_rules" "evdev"
>[    22.399] (**) Option "xkb_model" "pc105+inet"
>[    22.399] (**) Option "xkb_layout" "us"
>[    22.399] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    22.424] (II) config/udev: Adding input device Sleep Button (/dev/input/event0)
>[    22.424] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    22.424] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    22.424] (II) Using input driver 'evdev' for 'Sleep Button'
>[    22.424] 	Option "XkbRules" "evdev"
>[    22.424] 	Option "XkbModel" "pc105+inet"
>[    22.424] 	Option "XkbLayout" "us"
>[    22.424] 	Option "_source" "server/udev"
>[    22.424] 	Option "name" "Sleep Button"
>[    22.424] 	Option "path" "/dev/input/event0"
>[    22.424] 	Option "device" "/dev/input/event0"
>[    22.424] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[    22.424] 	Option "driver" "evdev"
>[    22.424] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    22.424] (**) Sleep Button: always reports core events
>[    22.424] (**) evdev: Sleep Button: Device: "/dev/input/event0"
>[    22.424] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    22.424] (--) evdev: Sleep Button: Found keys
>[    22.424] (II) evdev: Sleep Button: Configuring as keyboard
>[    22.424] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[    22.424] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 7)
>[    22.424] (**) Option "xkb_rules" "evdev"
>[    22.424] (**) Option "xkb_model" "pc105+inet"
>[    22.424] (**) Option "xkb_layout" "us"
>[    22.424] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    22.424] (II) XKB: Reusing cached keymap
>[    22.425] (II) config/udev: Adding input device HD-Audio Generic HDMI/DP,pcm=3 (/dev/input/event9)
>[    22.425] (II) No input driver specified, ignoring this device.
>[    22.425] (II) This device may have been added with another device file.
>[    22.425] (II) config/udev: Adding input device HDA Intel Line (/dev/input/event4)
>[    22.425] (II) No input driver specified, ignoring this device.
>[    22.425] (II) This device may have been added with another device file.
>[    22.425] (II) config/udev: Adding input device HDA Intel Front Mic (/dev/input/event5)
>[    22.425] (II) No input driver specified, ignoring this device.
>[    22.425] (II) This device may have been added with another device file.
>[    22.426] (II) config/udev: Adding input device HDA Intel Rear Mic (/dev/input/event6)
>[    22.426] (II) No input driver specified, ignoring this device.
>[    22.426] (II) This device may have been added with another device file.
>[    22.426] (II) config/udev: Adding input device HDA Intel Front Headphone (/dev/input/event7)
>[    22.426] (II) No input driver specified, ignoring this device.
>[    22.426] (II) This device may have been added with another device file.
>[    22.426] (II) config/udev: Adding input device HDA Intel Line Out (/dev/input/event8)
>[    22.426] (II) No input driver specified, ignoring this device.
>[    22.426] (II) This device may have been added with another device file.
>[    22.426] (II) config/udev: Adding input device Logitech USB-PS/2 Optical Mouse (/dev/input/event2)
>[    22.426] (**) Logitech USB-PS/2 Optical Mouse: Applying InputClass "evdev pointer catchall"
>[    22.427] (II) Using input driver 'evdev' for 'Logitech USB-PS/2 Optical Mouse'
>[    22.427] 	Option "XkbRules" "evdev"
>[    22.427] 	Option "XkbModel" "evdev"
>[    22.427] 	Option "XkbLayout" "us"
>[    22.427] 	Option "_source" "server/udev"
>[    22.427] 	Option "name" "Logitech USB-PS/2 Optical Mouse"
>[    22.427] 	Option "path" "/dev/input/event2"
>[    22.427] 	Option "device" "/dev/input/event2"
>[    22.427] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.1/usb7/7-2/7-2:1.0/input/input2/event2"
>[    22.427] 	Option "driver" "evdev"
>[    22.427] (**) Logitech USB-PS/2 Optical Mouse: always reports core events
>[    22.427] (**) evdev: Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event2"
>[    22.427] (--) evdev: Logitech USB-PS/2 Optical Mouse: Vendor 0x46d Product 0xc050
>[    22.427] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found 12 mouse buttons
>[    22.427] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found scroll wheel(s)
>[    22.427] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found relative axes
>[    22.427] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found x and y relative axes
>[    22.427] (II) evdev: Logitech USB-PS/2 Optical Mouse: Configuring as mouse
>[    22.427] (II) evdev: Logitech USB-PS/2 Optical Mouse: Adding scrollwheel support
>[    22.427] (**) evdev: Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5
>[    22.427] (**) evdev: Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    22.427] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.1/usb7/7-2/7-2:1.0/input/input2/event2"
>[    22.427] (II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE, id 8)
>[    22.427] (II) evdev: Logitech USB-PS/2 Optical Mouse: initialized for relative axes.
>[    22.427] (**) Logitech USB-PS/2 Optical Mouse: (accel) keeping acceleration scheme 1
>[    22.427] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration profile 0
>[    22.427] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration factor: 2.000
>[    22.427] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration threshold: 4
>[    22.427] (II) config/udev: Adding input device Logitech USB-PS/2 Optical Mouse (/dev/input/mouse0)
>[    22.427] (II) No input driver specified, ignoring this device.
>[    22.427] (II) This device may have been added with another device file.
>[    22.428] (II) config/udev: Adding input device LITEON Technology USB Multimedia Keyboard (/dev/input/event3)
>[    22.428] (**) LITEON Technology USB Multimedia Keyboard: Applying InputClass "evdev keyboard catchall"
>[    22.428] (**) LITEON Technology USB Multimedia Keyboard: Applying InputClass "system-setup-keyboard"
>[    22.428] (II) Using input driver 'evdev' for 'LITEON Technology USB Multimedia Keyboard'
>[    22.428] 	Option "XkbRules" "evdev"
>[    22.428] 	Option "XkbModel" "pc105+inet"
>[    22.428] 	Option "XkbLayout" "us"
>[    22.428] 	Option "_source" "server/udev"
>[    22.428] 	Option "name" "LITEON Technology USB Multimedia Keyboard"
>[    22.428] 	Option "path" "/dev/input/event3"
>[    22.428] 	Option "device" "/dev/input/event3"
>[    22.428] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.2/usb8/8-2/8-2:1.0/input/input3/event3"
>[    22.428] 	Option "driver" "evdev"
>[    22.428] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    22.428] (**) LITEON Technology USB Multimedia Keyboard: always reports core events
>[    22.428] (**) evdev: LITEON Technology USB Multimedia Keyboard: Device: "/dev/input/event3"
>[    22.428] (--) evdev: LITEON Technology USB Multimedia Keyboard: Vendor 0x46d Product 0xc312
>[    22.428] (--) evdev: LITEON Technology USB Multimedia Keyboard: Found keys
>[    22.428] (II) evdev: LITEON Technology USB Multimedia Keyboard: Configuring as keyboard
>[    22.428] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.2/usb8/8-2/8-2:1.0/input/input3/event3"
>[    22.428] (II) XINPUT: Adding extended input device "LITEON Technology USB Multimedia Keyboard" (type: KEYBOARD, id 9)
>[    22.428] (**) Option "xkb_rules" "evdev"
>[    22.428] (**) Option "xkb_model" "pc105+inet"
>[    22.428] (**) Option "xkb_layout" "us"
>[    22.428] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    22.428] (II) XKB: Reusing cached keymap
>[    22.434] (II) RADEON(0): RADEONSaveScreen(2)
>[    22.500] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[    22.500] (II) RADEON(0): Using EDID range info for horizontal sync
>[    22.500] (II) RADEON(0): Using EDID range info for vertical refresh
>[    22.500] (II) RADEON(0): Printing DDC gathered Modelines:
>[    22.500] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[    22.500] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    22.500] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    22.500] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    22.500] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    22.500] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    22.500] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    22.500] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    22.500] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    23.852] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[    23.852] (II) RADEON(0): Using hsync ranges from config file
>[    23.852] (II) RADEON(0): Using vrefresh ranges from config file
>[    23.852] (II) RADEON(0): Printing DDC gathered Modelines:
>[    23.852] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[    23.852] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    23.852] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    23.852] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    23.852] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    23.852] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    23.852] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    23.852] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    23.852] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    23.852] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    23.853] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    23.853] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    23.853] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    23.853] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[    23.853] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    23.853] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    25.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373c08]
>[    25.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373c08] width 2880 pitch 11520 (/4 2880)
>[    25.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373c08]
>[    25.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373c08] width 2880 pitch 11520 (/4 2880)
>[    25.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    25.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    25.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    25.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    25.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    26.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b40]
>[    26.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b40] width 2880 pitch 11520 (/4 2880)
>[    26.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9373b10]
>[    26.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9373b10] width 2880 pitch 11520 (/4 2880)
>[    42.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374aa8]
>[    42.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374aa8] width 2880 pitch 11520 (/4 2880)
>[   102.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374a78]
>[   102.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374a78] width 2880 pitch 11520 (/4 2880)
>[   134.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   134.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   134.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   134.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   134.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b18]
>[   135.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b18] width 2880 pitch 11520 (/4 2880)
>[   135.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9374b48]
>[   135.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9374b48] width 2880 pitch 11520 (/4 2880)
>[   135.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   135.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   135.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   135.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   135.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   135.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   135.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   135.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   135.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   136.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   136.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   137.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   137.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   137.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   137.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   137.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   137.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   137.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   137.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   138.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   138.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   139.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   139.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   140.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   140.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   140.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   140.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   140.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   140.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   140.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   140.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   140.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   140.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   141.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   141.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   141.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   141.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   142.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   142.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   142.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   142.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   142.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   142.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   142.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9378ab8]
>[   142.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9378ab8] width 2880 pitch 11520 (/4 2880)
>[   145.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   145.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   147.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   147.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   148.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   148.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   148.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   148.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   148.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   148.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   148.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   148.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   148.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   148.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   148.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   148.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   149.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   149.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   149.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   149.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   149.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   149.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   149.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   149.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   150.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   150.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   150.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   150.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   150.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   150.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   150.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f30]
>[   150.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f30] width 2880 pitch 11520 (/4 2880)
>[   151.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9162f70]
>[   151.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9162f70] width 2880 pitch 11520 (/4 2880)
>[   154.159] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[   154.159] (II) RADEON(0): Using hsync ranges from config file
>[   154.159] (II) RADEON(0): Using vrefresh ranges from config file
>[   154.159] (II) RADEON(0): Printing DDC gathered Modelines:
>[   154.159] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[   154.159] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   154.159] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   154.159] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   154.159] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   154.159] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   154.160] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   154.160] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   154.160] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   155.939] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[   155.939] (II) RADEON(0): Using hsync ranges from config file
>[   155.939] (II) RADEON(0): Using vrefresh ranges from config file
>[   155.939] (II) RADEON(0): Printing DDC gathered Modelines:
>[   155.939] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[   155.939] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   155.939] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   155.939] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   155.939] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   155.939] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   155.939] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   155.939] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   155.940] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   155.940] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   155.940] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   158.516] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[   158.516] (II) RADEON(0): Using hsync ranges from config file
>[   158.516] (II) RADEON(0): Using vrefresh ranges from config file
>[   158.516] (II) RADEON(0): Printing DDC gathered Modelines:
>[   158.516] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[   158.516] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   158.516] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   158.516] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   158.516] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   158.516] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   158.516] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   158.516] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   158.516] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   172.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c6c10]
>[   172.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c6c10] width 2880 pitch 11520 (/4 2880)
>[   172.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3cf8]
>[   172.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3cf8] width 2880 pitch 11520 (/4 2880)
>[   172.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3ed0]
>[   172.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3ed0] width 2880 pitch 11520 (/4 2880)
>[   172.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3ed0]
>[   172.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3ed0] width 2880 pitch 11520 (/4 2880)
>[   172.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c4790]
>[   173.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c4790] width 2880 pitch 11520 (/4 2880)
>[   174.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c96a0]
>[   174.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c96a0] width 2880 pitch 11520 (/4 2880)
>[   174.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3ea0]
>[   174.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3ea0] width 2880 pitch 11520 (/4 2880)
>[   174.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3e70]
>[   174.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3e70] width 2880 pitch 11520 (/4 2880)
>[   175.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3ea0]
>[   175.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3ea0] width 2880 pitch 11520 (/4 2880)
>[   176.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c96d8]
>[   176.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c96d8] width 2880 pitch 11520 (/4 2880)
>[   176.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1250]
>[   176.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1250] width 2880 pitch 11520 (/4 2880)
>[   176.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1280]
>[   176.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1280] width 2880 pitch 11520 (/4 2880)
>[   176.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1250]
>[   176.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1250] width 2880 pitch 11520 (/4 2880)
>[   176.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1280]
>[   176.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1280] width 2880 pitch 11520 (/4 2880)
>[   176.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1250]
>[   176.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1250] width 2880 pitch 11520 (/4 2880)
>[   176.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d1238]
>[   176.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d1238] width 2880 pitch 11520 (/4 2880)
>[   177.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   177.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   177.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eef60]
>[   177.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eef60] width 2880 pitch 11520 (/4 2880)
>[   177.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ca158]
>[   177.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ca158] width 2880 pitch 11520 (/4 2880)
>[   177.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93efdf0]
>[   177.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93efdf0] width 2880 pitch 11520 (/4 2880)
>[   206.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   206.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   206.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415640]
>[   206.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415640] width 2880 pitch 11520 (/4 2880)
>[   207.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   207.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416388]
>[   207.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416388] width 2880 pitch 11520 (/4 2880)
>[   207.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   207.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416388]
>[   207.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416388] width 2880 pitch 11520 (/4 2880)
>[   207.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   207.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416388]
>[   207.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416388] width 2880 pitch 11520 (/4 2880)
>[   207.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   207.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416388]
>[   207.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416388] width 2880 pitch 11520 (/4 2880)
>[   207.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   207.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416388]
>[   207.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416388] width 2880 pitch 11520 (/4 2880)
>[   207.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   207.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   208.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   208.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   208.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   208.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   208.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   208.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   208.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   208.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   208.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   208.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   208.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   208.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   209.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9412c98]
>[   209.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9412c98] width 2880 pitch 11520 (/4 2880)
>[   209.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94156a0]
>[   209.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94156a0] width 2880 pitch 11520 (/4 2880)
>[   209.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   209.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9b90]
>[   209.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9b90] width 2880 pitch 11520 (/4 2880)
>[   209.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   209.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9b90]
>[   209.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9b90] width 2880 pitch 11520 (/4 2880)
>[   209.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   209.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9b90]
>[   209.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9b90] width 2880 pitch 11520 (/4 2880)
>[   209.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   209.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9b90]
>[   209.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9b90] width 2880 pitch 11520 (/4 2880)
>[   209.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   209.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9bd0]
>[   209.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9bd0] width 2880 pitch 11520 (/4 2880)
>[   209.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9415f90]
>[   209.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9415f90] width 2880 pitch 11520 (/4 2880)
>[   211.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416358]
>[   211.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416358] width 2880 pitch 11520 (/4 2880)
>[   211.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6198]
>[   211.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6198] width 2880 pitch 11520 (/4 2880)
>[   214.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9416100]
>[   214.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9416100] width 2880 pitch 11520 (/4 2880)
>[   214.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   214.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   214.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   214.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   214.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   215.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   215.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   215.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   215.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   215.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f4660]
>[   215.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f4660] width 2880 pitch 11520 (/4 2880)
>[   215.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0778]
>[   215.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0778] width 2880 pitch 11520 (/4 2880)
>[   236.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   236.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   236.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   236.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   236.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   236.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   236.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   236.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   236.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   237.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   237.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   237.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   237.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   237.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   237.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   237.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   237.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   237.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   237.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   237.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   237.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   237.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   237.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   237.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   238.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   238.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   238.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   238.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   238.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   238.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   238.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   238.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   238.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   238.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   238.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   238.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   238.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   238.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   238.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   238.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   238.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   238.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   238.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   238.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   241.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   241.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   241.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   241.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf510]
>[   241.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf510] width 2880 pitch 11520 (/4 2880)
>[   241.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf510]
>[   241.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf510] width 2880 pitch 11520 (/4 2880)
>[   241.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf510]
>[   241.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf510] width 2880 pitch 11520 (/4 2880)
>[   241.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   241.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   241.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   241.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   242.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   242.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   243.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   243.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   246.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   246.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   246.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   246.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   246.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   246.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   246.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   246.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   246.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   246.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   246.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   246.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   248.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93def78]
>[   248.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93def78] width 2880 pitch 11520 (/4 2880)
>[   248.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   248.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   248.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[   248.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[   248.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   248.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   248.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   248.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   248.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   248.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   248.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   248.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   248.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   248.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   248.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   248.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   248.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   248.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   248.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   248.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   248.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   248.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   249.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   249.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   249.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   249.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   249.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   249.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   249.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   249.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   249.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   249.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   249.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   249.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   254.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940f898]
>[   254.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940f898] width 2880 pitch 11520 (/4 2880)
>[   254.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[   254.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[   255.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c7a10]
>[   255.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c7a10] width 2880 pitch 11520 (/4 2880)
>[   255.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c8ad0]
>[   255.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c8ad0] width 2880 pitch 11520 (/4 2880)
>[   255.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423638]
>[   255.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423638] width 2880 pitch 11520 (/4 2880)
>[   255.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e7080]
>[   255.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e7080] width 2880 pitch 11520 (/4 2880)
>[   255.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423638]
>[   255.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423638] width 2880 pitch 11520 (/4 2880)
>[   255.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e7080]
>[   255.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e7080] width 2880 pitch 11520 (/4 2880)
>[   255.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423638]
>[   255.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423638] width 2880 pitch 11520 (/4 2880)
>[   260.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c8348]
>[   260.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c8348] width 2880 pitch 11520 (/4 2880)
>[   289.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a878]
>[   289.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a878] width 2880 pitch 11520 (/4 2880)
>[   289.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9920]
>[   289.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9920] width 2880 pitch 11520 (/4 2880)
>[   289.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a878]
>[   289.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a878] width 2880 pitch 11520 (/4 2880)
>[   289.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9920]
>[   289.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9920] width 2880 pitch 11520 (/4 2880)
>[   289.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a878]
>[   289.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a878] width 2880 pitch 11520 (/4 2880)
>[   289.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9920]
>[   289.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9920] width 2880 pitch 11520 (/4 2880)
>[   289.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   289.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   289.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a8a8]
>[   289.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a8a8] width 2880 pitch 11520 (/4 2880)
>[   289.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a878]
>[   289.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a878] width 2880 pitch 11520 (/4 2880)
>[   289.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a878]
>[   289.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a878] width 2880 pitch 11520 (/4 2880)
>[   289.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94424c8]
>[   289.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94424c8] width 2880 pitch 11520 (/4 2880)
>[   289.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94424c8]
>[   289.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94424c8] width 2880 pitch 11520 (/4 2880)
>[   289.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94428c8]
>[   289.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94428c8] width 2880 pitch 11520 (/4 2880)
>[   289.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93de5c8]
>[   289.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93de5c8] width 2880 pitch 11520 (/4 2880)
>[   290.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ea48]
>[   290.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ea48] width 2880 pitch 11520 (/4 2880)
>[   291.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   291.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   292.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f02a8]
>[   292.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f02a8] width 2880 pitch 11520 (/4 2880)
>[   292.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[   292.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[   292.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f02a8]
>[   292.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f02a8] width 2880 pitch 11520 (/4 2880)
>[   292.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   292.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   292.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f02a8]
>[   292.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f02a8] width 2880 pitch 11520 (/4 2880)
>[   292.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   292.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   292.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f02a8]
>[   292.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f02a8] width 2880 pitch 11520 (/4 2880)
>[   292.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   292.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   292.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92f02a8]
>[   292.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92f02a8] width 2880 pitch 11520 (/4 2880)
>[   292.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440300]
>[   292.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440300] width 2880 pitch 11520 (/4 2880)
>[   294.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9462908]
>[   294.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9462908] width 2880 pitch 11520 (/4 2880)
>[   294.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460f80]
>[   294.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460f80] width 2880 pitch 11520 (/4 2880)
>[   294.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   294.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   294.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   294.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   294.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   294.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   294.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   294.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   294.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   294.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   294.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   294.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   294.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   294.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   294.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   295.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   295.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   295.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   295.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   295.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   295.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   295.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   295.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   295.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   295.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   295.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   295.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460d20]
>[   295.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460d20] width 2880 pitch 11520 (/4 2880)
>[   295.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472af8]
>[   295.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472af8] width 2880 pitch 11520 (/4 2880)
>[   296.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9500bc8]
>[   296.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9500bc8] width 2880 pitch 11520 (/4 2880)
>[   316.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9473638]
>[   316.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9473638] width 2880 pitch 11520 (/4 2880)
>[   316.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94644c8]
>[   316.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94644c8] width 2880 pitch 11520 (/4 2880)
>[   316.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   316.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94651b0]
>[   316.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94651b0] width 2880 pitch 11520 (/4 2880)
>[   316.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   316.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   328.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c8788]
>[   328.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c8788] width 2880 pitch 11520 (/4 2880)
>[   333.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   333.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   333.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   333.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   333.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   333.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   333.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   333.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   333.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   333.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   333.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   333.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   333.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   333.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   333.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   333.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   333.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   333.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   334.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   334.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   334.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   334.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   334.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   334.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   334.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   334.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   334.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   334.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   334.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   334.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   334.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   334.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   334.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ed560]
>[   334.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ed560] width 2880 pitch 11520 (/4 2880)
>[   335.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9476038]
>[   335.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9476038] width 2880 pitch 11520 (/4 2880)
>[   335.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9510f28]
>[   335.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9510f28] width 2880 pitch 11520 (/4 2880)
>[   335.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   335.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   335.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9510f28]
>[   335.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9510f28] width 2880 pitch 11520 (/4 2880)
>[   335.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   335.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   335.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9510f28]
>[   335.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9510f28] width 2880 pitch 11520 (/4 2880)
>[   335.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   335.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   335.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9476118]
>[   335.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9476118] width 2880 pitch 11520 (/4 2880)
>[   335.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9419730]
>[   335.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9419730] width 2880 pitch 11520 (/4 2880)
>[   335.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945cce0]
>[   336.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945cce0] width 2880 pitch 11520 (/4 2880)
>[   345.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d778]
>[   345.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d778] width 2880 pitch 11520 (/4 2880)
>[   345.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461cb8]
>[   345.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461cb8] width 2880 pitch 11520 (/4 2880)
>[   345.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940e9c8]
>[   345.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940e9c8] width 2880 pitch 11520 (/4 2880)
>[   345.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465ad8]
>[   345.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465ad8] width 2880 pitch 11520 (/4 2880)
>[   345.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513e60]
>[   345.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513e60] width 2880 pitch 11520 (/4 2880)
>[   345.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440ee0]
>[   345.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440ee0] width 2880 pitch 11520 (/4 2880)
>[   345.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408950]
>[   345.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408950] width 2880 pitch 11520 (/4 2880)
>[   345.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94604d0]
>[   345.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94604d0] width 2880 pitch 11520 (/4 2880)
>[   345.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   345.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   345.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940e9c8]
>[   345.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940e9c8] width 2880 pitch 11520 (/4 2880)
>[   346.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9be0]
>[   346.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9be0] width 2880 pitch 11520 (/4 2880)
>[   347.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513e60]
>[   347.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513e60] width 2880 pitch 11520 (/4 2880)
>[   347.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   347.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   347.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   347.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   347.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   347.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   347.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   347.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   347.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   347.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   347.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   347.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   347.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   347.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   347.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   347.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   347.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   348.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   348.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   348.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   348.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   349.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   349.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   349.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   349.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   349.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440bf0]
>[   349.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440bf0] width 2880 pitch 11520 (/4 2880)
>[   349.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[   349.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[   349.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   349.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   349.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[   349.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[   349.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   349.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   349.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[   349.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[   349.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[   349.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[   349.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[   349.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[   352.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ba8c0]
>[   352.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ba8c0] width 2880 pitch 11520 (/4 2880)
>[   366.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a718]
>[   366.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a718] width 2880 pitch 11520 (/4 2880)
>[   366.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1450]
>[   366.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1450] width 2880 pitch 11520 (/4 2880)
>[   367.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a468]
>[   367.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a468] width 2880 pitch 11520 (/4 2880)
>[   367.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   367.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   367.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   367.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   367.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   367.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   367.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   367.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   367.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   367.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   367.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   367.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   367.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   367.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   367.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   367.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   367.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   369.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   369.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   369.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   369.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   369.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   369.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   369.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   369.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   369.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   369.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   372.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   372.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   372.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   372.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   374.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   374.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   374.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   374.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   375.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9143848]
>[   375.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9143848] width 2880 pitch 11520 (/4 2880)
>[   375.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   375.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   375.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386f08]
>[   375.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386f08] width 2880 pitch 11520 (/4 2880)
>[   375.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386ed8]
>[   375.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386ed8] width 2880 pitch 11520 (/4 2880)
>[   375.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386f08]
>[   375.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386f08] width 2880 pitch 11520 (/4 2880)
>[   376.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386ed8]
>[   376.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386ed8] width 2880 pitch 11520 (/4 2880)
>[   376.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a5c8]
>[   376.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a5c8] width 2880 pitch 11520 (/4 2880)
>[   376.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386ed8]
>[   376.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386ed8] width 2880 pitch 11520 (/4 2880)
>[   376.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a5c8]
>[   376.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a5c8] width 2880 pitch 11520 (/4 2880)
>[   376.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386ed8]
>[   376.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386ed8] width 2880 pitch 11520 (/4 2880)
>[   376.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a5c8]
>[   376.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a5c8] width 2880 pitch 11520 (/4 2880)
>[   381.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c8a8]
>[   381.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c8a8] width 2880 pitch 11520 (/4 2880)
>[   381.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417830]
>[   381.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417830] width 2880 pitch 11520 (/4 2880)
>[   381.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e290]
>[   381.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e290] width 2880 pitch 11520 (/4 2880)
>[   381.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d2e8]
>[   381.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d2e8] width 2880 pitch 11520 (/4 2880)
>[   381.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e290]
>[   381.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e290] width 2880 pitch 11520 (/4 2880)
>[   381.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950b340]
>[   381.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950b340] width 2880 pitch 11520 (/4 2880)
>[   381.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d420]
>[   381.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d420] width 2880 pitch 11520 (/4 2880)
>[   381.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   381.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   381.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   381.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   381.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950b340]
>[   381.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950b340] width 2880 pitch 11520 (/4 2880)
>[   381.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945cb38]
>[   381.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945cb38] width 2880 pitch 11520 (/4 2880)
>[   381.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   381.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   381.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   381.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   381.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d420]
>[   382.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d420] width 2880 pitch 11520 (/4 2880)
>[   382.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401660]
>[   382.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401660] width 2880 pitch 11520 (/4 2880)
>[   382.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0e58]
>[   382.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0e58] width 2880 pitch 11520 (/4 2880)
>[   382.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0e88]
>[   382.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0e88] width 2880 pitch 11520 (/4 2880)
>[   382.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401138]
>[   382.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401138] width 2880 pitch 11520 (/4 2880)
>[   382.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   383.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   383.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   383.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   383.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f0e58]
>[   383.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f0e58] width 2880 pitch 11520 (/4 2880)
>[   383.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401138]
>[   383.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401138] width 2880 pitch 11520 (/4 2880)
>[   383.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   383.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   383.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   383.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   383.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   383.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   383.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   383.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   383.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   383.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   383.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   383.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   383.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3f0]
>[   383.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3f0] width 2880 pitch 11520 (/4 2880)
>[   383.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d288]
>[   383.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d288] width 2880 pitch 11520 (/4 2880)
>[   383.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a828]
>[   383.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a828] width 2880 pitch 11520 (/4 2880)
>[   391.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94877c0]
>[   391.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94877c0] width 2880 pitch 11520 (/4 2880)
>[   397.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   397.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9487790]
>[   397.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9487790] width 2880 pitch 11520 (/4 2880)
>[   397.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94847b0]
>[   397.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94847b0] width 2880 pitch 11520 (/4 2880)
>[   406.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   406.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   406.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   406.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3338]
>[   406.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3338] width 2880 pitch 11520 (/4 2880)
>[   435.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a7518]
>[   435.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a7518] width 2880 pitch 11520 (/4 2880)
>[   437.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   437.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   437.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   437.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   437.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   437.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6fe8]
>[   437.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6fe8] width 2880 pitch 11520 (/4 2880)
>[   447.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   447.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b748]
>[   447.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b748] width 2880 pitch 11520 (/4 2880)
>[   447.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x948b248]
>[   447.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x948b248] width 2880 pitch 11520 (/4 2880)
>[   457.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   457.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   458.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   458.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   458.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   458.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   458.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   458.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   458.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   458.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   458.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   458.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   458.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   458.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   459.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bac60]
>[   459.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bac60] width 2880 pitch 11520 (/4 2880)
>[   459.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408c00]
>[   459.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408c00] width 2880 pitch 11520 (/4 2880)
>[   459.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485210]
>[   459.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485210] width 2880 pitch 11520 (/4 2880)
>[   459.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9500c90]
>[   459.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9500c90] width 2880 pitch 11520 (/4 2880)
>[   459.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485210]
>[   459.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485210] width 2880 pitch 11520 (/4 2880)
>[   459.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9500c90]
>[   459.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9500c90] width 2880 pitch 11520 (/4 2880)
>[   459.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485210]
>[   459.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485210] width 2880 pitch 11520 (/4 2880)
>[   459.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9500c90]
>[   459.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9500c90] width 2880 pitch 11520 (/4 2880)
>[   459.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485210]
>[   459.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485210] width 2880 pitch 11520 (/4 2880)
>[   459.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9500c90]
>[   459.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9500c90] width 2880 pitch 11520 (/4 2880)
>[   471.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386d20]
>[   471.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386d20] width 2880 pitch 11520 (/4 2880)
>[   473.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9418950]
>[   473.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9418950] width 2880 pitch 11520 (/4 2880)
>[   473.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d3b0]
>[   473.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d3b0] width 2880 pitch 11520 (/4 2880)
>[   474.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   474.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   474.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   474.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523468]
>[   474.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523468] width 2880 pitch 11520 (/4 2880)
>[   475.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a718]
>[   475.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a718] width 2880 pitch 11520 (/4 2880)
>[   475.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9345578]
>[   475.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9345578] width 2880 pitch 11520 (/4 2880)
>[   475.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   475.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   475.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   475.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   475.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   475.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   475.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   475.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   475.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   475.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   475.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   475.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   475.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   476.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   476.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   476.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   476.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   476.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   476.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f1028]
>[   476.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f1028] width 2880 pitch 11520 (/4 2880)
>[   476.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   476.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   487.046] (II) AIGLX: Suspending AIGLX clients for VT switch
>[   487.046] (II) RADEON(0): RADEONLeaveVT_KMS
>[   487.046] (II) RADEON(0): Ok, leaving now...
>[   487.787] (II) AIGLX: Resuming AIGLX clients after VT switch
>[   487.787] (II) RADEON(0): RADEONEnterVT_KMS
>[   487.862] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[   487.862] (II) RADEON(0): Using hsync ranges from config file
>[   487.862] (II) RADEON(0): Using vrefresh ranges from config file
>[   487.862] (II) RADEON(0): Printing DDC gathered Modelines:
>[   487.862] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[   487.862] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   487.862] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   487.862] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   487.862] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   487.862] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   487.862] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   487.862] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   487.862] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   487.869] (II) RADEON(0): RADEONSaveScreen(2)
>[   493.332] (II) AIGLX: Suspending AIGLX clients for VT switch
>[   493.332] (II) RADEON(0): RADEONLeaveVT_KMS
>[   493.332] (II) RADEON(0): Ok, leaving now...
>[   494.620] (II) AIGLX: Resuming AIGLX clients after VT switch
>[   494.620] (II) RADEON(0): RADEONEnterVT_KMS
>[   494.712] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[   494.712] (II) RADEON(0): Using hsync ranges from config file
>[   494.712] (II) RADEON(0): Using vrefresh ranges from config file
>[   494.712] (II) RADEON(0): Printing DDC gathered Modelines:
>[   494.712] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[   494.712] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   494.712] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   494.712] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   494.712] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   494.712] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   494.712] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   494.712] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   494.712] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   494.719] (II) RADEON(0): RADEONSaveScreen(2)
>[   494.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455d50]
>[   494.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455d50] width 2880 pitch 11520 (/4 2880)
>[   510.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   510.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   510.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   510.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   510.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ab18]
>[   510.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ab18] width 2880 pitch 11520 (/4 2880)
>[   510.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   510.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   510.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ab18]
>[   510.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ab18] width 2880 pitch 11520 (/4 2880)
>[   510.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95385e8]
>[   510.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95385e8] width 2880 pitch 11520 (/4 2880)
>[   511.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95385e8]
>[   511.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95385e8] width 2880 pitch 11520 (/4 2880)
>[   511.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9538770]
>[   511.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9538770] width 2880 pitch 11520 (/4 2880)
>[   511.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   511.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   511.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95389c0]
>[   511.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95389c0] width 2880 pitch 11520 (/4 2880)
>[   512.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   512.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   512.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ab18]
>[   512.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ab18] width 2880 pitch 11520 (/4 2880)
>[   512.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95385e8]
>[   512.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95385e8] width 2880 pitch 11520 (/4 2880)
>[   512.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   512.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   512.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95385e8]
>[   512.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95385e8] width 2880 pitch 11520 (/4 2880)
>[   512.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   512.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   512.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   512.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   512.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b940]
>[   512.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b940] width 2880 pitch 11520 (/4 2880)
>[   522.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   522.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   523.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3910]
>[   523.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3910] width 2880 pitch 11520 (/4 2880)
>[   523.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3910]
>[   523.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3910] width 2880 pitch 11520 (/4 2880)
>[   523.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   523.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   523.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949ed68]
>[   523.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949ed68] width 2880 pitch 11520 (/4 2880)
>[   523.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   523.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   523.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   523.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   523.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   523.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   523.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   523.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   523.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   523.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   523.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   523.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   523.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3910]
>[   523.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3910] width 2880 pitch 11520 (/4 2880)
>[   523.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   523.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   523.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3910]
>[   523.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3910] width 2880 pitch 11520 (/4 2880)
>[   523.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a23f0]
>[   523.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a23f0] width 2880 pitch 11520 (/4 2880)
>[   524.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546170]
>[   524.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546170] width 2880 pitch 11520 (/4 2880)
>[   525.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9450820]
>[   525.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9450820] width 2880 pitch 11520 (/4 2880)
>[   525.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9450820]
>[   525.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9450820] width 2880 pitch 11520 (/4 2880)
>[   525.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   525.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   525.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9450820]
>[   525.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9450820] width 2880 pitch 11520 (/4 2880)
>[   525.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949ed68]
>[   525.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949ed68] width 2880 pitch 11520 (/4 2880)
>[   525.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9450820]
>[   525.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9450820] width 2880 pitch 11520 (/4 2880)
>[   525.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a658]
>[   525.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a658] width 2880 pitch 11520 (/4 2880)
>[   525.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9450820]
>[   525.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9450820] width 2880 pitch 11520 (/4 2880)
>[   525.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a658]
>[   525.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a658] width 2880 pitch 11520 (/4 2880)
>[   525.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403278]
>[   525.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403278] width 2880 pitch 11520 (/4 2880)
>[   530.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9561230]
>[   531.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9561230] width 2880 pitch 11520 (/4 2880)
>[   532.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954c358]
>[   532.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954c358] width 2880 pitch 11520 (/4 2880)
>[   533.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93448e0]
>[   533.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93448e0] width 2880 pitch 11520 (/4 2880)
>[   544.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   544.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   545.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94424c8]
>[   545.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94424c8] width 2880 pitch 11520 (/4 2880)
>[   552.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   552.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   552.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   552.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   564.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   564.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   565.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   565.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ec0]
>[   565.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ec0] width 2880 pitch 11520 (/4 2880)
>[   565.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   565.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   565.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   565.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   565.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   565.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   565.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3128]
>[   565.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3128] width 2880 pitch 11520 (/4 2880)
>[   565.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   565.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   565.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   565.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   565.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   565.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   565.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   566.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   566.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   566.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   566.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   566.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   566.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ec0]
>[   566.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ec0] width 2880 pitch 11520 (/4 2880)
>[   566.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   566.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   566.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   566.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   566.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   566.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   566.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   566.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   566.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   566.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   566.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   567.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   567.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95117d0]
>[   567.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95117d0] width 2880 pitch 11520 (/4 2880)
>[   567.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95117d0]
>[   567.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95117d0] width 2880 pitch 11520 (/4 2880)
>[   567.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ec0]
>[   567.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ec0] width 2880 pitch 11520 (/4 2880)
>[   567.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   567.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   567.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   567.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   567.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   567.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   568.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   568.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   568.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ec0]
>[   568.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ec0] width 2880 pitch 11520 (/4 2880)
>[   568.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513d30]
>[   568.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513d30] width 2880 pitch 11520 (/4 2880)
>[   568.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   568.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   568.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   568.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   568.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   568.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   568.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   568.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   568.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   568.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   568.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   568.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   568.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   569.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   569.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   569.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   569.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   569.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   569.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   569.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   569.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9549c90]
>[   569.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9549c90] width 2880 pitch 11520 (/4 2880)
>[   569.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604620]
>[   569.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604620] width 2880 pitch 11520 (/4 2880)
>[   569.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   569.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   569.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   569.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   569.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cebe0]
>[   569.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cebe0] width 2880 pitch 11520 (/4 2880)
>[   570.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   570.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   570.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9464810]
>[   570.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9464810] width 2880 pitch 11520 (/4 2880)
>[   570.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9464810]
>[   570.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9464810] width 2880 pitch 11520 (/4 2880)
>[   570.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   570.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   570.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9464810]
>[   570.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9464810] width 2880 pitch 11520 (/4 2880)
>[   570.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bb698]
>[   570.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bb698] width 2880 pitch 11520 (/4 2880)
>[   570.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ec0]
>[   570.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ec0] width 2880 pitch 11520 (/4 2880)
>[   570.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   570.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   570.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   570.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   570.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   570.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   570.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   570.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   570.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   570.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   570.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   570.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   570.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   570.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   571.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   571.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   571.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   571.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   571.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   571.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   572.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x933cff0]
>[   572.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x933cff0] width 2880 pitch 11520 (/4 2880)
>[   572.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   572.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9567038]
>[   572.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9567038] width 2880 pitch 11520 (/4 2880)
>[   572.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3f70]
>[   572.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3f70] width 2880 pitch 11520 (/4 2880)
>[   582.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a658]
>[   582.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a658] width 2880 pitch 11520 (/4 2880)
>[   582.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[   582.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[   582.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[   582.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[   582.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94424c8]
>[   582.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94424c8] width 2880 pitch 11520 (/4 2880)
>[   587.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9603f80]
>[   587.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9603f80] width 2880 pitch 11520 (/4 2880)
>[   604.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554fe0]
>[   604.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554fe0] width 2880 pitch 11520 (/4 2880)
>[   604.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426918]
>[   604.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426918] width 2880 pitch 11520 (/4 2880)
>[   604.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554fe0]
>[   604.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554fe0] width 2880 pitch 11520 (/4 2880)
>[   604.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a2f98]
>[   604.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a2f98] width 2880 pitch 11520 (/4 2880)
>[   604.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95292d0]
>[   604.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95292d0] width 2880 pitch 11520 (/4 2880)
>[   604.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9561048]
>[   604.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9561048] width 2880 pitch 11520 (/4 2880)
>[   604.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554fe0]
>[   604.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554fe0] width 2880 pitch 11520 (/4 2880)
>[   604.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ea0]
>[   604.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ea0] width 2880 pitch 11520 (/4 2880)
>[   604.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ed0]
>[   604.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ed0] width 2880 pitch 11520 (/4 2880)
>[   604.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ea0]
>[   604.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ea0] width 2880 pitch 11520 (/4 2880)
>[   604.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ed0]
>[   604.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ed0] width 2880 pitch 11520 (/4 2880)
>[   604.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ea0]
>[   604.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ea0] width 2880 pitch 11520 (/4 2880)
>[   604.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ed0]
>[   604.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ed0] width 2880 pitch 11520 (/4 2880)
>[   604.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ea0]
>[   604.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ea0] width 2880 pitch 11520 (/4 2880)
>[   604.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554ed0]
>[   604.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554ed0] width 2880 pitch 11520 (/4 2880)
>[   607.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554fe0]
>[   607.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554fe0] width 2880 pitch 11520 (/4 2880)
>[   608.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   608.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95292d0]
>[   608.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95292d0] width 2880 pitch 11520 (/4 2880)
>[   608.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9522d20]
>[   608.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9522d20] width 2880 pitch 11520 (/4 2880)
>[   608.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   608.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   608.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   608.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426908]
>[   608.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426908] width 2880 pitch 11520 (/4 2880)
>[   608.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   608.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426908]
>[   608.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426908] width 2880 pitch 11520 (/4 2880)
>[   608.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   608.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426908]
>[   608.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426908] width 2880 pitch 11520 (/4 2880)
>[   608.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   608.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426908]
>[   608.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426908] width 2880 pitch 11520 (/4 2880)
>[   608.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94268d8]
>[   608.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94268d8] width 2880 pitch 11520 (/4 2880)
>[   619.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f888]
>[   619.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f888] width 2880 pitch 11520 (/4 2880)
>[   619.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[   619.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[   619.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d620]
>[   619.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d620] width 2880 pitch 11520 (/4 2880)
>[   619.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94125c0]
>[   619.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94125c0] width 2880 pitch 11520 (/4 2880)
>[   624.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c7b60]
>[   624.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c7b60] width 2880 pitch 11520 (/4 2880)
>[   685.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463330]
>[   685.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463330] width 2880 pitch 11520 (/4 2880)
>[   764.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546540]
>[   764.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546540] width 2880 pitch 11520 (/4 2880)
>[   764.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9549830]
>[   764.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9549830] width 2880 pitch 11520 (/4 2880)
>[   765.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546540]
>[   765.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546540] width 2880 pitch 11520 (/4 2880)
>[   765.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556f90]
>[   765.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556f90] width 2880 pitch 11520 (/4 2880)
>[   765.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ab60]
>[   765.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ab60] width 2880 pitch 11520 (/4 2880)
>[   765.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e390]
>[   765.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e390] width 2880 pitch 11520 (/4 2880)
>[   765.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9549830]
>[   765.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9549830] width 2880 pitch 11520 (/4 2880)
>[   765.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556eb8]
>[   765.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556eb8] width 2880 pitch 11520 (/4 2880)
>[   765.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e390]
>[   765.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e390] width 2880 pitch 11520 (/4 2880)
>[   765.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556eb8]
>[   765.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556eb8] width 2880 pitch 11520 (/4 2880)
>[   765.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e390]
>[   765.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e390] width 2880 pitch 11520 (/4 2880)
>[   765.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556eb8]
>[   765.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556eb8] width 2880 pitch 11520 (/4 2880)
>[   765.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e390]
>[   765.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e390] width 2880 pitch 11520 (/4 2880)
>[   765.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   765.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   765.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94395c0]
>[   765.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94395c0] width 2880 pitch 11520 (/4 2880)
>[   765.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9549830]
>[   765.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9549830] width 2880 pitch 11520 (/4 2880)
>[   768.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94103b0]
>[   768.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94103b0] width 2880 pitch 11520 (/4 2880)
>[   769.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9546540]
>[   769.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9546540] width 2880 pitch 11520 (/4 2880)
>[   771.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   771.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   771.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94395c0]
>[   771.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94395c0] width 2880 pitch 11520 (/4 2880)
>[   771.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94395c0]
>[   771.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94395c0] width 2880 pitch 11520 (/4 2880)
>[   771.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   771.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   771.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9425288]
>[   771.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9425288] width 2880 pitch 11520 (/4 2880)
>[   772.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   772.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   772.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   772.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   772.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   772.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   772.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ab60]
>[   772.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ab60] width 2880 pitch 11520 (/4 2880)
>[   772.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   772.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   772.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95464c0]
>[   773.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95464c0] width 2880 pitch 11520 (/4 2880)
>[   773.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9518478]
>[   773.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9518478] width 2880 pitch 11520 (/4 2880)
>[   773.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456c80]
>[   773.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456c80] width 2880 pitch 11520 (/4 2880)
>[   773.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94103a0]
>[   773.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94103a0] width 2880 pitch 11520 (/4 2880)
>[   773.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456c80]
>[   773.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456c80] width 2880 pitch 11520 (/4 2880)
>[   773.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ab60]
>[   773.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ab60] width 2880 pitch 11520 (/4 2880)
>[   773.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   773.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   774.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410350]
>[   774.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410350] width 2880 pitch 11520 (/4 2880)
>[   774.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   774.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   774.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9518788]
>[   774.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9518788] width 2880 pitch 11520 (/4 2880)
>[   778.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   778.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   779.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410380]
>[   779.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410380] width 2880 pitch 11520 (/4 2880)
>[   779.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95464c0]
>[   779.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95464c0] width 2880 pitch 11520 (/4 2880)
>[   779.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9537718]
>[   779.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9537718] width 2880 pitch 11520 (/4 2880)
>[   779.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456c80]
>[   779.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456c80] width 2880 pitch 11520 (/4 2880)
>[   779.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9537768]
>[   779.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9537768] width 2880 pitch 11520 (/4 2880)
>[   779.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456c80]
>[   779.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456c80] width 2880 pitch 11520 (/4 2880)
>[   779.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9537768]
>[   779.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9537768] width 2880 pitch 11520 (/4 2880)
>[   779.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94598d8]
>[   779.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94598d8] width 2880 pitch 11520 (/4 2880)
>[   779.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9537818]
>[   779.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9537818] width 2880 pitch 11520 (/4 2880)
>[   779.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410350]
>[   779.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410350] width 2880 pitch 11520 (/4 2880)
>[   779.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   779.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   779.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b690]
>[   779.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b690] width 2880 pitch 11520 (/4 2880)
>[   779.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456c80]
>[   779.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456c80] width 2880 pitch 11520 (/4 2880)
>[   779.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410350]
>[   779.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410350] width 2880 pitch 11520 (/4 2880)
>[   783.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9552728]
>[   783.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9552728] width 2880 pitch 11520 (/4 2880)
>[   789.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b70]
>[   789.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b70] width 2880 pitch 11520 (/4 2880)
>[   789.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94541b8]
>[   789.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94541b8] width 2880 pitch 11520 (/4 2880)
>[   789.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9484ec8]
>[   789.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9484ec8] width 2880 pitch 11520 (/4 2880)
>[   789.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94633a0]
>[   789.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94633a0] width 2880 pitch 11520 (/4 2880)
>[   789.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b628]
>[   789.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b628] width 2880 pitch 11520 (/4 2880)
>[   789.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ac78]
>[   789.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ac78] width 2880 pitch 11520 (/4 2880)
>[   789.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94633a0]
>[   789.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94633a0] width 2880 pitch 11520 (/4 2880)
>[   789.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951fc90]
>[   789.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951fc90] width 2880 pitch 11520 (/4 2880)
>[   789.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   789.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481ee8]
>[   789.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481ee8] width 2880 pitch 11520 (/4 2880)
>[   792.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94633a0]
>[   792.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94633a0] width 2880 pitch 11520 (/4 2880)
>[   792.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94633a0]
>[   792.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94633a0] width 2880 pitch 11520 (/4 2880)
>[   792.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   792.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   792.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9552858]
>[   792.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9552858] width 2880 pitch 11520 (/4 2880)
>[   792.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94633a0]
>[   792.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94633a0] width 2880 pitch 11520 (/4 2880)
>[   792.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b6c8]
>[   792.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b6c8] width 2880 pitch 11520 (/4 2880)
>[   792.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e068]
>[   792.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e068] width 2880 pitch 11520 (/4 2880)
>[   792.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951e010]
>[   792.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951e010] width 2880 pitch 11520 (/4 2880)
>[   792.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951df00]
>[   792.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951df00] width 2880 pitch 11520 (/4 2880)
>[   792.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951df00]
>[   792.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951df00] width 2880 pitch 11520 (/4 2880)
>[   792.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951df00]
>[   792.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951df00] width 2880 pitch 11520 (/4 2880)
>[   792.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480ba0]
>[   792.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480ba0] width 2880 pitch 11520 (/4 2880)
>[   792.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951df00]
>[   792.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951df00] width 2880 pitch 11520 (/4 2880)
>[   845.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[   845.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[   845.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   845.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   846.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   846.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   846.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   846.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   846.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   846.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   846.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   846.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   846.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461580]
>[   846.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461580] width 2880 pitch 11520 (/4 2880)
>[   846.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   846.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   846.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[   846.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[   846.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   846.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   846.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   846.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   846.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   846.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   846.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461580]
>[   846.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461580] width 2880 pitch 11520 (/4 2880)
>[   846.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   846.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   846.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[   846.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[   850.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461580]
>[   850.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461580] width 2880 pitch 11520 (/4 2880)
>[   851.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   851.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   851.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461580]
>[   851.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461580] width 2880 pitch 11520 (/4 2880)
>[   853.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   853.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   853.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   853.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   853.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   853.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   853.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   853.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   853.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   853.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   853.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461580]
>[   853.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461580] width 2880 pitch 11520 (/4 2880)
>[   853.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[   853.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[   853.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9459778]
>[   853.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9459778] width 2880 pitch 11520 (/4 2880)
>[   853.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[   853.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[   853.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   853.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   853.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   853.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   853.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9426730]
>[   853.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9426730] width 2880 pitch 11520 (/4 2880)
>[   853.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   853.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   887.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b92d8]
>[   887.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b92d8] width 2880 pitch 11520 (/4 2880)
>[   922.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b7228]
>[   922.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b7228] width 2880 pitch 11520 (/4 2880)
>[   922.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94624f0]
>[   922.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94624f0] width 2880 pitch 11520 (/4 2880)
>[   922.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94549a0]
>[   922.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94549a0] width 2880 pitch 11520 (/4 2880)
>[   922.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d788]
>[   922.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d788] width 2880 pitch 11520 (/4 2880)
>[   928.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e9f0]
>[   928.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e9f0] width 2880 pitch 11520 (/4 2880)
>[   957.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551708]
>[   957.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551708] width 2880 pitch 11520 (/4 2880)
>[   962.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95af2e0]
>[   962.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95af2e0] width 2880 pitch 11520 (/4 2880)
>[   962.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3ef0]
>[   962.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3ef0] width 2880 pitch 11520 (/4 2880)
>[   962.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95af2e0]
>[   962.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95af2e0] width 2880 pitch 11520 (/4 2880)
>[   962.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95af2e0]
>[   962.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95af2e0] width 2880 pitch 11520 (/4 2880)
>[   962.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   962.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   962.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   962.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   962.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   962.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1370]
>[   962.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1370] width 2880 pitch 11520 (/4 2880)
>[   962.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3fb8]
>[   962.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3fb8] width 2880 pitch 11520 (/4 2880)
>[   966.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b42f8]
>[   966.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b42f8] width 2880 pitch 11520 (/4 2880)
>[   966.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95224d8]
>[   966.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95224d8] width 2880 pitch 11520 (/4 2880)
>[   966.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1218]
>[   966.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1218] width 2880 pitch 11520 (/4 2880)
>[   966.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8318]
>[   966.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8318] width 2880 pitch 11520 (/4 2880)
>[   966.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd170]
>[   966.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd170] width 2880 pitch 11520 (/4 2880)
>[   966.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543dd0]
>[   966.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543dd0] width 2880 pitch 11520 (/4 2880)
>[   966.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951efe8]
>[   966.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951efe8] width 2880 pitch 11520 (/4 2880)
>[   966.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ae608]
>[   966.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ae608] width 2880 pitch 11520 (/4 2880)
>[   966.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539858]
>[   966.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539858] width 2880 pitch 11520 (/4 2880)
>[   966.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a558]
>[   966.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a558] width 2880 pitch 11520 (/4 2880)
>[   966.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953b850]
>[   966.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953b850] width 2880 pitch 11520 (/4 2880)
>[   966.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ae608]
>[   966.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ae608] width 2880 pitch 11520 (/4 2880)
>[   966.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ae608]
>[   966.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ae608] width 2880 pitch 11520 (/4 2880)
>[   966.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539858]
>[   966.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539858] width 2880 pitch 11520 (/4 2880)
>[   966.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1c00]
>[   966.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1c00] width 2880 pitch 11520 (/4 2880)
>[   966.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953b850]
>[   966.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953b850] width 2880 pitch 11520 (/4 2880)
>[   966.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953b850]
>[   966.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953b850] width 2880 pitch 11520 (/4 2880)
>[   966.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a558]
>[   966.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a558] width 2880 pitch 11520 (/4 2880)
>[   985.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95476e8]
>[   985.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95476e8] width 2880 pitch 11520 (/4 2880)
>[  1046.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e788]
>[  1046.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e788] width 2880 pitch 11520 (/4 2880)
>[  1046.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1046.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1046.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1046.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1046.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1046.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1063.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1063.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1064.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513978]
>[  1064.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513978] width 2880 pitch 11520 (/4 2880)
>[  1064.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513978]
>[  1064.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513978] width 2880 pitch 11520 (/4 2880)
>[  1064.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1064.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1064.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520c10]
>[  1064.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520c10] width 2880 pitch 11520 (/4 2880)
>[  1064.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940c380]
>[  1064.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940c380] width 2880 pitch 11520 (/4 2880)
>[  1064.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520c10]
>[  1064.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520c10] width 2880 pitch 11520 (/4 2880)
>[  1064.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1064.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1064.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520c10]
>[  1064.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520c10] width 2880 pitch 11520 (/4 2880)
>[  1064.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1064.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1064.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520c10]
>[  1064.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520c10] width 2880 pitch 11520 (/4 2880)
>[  1064.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1064.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1064.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520c10]
>[  1064.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520c10] width 2880 pitch 11520 (/4 2880)
>[  1064.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1064.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1065.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1065.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1066.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1066.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1066.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1066.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1066.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1066.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1066.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520bb0]
>[  1066.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520bb0] width 2880 pitch 11520 (/4 2880)
>[  1066.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513998]
>[  1066.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513998] width 2880 pitch 11520 (/4 2880)
>[  1066.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520bb0]
>[  1066.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520bb0] width 2880 pitch 11520 (/4 2880)
>[  1066.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9439448]
>[  1066.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9439448] width 2880 pitch 11520 (/4 2880)
>[  1066.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9530958]
>[  1066.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9530958] width 2880 pitch 11520 (/4 2880)
>[  1066.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942a780]
>[  1066.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942a780] width 2880 pitch 11520 (/4 2880)
>[  1067.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[  1067.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[  1067.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551390]
>[  1067.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551390] width 2880 pitch 11520 (/4 2880)
>[  1067.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1067.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1067.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[  1067.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[  1067.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951a5a0]
>[  1067.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951a5a0] width 2880 pitch 11520 (/4 2880)
>[  1067.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3a0]
>[  1067.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3a0] width 2880 pitch 11520 (/4 2880)
>[  1068.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449280]
>[  1068.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449280] width 2880 pitch 11520 (/4 2880)
>[  1068.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449280]
>[  1068.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449280] width 2880 pitch 11520 (/4 2880)
>[  1068.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1068.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1068.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9522d50]
>[  1068.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9522d50] width 2880 pitch 11520 (/4 2880)
>[  1068.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461b60]
>[  1068.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461b60] width 2880 pitch 11520 (/4 2880)
>[  1068.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463360]
>[  1068.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463360] width 2880 pitch 11520 (/4 2880)
>[  1068.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f5b0]
>[  1068.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f5b0] width 2880 pitch 11520 (/4 2880)
>[  1068.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1068.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1068.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1068.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1068.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1068.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1068.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1068.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1068.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449578]
>[  1068.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449578] width 2880 pitch 11520 (/4 2880)
>[  1068.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1068.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1068.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449578]
>[  1068.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449578] width 2880 pitch 11520 (/4 2880)
>[  1068.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1068.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1069.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94014b0]
>[  1069.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94014b0] width 2880 pitch 11520 (/4 2880)
>[  1070.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94014b0]
>[  1070.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94014b0] width 2880 pitch 11520 (/4 2880)
>[  1070.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1070.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1070.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94014b0]
>[  1070.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94014b0] width 2880 pitch 11520 (/4 2880)
>[  1070.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1070.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1070.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1070.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1070.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94014b0]
>[  1070.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94014b0] width 2880 pitch 11520 (/4 2880)
>[  1070.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1070.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1070.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950f3f8]
>[  1070.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950f3f8] width 2880 pitch 11520 (/4 2880)
>[  1070.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1070.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1071.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94638b0]
>[  1071.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94638b0] width 2880 pitch 11520 (/4 2880)
>[  1071.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9402e98]
>[  1071.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9402e98] width 2880 pitch 11520 (/4 2880)
>[  1071.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9402e98]
>[  1071.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9402e98] width 2880 pitch 11520 (/4 2880)
>[  1072.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1072.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1073.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94638f8]
>[  1073.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94638f8] width 2880 pitch 11520 (/4 2880)
>[  1075.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95acf30]
>[  1075.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95acf30] width 2880 pitch 11520 (/4 2880)
>[  1076.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94638f8]
>[  1076.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94638f8] width 2880 pitch 11520 (/4 2880)
>[  1076.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9510a40]
>[  1076.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9510a40] width 2880 pitch 11520 (/4 2880)
>[  1076.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1076.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1076.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[  1076.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[  1076.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465da8]
>[  1076.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465da8] width 2880 pitch 11520 (/4 2880)
>[  1077.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1077.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1080.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1080.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1081.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1081.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1081.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1081.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1081.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950acc0]
>[  1081.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950acc0] width 2880 pitch 11520 (/4 2880)
>[  1081.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3d38]
>[  1082.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3d38] width 2880 pitch 11520 (/4 2880)
>[  1082.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1082.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1082.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1082.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1082.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1082.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1082.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1082.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1082.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1082.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1082.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1082.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1093.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950acc0]
>[  1093.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950acc0] width 2880 pitch 11520 (/4 2880)
>[  1093.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1093.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1093.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950acc0]
>[  1093.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950acc0] width 2880 pitch 11520 (/4 2880)
>[  1093.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9439838]
>[  1093.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9439838] width 2880 pitch 11520 (/4 2880)
>[  1093.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1093.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1093.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9439838]
>[  1093.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9439838] width 2880 pitch 11520 (/4 2880)
>[  1093.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3d38]
>[  1093.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3d38] width 2880 pitch 11520 (/4 2880)
>[  1093.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3d38]
>[  1093.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3d38] width 2880 pitch 11520 (/4 2880)
>[  1093.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1093.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1093.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1093.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1093.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1093.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1093.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1094.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1094.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1094.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1095.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3d38]
>[  1095.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3d38] width 2880 pitch 11520 (/4 2880)
>[  1095.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1095.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1095.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e2f0]
>[  1095.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e2f0] width 2880 pitch 11520 (/4 2880)
>[  1095.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1095.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1095.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9399ad0]
>[  1095.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9399ad0] width 2880 pitch 11520 (/4 2880)
>[  1095.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e2f0]
>[  1095.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e2f0] width 2880 pitch 11520 (/4 2880)
>[  1095.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c458]
>[  1095.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c458] width 2880 pitch 11520 (/4 2880)
>[  1095.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9399ad8]
>[  1095.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9399ad8] width 2880 pitch 11520 (/4 2880)
>[  1095.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1095.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1095.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9399ad8]
>[  1095.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9399ad8] width 2880 pitch 11520 (/4 2880)
>[  1095.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1095.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1095.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440218]
>[  1095.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440218] width 2880 pitch 11520 (/4 2880)
>[  1096.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440e58]
>[  1096.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440e58] width 2880 pitch 11520 (/4 2880)
>[  1097.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d2e0]
>[  1097.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d2e0] width 2880 pitch 11520 (/4 2880)
>[  1097.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9542438]
>[  1097.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9542438] width 2880 pitch 11520 (/4 2880)
>[  1112.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1112.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1116.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1116.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1118.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b7228]
>[  1118.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b7228] width 2880 pitch 11520 (/4 2880)
>[  1118.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555dd8]
>[  1118.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555dd8] width 2880 pitch 11520 (/4 2880)
>[  1118.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9518408]
>[  1118.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9518408] width 2880 pitch 11520 (/4 2880)
>[  1118.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b7228]
>[  1118.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b7228] width 2880 pitch 11520 (/4 2880)
>[  1118.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7f48]
>[  1118.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7f48] width 2880 pitch 11520 (/4 2880)
>[  1118.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[  1118.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[  1118.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1118.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1118.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[  1118.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[  1118.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1118.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1118.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555dd8]
>[  1118.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555dd8] width 2880 pitch 11520 (/4 2880)
>[  1118.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7f48]
>[  1118.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7f48] width 2880 pitch 11520 (/4 2880)
>[  1118.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dca0]
>[  1118.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dca0] width 2880 pitch 11520 (/4 2880)
>[  1123.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b7228]
>[  1123.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b7228] width 2880 pitch 11520 (/4 2880)
>[  1123.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dca0]
>[  1123.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dca0] width 2880 pitch 11520 (/4 2880)
>[  1123.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7f48]
>[  1123.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7f48] width 2880 pitch 11520 (/4 2880)
>[  1123.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555dd8]
>[  1123.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555dd8] width 2880 pitch 11520 (/4 2880)
>[  1124.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1124.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1124.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94554c0]
>[  1124.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94554c0] width 2880 pitch 11520 (/4 2880)
>[  1124.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1124.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1124.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1124.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1124.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1124.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1124.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1124.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1124.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1124.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1124.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1124.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1124.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95219c0]
>[  1124.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95219c0] width 2880 pitch 11520 (/4 2880)
>[  1143.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1143.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1143.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1143.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1143.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1143.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1143.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1143.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1143.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1143.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1143.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1143.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1143.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1143.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1143.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1143.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1143.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1143.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1144.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1144.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1144.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1144.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1144.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1144.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1144.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1144.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1144.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1144.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1144.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1144.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1144.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1144.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1144.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1144.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1144.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1144.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1144.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1144.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1144.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1144.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1144.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1144.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1144.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1144.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1145.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1145.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1145.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1145.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1145.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1145.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1145.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1145.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1145.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1145.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1145.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1145.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1145.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1145.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1145.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1145.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1145.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1145.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1145.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1145.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1145.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1145.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1145.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1145.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1145.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1145.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1145.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1145.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1145.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1145.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1146.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1146.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1146.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1146.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1146.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1146.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1146.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1146.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1146.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1146.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1146.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1146.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1146.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1146.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1146.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1146.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1146.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1146.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1146.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1146.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1146.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1146.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1146.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1146.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1146.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1146.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1146.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1146.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1162.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1162.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1162.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1162.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1162.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1162.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1162.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1162.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1162.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1162.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1162.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1162.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1162.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1162.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1162.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1162.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1162.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1162.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1162.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1162.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1162.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1162.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1162.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1162.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1163.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1163.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1163.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1163.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1164.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1164.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1164.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1164.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1164.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1164.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1164.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1164.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1164.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1164.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1164.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1164.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1164.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440eb0]
>[  1164.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440eb0] width 2880 pitch 11520 (/4 2880)
>[  1164.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1164.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1164.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b5c0]
>[  1164.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b5c0] width 2880 pitch 11520 (/4 2880)
>[  1164.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1164.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1164.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1164.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1172.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1172.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1172.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1172.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1172.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1172.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1172.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1172.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1172.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1172.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1172.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1172.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1172.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1172.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1172.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1172.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1172.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1172.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1172.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1172.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1172.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1172.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1173.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1173.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1173.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1173.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1173.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1173.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1173.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1173.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1173.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1173.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1173.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1173.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1174.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1174.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1177.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1177.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1177.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1177.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1178.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1178.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1178.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1178.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1180.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1180.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1180.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1180.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1181.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1181.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1181.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1181.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1183.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1183.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1183.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1183.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1183.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1183.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1184.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1184.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1184.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1184.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1184.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1184.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1184.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1184.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1184.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1184.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1184.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1185.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1185.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1185.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1187.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1187.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1189.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1189.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1189.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1189.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1189.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b4c8]
>[  1189.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b4c8] width 2880 pitch 11520 (/4 2880)
>[  1189.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c1b8]
>[  1189.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c1b8] width 2880 pitch 11520 (/4 2880)
>[  1192.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952fdc0]
>[  1192.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952fdc0] width 2880 pitch 11520 (/4 2880)
>[  1193.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543d30]
>[  1193.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543d30] width 2880 pitch 11520 (/4 2880)
>[  1195.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7b8]
>[  1195.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7b8] width 2880 pitch 11520 (/4 2880)
>[  1195.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f350]
>[  1195.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f350] width 2880 pitch 11520 (/4 2880)
>[  1195.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f350]
>[  1195.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f350] width 2880 pitch 11520 (/4 2880)
>[  1195.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543d50]
>[  1195.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543d50] width 2880 pitch 11520 (/4 2880)
>[  1195.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3c78]
>[  1195.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3c78] width 2880 pitch 11520 (/4 2880)
>[  1195.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c1b8]
>[  1195.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c1b8] width 2880 pitch 11520 (/4 2880)
>[  1195.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3c58]
>[  1195.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3c58] width 2880 pitch 11520 (/4 2880)
>[  1195.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e3da8]
>[  1195.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e3da8] width 2880 pitch 11520 (/4 2880)
>[  1195.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94470e0]
>[  1195.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94470e0] width 2880 pitch 11520 (/4 2880)
>[  1199.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1199.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1199.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1199.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1199.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1199.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1199.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1199.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1199.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1199.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1199.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1199.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1199.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1199.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1199.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f580]
>[  1199.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f580] width 2880 pitch 11520 (/4 2880)
>[  1199.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1199.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1199.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1199.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1199.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1199.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f580]
>[  1199.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f580] width 2880 pitch 11520 (/4 2880)
>[  1199.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1199.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1199.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1199.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1200.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1200.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1200.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1200.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1200.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1200.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1200.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1200.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1200.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1200.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1200.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9512140]
>[  1200.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9512140] width 2880 pitch 11520 (/4 2880)
>[  1200.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ba0]
>[  1200.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ba0] width 2880 pitch 11520 (/4 2880)
>[  1200.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1200.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1200.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1200.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1200.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1200.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1201.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1201.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1201.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485160]
>[  1201.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485160] width 2880 pitch 11520 (/4 2880)
>[  1201.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f580]
>[  1201.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f580] width 2880 pitch 11520 (/4 2880)
>[  1201.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1201.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1201.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1201.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1201.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945d190]
>[  1201.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945d190] width 2880 pitch 11520 (/4 2880)
>[  1201.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1201.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1201.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1201.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1201.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1201.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1201.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e0d0]
>[  1201.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e0d0] width 2880 pitch 11520 (/4 2880)
>[  1201.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1201.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1202.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94647a0]
>[  1202.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94647a0] width 2880 pitch 11520 (/4 2880)
>[  1202.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1202.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1225.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dca0]
>[  1225.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dca0] width 2880 pitch 11520 (/4 2880)
>[  1225.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1225.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1225.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dca0]
>[  1225.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dca0] width 2880 pitch 11520 (/4 2880)
>[  1225.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1225.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1225.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1225.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1225.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95578b8]
>[  1225.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95578b8] width 2880 pitch 11520 (/4 2880)
>[  1225.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cebd0]
>[  1225.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cebd0] width 2880 pitch 11520 (/4 2880)
>[  1225.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513280]
>[  1225.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513280] width 2880 pitch 11520 (/4 2880)
>[  1225.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1226.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1226.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1226.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1227.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f4a0]
>[  1227.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f4a0] width 2880 pitch 11520 (/4 2880)
>[  1227.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555dd8]
>[  1227.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555dd8] width 2880 pitch 11520 (/4 2880)
>[  1227.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1227.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1227.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1227.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1227.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453dd8]
>[  1227.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453dd8] width 2880 pitch 11520 (/4 2880)
>[  1230.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1230.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1230.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f4a0]
>[  1230.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f4a0] width 2880 pitch 11520 (/4 2880)
>[  1230.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1230.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1230.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1230.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1230.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce8b0]
>[  1230.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce8b0] width 2880 pitch 11520 (/4 2880)
>[  1230.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1230.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1230.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e2ca8]
>[  1230.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e2ca8] width 2880 pitch 11520 (/4 2880)
>[  1230.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1230.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1230.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1230.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1230.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce8b0]
>[  1230.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce8b0] width 2880 pitch 11520 (/4 2880)
>[  1230.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d0e68]
>[  1230.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d0e68] width 2880 pitch 11520 (/4 2880)
>[  1230.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[  1230.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[  1230.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1230.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1230.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[  1230.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[  1230.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cebd0]
>[  1231.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cebd0] width 2880 pitch 11520 (/4 2880)
>[  1231.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[  1231.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[  1231.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1231.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1242.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1242.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1243.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91cb140]
>[  1243.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91cb140] width 2880 pitch 11520 (/4 2880)
>[  1259.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91ad670]
>[  1259.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91ad670] width 2880 pitch 11520 (/4 2880)
>[  1259.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f5688]
>[  1259.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f5688] width 2880 pitch 11520 (/4 2880)
>[  1299.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95336d0]
>[  1299.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95336d0] width 2880 pitch 11520 (/4 2880)
>[  1299.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940b130]
>[  1299.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940b130] width 2880 pitch 11520 (/4 2880)
>[  1306.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eff40]
>[  1306.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eff40] width 2880 pitch 11520 (/4 2880)
>[  1306.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93eff40]
>[  1306.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93eff40] width 2880 pitch 11520 (/4 2880)
>[  1306.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3128]
>[  1306.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3128] width 2880 pitch 11520 (/4 2880)
>[  1306.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1306.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1306.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1306.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1306.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fa830]
>[  1306.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fa830] width 2880 pitch 11520 (/4 2880)
>[  1306.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1306.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1306.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939aae8]
>[  1306.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939aae8] width 2880 pitch 11520 (/4 2880)
>[  1306.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1306.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1306.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460e40]
>[  1306.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460e40] width 2880 pitch 11520 (/4 2880)
>[  1306.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93dcc58]
>[  1306.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93dcc58] width 2880 pitch 11520 (/4 2880)
>[  1306.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1306.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1306.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1306.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1308.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1308.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1313.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1313.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1334.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1334.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1336.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1336.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1336.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2720]
>[  1336.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2720] width 2880 pitch 11520 (/4 2880)
>[  1336.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1336.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1336.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547da8]
>[  1336.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547da8] width 2880 pitch 11520 (/4 2880)
>[  1336.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1336.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1336.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94014b0]
>[  1336.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94014b0] width 2880 pitch 11520 (/4 2880)
>[  1336.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1336.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1336.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1336.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1336.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93dcc58]
>[  1336.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93dcc58] width 2880 pitch 11520 (/4 2880)
>[  1336.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1336.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1336.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547da8]
>[  1336.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547da8] width 2880 pitch 11520 (/4 2880)
>[  1337.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547da8]
>[  1337.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547da8] width 2880 pitch 11520 (/4 2880)
>[  1338.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1338.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1338.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1338.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1338.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1338.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1338.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408a78]
>[  1338.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408a78] width 2880 pitch 11520 (/4 2880)
>[  1338.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9547da8]
>[  1338.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9547da8] width 2880 pitch 11520 (/4 2880)
>[  1338.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1338.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1338.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1338.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1338.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1338.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1338.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344a60]
>[  1338.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344a60] width 2880 pitch 11520 (/4 2880)
>[  1338.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1338.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1338.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1338.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1339.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94611c0]
>[  1339.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94611c0] width 2880 pitch 11520 (/4 2880)
>[  1340.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94555a8]
>[  1340.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94555a8] width 2880 pitch 11520 (/4 2880)
>[  1340.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d280]
>[  1340.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d280] width 2880 pitch 11520 (/4 2880)
>[  1340.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8380]
>[  1340.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8380] width 2880 pitch 11520 (/4 2880)
>[  1340.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1340.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1340.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1340.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1341.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1341.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1341.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941fdb0]
>[  1341.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941fdb0] width 2880 pitch 11520 (/4 2880)
>[  1343.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1343.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1343.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9408a78]
>[  1343.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9408a78] width 2880 pitch 11520 (/4 2880)
>[  1343.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1343.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1343.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460e40]
>[  1343.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460e40] width 2880 pitch 11520 (/4 2880)
>[  1343.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1343.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1343.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1343.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1343.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1343.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1344.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1344.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1344.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1344.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1344.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f2a0]
>[  1344.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f2a0] width 2880 pitch 11520 (/4 2880)
>[  1344.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1344.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1344.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539488]
>[  1344.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539488] width 2880 pitch 11520 (/4 2880)
>[  1344.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604080]
>[  1344.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604080] width 2880 pitch 11520 (/4 2880)
>[  1344.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604080]
>[  1344.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604080] width 2880 pitch 11520 (/4 2880)
>[  1344.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f70]
>[  1344.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f70] width 2880 pitch 11520 (/4 2880)
>[  1344.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ecf8]
>[  1344.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ecf8] width 2880 pitch 11520 (/4 2880)
>[  1344.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449588]
>[  1344.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449588] width 2880 pitch 11520 (/4 2880)
>[  1344.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c350]
>[  1344.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c350] width 2880 pitch 11520 (/4 2880)
>[  1344.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f70]
>[  1345.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f70] width 2880 pitch 11520 (/4 2880)
>[  1345.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9524908]
>[  1345.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9524908] width 2880 pitch 11520 (/4 2880)
>[  1345.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604080]
>[  1345.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604080] width 2880 pitch 11520 (/4 2880)
>[  1345.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f70]
>[  1345.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f70] width 2880 pitch 11520 (/4 2880)
>[  1345.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c1b8]
>[  1345.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c1b8] width 2880 pitch 11520 (/4 2880)
>[  1348.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942eb58]
>[  1348.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942eb58] width 2880 pitch 11520 (/4 2880)
>[  1348.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951fb30]
>[  1348.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951fb30] width 2880 pitch 11520 (/4 2880)
>[  1348.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94435c0]
>[  1348.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94435c0] width 2880 pitch 11520 (/4 2880)
>[  1365.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1365.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1388.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9425210]
>[  1388.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9425210] width 2880 pitch 11520 (/4 2880)
>[  1394.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384a40]
>[  1395.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384a40] width 2880 pitch 11520 (/4 2880)
>[  1395.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f70]
>[  1395.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f70] width 2880 pitch 11520 (/4 2880)
>[  1395.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604080]
>[  1395.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604080] width 2880 pitch 11520 (/4 2880)
>[  1395.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9533598]
>[  1395.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9533598] width 2880 pitch 11520 (/4 2880)
>[  1395.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9533598]
>[  1395.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9533598] width 2880 pitch 11520 (/4 2880)
>[  1395.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9604080]
>[  1395.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9604080] width 2880 pitch 11520 (/4 2880)
>[  1395.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1395.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1395.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff028]
>[  1395.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff028] width 2880 pitch 11520 (/4 2880)
>[  1396.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff028]
>[  1396.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff028] width 2880 pitch 11520 (/4 2880)
>[  1396.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9553ce0]
>[  1396.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9553ce0] width 2880 pitch 11520 (/4 2880)
>[  1396.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1396.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1396.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9533598]
>[  1396.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9533598] width 2880 pitch 11520 (/4 2880)
>[  1396.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9400160]
>[  1396.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9400160] width 2880 pitch 11520 (/4 2880)
>[  1396.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9553ce0]
>[  1396.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9553ce0] width 2880 pitch 11520 (/4 2880)
>[  1396.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff028]
>[  1396.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff028] width 2880 pitch 11520 (/4 2880)
>[  1396.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9533598]
>[  1396.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9533598] width 2880 pitch 11520 (/4 2880)
>[  1396.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1396.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1396.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9553ce0]
>[  1396.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9553ce0] width 2880 pitch 11520 (/4 2880)
>[  1396.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1396.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1396.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9533598]
>[  1396.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9533598] width 2880 pitch 11520 (/4 2880)
>[  1396.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1396.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1396.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9553ce0]
>[  1396.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9553ce0] width 2880 pitch 11520 (/4 2880)
>[  1408.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0148]
>[  1408.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0148] width 2880 pitch 11520 (/4 2880)
>[  1408.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94431b8]
>[  1408.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94431b8] width 2880 pitch 11520 (/4 2880)
>[  1409.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384840]
>[  1409.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384840] width 2880 pitch 11520 (/4 2880)
>[  1409.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1409.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1409.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1409.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1409.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1409.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1409.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1409.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1409.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1409.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1409.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff1f8]
>[  1409.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff1f8] width 2880 pitch 11520 (/4 2880)
>[  1409.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff228]
>[  1410.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff228] width 2880 pitch 11520 (/4 2880)
>[  1410.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1410.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1410.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1410.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1410.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9551690]
>[  1410.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9551690] width 2880 pitch 11520 (/4 2880)
>[  1410.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9485850]
>[  1410.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9485850] width 2880 pitch 11520 (/4 2880)
>[  1410.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1410.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1410.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94431b8]
>[  1410.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94431b8] width 2880 pitch 11520 (/4 2880)
>[  1410.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480be8]
>[  1410.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480be8] width 2880 pitch 11520 (/4 2880)
>[  1410.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1410.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1410.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480be8]
>[  1410.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480be8] width 2880 pitch 11520 (/4 2880)
>[  1410.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1410.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1410.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536b00]
>[  1410.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536b00] width 2880 pitch 11520 (/4 2880)
>[  1410.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  1410.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  1411.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1411.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1413.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c978]
>[  1413.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c978] width 2880 pitch 11520 (/4 2880)
>[  1413.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1413.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1414.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c978]
>[  1414.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c978] width 2880 pitch 11520 (/4 2880)
>[  1414.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1414.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1414.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c978]
>[  1414.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c978] width 2880 pitch 11520 (/4 2880)
>[  1414.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1414.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1414.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1414.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1414.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c978]
>[  1414.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c978] width 2880 pitch 11520 (/4 2880)
>[  1414.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1414.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1414.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1414.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1414.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1414.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1415.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9440ef0]
>[  1415.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9440ef0] width 2880 pitch 11520 (/4 2880)
>[  1415.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1415.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1415.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1415.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1415.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1415.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1415.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1415.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1415.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1415.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1415.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4368]
>[  1415.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4368] width 2880 pitch 11520 (/4 2880)
>[  1415.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1415.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1415.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9535098]
>[  1415.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9535098] width 2880 pitch 11520 (/4 2880)
>[  1415.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94638f8]
>[  1415.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94638f8] width 2880 pitch 11520 (/4 2880)
>[  1418.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1418.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1418.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1418.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1418.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1418.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1418.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1418.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1418.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1418.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1418.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1418.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1418.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1418.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1418.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1418.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1418.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1419.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1419.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1419.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1419.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1419.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1419.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1419.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1420.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1420.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1421.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1421.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1421.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1421.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1421.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514740]
>[  1421.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514740] width 2880 pitch 11520 (/4 2880)
>[  1421.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456aa8]
>[  1421.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456aa8] width 2880 pitch 11520 (/4 2880)
>[  1421.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ab0]
>[  1421.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ab0] width 2880 pitch 11520 (/4 2880)
>[  1421.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94010a0]
>[  1421.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94010a0] width 2880 pitch 11520 (/4 2880)
>[  1421.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9344ba8]
>[  1421.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9344ba8] width 2880 pitch 11520 (/4 2880)
>[  1421.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93dcc58]
>[  1421.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93dcc58] width 2880 pitch 11520 (/4 2880)
>[  1426.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455a40]
>[  1426.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455a40] width 2880 pitch 11520 (/4 2880)
>[  1426.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  1426.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  1426.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455a80]
>[  1426.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455a80] width 2880 pitch 11520 (/4 2880)
>[  1426.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536660]
>[  1426.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536660] width 2880 pitch 11520 (/4 2880)
>[  1426.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  1426.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  1426.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  1426.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  1426.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514740]
>[  1427.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514740] width 2880 pitch 11520 (/4 2880)
>[  1427.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514770]
>[  1427.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514770] width 2880 pitch 11520 (/4 2880)
>[  1427.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514740]
>[  1427.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514740] width 2880 pitch 11520 (/4 2880)
>[  1427.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514770]
>[  1427.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514770] width 2880 pitch 11520 (/4 2880)
>[  1427.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9514740]
>[  1427.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9514740] width 2880 pitch 11520 (/4 2880)
>[  1429.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c2ad8]
>[  1429.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c2ad8] width 2880 pitch 11520 (/4 2880)
>[  1434.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c5c28]
>[  1434.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c5c28] width 2880 pitch 11520 (/4 2880)
>[  1435.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536618]
>[  1435.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536618] width 2880 pitch 11520 (/4 2880)
>[  1435.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1435.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1435.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1435.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1435.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1435.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1435.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1435.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1435.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954bc98]
>[  1435.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954bc98] width 2880 pitch 11520 (/4 2880)
>[  1435.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1435.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1442.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1442.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1442.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1442.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1443.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1443.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1443.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1443.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1443.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1443.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1443.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1443.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1443.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1443.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1443.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1443.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1443.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1443.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1443.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1443.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1443.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1443.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1443.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1444.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1444.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1444.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1444.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1444.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1444.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1445.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1445.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1445.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1445.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1445.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1445.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1445.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1445.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1445.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1445.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1445.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1445.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1445.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1445.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1445.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1445.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1445.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1445.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1445.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1445.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1445.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1445.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1445.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1454.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1454.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1454.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1454.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1454.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1454.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1454.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1454.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1454.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1454.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1454.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3988]
>[  1454.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3988] width 2880 pitch 11520 (/4 2880)
>[  1454.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1454.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1454.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce7f8]
>[  1454.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce7f8] width 2880 pitch 11520 (/4 2880)
>[  1454.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fdc90]
>[  1454.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fdc90] width 2880 pitch 11520 (/4 2880)
>[  1454.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ce788]
>[  1454.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ce788] width 2880 pitch 11520 (/4 2880)
>[  1456.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b9188]
>[  1456.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b9188] width 2880 pitch 11520 (/4 2880)
>[  1498.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447170]
>[  1498.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447170] width 2880 pitch 11520 (/4 2880)
>[  1499.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1499.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1501.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1501.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1501.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9425830]
>[  1501.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9425830] width 2880 pitch 11520 (/4 2880)
>[  1501.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1501.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1501.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1501.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1501.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1501.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1501.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1501.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1501.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1501.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1501.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1501.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1501.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1501.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1503.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1503.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1503.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1503.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1503.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1503.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1503.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1503.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1503.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1503.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1503.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1503.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1503.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1503.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1503.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1503.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1503.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91ad670]
>[  1503.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91ad670] width 2880 pitch 11520 (/4 2880)
>[  1503.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1503.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1504.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1504.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1504.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1504.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1504.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1504.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1504.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1504.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1504.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1504.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1504.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1504.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1504.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1504.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1504.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1504.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1504.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1504.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1504.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1504.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1504.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472a78]
>[  1504.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472a78] width 2880 pitch 11520 (/4 2880)
>[  1505.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1505.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1505.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1505.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1505.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1505.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1505.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1505.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1505.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1505.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1505.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1505.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1505.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1505.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1505.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1505.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1505.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1505.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1506.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937f6b0]
>[  1506.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937f6b0] width 2880 pitch 11520 (/4 2880)
>[  1507.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1507.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1507.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1507.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1507.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1507.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1507.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1507.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1507.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1507.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1507.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1507.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1507.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1507.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1507.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940ea00]
>[  1507.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940ea00] width 2880 pitch 11520 (/4 2880)
>[  1507.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1507.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1510.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1510.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1510.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1510.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1510.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1510.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1510.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1510.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1510.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1510.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1510.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1510.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1510.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1510.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1510.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1510.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1510.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1510.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1510.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1510.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1511.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1511.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1511.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[  1511.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[  1511.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1511.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1511.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1511.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1511.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1511.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1511.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1511.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1511.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1511.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1511.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1511.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1511.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1511.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1511.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1511.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1511.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1511.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1511.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1511.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1511.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1511.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1511.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1511.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1511.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1511.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1511.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1511.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1511.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1511.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1511.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1511.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1511.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[  1511.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[  1511.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x91ad670]
>[  1511.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x91ad670] width 2880 pitch 11520 (/4 2880)
>[  1513.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1513.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1513.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1513.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1513.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1513.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1513.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1513.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1513.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1513.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1513.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1513.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1513.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1513.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1513.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1513.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1513.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1513.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1513.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1513.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1516.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1516.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1516.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1516.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1516.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1516.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1516.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1516.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1516.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1516.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1516.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1516.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1516.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1516.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1516.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1516.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1516.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fcee8]
>[  1516.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fcee8] width 2880 pitch 11520 (/4 2880)
>[  1517.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1517.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1517.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1517.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1517.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1517.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1517.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9381ba0]
>[  1517.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9381ba0] width 2880 pitch 11520 (/4 2880)
>[  1517.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1517.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1517.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1517.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1517.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1517.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1517.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1517.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1517.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1517.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1517.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1517.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1517.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93df538]
>[  1517.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93df538] width 2880 pitch 11520 (/4 2880)
>[  1524.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3770]
>[  1524.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3770] width 2880 pitch 11520 (/4 2880)
>[  1524.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[  1524.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[  1524.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3770]
>[  1524.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3770] width 2880 pitch 11520 (/4 2880)
>[  1524.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[  1524.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[  1524.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3770]
>[  1524.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3770] width 2880 pitch 11520 (/4 2880)
>[  1524.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1524.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1524.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1524.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1524.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[  1524.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[  1524.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93deda0]
>[  1524.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93deda0] width 2880 pitch 11520 (/4 2880)
>[  1524.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94624f0]
>[  1524.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94624f0] width 2880 pitch 11520 (/4 2880)
>[  1528.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1528.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1528.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457100]
>[  1528.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457100] width 2880 pitch 11520 (/4 2880)
>[  1528.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94624f0]
>[  1528.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94624f0] width 2880 pitch 11520 (/4 2880)
>[  1528.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1528.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1528.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1528.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1528.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1528.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1528.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1528.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1528.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1528.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1528.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9472a78]
>[  1528.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9472a78] width 2880 pitch 11520 (/4 2880)
>[  1528.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1528.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1528.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1528.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1528.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1528.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1528.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95313c8]
>[  1529.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95313c8] width 2880 pitch 11520 (/4 2880)
>[  1529.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1529.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1529.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1529.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1529.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1529.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1529.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1529.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1529.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1529.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1529.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1529.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1529.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1529.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1529.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1529.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1529.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94624f0]
>[  1529.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94624f0] width 2880 pitch 11520 (/4 2880)
>[  1529.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1529.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1530.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941cf48]
>[  1530.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941cf48] width 2880 pitch 11520 (/4 2880)
>[  1530.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95545a0]
>[  1530.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95545a0] width 2880 pitch 11520 (/4 2880)
>[  1530.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1530.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1530.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c630]
>[  1530.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c630] width 2880 pitch 11520 (/4 2880)
>[  1530.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9556150]
>[  1530.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9556150] width 2880 pitch 11520 (/4 2880)
>[  1530.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c8788]
>[  1530.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c8788] width 2880 pitch 11520 (/4 2880)
>[  1530.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ee48]
>[  1530.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ee48] width 2880 pitch 11520 (/4 2880)
>[  1530.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c8788]
>[  1530.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c8788] width 2880 pitch 11520 (/4 2880)
>[  1530.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1530.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1530.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c3770]
>[  1530.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c3770] width 2880 pitch 11520 (/4 2880)
>[  1530.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f6230]
>[  1530.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f6230] width 2880 pitch 11520 (/4 2880)
>[  1530.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94624f0]
>[  1530.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94624f0] width 2880 pitch 11520 (/4 2880)
>[  1531.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3668]
>[  1531.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3668] width 2880 pitch 11520 (/4 2880)
>[  1531.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1531.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1531.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6c68]
>[  1531.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6c68] width 2880 pitch 11520 (/4 2880)
>[  1531.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1531.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1533.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dbd0]
>[  1533.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dbd0] width 2880 pitch 11520 (/4 2880)
>[  1533.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939cbb8]
>[  1533.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939cbb8] width 2880 pitch 11520 (/4 2880)
>[  1533.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1533.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1533.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952a318]
>[  1533.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952a318] width 2880 pitch 11520 (/4 2880)
>[  1533.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd308]
>[  1533.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd308] width 2880 pitch 11520 (/4 2880)
>[  1533.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95269b0]
>[  1533.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95269b0] width 2880 pitch 11520 (/4 2880)
>[  1533.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e2c08]
>[  1533.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e2c08] width 2880 pitch 11520 (/4 2880)
>[  1533.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9539590]
>[  1533.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9539590] width 2880 pitch 11520 (/4 2880)
>[  1533.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e5878]
>[  1533.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e5878] width 2880 pitch 11520 (/4 2880)
>[  1533.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ca10]
>[  1533.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ca10] width 2880 pitch 11520 (/4 2880)
>[  1533.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536b00]
>[  1533.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536b00] width 2880 pitch 11520 (/4 2880)
>[  1534.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944fb28]
>[  1534.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944fb28] width 2880 pitch 11520 (/4 2880)
>[  1534.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95305d0]
>[  1534.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95305d0] width 2880 pitch 11520 (/4 2880)
>[  1538.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9470960]
>[  1538.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9470960] width 2880 pitch 11520 (/4 2880)
>[  1538.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1538.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1538.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1539.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1539.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1539.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1539.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9432b60]
>[  1539.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9432b60] width 2880 pitch 11520 (/4 2880)
>[  1546.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1546.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1546.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1546.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1546.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1546.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1546.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1546.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1546.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1546.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1546.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1546.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1546.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1546.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1546.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1546.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1546.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1546.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1546.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1546.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1546.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1546.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1547.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1547.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1547.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1547.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1547.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1547.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1547.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1547.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1547.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1547.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1547.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1547.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1547.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1547.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1547.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1547.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1547.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1547.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1547.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1547.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1547.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1547.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1547.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1547.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1548.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bd1b0]
>[  1548.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bd1b0] width 2880 pitch 11520 (/4 2880)
>[  1548.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452628]
>[  1548.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452628] width 2880 pitch 11520 (/4 2880)
>[  1554.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1554.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1554.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95365d8]
>[  1554.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95365d8] width 2880 pitch 11520 (/4 2880)
>[  1554.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952bcb0]
>[  1554.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952bcb0] width 2880 pitch 11520 (/4 2880)
>[  1554.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95365d8]
>[  1554.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95365d8] width 2880 pitch 11520 (/4 2880)
>[  1554.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ca10]
>[  1554.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ca10] width 2880 pitch 11520 (/4 2880)
>[  1554.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1554.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1554.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952bcb0]
>[  1554.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952bcb0] width 2880 pitch 11520 (/4 2880)
>[  1554.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1554.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1554.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952bcb0]
>[  1554.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952bcb0] width 2880 pitch 11520 (/4 2880)
>[  1554.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ca10]
>[  1554.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ca10] width 2880 pitch 11520 (/4 2880)
>[  1554.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1554.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1555.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1555.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1555.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ba760]
>[  1555.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ba760] width 2880 pitch 11520 (/4 2880)
>[  1555.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9521a88]
>[  1555.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9521a88] width 2880 pitch 11520 (/4 2880)
>[  1555.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1555.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1555.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b5b8]
>[  1555.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b5b8] width 2880 pitch 11520 (/4 2880)
>[  1555.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515200]
>[  1555.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515200] width 2880 pitch 11520 (/4 2880)
>[  1555.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b5b8]
>[  1555.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b5b8] width 2880 pitch 11520 (/4 2880)
>[  1555.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1555.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1555.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e40]
>[  1555.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e40] width 2880 pitch 11520 (/4 2880)
>[  1555.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[  1555.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[  1555.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d540]
>[  1555.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d540] width 2880 pitch 11520 (/4 2880)
>[  1555.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1555.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1555.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d540]
>[  1555.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d540] width 2880 pitch 11520 (/4 2880)
>[  1555.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9461ca0]
>[  1555.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9461ca0] width 2880 pitch 11520 (/4 2880)
>[  1555.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d540]
>[  1555.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d540] width 2880 pitch 11520 (/4 2880)
>[  1555.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444688]
>[  1555.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444688] width 2880 pitch 11520 (/4 2880)
>[  1555.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1555.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1555.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d2c0]
>[  1555.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d2c0] width 2880 pitch 11520 (/4 2880)
>[  1555.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d540]
>[  1555.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d540] width 2880 pitch 11520 (/4 2880)
>[  1555.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93988c0]
>[  1555.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93988c0] width 2880 pitch 11520 (/4 2880)
>[  1555.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93defc0]
>[  1556.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93defc0] width 2880 pitch 11520 (/4 2880)
>[  1556.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444688]
>[  1556.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444688] width 2880 pitch 11520 (/4 2880)
>[  1556.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1556.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1556.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951d540]
>[  1556.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951d540] width 2880 pitch 11520 (/4 2880)
>[  1556.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93defc0]
>[  1556.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93defc0] width 2880 pitch 11520 (/4 2880)
>[  1556.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444688]
>[  1556.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444688] width 2880 pitch 11520 (/4 2880)
>[  1556.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1556.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1556.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1556.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1556.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9441488]
>[  1557.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9441488] width 2880 pitch 11520 (/4 2880)
>[  1557.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e728]
>[  1557.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e728] width 2880 pitch 11520 (/4 2880)
>[  1557.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d2c0]
>[  1557.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d2c0] width 2880 pitch 11520 (/4 2880)
>[  1557.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1557.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1557.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1557.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1557.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1557.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1557.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1557.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1557.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1557.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1557.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1557.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1557.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1557.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1557.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507b0]
>[  1557.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507b0] width 2880 pitch 11520 (/4 2880)
>[  1557.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410e20]
>[  1557.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410e20] width 2880 pitch 11520 (/4 2880)
>[  1557.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9403320]
>[  1557.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9403320] width 2880 pitch 11520 (/4 2880)
>[  1559.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbf98]
>[  1559.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbf98] width 2880 pitch 11520 (/4 2880)
>[  1559.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbf98]
>[  1559.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbf98] width 2880 pitch 11520 (/4 2880)
>[  1565.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453350]
>[  1565.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453350] width 2880 pitch 11520 (/4 2880)
>[  1565.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410838]
>[  1565.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410838] width 2880 pitch 11520 (/4 2880)
>[  1565.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e72f8]
>[  1565.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e72f8] width 2880 pitch 11520 (/4 2880)
>[  1566.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529b08]
>[  1566.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529b08] width 2880 pitch 11520 (/4 2880)
>[  1566.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940b840]
>[  1566.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940b840] width 2880 pitch 11520 (/4 2880)
>[  1566.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e7630]
>[  1566.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e7630] width 2880 pitch 11520 (/4 2880)
>[  1567.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9449f18]
>[  1567.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9449f18] width 2880 pitch 11520 (/4 2880)
>[  1567.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e7670]
>[  1567.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e7670] width 2880 pitch 11520 (/4 2880)
>[  1568.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dfc00]
>[  1568.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dfc00] width 2880 pitch 11520 (/4 2880)
>[  1568.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95303b0]
>[  1568.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95303b0] width 2880 pitch 11520 (/4 2880)
>[  1568.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95507e0]
>[  1568.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95507e0] width 2880 pitch 11520 (/4 2880)
>[  1568.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944d600]
>[  1568.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944d600] width 2880 pitch 11520 (/4 2880)
>[  1576.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e43e0]
>[  1576.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e43e0] width 2880 pitch 11520 (/4 2880)
>[  1576.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be9d0]
>[  1576.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be9d0] width 2880 pitch 11520 (/4 2880)
>[  1576.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463590]
>[  1576.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463590] width 2880 pitch 11520 (/4 2880)
>[  1576.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ea0d0]
>[  1576.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ea0d0] width 2880 pitch 11520 (/4 2880)
>[  1576.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c0d58]
>[  1576.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c0d58] width 2880 pitch 11520 (/4 2880)
>[  1576.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be9d0]
>[  1576.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be9d0] width 2880 pitch 11520 (/4 2880)
>[  1576.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452ec0]
>[  1576.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452ec0] width 2880 pitch 11520 (/4 2880)
>[  1576.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c85a0]
>[  1576.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c85a0] width 2880 pitch 11520 (/4 2880)
>[  1576.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e43e0]
>[  1576.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e43e0] width 2880 pitch 11520 (/4 2880)
>[  1576.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463590]
>[  1576.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463590] width 2880 pitch 11520 (/4 2880)
>[  1576.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94be9d0]
>[  1576.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94be9d0] width 2880 pitch 11520 (/4 2880)
>[  1578.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694378]
>[  1578.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694378] width 2880 pitch 11520 (/4 2880)
>[  1579.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1579.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1579.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940b840]
>[  1579.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940b840] width 2880 pitch 11520 (/4 2880)
>[  1579.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940b840]
>[  1579.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940b840] width 2880 pitch 11520 (/4 2880)
>[  1579.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94fef78]
>[  1579.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94fef78] width 2880 pitch 11520 (/4 2880)
>[  1677.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff028]
>[  1677.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff028] width 2880 pitch 11520 (/4 2880)
>[  1677.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667ab0]
>[  1677.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667ab0] width 2880 pitch 11520 (/4 2880)
>[  1677.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9659f60]
>[  1677.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9659f60] width 2880 pitch 11520 (/4 2880)
>[  1677.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ff50]
>[  1677.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ff50] width 2880 pitch 11520 (/4 2880)
>[  1677.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1677.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1677.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667ab0]
>[  1677.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667ab0] width 2880 pitch 11520 (/4 2880)
>[  1678.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1678.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1679.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1679.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1679.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ff50]
>[  1679.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ff50] width 2880 pitch 11520 (/4 2880)
>[  1679.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9667ab0]
>[  1679.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9667ab0] width 2880 pitch 11520 (/4 2880)
>[  1679.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ff50]
>[  1679.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ff50] width 2880 pitch 11520 (/4 2880)
>[  1679.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ff028]
>[  1679.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ff028] width 2880 pitch 11520 (/4 2880)
>[  1679.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9685820]
>[  1679.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9685820] width 2880 pitch 11520 (/4 2880)
>[  1679.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d13b0]
>[  1679.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d13b0] width 2880 pitch 11520 (/4 2880)
>[  1679.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668dc8]
>[  1679.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668dc8] width 2880 pitch 11520 (/4 2880)
>[  1679.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d32f8]
>[  1679.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d32f8] width 2880 pitch 11520 (/4 2880)
>[  1679.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1679.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1679.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9681850]
>[  1679.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9681850] width 2880 pitch 11520 (/4 2880)
>[  1684.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bb358]
>[  1684.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bb358] width 2880 pitch 11520 (/4 2880)
>[  1684.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655448]
>[  1684.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655448] width 2880 pitch 11520 (/4 2880)
>[  1684.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949bb80]
>[  1684.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949bb80] width 2880 pitch 11520 (/4 2880)
>[  1684.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c95b8]
>[  1684.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c95b8] width 2880 pitch 11520 (/4 2880)
>[  1684.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655448]
>[  1684.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655448] width 2880 pitch 11520 (/4 2880)
>[  1684.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cadb0]
>[  1685.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cadb0] width 2880 pitch 11520 (/4 2880)
>[  1685.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463560]
>[  1685.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463560] width 2880 pitch 11520 (/4 2880)
>[  1686.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1686.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1686.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c95b8]
>[  1686.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c95b8] width 2880 pitch 11520 (/4 2880)
>[  1686.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c95b8]
>[  1686.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c95b8] width 2880 pitch 11520 (/4 2880)
>[  1686.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1686.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1686.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1686.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1687.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1687.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1689.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c93f8]
>[  1689.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c93f8] width 2880 pitch 11520 (/4 2880)
>[  1689.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e7940]
>[  1689.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e7940] width 2880 pitch 11520 (/4 2880)
>[  1689.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964f088]
>[  1689.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964f088] width 2880 pitch 11520 (/4 2880)
>[  1690.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486730]
>[  1690.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486730] width 2880 pitch 11520 (/4 2880)
>[  1690.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1690.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1690.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1690.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1690.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1690.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1690.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1690.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1691.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c91f8]
>[  1691.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c91f8] width 2880 pitch 11520 (/4 2880)
>[  1691.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6108]
>[  1691.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6108] width 2880 pitch 11520 (/4 2880)
>[  1691.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96665b8]
>[  1691.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96665b8] width 2880 pitch 11520 (/4 2880)
>[  1691.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531ca0]
>[  1691.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531ca0] width 2880 pitch 11520 (/4 2880)
>[  1697.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dfab0]
>[  1697.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dfab0] width 2880 pitch 11520 (/4 2880)
>[  1698.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945b0a8]
>[  1698.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945b0a8] width 2880 pitch 11520 (/4 2880)
>[  1698.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966e530]
>[  1698.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966e530] width 2880 pitch 11520 (/4 2880)
>[  1698.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dfab0]
>[  1698.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dfab0] width 2880 pitch 11520 (/4 2880)
>[  1699.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95340f0]
>[  1699.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95340f0] width 2880 pitch 11520 (/4 2880)
>[  1699.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95340f0]
>[  1699.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95340f0] width 2880 pitch 11520 (/4 2880)
>[  1700.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dfab0]
>[  1700.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dfab0] width 2880 pitch 11520 (/4 2880)
>[  1701.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96665b8]
>[  1701.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96665b8] width 2880 pitch 11520 (/4 2880)
>[  1701.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9386ba8]
>[  1701.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9386ba8] width 2880 pitch 11520 (/4 2880)
>[  1701.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ce620]
>[  1701.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ce620] width 2880 pitch 11520 (/4 2880)
>[  1701.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1701.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1701.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ce620]
>[  1701.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ce620] width 2880 pitch 11520 (/4 2880)
>[  1701.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1701.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1703.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1703.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1703.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ce620]
>[  1703.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ce620] width 2880 pitch 11520 (/4 2880)
>[  1703.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d3740]
>[  1703.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d3740] width 2880 pitch 11520 (/4 2880)
>[  1703.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96665b8]
>[  1703.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96665b8] width 2880 pitch 11520 (/4 2880)
>[  1704.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486700]
>[  1704.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486700] width 2880 pitch 11520 (/4 2880)
>[  1704.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95132c8]
>[  1704.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95132c8] width 2880 pitch 11520 (/4 2880)
>[  1704.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1704.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1704.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ce620]
>[  1704.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ce620] width 2880 pitch 11520 (/4 2880)
>[  1704.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1705.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1705.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486700]
>[  1705.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486700] width 2880 pitch 11520 (/4 2880)
>[  1705.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1705.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1705.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1705.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1705.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d0b88]
>[  1705.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d0b88] width 2880 pitch 11520 (/4 2880)
>[  1705.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d13b0]
>[  1705.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d13b0] width 2880 pitch 11520 (/4 2880)
>[  1706.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9400160]
>[  1706.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9400160] width 2880 pitch 11520 (/4 2880)
>[  1706.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486848]
>[  1706.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486848] width 2880 pitch 11520 (/4 2880)
>[  1706.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d3770]
>[  1706.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d3770] width 2880 pitch 11520 (/4 2880)
>[  1706.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ff50]
>[  1706.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ff50] width 2880 pitch 11520 (/4 2880)
>[  1714.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1714.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1715.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968c1f0]
>[  1715.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968c1f0] width 2880 pitch 11520 (/4 2880)
>[  1715.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668dc8]
>[  1715.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668dc8] width 2880 pitch 11520 (/4 2880)
>[  1715.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668dc8]
>[  1715.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668dc8] width 2880 pitch 11520 (/4 2880)
>[  1715.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1715.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1715.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1715.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1716.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668dc8]
>[  1716.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668dc8] width 2880 pitch 11520 (/4 2880)
>[  1716.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95320c8]
>[  1716.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95320c8] width 2880 pitch 11520 (/4 2880)
>[  1716.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1716.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1716.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1717.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1717.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1717.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1717.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1717.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1717.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96940d8]
>[  1717.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96940d8] width 2880 pitch 11520 (/4 2880)
>[  1729.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384298]
>[  1729.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384298] width 2880 pitch 11520 (/4 2880)
>[  1740.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96728a8]
>[  1740.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96728a8] width 2880 pitch 11520 (/4 2880)
>[  1740.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9517bc8]
>[  1740.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9517bc8] width 2880 pitch 11520 (/4 2880)
>[  1740.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96728a8]
>[  1740.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96728a8] width 2880 pitch 11520 (/4 2880)
>[  1740.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1740.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1740.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96728a8]
>[  1740.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96728a8] width 2880 pitch 11520 (/4 2880)
>[  1740.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cb410]
>[  1740.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cb410] width 2880 pitch 11520 (/4 2880)
>[  1740.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967a978]
>[  1740.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967a978] width 2880 pitch 11520 (/4 2880)
>[  1740.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1740.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1740.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9517bc8]
>[  1740.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9517bc8] width 2880 pitch 11520 (/4 2880)
>[  1740.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1740.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1740.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2c50]
>[  1740.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2c50] width 2880 pitch 11520 (/4 2880)
>[  1740.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7a38]
>[  1740.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7a38] width 2880 pitch 11520 (/4 2880)
>[  1740.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cb410]
>[  1740.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cb410] width 2880 pitch 11520 (/4 2880)
>[  1740.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9517bc8]
>[  1740.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9517bc8] width 2880 pitch 11520 (/4 2880)
>[  1744.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1744.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1744.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d1468]
>[  1744.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d1468] width 2880 pitch 11520 (/4 2880)
>[  1744.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbe30]
>[  1744.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbe30] width 2880 pitch 11520 (/4 2880)
>[  1744.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965f490]
>[  1744.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965f490] width 2880 pitch 11520 (/4 2880)
>[  1744.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbe30]
>[  1744.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbe30] width 2880 pitch 11520 (/4 2880)
>[  1744.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1744.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1744.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c91b8]
>[  1744.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c91b8] width 2880 pitch 11520 (/4 2880)
>[  1744.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601358]
>[  1744.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601358] width 2880 pitch 11520 (/4 2880)
>[  1744.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423a18]
>[  1744.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423a18] width 2880 pitch 11520 (/4 2880)
>[  1744.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4c10]
>[  1744.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4c10] width 2880 pitch 11520 (/4 2880)
>[  1744.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4c10]
>[  1744.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4c10] width 2880 pitch 11520 (/4 2880)
>[  1744.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1744.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1744.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601358]
>[  1744.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601358] width 2880 pitch 11520 (/4 2880)
>[  1745.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966b648]
>[  1745.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966b648] width 2880 pitch 11520 (/4 2880)
>[  1745.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4c10]
>[  1745.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4c10] width 2880 pitch 11520 (/4 2880)
>[  1745.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966b648]
>[  1745.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966b648] width 2880 pitch 11520 (/4 2880)
>[  1745.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601358]
>[  1745.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601358] width 2880 pitch 11520 (/4 2880)
>[  1745.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1745.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1745.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5278]
>[  1745.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5278] width 2880 pitch 11520 (/4 2880)
>[  1745.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4c10]
>[  1745.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4c10] width 2880 pitch 11520 (/4 2880)
>[  1745.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5278]
>[  1745.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5278] width 2880 pitch 11520 (/4 2880)
>[  1745.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1745.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1745.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1745.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1745.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601358]
>[  1745.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601358] width 2880 pitch 11520 (/4 2880)
>[  1745.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4c10]
>[  1746.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4c10] width 2880 pitch 11520 (/4 2880)
>[  1746.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9601358]
>[  1746.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9601358] width 2880 pitch 11520 (/4 2880)
>[  1746.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4be0]
>[  1746.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4be0] width 2880 pitch 11520 (/4 2880)
>[  1783.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96848a8]
>[  1783.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96848a8] width 2880 pitch 11520 (/4 2880)
>[  1783.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96873f8]
>[  1783.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96873f8] width 2880 pitch 11520 (/4 2880)
>[  1783.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967bf38]
>[  1783.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967bf38] width 2880 pitch 11520 (/4 2880)
>[  1783.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967c0d8]
>[  1783.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967c0d8] width 2880 pitch 11520 (/4 2880)
>[  1783.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96873f8]
>[  1783.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96873f8] width 2880 pitch 11520 (/4 2880)
>[  1784.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967c0d8]
>[  1784.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967c0d8] width 2880 pitch 11520 (/4 2880)
>[  1785.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9666080]
>[  1785.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9666080] width 2880 pitch 11520 (/4 2880)
>[  1785.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5278]
>[  1785.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5278] width 2880 pitch 11520 (/4 2880)
>[  1785.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e17f8]
>[  1785.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e17f8] width 2880 pitch 11520 (/4 2880)
>[  1785.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e17f8]
>[  1785.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e17f8] width 2880 pitch 11520 (/4 2880)
>[  1785.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1785.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1785.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967c488]
>[  1785.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967c488] width 2880 pitch 11520 (/4 2880)
>[  1786.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e1538]
>[  1786.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e1538] width 2880 pitch 11520 (/4 2880)
>[  1788.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1788.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1788.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1788.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1788.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463560]
>[  1788.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463560] width 2880 pitch 11520 (/4 2880)
>[  1788.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463560]
>[  1788.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463560] width 2880 pitch 11520 (/4 2880)
>[  1788.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cadb0]
>[  1788.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cadb0] width 2880 pitch 11520 (/4 2880)
>[  1789.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cb9c8]
>[  1789.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cb9c8] width 2880 pitch 11520 (/4 2880)
>[  1789.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cb9c8]
>[  1789.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cb9c8] width 2880 pitch 11520 (/4 2880)
>[  1789.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1789.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1789.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1789.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1789.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95132c8]
>[  1789.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95132c8] width 2880 pitch 11520 (/4 2880)
>[  1789.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1789.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1812.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1812.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1812.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1812.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1812.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1812.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1812.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1812.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1812.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95132c8]
>[  1812.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95132c8] width 2880 pitch 11520 (/4 2880)
>[  1812.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1812.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1812.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1812.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1812.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1813.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1813.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1813.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1813.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9694108]
>[  1813.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9694108] width 2880 pitch 11520 (/4 2880)
>[  1814.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6668]
>[  1814.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6668] width 2880 pitch 11520 (/4 2880)
>[  1814.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d0c08]
>[  1814.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d0c08] width 2880 pitch 11520 (/4 2880)
>[  1814.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967a598]
>[  1815.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967a598] width 2880 pitch 11520 (/4 2880)
>[  1815.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9517980]
>[  1815.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9517980] width 2880 pitch 11520 (/4 2880)
>[  1815.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1815.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1815.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0270]
>[  1815.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0270] width 2880 pitch 11520 (/4 2880)
>[  1815.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9670368]
>[  1815.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9670368] width 2880 pitch 11520 (/4 2880)
>[  1815.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e1538]
>[  1815.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e1538] width 2880 pitch 11520 (/4 2880)
>[  1815.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1816.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1816.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9670368]
>[  1816.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9670368] width 2880 pitch 11520 (/4 2880)
>[  1817.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96873f8]
>[  1817.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96873f8] width 2880 pitch 11520 (/4 2880)
>[  1817.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96876c8]
>[  1817.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96876c8] width 2880 pitch 11520 (/4 2880)
>[  1817.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a78c0]
>[  1817.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a78c0] width 2880 pitch 11520 (/4 2880)
>[  1818.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cadb0]
>[  1818.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cadb0] width 2880 pitch 11520 (/4 2880)
>[  1818.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94cadb0]
>[  1818.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94cadb0] width 2880 pitch 11520 (/4 2880)
>[  1818.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d54b8]
>[  1818.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d54b8] width 2880 pitch 11520 (/4 2880)
>[  1818.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3090]
>[  1818.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3090] width 2880 pitch 11520 (/4 2880)
>[  1819.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3090]
>[  1819.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3090] width 2880 pitch 11520 (/4 2880)
>[  1819.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9672d48]
>[  1819.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9672d48] width 2880 pitch 11520 (/4 2880)
>[  1819.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96941a8]
>[  1819.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96941a8] width 2880 pitch 11520 (/4 2880)
>[  1821.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[  1821.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[  1821.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a62c0]
>[  1821.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a62c0] width 2880 pitch 11520 (/4 2880)
>[  1821.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5638]
>[  1821.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5638] width 2880 pitch 11520 (/4 2880)
>[  1821.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5638]
>[  1821.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5638] width 2880 pitch 11520 (/4 2880)
>[  1821.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96539a8]
>[  1821.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96539a8] width 2880 pitch 11520 (/4 2880)
>[  1821.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96539a8]
>[  1821.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96539a8] width 2880 pitch 11520 (/4 2880)
>[  1821.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683440]
>[  1821.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683440] width 2880 pitch 11520 (/4 2880)
>[  1821.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d84a8]
>[  1821.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d84a8] width 2880 pitch 11520 (/4 2880)
>[  1821.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5638]
>[  1821.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5638] width 2880 pitch 11520 (/4 2880)
>[  1821.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683440]
>[  1821.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683440] width 2880 pitch 11520 (/4 2880)
>[  1821.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96539a8]
>[  1821.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96539a8] width 2880 pitch 11520 (/4 2880)
>[  1821.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b5638]
>[  1821.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b5638] width 2880 pitch 11520 (/4 2880)
>[  1821.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96539a8]
>[  1821.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96539a8] width 2880 pitch 11520 (/4 2880)
>[  1821.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d84a8]
>[  1821.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d84a8] width 2880 pitch 11520 (/4 2880)
>[  1821.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d8538]
>[  1821.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d8538] width 2880 pitch 11520 (/4 2880)
>[  1821.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95551f0]
>[  1821.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95551f0] width 2880 pitch 11520 (/4 2880)
>[  1825.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5e28]
>[  1825.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5e28] width 2880 pitch 11520 (/4 2880)
>[  1825.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1825.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1825.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dec78]
>[  1825.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dec78] width 2880 pitch 11520 (/4 2880)
>[  1825.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1825.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1825.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1825.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1825.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dec78]
>[  1825.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dec78] width 2880 pitch 11520 (/4 2880)
>[  1825.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d8a78]
>[  1825.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d8a78] width 2880 pitch 11520 (/4 2880)
>[  1826.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dec78]
>[  1826.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dec78] width 2880 pitch 11520 (/4 2880)
>[  1827.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1827.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1827.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d8a78]
>[  1827.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d8a78] width 2880 pitch 11520 (/4 2880)
>[  1827.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1828.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1828.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa000]
>[  1828.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa000] width 2880 pitch 11520 (/4 2880)
>[  1828.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1828.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1836.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1836.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1836.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1836.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1836.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ea6d0]
>[  1836.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ea6d0] width 2880 pitch 11520 (/4 2880)
>[  1836.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1836.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1836.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1836.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1836.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa588]
>[  1836.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa588] width 2880 pitch 11520 (/4 2880)
>[  1836.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1836.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1836.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1836.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1836.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1836.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1836.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ea6d0]
>[  1836.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ea6d0] width 2880 pitch 11520 (/4 2880)
>[  1836.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1836.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1836.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1836.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1840.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96702b0]
>[  1840.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96702b0] width 2880 pitch 11520 (/4 2880)
>[  1840.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1840.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1840.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a87c0]
>[  1840.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a87c0] width 2880 pitch 11520 (/4 2880)
>[  1840.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1840.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1840.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1840.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1840.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1840.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1840.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ea6d0]
>[  1840.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ea6d0] width 2880 pitch 11520 (/4 2880)
>[  1840.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1840.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1840.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1840.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1840.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1840.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1840.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1840.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1840.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1840.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1840.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1840.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1840.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ea6d0]
>[  1840.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ea6d0] width 2880 pitch 11520 (/4 2880)
>[  1841.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  1841.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  1841.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1841.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1841.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1841.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1841.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95ea6d0]
>[  1841.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95ea6d0] width 2880 pitch 11520 (/4 2880)
>[  1841.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  1841.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  1841.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1841.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1841.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1841.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1841.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  1841.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  1841.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1841.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1841.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  1841.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  1841.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcec0]
>[  1841.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcec0] width 2880 pitch 11520 (/4 2880)
>[  1841.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  1841.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  1841.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  1841.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  1847.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96edf48]
>[  1847.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96edf48] width 2880 pitch 11520 (/4 2880)
>[  1858.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976fc58]
>[  1858.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976fc58] width 2880 pitch 11520 (/4 2880)
>[  1888.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1888.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1888.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1888.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1888.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1888.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1888.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1888.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1888.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8f68]
>[  1888.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8f68] width 2880 pitch 11520 (/4 2880)
>[  1888.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc560]
>[  1888.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc560] width 2880 pitch 11520 (/4 2880)
>[  1889.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb468]
>[  1889.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb468] width 2880 pitch 11520 (/4 2880)
>[  1889.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d7d0]
>[  1889.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d7d0] width 2880 pitch 11520 (/4 2880)
>[  1889.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1889.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1889.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977aa18]
>[  1889.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977aa18] width 2880 pitch 11520 (/4 2880)
>[  1889.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1889.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1889.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1889.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1890.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977aa18]
>[  1890.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977aa18] width 2880 pitch 11520 (/4 2880)
>[  1890.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb468]
>[  1890.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb468] width 2880 pitch 11520 (/4 2880)
>[  1890.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1890.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1890.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb468]
>[  1890.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb468] width 2880 pitch 11520 (/4 2880)
>[  1890.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979d7d0]
>[  1890.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979d7d0] width 2880 pitch 11520 (/4 2880)
>[  1890.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1890.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1890.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8f68]
>[  1890.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8f68] width 2880 pitch 11520 (/4 2880)
>[  1895.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977aa18]
>[  1895.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977aa18] width 2880 pitch 11520 (/4 2880)
>[  1896.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d5c0]
>[  1896.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d5c0] width 2880 pitch 11520 (/4 2880)
>[  1896.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d5c0]
>[  1896.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d5c0] width 2880 pitch 11520 (/4 2880)
>[  1896.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1896.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1896.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977aa18]
>[  1896.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977aa18] width 2880 pitch 11520 (/4 2880)
>[  1896.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8f68]
>[  1896.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8f68] width 2880 pitch 11520 (/4 2880)
>[  1896.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1896.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1897.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1897.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1898.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1898.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1898.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1898.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1898.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1898.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1898.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1898.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1898.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1898.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1898.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1898.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1898.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3430]
>[  1898.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3430] width 2880 pitch 11520 (/4 2880)
>[  1898.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1898.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1899.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732fd8]
>[  1899.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732fd8] width 2880 pitch 11520 (/4 2880)
>[  1899.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa298]
>[  1899.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa298] width 2880 pitch 11520 (/4 2880)
>[  1899.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1899.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1899.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa298]
>[  1899.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa298] width 2880 pitch 11520 (/4 2880)
>[  1900.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770af0]
>[  1900.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770af0] width 2880 pitch 11520 (/4 2880)
>[  1900.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca280]
>[  1900.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca280] width 2880 pitch 11520 (/4 2880)
>[  1900.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1900.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1900.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa298]
>[  1900.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa298] width 2880 pitch 11520 (/4 2880)
>[  1900.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1900.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1901.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8f68]
>[  1901.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8f68] width 2880 pitch 11520 (/4 2880)
>[  1901.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1901.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1901.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e93b8]
>[  1901.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e93b8] width 2880 pitch 11520 (/4 2880)
>[  1901.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1901.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1918.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1918.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1918.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[  1918.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[  1918.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1918.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1918.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[  1918.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[  1918.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1918.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1918.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1918.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1918.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1918.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1918.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[  1918.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[  1918.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1918.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1918.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1918.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1918.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9804118]
>[  1918.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9804118] width 2880 pitch 11520 (/4 2880)
>[  1918.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[  1918.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[  1922.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa588]
>[  1922.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa588] width 2880 pitch 11520 (/4 2880)
>[  1922.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1922.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1922.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1922.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1922.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1922.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1922.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1922.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1922.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1923.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1923.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1923.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1923.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5648]
>[  1923.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5648] width 2880 pitch 11520 (/4 2880)
>[  1923.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1923.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1923.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1923.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1923.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1923.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1923.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1923.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1923.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1923.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1924.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1924.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1924.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1924.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1924.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1924.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1924.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1924.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1924.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1924.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1924.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1924.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1924.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1924.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1924.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1924.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1924.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1924.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966bd80]
>[  1924.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966bd80] width 2880 pitch 11520 (/4 2880)
>[  1924.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c84a8]
>[  1924.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c84a8] width 2880 pitch 11520 (/4 2880)
>[  1928.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f8d8]
>[  1928.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f8d8] width 2880 pitch 11520 (/4 2880)
>[  1928.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cc790]
>[  1928.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cc790] width 2880 pitch 11520 (/4 2880)
>[  1928.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c688]
>[  1928.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c688] width 2880 pitch 11520 (/4 2880)
>[  1928.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9771158]
>[  1928.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9771158] width 2880 pitch 11520 (/4 2880)
>[  1970.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa588]
>[  1970.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa588] width 2880 pitch 11520 (/4 2880)
>[  1970.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97073a8]
>[  1970.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97073a8] width 2880 pitch 11520 (/4 2880)
>[  1971.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b94a8]
>[  1971.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b94a8] width 2880 pitch 11520 (/4 2880)
>[  1971.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b94a8]
>[  1971.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b94a8] width 2880 pitch 11520 (/4 2880)
>[  2013.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4230]
>[  2013.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4230] width 2880 pitch 11520 (/4 2880)
>[  2014.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4230]
>[  2014.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4230] width 2880 pitch 11520 (/4 2880)
>[  2014.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4230]
>[  2014.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4230] width 2880 pitch 11520 (/4 2880)
>[  2014.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa588]
>[  2014.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa588] width 2880 pitch 11520 (/4 2880)
>[  2014.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e01c0]
>[  2014.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e01c0] width 2880 pitch 11520 (/4 2880)
>[  2014.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4230]
>[  2014.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4230] width 2880 pitch 11520 (/4 2880)
>[  2014.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa588]
>[  2014.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa588] width 2880 pitch 11520 (/4 2880)
>[  2014.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4230]
>[  2014.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4230] width 2880 pitch 11520 (/4 2880)
>[  2015.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e01c0]
>[  2015.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e01c0] width 2880 pitch 11520 (/4 2880)
>[  2016.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2016.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2016.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ae0]
>[  2016.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ae0] width 2880 pitch 11520 (/4 2880)
>[  2016.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2016.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2016.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ae0]
>[  2016.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ae0] width 2880 pitch 11520 (/4 2880)
>[  2016.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2016.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2016.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ae0]
>[  2016.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ae0] width 2880 pitch 11520 (/4 2880)
>[  2016.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2016.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2023.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2023.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2024.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2024.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2024.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d940]
>[  2024.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d940] width 2880 pitch 11520 (/4 2880)
>[  2025.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2025.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2025.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc640]
>[  2025.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc640] width 2880 pitch 11520 (/4 2880)
>[  2025.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ffa8]
>[  2025.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ffa8] width 2880 pitch 11520 (/4 2880)
>[  2025.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ad00]
>[  2025.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ad00] width 2880 pitch 11520 (/4 2880)
>[  2025.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973a2d0]
>[  2025.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973a2d0] width 2880 pitch 11520 (/4 2880)
>[  2025.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ae0]
>[  2025.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ae0] width 2880 pitch 11520 (/4 2880)
>[  2025.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2025.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2025.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc640]
>[  2025.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc640] width 2880 pitch 11520 (/4 2880)
>[  2025.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2026.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2026.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ffa8]
>[  2026.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ffa8] width 2880 pitch 11520 (/4 2880)
>[  2026.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2026.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2026.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d940]
>[  2026.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d940] width 2880 pitch 11520 (/4 2880)
>[  2026.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2026.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2027.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2027.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2029.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ad00]
>[  2029.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ad00] width 2880 pitch 11520 (/4 2880)
>[  2029.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  2029.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  2029.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ffa8]
>[  2029.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ffa8] width 2880 pitch 11520 (/4 2880)
>[  2029.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  2029.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  2029.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2029.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2029.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  2030.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  2030.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  2030.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  2030.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  2030.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  2030.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  2030.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  2031.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  2031.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  2031.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  2031.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  2031.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  2031.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  2031.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d8620]
>[  2031.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d8620] width 2880 pitch 11520 (/4 2880)
>[  2031.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  2031.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  2031.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  2031.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  2031.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  2031.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  2031.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ffa8]
>[  2032.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ffa8] width 2880 pitch 11520 (/4 2880)
>[  2032.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9330]
>[  2032.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9330] width 2880 pitch 11520 (/4 2880)
>[  2035.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ad00]
>[  2035.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ad00] width 2880 pitch 11520 (/4 2880)
>[  2035.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  2035.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  2035.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ad00]
>[  2035.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ad00] width 2880 pitch 11520 (/4 2880)
>[  2035.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  2035.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  2035.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978ad00]
>[  2035.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978ad00] width 2880 pitch 11520 (/4 2880)
>[  2035.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9190]
>[  2035.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9190] width 2880 pitch 11520 (/4 2880)
>[  2035.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  2035.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  2036.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  2036.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  2036.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2036.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2036.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  2036.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  2037.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2037.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2037.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5e28]
>[  2037.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5e28] width 2880 pitch 11520 (/4 2880)
>[  2037.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94dec78]
>[  2037.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94dec78] width 2880 pitch 11520 (/4 2880)
>[  2038.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95551f0]
>[  2038.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95551f0] width 2880 pitch 11520 (/4 2880)
>[  2038.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2038.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2038.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95551f0]
>[  2038.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95551f0] width 2880 pitch 11520 (/4 2880)
>[  2038.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d1ed8]
>[  2038.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d1ed8] width 2880 pitch 11520 (/4 2880)
>[  2038.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2038.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2038.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2038.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2038.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2038.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2038.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2038.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2038.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9789410]
>[  2038.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9789410] width 2880 pitch 11520 (/4 2880)
>[  2043.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97898f0]
>[  2043.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97898f0] width 2880 pitch 11520 (/4 2880)
>[  2043.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2043.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2043.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2043.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2043.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b250]
>[  2043.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b250] width 2880 pitch 11520 (/4 2880)
>[  2043.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9735e90]
>[  2043.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9735e90] width 2880 pitch 11520 (/4 2880)
>[  2043.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2043.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2043.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9735e90]
>[  2043.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9735e90] width 2880 pitch 11520 (/4 2880)
>[  2043.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2043.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2043.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2043.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2043.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2043.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2043.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2043.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2043.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2043.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2043.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e20e8]
>[  2043.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e20e8] width 2880 pitch 11520 (/4 2880)
>[  2043.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3d00]
>[  2043.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3d00] width 2880 pitch 11520 (/4 2880)
>[  2055.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b250]
>[  2055.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b250] width 2880 pitch 11520 (/4 2880)
>[  2055.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97136f0]
>[  2055.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97136f0] width 2880 pitch 11520 (/4 2880)
>[  2055.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9701978]
>[  2055.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9701978] width 2880 pitch 11520 (/4 2880)
>[  2055.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b250]
>[  2055.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b250] width 2880 pitch 11520 (/4 2880)
>[  2055.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9701978]
>[  2055.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9701978] width 2880 pitch 11520 (/4 2880)
>[  2055.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b250]
>[  2055.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b250] width 2880 pitch 11520 (/4 2880)
>[  2055.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9701978]
>[  2055.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9701978] width 2880 pitch 11520 (/4 2880)
>[  2055.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97136f0]
>[  2055.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97136f0] width 2880 pitch 11520 (/4 2880)
>[  2055.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6118]
>[  2055.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6118] width 2880 pitch 11520 (/4 2880)
>[  2055.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ab400]
>[  2055.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ab400] width 2880 pitch 11520 (/4 2880)
>[  2081.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ed10]
>[  2081.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ed10] width 2880 pitch 11520 (/4 2880)
>[  2081.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97894a0]
>[  2081.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97894a0] width 2880 pitch 11520 (/4 2880)
>[  2081.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ed10]
>[  2081.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ed10] width 2880 pitch 11520 (/4 2880)
>[  2081.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97894a0]
>[  2081.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97894a0] width 2880 pitch 11520 (/4 2880)
>[  2081.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ed10]
>[  2081.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ed10] width 2880 pitch 11520 (/4 2880)
>[  2081.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980e130]
>[  2081.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980e130] width 2880 pitch 11520 (/4 2880)
>[  2081.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ed10]
>[  2081.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ed10] width 2880 pitch 11520 (/4 2880)
>[  2081.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980e130]
>[  2081.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980e130] width 2880 pitch 11520 (/4 2880)
>[  2081.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e988]
>[  2081.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e988] width 2880 pitch 11520 (/4 2880)
>[  2083.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9eb0]
>[  2083.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9eb0] width 2880 pitch 11520 (/4 2880)
>[  2083.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a728]
>[  2083.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a728] width 2880 pitch 11520 (/4 2880)
>[  2083.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e9a8]
>[  2083.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e9a8] width 2880 pitch 11520 (/4 2880)
>[  2083.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9eb0]
>[  2083.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9eb0] width 2880 pitch 11520 (/4 2880)
>[  2083.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9e80]
>[  2083.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9e80] width 2880 pitch 11520 (/4 2880)
>[  2083.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980e130]
>[  2083.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980e130] width 2880 pitch 11520 (/4 2880)
>[  2084.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980e130]
>[  2084.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980e130] width 2880 pitch 11520 (/4 2880)
>[  2085.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980e130]
>[  2085.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980e130] width 2880 pitch 11520 (/4 2880)
>[  2085.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e958]
>[  2085.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e958] width 2880 pitch 11520 (/4 2880)
>[  2085.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e958]
>[  2085.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e958] width 2880 pitch 11520 (/4 2880)
>[  2085.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2085.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2085.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2085.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2085.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c75f0]
>[  2085.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c75f0] width 2880 pitch 11520 (/4 2880)
>[  2088.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9703158]
>[  2088.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9703158] width 2880 pitch 11520 (/4 2880)
>[  2088.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da910]
>[  2088.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da910] width 2880 pitch 11520 (/4 2880)
>[  2088.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2088.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2088.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da910]
>[  2088.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da910] width 2880 pitch 11520 (/4 2880)
>[  2088.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942c1c0]
>[  2088.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942c1c0] width 2880 pitch 11520 (/4 2880)
>[  2089.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942c1c0]
>[  2089.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942c1c0] width 2880 pitch 11520 (/4 2880)
>[  2089.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942c1c0]
>[  2089.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942c1c0] width 2880 pitch 11520 (/4 2880)
>[  2089.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942c1c0]
>[  2089.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942c1c0] width 2880 pitch 11520 (/4 2880)
>[  2089.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2089.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2089.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2089.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2089.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ccf8]
>[  2090.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ccf8] width 2880 pitch 11520 (/4 2880)
>[  2090.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ccf8]
>[  2090.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ccf8] width 2880 pitch 11520 (/4 2880)
>[  2090.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2090.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2090.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ccf8]
>[  2090.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ccf8] width 2880 pitch 11520 (/4 2880)
>[  2090.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ccf8]
>[  2090.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ccf8] width 2880 pitch 11520 (/4 2880)
>[  2090.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2090.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2090.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ccf8]
>[  2090.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ccf8] width 2880 pitch 11520 (/4 2880)
>[  2090.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bc40]
>[  2090.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bc40] width 2880 pitch 11520 (/4 2880)
>[  2090.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bc40]
>[  2090.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bc40] width 2880 pitch 11520 (/4 2880)
>[  2093.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97036e0]
>[  2093.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97036e0] width 2880 pitch 11520 (/4 2880)
>[  2093.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da9b0]
>[  2093.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da9b0] width 2880 pitch 11520 (/4 2880)
>[  2093.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2093.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2093.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97036e0]
>[  2093.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97036e0] width 2880 pitch 11520 (/4 2880)
>[  2093.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9703158]
>[  2093.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9703158] width 2880 pitch 11520 (/4 2880)
>[  2093.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97036e0]
>[  2093.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97036e0] width 2880 pitch 11520 (/4 2880)
>[  2093.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9672e08]
>[  2093.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9672e08] width 2880 pitch 11520 (/4 2880)
>[  2093.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94445f8]
>[  2093.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94445f8] width 2880 pitch 11520 (/4 2880)
>[  2093.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9672e08]
>[  2093.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9672e08] width 2880 pitch 11520 (/4 2880)
>[  2093.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444490]
>[  2093.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444490] width 2880 pitch 11520 (/4 2880)
>[  2093.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972ed78]
>[  2093.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972ed78] width 2880 pitch 11520 (/4 2880)
>[  2093.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9803010]
>[  2093.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9803010] width 2880 pitch 11520 (/4 2880)
>[  2093.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4628]
>[  2093.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4628] width 2880 pitch 11520 (/4 2880)
>[  2093.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9855110]
>[  2093.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9855110] width 2880 pitch 11520 (/4 2880)
>[  2094.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98325d8]
>[  2094.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98325d8] width 2880 pitch 11520 (/4 2880)
>[  2094.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984de58]
>[  2094.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984de58] width 2880 pitch 11520 (/4 2880)
>[  2094.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984de58]
>[  2094.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984de58] width 2880 pitch 11520 (/4 2880)
>[  2094.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2094.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2095.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832ee0]
>[  2095.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832ee0] width 2880 pitch 11520 (/4 2880)
>[  2095.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837858]
>[  2095.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837858] width 2880 pitch 11520 (/4 2880)
>[  2095.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2095.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2095.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2095.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2095.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447cc8]
>[  2095.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447cc8] width 2880 pitch 11520 (/4 2880)
>[  2095.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2095.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2095.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2095.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2095.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2095.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2095.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2095.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2099.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2099.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2099.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2099.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2099.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2099.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2099.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2099.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2099.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2099.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2099.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2099.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2099.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2099.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2099.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2099.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2103.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2103.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2103.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2103.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2103.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2103.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2103.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2103.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2103.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2103.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2103.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2104.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2104.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2104.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2104.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2104.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2104.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2104.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2104.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2104.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2104.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2104.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2104.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2104.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2104.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2104.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2105.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2105.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2105.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2105.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2105.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2105.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2105.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2105.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2105.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2105.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2105.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2105.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2105.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2105.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2105.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2105.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2105.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2105.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2105.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2105.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2105.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2105.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2105.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2105.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2105.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2105.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2107.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2107.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2107.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2107.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2107.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2107.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2107.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2107.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2107.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2107.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2107.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2107.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2107.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2107.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2107.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2107.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2107.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2107.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2107.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2107.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2107.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2107.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2107.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2107.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2107.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2107.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2108.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2108.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2108.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2108.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2108.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2108.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2108.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da3f0]
>[  2108.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da3f0] width 2880 pitch 11520 (/4 2880)
>[  2108.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98307b8]
>[  2108.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98307b8] width 2880 pitch 11520 (/4 2880)
>[  2108.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2108.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2108.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2108.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2108.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2108.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2108.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2108.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2108.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2108.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2108.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da608]
>[  2108.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da608] width 2880 pitch 11520 (/4 2880)
>[  2108.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2108.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2108.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2108.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2108.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2108.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2108.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2108.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2109.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96622c8]
>[  2109.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96622c8] width 2880 pitch 11520 (/4 2880)
>[  2119.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9840ab8]
>[  2119.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9840ab8] width 2880 pitch 11520 (/4 2880)
>[  2121.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98695f8]
>[  2121.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98695f8] width 2880 pitch 11520 (/4 2880)
>[  2121.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2121.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2123.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[  2123.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[  2123.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[  2123.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[  2124.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[  2124.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[  2124.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868bc0]
>[  2124.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868bc0] width 2880 pitch 11520 (/4 2880)
>[  2124.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[  2124.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[  2124.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a728]
>[  2124.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a728] width 2880 pitch 11520 (/4 2880)
>[  2124.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972bec0]
>[  2125.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972bec0] width 2880 pitch 11520 (/4 2880)
>[  2125.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dab18]
>[  2125.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dab18] width 2880 pitch 11520 (/4 2880)
>[  2125.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ec08]
>[  2125.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ec08] width 2880 pitch 11520 (/4 2880)
>[  2125.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a728]
>[  2125.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a728] width 2880 pitch 11520 (/4 2880)
>[  2125.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e3e0]
>[  2125.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e3e0] width 2880 pitch 11520 (/4 2880)
>[  2125.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98527f8]
>[  2125.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98527f8] width 2880 pitch 11520 (/4 2880)
>[  2125.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97056c8]
>[  2125.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97056c8] width 2880 pitch 11520 (/4 2880)
>[  2125.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986bda8]
>[  2125.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986bda8] width 2880 pitch 11520 (/4 2880)
>[  2125.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98527f8]
>[  2125.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98527f8] width 2880 pitch 11520 (/4 2880)
>[  2125.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986bda8]
>[  2125.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986bda8] width 2880 pitch 11520 (/4 2880)
>[  2125.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868ab8]
>[  2125.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868ab8] width 2880 pitch 11520 (/4 2880)
>[  2126.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[  2126.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[  2126.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9834738]
>[  2126.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9834738] width 2880 pitch 11520 (/4 2880)
>[  2146.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3eb0]
>[  2146.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3eb0] width 2880 pitch 11520 (/4 2880)
>[  2160.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2160.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2160.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2160.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2160.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2160.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2160.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2160.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2160.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2160.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2160.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e90]
>[  2160.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e90] width 2880 pitch 11520 (/4 2880)
>[  2160.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98187b0]
>[  2160.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98187b0] width 2880 pitch 11520 (/4 2880)
>[  2160.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb000]
>[  2160.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb000] width 2880 pitch 11520 (/4 2880)
>[  2160.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2160.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2160.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819aa0]
>[  2160.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819aa0] width 2880 pitch 11520 (/4 2880)
>[  2160.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9808c88]
>[  2160.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9808c88] width 2880 pitch 11520 (/4 2880)
>[  2164.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98187b0]
>[  2164.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98187b0] width 2880 pitch 11520 (/4 2880)
>[  2164.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2164.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2164.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2164.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2164.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7b58]
>[  2164.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7b58] width 2880 pitch 11520 (/4 2880)
>[  2164.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819aa0]
>[  2164.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819aa0] width 2880 pitch 11520 (/4 2880)
>[  2164.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98187b0]
>[  2164.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98187b0] width 2880 pitch 11520 (/4 2880)
>[  2164.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2164.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2164.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2164.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2164.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2164.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2164.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819aa0]
>[  2164.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819aa0] width 2880 pitch 11520 (/4 2880)
>[  2164.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98187b0]
>[  2164.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98187b0] width 2880 pitch 11520 (/4 2880)
>[  2164.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2164.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2164.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd580]
>[  2164.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd580] width 2880 pitch 11520 (/4 2880)
>[  2164.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7b58]
>[  2164.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7b58] width 2880 pitch 11520 (/4 2880)
>[  2165.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2165.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2165.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbfd0]
>[  2165.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbfd0] width 2880 pitch 11520 (/4 2880)
>[  2165.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd580]
>[  2165.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd580] width 2880 pitch 11520 (/4 2880)
>[  2165.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc3f8]
>[  2165.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc3f8] width 2880 pitch 11520 (/4 2880)
>[  2165.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2165.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2165.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbfd0]
>[  2165.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbfd0] width 2880 pitch 11520 (/4 2880)
>[  2165.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2165.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2165.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbfd0]
>[  2165.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbfd0] width 2880 pitch 11520 (/4 2880)
>[  2165.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2165.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2165.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbfd0]
>[  2165.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbfd0] width 2880 pitch 11520 (/4 2880)
>[  2165.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2165.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2165.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819aa0]
>[  2165.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819aa0] width 2880 pitch 11520 (/4 2880)
>[  2165.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2165.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2178.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc3f8]
>[  2178.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc3f8] width 2880 pitch 11520 (/4 2880)
>[  2179.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9808b50]
>[  2179.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9808b50] width 2880 pitch 11520 (/4 2880)
>[  2179.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3c10]
>[  2179.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3c10] width 2880 pitch 11520 (/4 2880)
>[  2179.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd580]
>[  2179.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd580] width 2880 pitch 11520 (/4 2880)
>[  2179.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3c10]
>[  2179.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3c10] width 2880 pitch 11520 (/4 2880)
>[  2179.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd580]
>[  2179.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd580] width 2880 pitch 11520 (/4 2880)
>[  2179.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2179.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2179.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc3f8]
>[  2179.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc3f8] width 2880 pitch 11520 (/4 2880)
>[  2179.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2179.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2181.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9808b50]
>[  2181.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9808b50] width 2880 pitch 11520 (/4 2880)
>[  2181.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2181.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2181.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2181.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2181.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2181.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2181.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2181.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2181.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2181.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2181.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2181.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2181.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5948]
>[  2181.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5948] width 2880 pitch 11520 (/4 2880)
>[  2218.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f778]
>[  2218.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f778] width 2880 pitch 11520 (/4 2880)
>[  2218.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5248]
>[  2218.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5248] width 2880 pitch 11520 (/4 2880)
>[  2218.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f778]
>[  2218.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f778] width 2880 pitch 11520 (/4 2880)
>[  2218.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5248]
>[  2218.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5248] width 2880 pitch 11520 (/4 2880)
>[  2218.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a17e8]
>[  2218.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a17e8] width 2880 pitch 11520 (/4 2880)
>[  2218.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2218.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2218.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9702248]
>[  2218.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9702248] width 2880 pitch 11520 (/4 2880)
>[  2218.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5248]
>[  2218.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5248] width 2880 pitch 11520 (/4 2880)
>[  2218.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2218.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2218.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2218.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2222.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2222.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2222.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5248]
>[  2222.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5248] width 2880 pitch 11520 (/4 2880)
>[  2222.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2222.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2222.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f778]
>[  2222.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f778] width 2880 pitch 11520 (/4 2880)
>[  2222.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2222.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2222.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f778]
>[  2222.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f778] width 2880 pitch 11520 (/4 2880)
>[  2222.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2222.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2222.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2222.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2222.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2222.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2222.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97021d0]
>[  2222.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97021d0] width 2880 pitch 11520 (/4 2880)
>[  2222.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2222.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2222.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97021d0]
>[  2222.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97021d0] width 2880 pitch 11520 (/4 2880)
>[  2222.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2222.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2223.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7e60]
>[  2223.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7e60] width 2880 pitch 11520 (/4 2880)
>[  2226.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813030]
>[  2226.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813030] width 2880 pitch 11520 (/4 2880)
>[  2226.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2226.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2226.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f778]
>[  2226.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f778] width 2880 pitch 11520 (/4 2880)
>[  2226.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2226.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2226.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813030]
>[  2226.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813030] width 2880 pitch 11520 (/4 2880)
>[  2226.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2226.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2226.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813030]
>[  2226.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813030] width 2880 pitch 11520 (/4 2880)
>[  2226.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813030]
>[  2226.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813030] width 2880 pitch 11520 (/4 2880)
>[  2226.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2226.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2226.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2226.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2226.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813030]
>[  2227.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813030] width 2880 pitch 11520 (/4 2880)
>[  2227.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2227.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2300.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3c10]
>[  2300.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3c10] width 2880 pitch 11520 (/4 2880)
>[  2341.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2341.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2344.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2344.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2345.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9875458]
>[  2345.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9875458] width 2880 pitch 11520 (/4 2880)
>[  2398.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2398.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2398.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2398.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2398.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2398.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2398.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e00]
>[  2398.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e00] width 2880 pitch 11520 (/4 2880)
>[  2398.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9808b90]
>[  2398.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9808b90] width 2880 pitch 11520 (/4 2880)
>[  2398.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2398.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2398.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9662f88]
>[  2398.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9662f88] width 2880 pitch 11520 (/4 2880)
>[  2399.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dce20]
>[  2399.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dce20] width 2880 pitch 11520 (/4 2880)
>[  2399.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b1e80]
>[  2399.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b1e80] width 2880 pitch 11520 (/4 2880)
>[  2399.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da40]
>[  2399.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da40] width 2880 pitch 11520 (/4 2880)
>[  2399.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97246b0]
>[  2399.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97246b0] width 2880 pitch 11520 (/4 2880)
>[  2403.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2403.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2403.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969d468]
>[  2403.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969d468] width 2880 pitch 11520 (/4 2880)
>[  2403.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da40]
>[  2403.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da40] width 2880 pitch 11520 (/4 2880)
>[  2403.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969d468]
>[  2403.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969d468] width 2880 pitch 11520 (/4 2880)
>[  2403.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974bc18]
>[  2403.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974bc18] width 2880 pitch 11520 (/4 2880)
>[  2404.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b050]
>[  2404.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b050] width 2880 pitch 11520 (/4 2880)
>[  2404.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d76e8]
>[  2404.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d76e8] width 2880 pitch 11520 (/4 2880)
>[  2405.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97787b0]
>[  2405.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97787b0] width 2880 pitch 11520 (/4 2880)
>[  2405.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9808b40]
>[  2405.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9808b40] width 2880 pitch 11520 (/4 2880)
>[  2405.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2405.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2405.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9875458]
>[  2405.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9875458] width 2880 pitch 11520 (/4 2880)
>[  2405.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2405.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2405.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf188]
>[  2405.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf188] width 2880 pitch 11520 (/4 2880)
>[  2405.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732bc8]
>[  2405.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732bc8] width 2880 pitch 11520 (/4 2880)
>[  2405.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf188]
>[  2405.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf188] width 2880 pitch 11520 (/4 2880)
>[  2405.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cb438]
>[  2405.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cb438] width 2880 pitch 11520 (/4 2880)
>[  2457.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3e70]
>[  2457.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3e70] width 2880 pitch 11520 (/4 2880)
>[  2458.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec498]
>[  2458.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec498] width 2880 pitch 11520 (/4 2880)
>[  2458.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1670]
>[  2458.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1670] width 2880 pitch 11520 (/4 2880)
>[  2458.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec498]
>[  2458.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec498] width 2880 pitch 11520 (/4 2880)
>[  2458.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1670]
>[  2458.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1670] width 2880 pitch 11520 (/4 2880)
>[  2458.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec498]
>[  2458.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec498] width 2880 pitch 11520 (/4 2880)
>[  2458.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9841860]
>[  2458.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9841860] width 2880 pitch 11520 (/4 2880)
>[  2458.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813158]
>[  2458.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813158] width 2880 pitch 11520 (/4 2880)
>[  2458.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9771940]
>[  2458.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9771940] width 2880 pitch 11520 (/4 2880)
>[  2458.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9e90]
>[  2458.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9e90] width 2880 pitch 11520 (/4 2880)
>[  2458.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98120a8]
>[  2458.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98120a8] width 2880 pitch 11520 (/4 2880)
>[  2458.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a51b8]
>[  2458.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a51b8] width 2880 pitch 11520 (/4 2880)
>[  2464.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9860df8]
>[  2464.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9860df8] width 2880 pitch 11520 (/4 2880)
>[  2464.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[  2464.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[  2464.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3e70]
>[  2464.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3e70] width 2880 pitch 11520 (/4 2880)
>[  2464.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7688]
>[  2464.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7688] width 2880 pitch 11520 (/4 2880)
>[  2464.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c90]
>[  2464.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c90] width 2880 pitch 11520 (/4 2880)
>[  2464.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770bf8]
>[  2464.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770bf8] width 2880 pitch 11520 (/4 2880)
>[  2464.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3e70]
>[  2464.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3e70] width 2880 pitch 11520 (/4 2880)
>[  2464.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3e70]
>[  2464.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3e70] width 2880 pitch 11520 (/4 2880)
>[  2464.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[  2464.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[  2464.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2464.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2464.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[  2464.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[  2464.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9838828]
>[  2465.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9838828] width 2880 pitch 11520 (/4 2880)
>[  2465.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[  2465.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[  2508.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8e38]
>[  2508.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8e38] width 2880 pitch 11520 (/4 2880)
>[  2512.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907628]
>[  2512.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907628] width 2880 pitch 11520 (/4 2880)
>[  2514.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ef180]
>[  2514.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ef180] width 2880 pitch 11520 (/4 2880)
>[  2514.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9906fd8]
>[  2514.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9906fd8] width 2880 pitch 11520 (/4 2880)
>[  2514.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98edf78]
>[  2514.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98edf78] width 2880 pitch 11520 (/4 2880)
>[  2514.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96500a8]
>[  2514.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96500a8] width 2880 pitch 11520 (/4 2880)
>[  2568.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2568.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2578.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2578.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2578.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  2578.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  2578.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2578.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2578.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  2578.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  2578.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2578.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2578.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2578.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2578.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2578.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2578.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2578.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2578.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dadb0]
>[  2578.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dadb0] width 2880 pitch 11520 (/4 2880)
>[  2578.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2578.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2578.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2578.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2578.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2578.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2582.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2582.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2582.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2582.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2582.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2582.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2582.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2582.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2582.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2582.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2582.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2582.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2582.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2582.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2582.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2582.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2582.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2582.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2582.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2582.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2582.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2582.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2582.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2582.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2582.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2583.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2596.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2596.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2596.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2596.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2596.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2596.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2596.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2596.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2596.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2596.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2596.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2596.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2596.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2596.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2596.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2596.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2596.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c87a0]
>[  2596.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c87a0] width 2880 pitch 11520 (/4 2880)
>[  2596.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1788]
>[  2596.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1788] width 2880 pitch 11520 (/4 2880)
>[  2596.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2596.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2596.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2596.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2596.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2596.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2600.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984b1f0]
>[  2600.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984b1f0] width 2880 pitch 11520 (/4 2880)
>[  2600.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2600.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2600.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2600.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2600.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2600.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2600.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984b1f0]
>[  2600.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984b1f0] width 2880 pitch 11520 (/4 2880)
>[  2600.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2600.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2600.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984b1f0]
>[  2600.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984b1f0] width 2880 pitch 11520 (/4 2880)
>[  2600.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2600.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2600.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984b1f0]
>[  2600.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984b1f0] width 2880 pitch 11520 (/4 2880)
>[  2600.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2600.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2600.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2600.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2600.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2600.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2600.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2600.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2638.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2638.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2638.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2638.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2638.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2638.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2638.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2638.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2638.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  2638.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  2638.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984b640]
>[  2638.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984b640] width 2880 pitch 11520 (/4 2880)
>[  2638.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2638.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2638.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2638.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2638.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2638.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2638.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2638.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2638.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2638.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2642.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2642.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2642.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2642.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2642.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2642.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2642.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fa90]
>[  2642.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fa90] width 2880 pitch 11520 (/4 2880)
>[  2642.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97024d8]
>[  2642.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97024d8] width 2880 pitch 11520 (/4 2880)
>[  2642.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2642.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2642.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97024d8]
>[  2643.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97024d8] width 2880 pitch 11520 (/4 2880)
>[  2643.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2643.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2643.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97024d8]
>[  2643.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97024d8] width 2880 pitch 11520 (/4 2880)
>[  2643.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2643.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2643.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97024d8]
>[  2643.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97024d8] width 2880 pitch 11520 (/4 2880)
>[  2643.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3698]
>[  2643.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3698] width 2880 pitch 11520 (/4 2880)
>[  2643.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2643.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2736.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9904a40]
>[  2736.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9904a40] width 2880 pitch 11520 (/4 2880)
>[  2752.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850128]
>[  2752.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850128] width 2880 pitch 11520 (/4 2880)
>[  2752.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2752.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2752.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850128]
>[  2752.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850128] width 2880 pitch 11520 (/4 2880)
>[  2752.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9905d40]
>[  2752.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9905d40] width 2880 pitch 11520 (/4 2880)
>[  2752.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984fc50]
>[  2752.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984fc50] width 2880 pitch 11520 (/4 2880)
>[  2752.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e75b0]
>[  2752.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e75b0] width 2880 pitch 11520 (/4 2880)
>[  2752.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545270]
>[  2752.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545270] width 2880 pitch 11520 (/4 2880)
>[  2752.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850128]
>[  2752.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850128] width 2880 pitch 11520 (/4 2880)
>[  2752.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2752.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2752.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4a70]
>[  2752.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4a70] width 2880 pitch 11520 (/4 2880)
>[  2752.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  2752.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  2756.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  2756.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  2756.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  2756.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  2756.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bda20]
>[  2756.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bda20] width 2880 pitch 11520 (/4 2880)
>[  2756.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8420]
>[  2756.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8420] width 2880 pitch 11520 (/4 2880)
>[  2756.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9859008]
>[  2756.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9859008] width 2880 pitch 11520 (/4 2880)
>[  2756.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec830]
>[  2757.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec830] width 2880 pitch 11520 (/4 2880)
>[  2757.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  2757.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  2757.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  2757.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  2757.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec830]
>[  2757.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec830] width 2880 pitch 11520 (/4 2880)
>[  2757.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b1860]
>[  2757.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b1860] width 2880 pitch 11520 (/4 2880)
>[  2757.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d6f28]
>[  2757.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d6f28] width 2880 pitch 11520 (/4 2880)
>[  2757.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972ecb0]
>[  2757.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972ecb0] width 2880 pitch 11520 (/4 2880)
>[  2757.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2757.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2757.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8e38]
>[  2757.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8e38] width 2880 pitch 11520 (/4 2880)
>[  2757.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec830]
>[  2757.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec830] width 2880 pitch 11520 (/4 2880)
>[  2757.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8e38]
>[  2757.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8e38] width 2880 pitch 11520 (/4 2880)
>[  2757.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec830]
>[  2757.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec830] width 2880 pitch 11520 (/4 2880)
>[  2757.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8e38]
>[  2757.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8e38] width 2880 pitch 11520 (/4 2880)
>[  2757.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ec830]
>[  2757.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ec830] width 2880 pitch 11520 (/4 2880)
>[  2757.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8e38]
>[  2757.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8e38] width 2880 pitch 11520 (/4 2880)
>[  2757.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  2757.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  2757.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  2757.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  2757.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  2757.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  2758.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9859008]
>[  2758.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9859008] width 2880 pitch 11520 (/4 2880)
>[  2758.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d33a8]
>[  2758.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d33a8] width 2880 pitch 11520 (/4 2880)
>[  2758.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9920250]
>[  2758.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9920250] width 2880 pitch 11520 (/4 2880)
>[  2758.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d33a8]
>[  2758.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d33a8] width 2880 pitch 11520 (/4 2880)
>[  2758.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9920250]
>[  2758.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9920250] width 2880 pitch 11520 (/4 2880)
>[  2758.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d6f28]
>[  2758.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d6f28] width 2880 pitch 11520 (/4 2880)
>[  2758.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447c68]
>[  2758.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447c68] width 2880 pitch 11520 (/4 2880)
>[  2758.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a51f0]
>[  2758.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a51f0] width 2880 pitch 11520 (/4 2880)
>[  2758.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8300]
>[  2758.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8300] width 2880 pitch 11520 (/4 2880)
>[  2758.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2758.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2758.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2758.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2761.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d6f28]
>[  2761.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d6f28] width 2880 pitch 11520 (/4 2880)
>[  2761.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2761.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2761.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c71e0]
>[  2761.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c71e0] width 2880 pitch 11520 (/4 2880)
>[  2761.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8aa0]
>[  2761.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8aa0] width 2880 pitch 11520 (/4 2880)
>[  2761.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2761.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2761.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8aa0]
>[  2761.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8aa0] width 2880 pitch 11520 (/4 2880)
>[  2761.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2761.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2761.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8aa0]
>[  2761.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8aa0] width 2880 pitch 11520 (/4 2880)
>[  2761.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2761.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2761.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f2e78]
>[  2761.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f2e78] width 2880 pitch 11520 (/4 2880)
>[  2761.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c71e0]
>[  2761.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c71e0] width 2880 pitch 11520 (/4 2880)
>[  2761.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9771a60]
>[  2761.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9771a60] width 2880 pitch 11520 (/4 2880)
>[  2762.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9771a60]
>[  2762.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9771a60] width 2880 pitch 11520 (/4 2880)
>[  2762.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d720]
>[  2762.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d720] width 2880 pitch 11520 (/4 2880)
>[  2762.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0cc0]
>[  2762.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0cc0] width 2880 pitch 11520 (/4 2880)
>[  2762.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c71e0]
>[  2762.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c71e0] width 2880 pitch 11520 (/4 2880)
>[  2762.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832dc8]
>[  2762.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832dc8] width 2880 pitch 11520 (/4 2880)
>[  2762.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2762.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2762.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832dc8]
>[  2762.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832dc8] width 2880 pitch 11520 (/4 2880)
>[  2762.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2762.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2762.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832dc8]
>[  2762.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832dc8] width 2880 pitch 11520 (/4 2880)
>[  2762.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2762.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2762.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d0f70]
>[  2762.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d0f70] width 2880 pitch 11520 (/4 2880)
>[  2762.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c71e0]
>[  2762.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c71e0] width 2880 pitch 11520 (/4 2880)
>[  2762.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984fb40]
>[  2762.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984fb40] width 2880 pitch 11520 (/4 2880)
>[  2763.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2763.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2763.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2763.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2763.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cd280]
>[  2763.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cd280] width 2880 pitch 11520 (/4 2880)
>[  2763.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2763.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2763.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cd280]
>[  2763.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cd280] width 2880 pitch 11520 (/4 2880)
>[  2763.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2763.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2763.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c138]
>[  2763.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c138] width 2880 pitch 11520 (/4 2880)
>[  2763.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2763.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2763.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2763.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2763.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2763.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2764.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2764.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2764.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2764.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2764.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c138]
>[  2764.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c138] width 2880 pitch 11520 (/4 2880)
>[  2764.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2764.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2764.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2764.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2764.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c138]
>[  2764.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c138] width 2880 pitch 11520 (/4 2880)
>[  2765.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2765.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2765.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2765.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2765.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2765.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2765.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d72b8]
>[  2765.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d72b8] width 2880 pitch 11520 (/4 2880)
>[  2765.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c71e0]
>[  2765.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c71e0] width 2880 pitch 11520 (/4 2880)
>[  2765.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2765.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2765.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2765.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2765.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2765.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2765.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2765.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2765.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2765.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2805.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98315d0]
>[  2805.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98315d0] width 2880 pitch 11520 (/4 2880)
>[  2850.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907568]
>[  2850.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907568] width 2880 pitch 11520 (/4 2880)
>[  2850.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2850.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2850.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e90a0]
>[  2850.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e90a0] width 2880 pitch 11520 (/4 2880)
>[  2850.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97429b0]
>[  2850.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97429b0] width 2880 pitch 11520 (/4 2880)
>[  2850.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed600]
>[  2850.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed600] width 2880 pitch 11520 (/4 2880)
>[  2850.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2850.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2850.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976cfd0]
>[  2850.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976cfd0] width 2880 pitch 11520 (/4 2880)
>[  2850.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e90a0]
>[  2850.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e90a0] width 2880 pitch 11520 (/4 2880)
>[  2850.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2850.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2850.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2850.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2850.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2850.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2854.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98330a8]
>[  2854.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98330a8] width 2880 pitch 11520 (/4 2880)
>[  2854.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  2854.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  2854.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2854.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2854.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2854.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2854.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2854.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2854.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907568]
>[  2854.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907568] width 2880 pitch 11520 (/4 2880)
>[  2854.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2854.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2854.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907568]
>[  2854.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907568] width 2880 pitch 11520 (/4 2880)
>[  2854.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2854.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2854.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907568]
>[  2854.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907568] width 2880 pitch 11520 (/4 2880)
>[  2854.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2854.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2854.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907568]
>[  2854.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907568] width 2880 pitch 11520 (/4 2880)
>[  2854.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2854.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2855.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0e50]
>[  2856.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0e50] width 2880 pitch 11520 (/4 2880)
>[  2856.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2856.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2856.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  2856.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  2856.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2856.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2856.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  2856.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  2856.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98330a8]
>[  2856.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98330a8] width 2880 pitch 11520 (/4 2880)
>[  2856.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2856.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2856.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2856.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2856.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  2856.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  2856.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2856.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2856.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2856.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2856.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2856.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2856.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99071b0]
>[  2856.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99071b0] width 2880 pitch 11520 (/4 2880)
>[  2858.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0da8]
>[  2859.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0da8] width 2880 pitch 11520 (/4 2880)
>[  2860.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2860.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2860.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9803080]
>[  2860.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9803080] width 2880 pitch 11520 (/4 2880)
>[  2860.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2860.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2860.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2860.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2860.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2860.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2860.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9803080]
>[  2860.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9803080] width 2880 pitch 11520 (/4 2880)
>[  2860.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2860.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2860.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9803080]
>[  2860.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9803080] width 2880 pitch 11520 (/4 2880)
>[  2860.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2860.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2860.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9803080]
>[  2860.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9803080] width 2880 pitch 11520 (/4 2880)
>[  2860.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2860.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2860.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99071b0]
>[  2860.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99071b0] width 2880 pitch 11520 (/4 2880)
>[  2860.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  2860.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  2872.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  2872.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  2872.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2872.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2872.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2872.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2872.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0f30]
>[  2872.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0f30] width 2880 pitch 11520 (/4 2880)
>[  2873.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf238]
>[  2873.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf238] width 2880 pitch 11520 (/4 2880)
>[  2873.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969cef0]
>[  2873.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969cef0] width 2880 pitch 11520 (/4 2880)
>[  2873.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9712530]
>[  2873.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9712530] width 2880 pitch 11520 (/4 2880)
>[  2873.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2873.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2874.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e90a0]
>[  2874.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e90a0] width 2880 pitch 11520 (/4 2880)
>[  2874.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b28d8]
>[  2874.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b28d8] width 2880 pitch 11520 (/4 2880)
>[  2874.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e90a0]
>[  2874.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e90a0] width 2880 pitch 11520 (/4 2880)
>[  2874.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2874.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2874.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2874.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2874.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2874.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2875.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2875.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2875.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2875.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2875.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4728]
>[  2875.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4728] width 2880 pitch 11520 (/4 2880)
>[  2875.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2875.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2875.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2875.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2875.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2875.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2875.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2875.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2875.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2875.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2875.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2875.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2876.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2876.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2876.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97054f8]
>[  2876.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97054f8] width 2880 pitch 11520 (/4 2880)
>[  2876.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1688]
>[  2876.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1688] width 2880 pitch 11520 (/4 2880)
>[  2876.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98377f8]
>[  2876.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98377f8] width 2880 pitch 11520 (/4 2880)
>[  2901.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed600]
>[  2901.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed600] width 2880 pitch 11520 (/4 2880)
>[  2913.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f84f8]
>[  2913.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f84f8] width 2880 pitch 11520 (/4 2880)
>[  2918.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715e80]
>[  2918.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715e80] width 2880 pitch 11520 (/4 2880)
>[  2924.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992f930]
>[  2924.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992f930] width 2880 pitch 11520 (/4 2880)
>[  2925.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9902ec0]
>[  2925.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9902ec0] width 2880 pitch 11520 (/4 2880)
>[  2932.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992f7b8]
>[  2932.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992f7b8] width 2880 pitch 11520 (/4 2880)
>[  2940.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99023a8]
>[  2940.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99023a8] width 2880 pitch 11520 (/4 2880)
>[  2944.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fc78]
>[  2944.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fc78] width 2880 pitch 11520 (/4 2880)
>[  2948.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f83d0]
>[  2948.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f83d0] width 2880 pitch 11520 (/4 2880)
>[  2957.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e408]
>[  2957.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e408] width 2880 pitch 11520 (/4 2880)
>[  2963.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  2963.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  2970.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992cc00]
>[  2970.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992cc00] width 2880 pitch 11520 (/4 2880)
>[  2978.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99012d0]
>[  2978.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99012d0] width 2880 pitch 11520 (/4 2880)
>[  2985.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f5668]
>[  2985.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f5668] width 2880 pitch 11520 (/4 2880)
>[  2991.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992dcd0]
>[  2991.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992dcd0] width 2880 pitch 11520 (/4 2880)
>[  2997.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992c5e8]
>[  2997.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992c5e8] width 2880 pitch 11520 (/4 2880)
>[  3041.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x985b070]
>[  3041.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x985b070] width 2880 pitch 11520 (/4 2880)
>[  3058.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ea540]
>[  3058.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ea540] width 2880 pitch 11520 (/4 2880)
>[  3058.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3058.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3058.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ea540]
>[  3058.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ea540] width 2880 pitch 11520 (/4 2880)
>[  3058.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3058.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3058.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ea540]
>[  3058.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ea540] width 2880 pitch 11520 (/4 2880)
>[  3058.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed148]
>[  3058.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed148] width 2880 pitch 11520 (/4 2880)
>[  3058.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851a48]
>[  3058.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851a48] width 2880 pitch 11520 (/4 2880)
>[  3058.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3058.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3058.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971b7d0]
>[  3058.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971b7d0] width 2880 pitch 11520 (/4 2880)
>[  3058.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3058.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3058.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813158]
>[  3058.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813158] width 2880 pitch 11520 (/4 2880)
>[  3058.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853008]
>[  3058.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853008] width 2880 pitch 11520 (/4 2880)
>[  3063.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851a48]
>[  3063.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851a48] width 2880 pitch 11520 (/4 2880)
>[  3063.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772318]
>[  3063.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772318] width 2880 pitch 11520 (/4 2880)
>[  3063.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813158]
>[  3063.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813158] width 2880 pitch 11520 (/4 2880)
>[  3063.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c128]
>[  3063.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c128] width 2880 pitch 11520 (/4 2880)
>[  3063.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99004b8]
>[  3063.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99004b8] width 2880 pitch 11520 (/4 2880)
>[  3063.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3063.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3063.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99004b8]
>[  3063.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99004b8] width 2880 pitch 11520 (/4 2880)
>[  3063.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3063.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3063.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99004b8]
>[  3063.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99004b8] width 2880 pitch 11520 (/4 2880)
>[  3063.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3063.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3063.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99004b8]
>[  3063.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99004b8] width 2880 pitch 11520 (/4 2880)
>[  3063.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3063.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3063.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99004b8]
>[  3063.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99004b8] width 2880 pitch 11520 (/4 2880)
>[  3063.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fa0f0]
>[  3063.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fa0f0] width 2880 pitch 11520 (/4 2880)
>[  3072.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0e50]
>[  3072.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0e50] width 2880 pitch 11520 (/4 2880)
>[  3074.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991d7d8]
>[  3074.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991d7d8] width 2880 pitch 11520 (/4 2880)
>[  3080.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e0da8]
>[  3080.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e0da8] width 2880 pitch 11520 (/4 2880)
>[  3178.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  3178.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  3178.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3178.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3178.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  3178.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  3178.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3178.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3178.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  3178.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  3178.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  3178.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  3178.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830160]
>[  3178.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830160] width 2880 pitch 11520 (/4 2880)
>[  3178.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3178.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3178.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3178.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3178.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd940]
>[  3178.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd940] width 2880 pitch 11520 (/4 2880)
>[  3182.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca960]
>[  3182.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca960] width 2880 pitch 11520 (/4 2880)
>[  3182.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a9598]
>[  3182.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a9598] width 2880 pitch 11520 (/4 2880)
>[  3182.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3182.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3182.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3182.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3182.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b26b0]
>[  3182.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b26b0] width 2880 pitch 11520 (/4 2880)
>[  3182.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3182.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3182.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b26b0]
>[  3182.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b26b0] width 2880 pitch 11520 (/4 2880)
>[  3182.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3182.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3182.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b26b0]
>[  3183.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b26b0] width 2880 pitch 11520 (/4 2880)
>[  3183.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3183.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3183.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b26b0]
>[  3183.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b26b0] width 2880 pitch 11520 (/4 2880)
>[  3183.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3183.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3183.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b26b0]
>[  3183.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b26b0] width 2880 pitch 11520 (/4 2880)
>[  3195.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca960]
>[  3195.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca960] width 2880 pitch 11520 (/4 2880)
>[  3195.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[  3195.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[  3195.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca8c8]
>[  3195.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca8c8] width 2880 pitch 11520 (/4 2880)
>[  3195.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98afd08]
>[  3195.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98afd08] width 2880 pitch 11520 (/4 2880)
>[  3195.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3195.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3195.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9904650]
>[  3195.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9904650] width 2880 pitch 11520 (/4 2880)
>[  3195.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f6e8]
>[  3195.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f6e8] width 2880 pitch 11520 (/4 2880)
>[  3195.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98afd08]
>[  3195.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98afd08] width 2880 pitch 11520 (/4 2880)
>[  3195.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3195.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3195.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9904650]
>[  3195.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9904650] width 2880 pitch 11520 (/4 2880)
>[  3195.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f6e8]
>[  3195.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f6e8] width 2880 pitch 11520 (/4 2880)
>[  3195.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cd280]
>[  3195.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cd280] width 2880 pitch 11520 (/4 2880)
>[  3195.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3195.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3195.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9904650]
>[  3195.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9904650] width 2880 pitch 11520 (/4 2880)
>[  3199.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e41b8]
>[  3199.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e41b8] width 2880 pitch 11520 (/4 2880)
>[  3199.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cd280]
>[  3199.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cd280] width 2880 pitch 11520 (/4 2880)
>[  3199.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3199.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3199.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3199.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3199.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3199.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3199.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9900478]
>[  3199.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9900478] width 2880 pitch 11520 (/4 2880)
>[  3199.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3199.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3199.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9900478]
>[  3199.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9900478] width 2880 pitch 11520 (/4 2880)
>[  3199.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e41b8]
>[  3199.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e41b8] width 2880 pitch 11520 (/4 2880)
>[  3199.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3199.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3199.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3199.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3199.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943e928]
>[  3199.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943e928] width 2880 pitch 11520 (/4 2880)
>[  3199.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f1548]
>[  3199.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f1548] width 2880 pitch 11520 (/4 2880)
>[  3266.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cce60]
>[  3266.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cce60] width 2880 pitch 11520 (/4 2880)
>[  3353.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9529ac8]
>[  3353.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9529ac8] width 2880 pitch 11520 (/4 2880)
>[  3363.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e2e8]
>[  3363.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e2e8] width 2880 pitch 11520 (/4 2880)
>[  3393.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e41b8]
>[  3393.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e41b8] width 2880 pitch 11520 (/4 2880)
>[  3399.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb70]
>[  3399.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb70] width 2880 pitch 11520 (/4 2880)
>[  3405.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7360]
>[  3405.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7360] width 2880 pitch 11520 (/4 2880)
>[  3408.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ee768]
>[  3408.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ee768] width 2880 pitch 11520 (/4 2880)
>[  3417.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770b98]
>[  3417.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770b98] width 2880 pitch 11520 (/4 2880)
>[  3425.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7af8]
>[  3425.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7af8] width 2880 pitch 11520 (/4 2880)
>[  3429.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e3088]
>[  3429.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e3088] width 2880 pitch 11520 (/4 2880)
>[  3519.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cef0]
>[  3519.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cef0] width 2880 pitch 11520 (/4 2880)
>[  3520.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fbad0]
>[  3520.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fbad0] width 2880 pitch 11520 (/4 2880)
>[  3520.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907828]
>[  3520.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907828] width 2880 pitch 11520 (/4 2880)
>[  3520.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fbad0]
>[  3520.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fbad0] width 2880 pitch 11520 (/4 2880)
>[  3520.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a51f0]
>[  3520.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a51f0] width 2880 pitch 11520 (/4 2880)
>[  3520.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd730]
>[  3520.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd730] width 2880 pitch 11520 (/4 2880)
>[  3520.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd730]
>[  3520.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd730] width 2880 pitch 11520 (/4 2880)
>[  3521.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fbad0]
>[  3521.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fbad0] width 2880 pitch 11520 (/4 2880)
>[  3521.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465610]
>[  3521.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465610] width 2880 pitch 11520 (/4 2880)
>[  3521.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbe88]
>[  3521.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbe88] width 2880 pitch 11520 (/4 2880)
>[  3521.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fbad0]
>[  3521.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fbad0] width 2880 pitch 11520 (/4 2880)
>[  3521.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a0760]
>[  3522.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a0760] width 2880 pitch 11520 (/4 2880)
>[  3522.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fbad0]
>[  3522.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fbad0] width 2880 pitch 11520 (/4 2880)
>[  3547.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992f940]
>[  3548.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992f940] width 2880 pitch 11520 (/4 2880)
>[  3550.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a6070]
>[  3550.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a6070] width 2880 pitch 11520 (/4 2880)
>[  3551.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  3551.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  3551.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9825398]
>[  3551.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9825398] width 2880 pitch 11520 (/4 2880)
>[  3562.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5548]
>[  3562.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5548] width 2880 pitch 11520 (/4 2880)
>[  3573.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  3573.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  3596.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931b70]
>[  3596.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931b70] width 2880 pitch 11520 (/4 2880)
>[  3596.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5548]
>[  3596.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5548] width 2880 pitch 11520 (/4 2880)
>[  3596.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931b70]
>[  3596.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931b70] width 2880 pitch 11520 (/4 2880)
>[  3596.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5548]
>[  3596.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5548] width 2880 pitch 11520 (/4 2880)
>[  3597.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931b70]
>[  3597.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931b70] width 2880 pitch 11520 (/4 2880)
>[  3597.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5548]
>[  3597.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5548] width 2880 pitch 11520 (/4 2880)
>[  3597.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9465610]
>[  3597.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9465610] width 2880 pitch 11520 (/4 2880)
>[  3597.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af2f0]
>[  3597.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af2f0] width 2880 pitch 11520 (/4 2880)
>[  3597.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984eb18]
>[  3597.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984eb18] width 2880 pitch 11520 (/4 2880)
>[  3597.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  3597.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  3598.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984eb18]
>[  3598.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984eb18] width 2880 pitch 11520 (/4 2880)
>[  3598.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  3598.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  3598.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  3598.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  3598.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  3598.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  3598.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984eb18]
>[  3598.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984eb18] width 2880 pitch 11520 (/4 2880)
>[  3598.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984eb18]
>[  3598.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984eb18] width 2880 pitch 11520 (/4 2880)
>[  3614.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  3614.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  3621.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  3621.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  3626.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9510598]
>[  3626.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9510598] width 2880 pitch 11520 (/4 2880)
>[  3658.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98333e8]
>[  3658.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98333e8] width 2880 pitch 11520 (/4 2880)
>[  3658.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833418]
>[  3658.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833418] width 2880 pitch 11520 (/4 2880)
>[  3658.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98333e8]
>[  3658.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98333e8] width 2880 pitch 11520 (/4 2880)
>[  3658.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833418]
>[  3658.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833418] width 2880 pitch 11520 (/4 2880)
>[  3658.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992aff0]
>[  3658.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992aff0] width 2880 pitch 11520 (/4 2880)
>[  3658.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833418]
>[  3658.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833418] width 2880 pitch 11520 (/4 2880)
>[  3658.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984ae88]
>[  3658.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984ae88] width 2880 pitch 11520 (/4 2880)
>[  3658.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9902120]
>[  3658.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9902120] width 2880 pitch 11520 (/4 2880)
>[  3658.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd80]
>[  3658.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd80] width 2880 pitch 11520 (/4 2880)
>[  3658.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931568]
>[  3658.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931568] width 2880 pitch 11520 (/4 2880)
>[  3658.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a52b8]
>[  3658.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a52b8] width 2880 pitch 11520 (/4 2880)
>[  3664.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3664.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3665.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  3665.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  3665.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  3665.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  3665.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931bc0]
>[  3665.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931bc0] width 2880 pitch 11520 (/4 2880)
>[  3665.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a60c8]
>[  3665.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a60c8] width 2880 pitch 11520 (/4 2880)
>[  3665.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3665.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852960]
>[  3665.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852960] width 2880 pitch 11520 (/4 2880)
>[  3665.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3665.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a60c8]
>[  3665.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a60c8] width 2880 pitch 11520 (/4 2880)
>[  3665.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3665.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a60c8]
>[  3665.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a60c8] width 2880 pitch 11520 (/4 2880)
>[  3665.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98238c0]
>[  3665.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98238c0] width 2880 pitch 11520 (/4 2880)
>[  3665.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a60c8]
>[  3665.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a60c8] width 2880 pitch 11520 (/4 2880)
>[  3673.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fb9f8]
>[  3673.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fb9f8] width 2880 pitch 11520 (/4 2880)
>[  3693.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984eb18]
>[  3693.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984eb18] width 2880 pitch 11520 (/4 2880)
>[  3699.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98dc618]
>[  3699.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98dc618] width 2880 pitch 11520 (/4 2880)
>[  3708.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cee48]
>[  3708.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cee48] width 2880 pitch 11520 (/4 2880)
>[  3710.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96de260]
>[  3710.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96de260] width 2880 pitch 11520 (/4 2880)
>[  3719.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  3719.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  3778.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dddb8]
>[  3778.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dddb8] width 2880 pitch 11520 (/4 2880)
>[  3778.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98792f8]
>[  3778.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98792f8] width 2880 pitch 11520 (/4 2880)
>[  3778.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dddb8]
>[  3778.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dddb8] width 2880 pitch 11520 (/4 2880)
>[  3778.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98792f8]
>[  3778.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98792f8] width 2880 pitch 11520 (/4 2880)
>[  3778.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ead0]
>[  3778.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ead0] width 2880 pitch 11520 (/4 2880)
>[  3778.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987a40]
>[  3778.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987a40] width 2880 pitch 11520 (/4 2880)
>[  3778.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c488]
>[  3778.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c488] width 2880 pitch 11520 (/4 2880)
>[  3778.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9953608]
>[  3778.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9953608] width 2880 pitch 11520 (/4 2880)
>[  3778.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98792f8]
>[  3778.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98792f8] width 2880 pitch 11520 (/4 2880)
>[  3778.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ead0]
>[  3778.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ead0] width 2880 pitch 11520 (/4 2880)
>[  3783.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9976300]
>[  3783.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9976300] width 2880 pitch 11520 (/4 2880)
>[  3783.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c488]
>[  3783.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c488] width 2880 pitch 11520 (/4 2880)
>[  3783.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  3783.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  3783.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ead0]
>[  3783.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ead0] width 2880 pitch 11520 (/4 2880)
>[  3783.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  3783.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  3783.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98792f8]
>[  3783.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98792f8] width 2880 pitch 11520 (/4 2880)
>[  3783.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3783.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3783.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960618]
>[  3783.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960618] width 2880 pitch 11520 (/4 2880)
>[  3783.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3783.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3783.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960618]
>[  3783.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960618] width 2880 pitch 11520 (/4 2880)
>[  3783.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3783.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3783.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960618]
>[  3783.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960618] width 2880 pitch 11520 (/4 2880)
>[  3783.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3783.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3783.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960618]
>[  3783.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960618] width 2880 pitch 11520 (/4 2880)
>[  3838.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3838.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3838.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c868]
>[  3838.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c868] width 2880 pitch 11520 (/4 2880)
>[  3838.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3838.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3838.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3838.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3838.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3838.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3838.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  3838.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  3838.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c868]
>[  3838.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c868] width 2880 pitch 11520 (/4 2880)
>[  3838.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5b08]
>[  3838.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5b08] width 2880 pitch 11520 (/4 2880)
>[  3838.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ceb60]
>[  3838.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ceb60] width 2880 pitch 11520 (/4 2880)
>[  3838.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728098]
>[  3838.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728098] width 2880 pitch 11520 (/4 2880)
>[  3838.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5b08]
>[  3838.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5b08] width 2880 pitch 11520 (/4 2880)
>[  3842.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b08]
>[  3842.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b08] width 2880 pitch 11520 (/4 2880)
>[  3842.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d34a0]
>[  3842.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d34a0] width 2880 pitch 11520 (/4 2880)
>[  3842.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  3842.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  3842.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3842.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3842.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd40]
>[  3842.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd40] width 2880 pitch 11520 (/4 2880)
>[  3842.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c868]
>[  3842.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c868] width 2880 pitch 11520 (/4 2880)
>[  3842.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ceb60]
>[  3842.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ceb60] width 2880 pitch 11520 (/4 2880)
>[  3842.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd40]
>[  3842.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd40] width 2880 pitch 11520 (/4 2880)
>[  3842.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  3843.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  3843.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c868]
>[  3843.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c868] width 2880 pitch 11520 (/4 2880)
>[  3843.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96de130]
>[  3843.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96de130] width 2880 pitch 11520 (/4 2880)
>[  3843.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e000]
>[  3843.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e000] width 2880 pitch 11520 (/4 2880)
>[  3843.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3843.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3843.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd40]
>[  3843.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd40] width 2880 pitch 11520 (/4 2880)
>[  3862.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972618]
>[  3862.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972618] width 2880 pitch 11520 (/4 2880)
>[  3862.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ceb60]
>[  3862.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ceb60] width 2880 pitch 11520 (/4 2880)
>[  3862.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ceb60]
>[  3862.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ceb60] width 2880 pitch 11520 (/4 2880)
>[  3862.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3862.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3862.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  3862.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  3862.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3862.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3862.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e8448]
>[  3862.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e8448] width 2880 pitch 11520 (/4 2880)
>[  3863.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ceb60]
>[  3863.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ceb60] width 2880 pitch 11520 (/4 2880)
>[  3863.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3863.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3863.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9980c00]
>[  3863.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9980c00] width 2880 pitch 11520 (/4 2880)
>[  3863.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9930440]
>[  3863.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9930440] width 2880 pitch 11520 (/4 2880)
>[  3863.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972618]
>[  3863.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972618] width 2880 pitch 11520 (/4 2880)
>[  3863.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9980c00]
>[  3863.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9980c00] width 2880 pitch 11520 (/4 2880)
>[  3863.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972cb18]
>[  3863.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972cb18] width 2880 pitch 11520 (/4 2880)
>[  3863.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3863.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3863.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972618]
>[  3863.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972618] width 2880 pitch 11520 (/4 2880)
>[  3863.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3863.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3863.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984c058]
>[  3863.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984c058] width 2880 pitch 11520 (/4 2880)
>[  3866.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3866.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3866.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99687a8]
>[  3866.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99687a8] width 2880 pitch 11520 (/4 2880)
>[  3866.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3866.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3866.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99687a8]
>[  3866.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99687a8] width 2880 pitch 11520 (/4 2880)
>[  3866.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3866.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3866.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9980c00]
>[  3866.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9980c00] width 2880 pitch 11520 (/4 2880)
>[  3866.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991e260]
>[  3866.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991e260] width 2880 pitch 11520 (/4 2880)
>[  3866.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99687a8]
>[  3866.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99687a8] width 2880 pitch 11520 (/4 2880)
>[  3866.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3867.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3867.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3867.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3867.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3867.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3867.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99687a8]
>[  3867.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99687a8] width 2880 pitch 11520 (/4 2880)
>[  3867.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3867.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3867.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985918]
>[  3867.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985918] width 2880 pitch 11520 (/4 2880)
>[  3867.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3867.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3867.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4b80]
>[  3867.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4b80] width 2880 pitch 11520 (/4 2880)
>[  3867.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3867.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3867.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4b80]
>[  3868.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4b80] width 2880 pitch 11520 (/4 2880)
>[  3868.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4b80]
>[  3868.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4b80] width 2880 pitch 11520 (/4 2880)
>[  3868.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4b80]
>[  3868.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4b80] width 2880 pitch 11520 (/4 2880)
>[  3868.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4b80]
>[  3868.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4b80] width 2880 pitch 11520 (/4 2880)
>[  3868.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ddf58]
>[  3868.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ddf58] width 2880 pitch 11520 (/4 2880)
>[  3868.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98375b0]
>[  3868.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98375b0] width 2880 pitch 11520 (/4 2880)
>[  3868.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3868.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d7608]
>[  3868.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d7608] width 2880 pitch 11520 (/4 2880)
>[  3868.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9983630]
>[  3868.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9983630] width 2880 pitch 11520 (/4 2880)
>[  3894.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d34a0]
>[  3894.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d34a0] width 2880 pitch 11520 (/4 2880)
>[  3898.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a368]
>[  3898.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a368] width 2880 pitch 11520 (/4 2880)
>[  3898.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  3898.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  3898.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  3898.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  3898.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999a328]
>[  3898.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999a328] width 2880 pitch 11520 (/4 2880)
>[  3898.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981ff8]
>[  3898.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981ff8] width 2880 pitch 11520 (/4 2880)
>[  3898.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e08]
>[  3898.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e08] width 2880 pitch 11520 (/4 2880)
>[  3898.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972568]
>[  3898.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972568] width 2880 pitch 11520 (/4 2880)
>[  3898.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1e70]
>[  3898.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1e70] width 2880 pitch 11520 (/4 2880)
>[  3898.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b020]
>[  3898.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b020] width 2880 pitch 11520 (/4 2880)
>[  3898.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e9c8]
>[  3898.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e9c8] width 2880 pitch 11520 (/4 2880)
>[  3898.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  3898.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  3902.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3902.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3902.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707648]
>[  3902.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707648] width 2880 pitch 11520 (/4 2880)
>[  3902.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e9c8]
>[  3902.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e9c8] width 2880 pitch 11520 (/4 2880)
>[  3902.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  3902.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  3902.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d67f8]
>[  3902.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d67f8] width 2880 pitch 11520 (/4 2880)
>[  3902.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3902.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3902.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d67f8]
>[  3902.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d67f8] width 2880 pitch 11520 (/4 2880)
>[  3902.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3902.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3902.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d67f8]
>[  3902.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d67f8] width 2880 pitch 11520 (/4 2880)
>[  3903.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3903.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3903.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d67f8]
>[  3903.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d67f8] width 2880 pitch 11520 (/4 2880)
>[  3903.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3903.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3903.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d67f8]
>[  3903.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d67f8] width 2880 pitch 11520 (/4 2880)
>[  3903.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981df8]
>[  3903.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981df8] width 2880 pitch 11520 (/4 2880)
>[  3927.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999b9b8]
>[  3927.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999b9b8] width 2880 pitch 11520 (/4 2880)
>[  3946.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf158]
>[  3946.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf158] width 2880 pitch 11520 (/4 2880)
>[  3958.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c978]
>[  3958.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c978] width 2880 pitch 11520 (/4 2880)
>[  3958.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3958.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3958.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c978]
>[  3958.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c978] width 2880 pitch 11520 (/4 2880)
>[  3958.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3958.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3958.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  3958.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  3958.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  3958.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  3958.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c978]
>[  3958.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c978] width 2880 pitch 11520 (/4 2880)
>[  3958.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  3958.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  3959.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3959.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3959.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  3959.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  3963.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  3963.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  3963.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992aff0]
>[  3963.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992aff0] width 2880 pitch 11520 (/4 2880)
>[  3963.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  3963.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  3963.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3963.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3963.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cee48]
>[  3963.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cee48] width 2880 pitch 11520 (/4 2880)
>[  3963.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874470]
>[  3963.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874470] width 2880 pitch 11520 (/4 2880)
>[  3963.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  3963.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  3963.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3963.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3963.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  3963.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  3963.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  3963.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  3963.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  3963.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  3963.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cee48]
>[  3963.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cee48] width 2880 pitch 11520 (/4 2880)
>[  3963.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  3963.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4018.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4018.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4018.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4018.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4018.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4018.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4018.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4018.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4018.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4018.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4018.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c3f0]
>[  4018.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c3f0] width 2880 pitch 11520 (/4 2880)
>[  4018.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4018.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4018.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4018.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4018.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992aff0]
>[  4018.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992aff0] width 2880 pitch 11520 (/4 2880)
>[  4018.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4018.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4018.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a73b8]
>[  4018.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a73b8] width 2880 pitch 11520 (/4 2880)
>[  4018.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4018.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4018.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4018.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4023.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4023.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4023.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4023.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4023.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c3f0]
>[  4023.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c3f0] width 2880 pitch 11520 (/4 2880)
>[  4023.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4023.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4023.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4023.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4023.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4023.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4023.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4023.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4023.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4023.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4023.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4024.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4024.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4024.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4024.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4024.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4024.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4024.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4024.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4024.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4024.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4024.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4078.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4078.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4078.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4078.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4078.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4078.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4078.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4078.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4078.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4078.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4078.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4078.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4078.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4078.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4078.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4078.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4078.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4078.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4078.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4078.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4082.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4082.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4082.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4082.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4082.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4082.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3cf0]
>[  4082.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3cf0] width 2880 pitch 11520 (/4 2880)
>[  4082.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4082.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4082.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4082.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4082.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4082.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4082.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4082.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4082.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4082.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4082.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4082.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4082.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4082.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4082.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4082.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4138.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4138.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4138.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4138.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4138.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4138.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4138.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4138.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4138.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4138.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4138.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4138.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4138.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4138.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4138.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4138.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4138.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3cf0]
>[  4138.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3cf0] width 2880 pitch 11520 (/4 2880)
>[  4142.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991cc80]
>[  4142.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991cc80] width 2880 pitch 11520 (/4 2880)
>[  4142.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4142.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4142.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5c50]
>[  4142.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5c50] width 2880 pitch 11520 (/4 2880)
>[  4142.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4142.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4142.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3cf0]
>[  4142.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3cf0] width 2880 pitch 11520 (/4 2880)
>[  4142.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991cc80]
>[  4142.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991cc80] width 2880 pitch 11520 (/4 2880)
>[  4142.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4142.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4142.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996100]
>[  4142.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996100] width 2880 pitch 11520 (/4 2880)
>[  4142.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4142.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4142.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3cf0]
>[  4142.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3cf0] width 2880 pitch 11520 (/4 2880)
>[  4142.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4142.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4142.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4143.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4143.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4143.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4143.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4143.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4147.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4147.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4147.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4147.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4147.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f0a28]
>[  4147.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f0a28] width 2880 pitch 11520 (/4 2880)
>[  4147.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0888]
>[  4147.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0888] width 2880 pitch 11520 (/4 2880)
>[  4147.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4147.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4147.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4147.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4147.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4147.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4147.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4147.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4147.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991a18]
>[  4147.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991a18] width 2880 pitch 11520 (/4 2880)
>[  4147.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4147.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4147.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981f38]
>[  4147.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981f38] width 2880 pitch 11520 (/4 2880)
>[  4147.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4147.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4147.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4147.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4438.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981f38]
>[  4438.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981f38] width 2880 pitch 11520 (/4 2880)
>[  4438.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4438.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4438.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4438.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4438.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4438.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4438.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4438.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4438.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4438.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4438.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  4438.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  4438.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4438.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4438.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4438.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4439.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4439.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4439.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  4439.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  4443.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4443.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4443.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4443.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4443.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4443.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4443.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4443.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4443.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4443.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4443.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4443.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4443.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4443.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4443.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4443.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4443.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6658]
>[  4443.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6658] width 2880 pitch 11520 (/4 2880)
>[  4443.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  4443.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  4443.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fb068]
>[  4443.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fb068] width 2880 pitch 11520 (/4 2880)
>[  4443.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  4443.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  4443.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fb068]
>[  4443.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fb068] width 2880 pitch 11520 (/4 2880)
>[  4443.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987548]
>[  4443.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987548] width 2880 pitch 11520 (/4 2880)
>[  4558.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  4558.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  4558.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4558.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4558.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4558.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4558.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4558.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4558.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4558.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4558.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4559.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4559.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4559.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4559.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4559.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4559.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4559.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4559.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4559.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4559.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4559.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4563.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960230]
>[  4563.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960230] width 2880 pitch 11520 (/4 2880)
>[  4563.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf158]
>[  4563.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf158] width 2880 pitch 11520 (/4 2880)
>[  4563.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4563.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4563.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4563.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4563.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4563.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4563.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4563.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4563.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4563.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4563.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  4563.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  4563.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4563.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4563.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  4563.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  4563.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4563.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4563.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  4563.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  4563.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  4563.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  4563.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  4563.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  4591.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4592.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4592.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cee48]
>[  4592.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cee48] width 2880 pitch 11520 (/4 2880)
>[  4592.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4592.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4592.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f10]
>[  4592.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f10] width 2880 pitch 11520 (/4 2880)
>[  4594.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4594.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4595.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c488]
>[  4595.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c488] width 2880 pitch 11520 (/4 2880)
>[  4595.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b030]
>[  4595.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b030] width 2880 pitch 11520 (/4 2880)
>[  4596.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c488]
>[  4596.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c488] width 2880 pitch 11520 (/4 2880)
>[  4596.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  4596.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  4596.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  4596.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  4596.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ac10]
>[  4597.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ac10] width 2880 pitch 11520 (/4 2880)
>[  4597.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  4597.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  4606.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99864d8]
>[  4606.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99864d8] width 2880 pitch 11520 (/4 2880)
>[  4618.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4618.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4618.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  4618.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  4618.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4618.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4618.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985768]
>[  4618.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985768] width 2880 pitch 11520 (/4 2880)
>[  4618.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4618.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4618.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95005c0]
>[  4618.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95005c0] width 2880 pitch 11520 (/4 2880)
>[  4618.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95005c0]
>[  4618.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95005c0] width 2880 pitch 11520 (/4 2880)
>[  4618.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95005c0]
>[  4619.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95005c0] width 2880 pitch 11520 (/4 2880)
>[  4619.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x937e020]
>[  4619.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x937e020] width 2880 pitch 11520 (/4 2880)
>[  4621.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4621.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4621.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4621.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4621.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4621.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4621.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4621.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4622.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4622.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4622.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4ff8]
>[  4622.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4ff8] width 2880 pitch 11520 (/4 2880)
>[  4622.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c9d0]
>[  4623.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c9d0] width 2880 pitch 11520 (/4 2880)
>[  4623.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985768]
>[  4623.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985768] width 2880 pitch 11520 (/4 2880)
>[  4623.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c9d0]
>[  4623.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c9d0] width 2880 pitch 11520 (/4 2880)
>[  4623.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97281f0]
>[  4623.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97281f0] width 2880 pitch 11520 (/4 2880)
>[  4623.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98249f8]
>[  4623.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98249f8] width 2880 pitch 11520 (/4 2880)
>[  4623.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98249f8]
>[  4623.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98249f8] width 2880 pitch 11520 (/4 2880)
>[  4623.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4623.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4623.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4623.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4623.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4623.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4623.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98249f8]
>[  4623.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98249f8] width 2880 pitch 11520 (/4 2880)
>[  4623.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4624.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4624.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98249f8]
>[  4624.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98249f8] width 2880 pitch 11520 (/4 2880)
>[  4624.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7b40]
>[  4624.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7b40] width 2880 pitch 11520 (/4 2880)
>[  4624.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99818c8]
>[  4624.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99818c8] width 2880 pitch 11520 (/4 2880)
>[  4624.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96de220]
>[  4624.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96de220] width 2880 pitch 11520 (/4 2880)
>[  4626.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6750]
>[  4626.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6750] width 2880 pitch 11520 (/4 2880)
>[  4626.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95005c0]
>[  4626.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95005c0] width 2880 pitch 11520 (/4 2880)
>[  4626.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6750]
>[  4626.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6750] width 2880 pitch 11520 (/4 2880)
>[  4626.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964780]
>[  4626.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964780] width 2880 pitch 11520 (/4 2880)
>[  4626.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96de220]
>[  4626.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96de220] width 2880 pitch 11520 (/4 2880)
>[  4626.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959fa8]
>[  4626.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959fa8] width 2880 pitch 11520 (/4 2880)
>[  4636.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964780]
>[  4636.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964780] width 2880 pitch 11520 (/4 2880)
>[  4652.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2388]
>[  4652.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2388] width 2880 pitch 11520 (/4 2880)
>[  4652.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4652.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4652.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9921528]
>[  4652.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9921528] width 2880 pitch 11520 (/4 2880)
>[  4652.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e1a08]
>[  4652.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e1a08] width 2880 pitch 11520 (/4 2880)
>[  4652.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98417a0]
>[  4652.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98417a0] width 2880 pitch 11520 (/4 2880)
>[  4652.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942660]
>[  4652.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942660] width 2880 pitch 11520 (/4 2880)
>[  4655.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[  4655.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[  4655.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9721108]
>[  4655.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9721108] width 2880 pitch 11520 (/4 2880)
>[  4655.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4655.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4655.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[  4655.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[  4655.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a032f8]
>[  4655.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a032f8] width 2880 pitch 11520 (/4 2880)
>[  4655.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c8e8]
>[  4655.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c8e8] width 2880 pitch 11520 (/4 2880)
>[  4655.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4655.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4655.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[  4655.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[  4655.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6940]
>[  4655.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6940] width 2880 pitch 11520 (/4 2880)
>[  4655.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[  4655.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[  4655.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6940]
>[  4655.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6940] width 2880 pitch 11520 (/4 2880)
>[  4655.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[  4655.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[  4655.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6940]
>[  4655.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6940] width 2880 pitch 11520 (/4 2880)
>[  4655.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9721108]
>[  4655.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9721108] width 2880 pitch 11520 (/4 2880)
>[  4655.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6940]
>[  4655.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6940] width 2880 pitch 11520 (/4 2880)
>[  4655.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9721108]
>[  4655.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9721108] width 2880 pitch 11520 (/4 2880)
>[  4660.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  4660.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  4667.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fdd8]
>[  4667.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fdd8] width 2880 pitch 11520 (/4 2880)
>[  4667.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99baf88]
>[  4667.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99baf88] width 2880 pitch 11520 (/4 2880)
>[  4667.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4667.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f7f48]
>[  4667.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f7f48] width 2880 pitch 11520 (/4 2880)
>[  4667.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05278]
>[  4667.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05278] width 2880 pitch 11520 (/4 2880)
>[  4668.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977658]
>[  4668.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977658] width 2880 pitch 11520 (/4 2880)
>[  4668.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4668.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4668.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4668.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4668.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4668.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4668.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4668.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4668.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5e8]
>[  4668.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5e8] width 2880 pitch 11520 (/4 2880)
>[  4668.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977658]
>[  4668.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977658] width 2880 pitch 11520 (/4 2880)
>[  4668.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977658]
>[  4668.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977658] width 2880 pitch 11520 (/4 2880)
>[  4668.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4668.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977658]
>[  4668.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977658] width 2880 pitch 11520 (/4 2880)
>[  4668.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9728968]
>[  4668.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9728968] width 2880 pitch 11520 (/4 2880)
>[  4704.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99856e0]
>[  4704.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99856e0] width 2880 pitch 11520 (/4 2880)
>[  4705.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95498f8]
>[  4705.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95498f8] width 2880 pitch 11520 (/4 2880)
>[  4705.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ec8f0]
>[  4705.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ec8f0] width 2880 pitch 11520 (/4 2880)
>[  4705.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ec8f0]
>[  4705.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ec8f0] width 2880 pitch 11520 (/4 2880)
>[  4705.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991cf50]
>[  4705.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991cf50] width 2880 pitch 11520 (/4 2880)
>[  4705.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4705.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4706.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9976178]
>[  4706.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9976178] width 2880 pitch 11520 (/4 2880)
>[  4706.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991cf50]
>[  4706.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991cf50] width 2880 pitch 11520 (/4 2880)
>[  4706.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991cf50]
>[  4706.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991cf50] width 2880 pitch 11520 (/4 2880)
>[  4708.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99baf88]
>[  4708.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99baf88] width 2880 pitch 11520 (/4 2880)
>[  4708.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942620]
>[  4708.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942620] width 2880 pitch 11520 (/4 2880)
>[  4708.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  4708.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  4708.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eaa08]
>[  4708.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eaa08] width 2880 pitch 11520 (/4 2880)
>[  4708.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4708.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4708.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  4708.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  4708.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99634c0]
>[  4708.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99634c0] width 2880 pitch 11520 (/4 2880)
>[  4709.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  4709.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  4726.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99388d8]
>[  4726.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99388d8] width 2880 pitch 11520 (/4 2880)
>[  4747.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4747.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4747.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  4747.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  4747.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99badd0]
>[  4748.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99badd0] width 2880 pitch 11520 (/4 2880)
>[  4748.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a508]
>[  4748.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a508] width 2880 pitch 11520 (/4 2880)
>[  4748.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd420]
>[  4748.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd420] width 2880 pitch 11520 (/4 2880)
>[  4748.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4748.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4748.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4748.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4748.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ec90]
>[  4748.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ec90] width 2880 pitch 11520 (/4 2880)
>[  4748.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  4748.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  4748.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd420]
>[  4749.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd420] width 2880 pitch 11520 (/4 2880)
>[  4749.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968ee8]
>[  4749.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968ee8] width 2880 pitch 11520 (/4 2880)
>[  4749.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc48]
>[  4749.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc48] width 2880 pitch 11520 (/4 2880)
>[  4749.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4749.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4749.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4749.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4749.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4749.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4749.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4749.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4749.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4749.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4749.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4749.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4759.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e708]
>[  4759.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e708] width 2880 pitch 11520 (/4 2880)
>[  4759.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4759.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4760.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4760.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4760.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b90d8]
>[  4760.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b90d8] width 2880 pitch 11520 (/4 2880)
>[  4760.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99aa670]
>[  4760.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99aa670] width 2880 pitch 11520 (/4 2880)
>[  4760.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96adcd8]
>[  4760.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96adcd8] width 2880 pitch 11520 (/4 2880)
>[  4760.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4760.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4760.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723150]
>[  4760.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723150] width 2880 pitch 11520 (/4 2880)
>[  4761.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4761.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4761.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723150]
>[  4761.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723150] width 2880 pitch 11520 (/4 2880)
>[  4761.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4761.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4762.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4762.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4762.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4762.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4763.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4763.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4763.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723150]
>[  4763.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723150] width 2880 pitch 11520 (/4 2880)
>[  4763.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4763.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4764.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4764.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4766.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  4766.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  4767.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4767.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4767.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4767.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4767.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4767.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4767.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4767.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4767.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4767.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4767.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4767.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4767.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4767.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4767.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4767.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4767.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4767.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4767.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4767.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4798.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4798.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4798.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4798.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4798.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4798.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4798.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24cf0]
>[  4798.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24cf0] width 2880 pitch 11520 (/4 2880)
>[  4798.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  4798.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  4798.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4798.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4798.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9747a50]
>[  4798.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9747a50] width 2880 pitch 11520 (/4 2880)
>[  4798.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9fa8]
>[  4798.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9fa8] width 2880 pitch 11520 (/4 2880)
>[  4798.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4799.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4799.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4799.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4799.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438588]
>[  4799.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438588] width 2880 pitch 11520 (/4 2880)
>[  4799.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4799.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4803.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4803.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4803.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4803.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4803.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438588]
>[  4803.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438588] width 2880 pitch 11520 (/4 2880)
>[  4803.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4803.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4803.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ef470]
>[  4803.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ef470] width 2880 pitch 11520 (/4 2880)
>[  4803.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4803.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4803.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4803.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4803.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4803.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4803.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4803.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4803.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4803.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4803.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4803.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4803.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4803.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4803.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4803.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4815.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4815.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4815.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4815.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4815.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4815.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4815.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4815.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4815.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4815.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4815.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4815.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4815.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4815.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4815.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4815.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4815.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4815.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4815.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4815.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4815.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4815.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4815.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4815.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4815.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4815.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4815.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4815.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4816.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4816.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4816.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4816.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4816.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99318e0]
>[  4816.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99318e0] width 2880 pitch 11520 (/4 2880)
>[  4816.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4816.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4816.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fd0]
>[  4816.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fd0] width 2880 pitch 11520 (/4 2880)
>[  4816.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4816.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4816.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99318e0]
>[  4816.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99318e0] width 2880 pitch 11520 (/4 2880)
>[  4816.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4816.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4816.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4816.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4816.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4816.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4816.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4816.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4816.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a8638]
>[  4816.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a8638] width 2880 pitch 11520 (/4 2880)
>[  4816.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4816.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4816.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4816.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4816.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4816.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4816.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4816.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4844.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4844.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4851.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4852.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4909.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  4909.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  4909.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4909.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4909.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a57e0]
>[  4909.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a57e0] width 2880 pitch 11520 (/4 2880)
>[  4909.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  4909.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  4909.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4909.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4909.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  4909.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  4909.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4909.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4910.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4910.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4910.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4910.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4910.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4910.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4910.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4910.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4910.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4910.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4910.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4910.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4910.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4910.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4910.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4910.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4925.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4925.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4925.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4925.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4925.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  4925.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  4926.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4926.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4926.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4926.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4926.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4926.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4926.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4926.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4926.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4926.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4926.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4926.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4926.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4927.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4927.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4927.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4927.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  4927.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  4927.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4927.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4927.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  4927.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  4927.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4927.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4927.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a57e0]
>[  4927.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a57e0] width 2880 pitch 11520 (/4 2880)
>[  4927.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[  4927.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[  4928.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a57e0]
>[  4928.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a57e0] width 2880 pitch 11520 (/4 2880)
>[  4928.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4928.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4928.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a57e0]
>[  4928.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a57e0] width 2880 pitch 11520 (/4 2880)
>[  4978.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999eca0]
>[  4978.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999eca0] width 2880 pitch 11520 (/4 2880)
>[  4978.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816448]
>[  4978.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816448] width 2880 pitch 11520 (/4 2880)
>[  4978.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999eca0]
>[  4978.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999eca0] width 2880 pitch 11520 (/4 2880)
>[  4978.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816448]
>[  4978.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816448] width 2880 pitch 11520 (/4 2880)
>[  4978.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999eca0]
>[  4978.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999eca0] width 2880 pitch 11520 (/4 2880)
>[  4978.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  4978.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  4978.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b3e8]
>[  4978.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b3e8] width 2880 pitch 11520 (/4 2880)
>[  4978.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816448]
>[  4978.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816448] width 2880 pitch 11520 (/4 2880)
>[  4978.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fe0]
>[  4978.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fe0] width 2880 pitch 11520 (/4 2880)
>[  4978.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d29a0]
>[  4978.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d29a0] width 2880 pitch 11520 (/4 2880)
>[  4978.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b92e0]
>[  4978.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b92e0] width 2880 pitch 11520 (/4 2880)
>[  4978.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af4d8]
>[  4978.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af4d8] width 2880 pitch 11520 (/4 2880)
>[  4978.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816448]
>[  4978.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816448] width 2880 pitch 11520 (/4 2880)
>[  4978.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b3f8]
>[  4978.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b3f8] width 2880 pitch 11520 (/4 2880)
>[  4982.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4982.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4982.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4982.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4982.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816448]
>[  4982.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816448] width 2880 pitch 11520 (/4 2880)
>[  4982.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  4982.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  4982.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4982.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4982.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4982.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4982.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4982.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4982.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4982.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4982.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4982.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4982.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4982.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4982.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4983.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4983.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4983.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  4983.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  4983.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  4983.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  4983.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5028.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b92e0]
>[  5028.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b92e0] width 2880 pitch 11520 (/4 2880)
>[  5028.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5028.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5028.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b92e0]
>[  5029.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b92e0] width 2880 pitch 11520 (/4 2880)
>[  5029.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5029.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5029.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b92e0]
>[  5029.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b92e0] width 2880 pitch 11520 (/4 2880)
>[  5029.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5029.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5029.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5029.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5029.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5029.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5029.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5029.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5029.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  5029.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  5029.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  5029.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  5029.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5029.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5029.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5030.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5030.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5030.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5030.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5030.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5030.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5030.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5030.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5030.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5030.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5030.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5030.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[  5030.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[  5041.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5042.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5042.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5042.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5042.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5042.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5042.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5042.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5042.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821e98]
>[  5042.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821e98] width 2880 pitch 11520 (/4 2880)
>[  5042.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0c78]
>[  5042.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0c78] width 2880 pitch 11520 (/4 2880)
>[  5042.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5042.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5042.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984fb40]
>[  5042.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984fb40] width 2880 pitch 11520 (/4 2880)
>[  5042.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5042.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5042.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984fb40]
>[  5043.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984fb40] width 2880 pitch 11520 (/4 2880)
>[  5043.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5043.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5043.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5043.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5043.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5044.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5044.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938930]
>[  5044.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938930] width 2880 pitch 11520 (/4 2880)
>[  5044.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5044.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5044.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a88c8]
>[  5044.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a88c8] width 2880 pitch 11520 (/4 2880)
>[  5044.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5044.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5044.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  5044.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  5064.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c948]
>[  5064.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c948] width 2880 pitch 11520 (/4 2880)
>[  5064.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932720]
>[  5064.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932720] width 2880 pitch 11520 (/4 2880)
>[  5077.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7520]
>[  5077.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7520] width 2880 pitch 11520 (/4 2880)
>[  5098.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5098.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5098.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  5098.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  5098.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  5098.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  5098.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99761b8]
>[  5098.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99761b8] width 2880 pitch 11520 (/4 2880)
>[  5098.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5098.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5098.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853610]
>[  5098.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853610] width 2880 pitch 11520 (/4 2880)
>[  5098.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a02ca8]
>[  5098.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a02ca8] width 2880 pitch 11520 (/4 2880)
>[  5098.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5098.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5098.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e9580]
>[  5098.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e9580] width 2880 pitch 11520 (/4 2880)
>[  5098.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5098.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5098.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f3a0]
>[  5098.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f3a0] width 2880 pitch 11520 (/4 2880)
>[  5102.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  5102.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  5102.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7b10]
>[  5102.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7b10] width 2880 pitch 11520 (/4 2880)
>[  5102.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5102.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5102.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5102.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5102.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968708]
>[  5102.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968708] width 2880 pitch 11520 (/4 2880)
>[  5102.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5102.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5102.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5102.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5102.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5102.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5102.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5103.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5103.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5103.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5103.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5103.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5103.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5103.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5103.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5103.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5109.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5109.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5109.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5109.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5109.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5109.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5109.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5109.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5110.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5110.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5110.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853160]
>[  5110.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853160] width 2880 pitch 11520 (/4 2880)
>[  5110.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  5110.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  5110.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853610]
>[  5110.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853610] width 2880 pitch 11520 (/4 2880)
>[  5110.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  5110.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  5110.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853610]
>[  5110.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853610] width 2880 pitch 11520 (/4 2880)
>[  5110.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bad98]
>[  5110.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bad98] width 2880 pitch 11520 (/4 2880)
>[  5111.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853160]
>[  5111.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853160] width 2880 pitch 11520 (/4 2880)
>[  5111.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  5111.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  5111.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5111.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5111.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5111.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5111.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d70]
>[  5111.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d70] width 2880 pitch 11520 (/4 2880)
>[  5111.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5111.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5123.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5123.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5123.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5123.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5123.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5123.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5123.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f9148]
>[  5123.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f9148] width 2880 pitch 11520 (/4 2880)
>[  5127.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5127.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5127.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bf1c8]
>[  5127.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bf1c8] width 2880 pitch 11520 (/4 2880)
>[  5127.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5127.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5135.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f6380]
>[  5135.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f6380] width 2880 pitch 11520 (/4 2880)
>[  5135.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5135.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5138.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ea20]
>[  5138.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ea20] width 2880 pitch 11520 (/4 2880)
>[  5138.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9996758]
>[  5138.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9996758] width 2880 pitch 11520 (/4 2880)
>[  5138.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5f70]
>[  5138.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5f70] width 2880 pitch 11520 (/4 2880)
>[  5138.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9747a50]
>[  5138.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9747a50] width 2880 pitch 11520 (/4 2880)
>[  5142.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438a88]
>[  5142.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438a88] width 2880 pitch 11520 (/4 2880)
>[  5142.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fe90]
>[  5142.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fe90] width 2880 pitch 11520 (/4 2880)
>[  5142.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ea20]
>[  5142.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ea20] width 2880 pitch 11520 (/4 2880)
>[  5142.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fe90]
>[  5142.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fe90] width 2880 pitch 11520 (/4 2880)
>[  5171.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5171.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5171.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5171.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5171.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5171.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5216.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5216.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5245.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725cd8]
>[  5245.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725cd8] width 2880 pitch 11520 (/4 2880)
>[  5338.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5338.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5338.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5338.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5338.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5338.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5338.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5338.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5338.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5338.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5338.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  5338.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  5338.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8280]
>[  5338.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8280] width 2880 pitch 11520 (/4 2880)
>[  5338.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe318]
>[  5338.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe318] width 2880 pitch 11520 (/4 2880)
>[  5338.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5338.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5338.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bc528]
>[  5338.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bc528] width 2880 pitch 11520 (/4 2880)
>[  5338.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ea20]
>[  5338.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ea20] width 2880 pitch 11520 (/4 2880)
>[  5338.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5338.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5342.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5342.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5342.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5342.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5342.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991ea20]
>[  5342.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991ea20] width 2880 pitch 11520 (/4 2880)
>[  5342.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24f80]
>[  5342.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24f80] width 2880 pitch 11520 (/4 2880)
>[  5342.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5342.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5342.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5342.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5342.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5342.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5342.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5342.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5342.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5343.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5343.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5343.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5343.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5343.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5343.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5343.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5384.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5384.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5384.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5384.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5384.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5384.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5384.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5384.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5384.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5384.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5384.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5384.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5384.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5384.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5384.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5384.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5384.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5384.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5384.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5384.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5384.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5384.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5384.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5384.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5384.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5384.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5384.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5384.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5388.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5388.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  5388.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  5388.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5388.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5388.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5388.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5388.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5388.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5388.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5388.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5388.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  5388.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  5458.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5458.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5458.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5458.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5458.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980f0b0]
>[  5458.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980f0b0] width 2880 pitch 11520 (/4 2880)
>[  5458.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c978]
>[  5458.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c978] width 2880 pitch 11520 (/4 2880)
>[  5458.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5458.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5458.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5458.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5458.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5458.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5458.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ffb58]
>[  5458.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ffb58] width 2880 pitch 11520 (/4 2880)
>[  5458.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af3a0]
>[  5458.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af3a0] width 2880 pitch 11520 (/4 2880)
>[  5458.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5458.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5458.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a015b0]
>[  5458.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a015b0] width 2880 pitch 11520 (/4 2880)
>[  5462.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5462.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5462.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5462.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5462.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5462.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5462.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5462.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5462.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5462.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5462.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5462.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5462.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5462.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5462.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5462.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5462.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5462.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5462.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5462.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5462.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5463.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5463.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5463.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5463.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5463.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5463.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5463.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5482.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5482.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5482.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5482.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5482.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5482.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5482.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5482.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5482.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5482.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5482.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5482.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5482.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5482.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5482.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5482.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5482.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5483.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5483.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5483.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5483.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5483.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5483.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5483.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5483.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c7b8]
>[  5483.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c7b8] width 2880 pitch 11520 (/4 2880)
>[  5484.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5484.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5489.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5489.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5489.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5489.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5489.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5489.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5489.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5489.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5489.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d34a0]
>[  5489.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d34a0] width 2880 pitch 11520 (/4 2880)
>[  5489.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5489.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5489.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5489.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5489.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5489.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5489.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5489.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5489.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d34a0]
>[  5489.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d34a0] width 2880 pitch 11520 (/4 2880)
>[  5489.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5489.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5489.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5489.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5489.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5489.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5489.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8d38]
>[  5489.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8d38] width 2880 pitch 11520 (/4 2880)
>[  5492.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9859d48]
>[  5492.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9859d48] width 2880 pitch 11520 (/4 2880)
>[  5493.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5493.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5493.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0cd8]
>[  5493.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0cd8] width 2880 pitch 11520 (/4 2880)
>[  5493.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f87f8]
>[  5493.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f87f8] width 2880 pitch 11520 (/4 2880)
>[  5493.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980eeb8]
>[  5493.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980eeb8] width 2880 pitch 11520 (/4 2880)
>[  5493.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f910]
>[  5493.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f910] width 2880 pitch 11520 (/4 2880)
>[  5493.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5493.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5493.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f87f8]
>[  5493.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f87f8] width 2880 pitch 11520 (/4 2880)
>[  5493.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5493.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5493.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ae2c0]
>[  5493.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ae2c0] width 2880 pitch 11520 (/4 2880)
>[  5493.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5493.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5493.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ae2c0]
>[  5493.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ae2c0] width 2880 pitch 11520 (/4 2880)
>[  5493.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5493.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5493.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ae2c0]
>[  5493.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ae2c0] width 2880 pitch 11520 (/4 2880)
>[  5493.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d10]
>[  5493.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d10] width 2880 pitch 11520 (/4 2880)
>[  5493.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ae2c0]
>[  5493.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ae2c0] width 2880 pitch 11520 (/4 2880)
>[  5493.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9859d48]
>[  5493.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9859d48] width 2880 pitch 11520 (/4 2880)
>[  5493.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980eeb8]
>[  5494.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980eeb8] width 2880 pitch 11520 (/4 2880)
>[  5494.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9859d48]
>[  5494.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9859d48] width 2880 pitch 11520 (/4 2880)
>[  5494.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ed30]
>[  5494.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ed30] width 2880 pitch 11520 (/4 2880)
>[  5494.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438a48]
>[  5494.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438a48] width 2880 pitch 11520 (/4 2880)
>[  5494.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f910]
>[  5494.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f910] width 2880 pitch 11520 (/4 2880)
>[  5494.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5494.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5494.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f910]
>[  5494.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f910] width 2880 pitch 11520 (/4 2880)
>[  5494.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5494.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5494.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f910]
>[  5495.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f910] width 2880 pitch 11520 (/4 2880)
>[  5495.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823ec8]
>[  5495.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823ec8] width 2880 pitch 11520 (/4 2880)
>[  5495.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5495.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5495.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f6810]
>[  5495.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f6810] width 2880 pitch 11520 (/4 2880)
>[  5495.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9480b98]
>[  5495.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9480b98] width 2880 pitch 11520 (/4 2880)
>[  5495.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f910]
>[  5495.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f910] width 2880 pitch 11520 (/4 2880)
>[  5495.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5495.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5495.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999cee0]
>[  5495.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999cee0] width 2880 pitch 11520 (/4 2880)
>[  5495.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985fa0]
>[  5495.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985fa0] width 2880 pitch 11520 (/4 2880)
>[  5495.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b5ac8]
>[  5495.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b5ac8] width 2880 pitch 11520 (/4 2880)
>[  5523.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed1f0]
>[  5523.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed1f0] width 2880 pitch 11520 (/4 2880)
>[  5523.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8ba0]
>[  5523.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8ba0] width 2880 pitch 11520 (/4 2880)
>[  5524.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9747a50]
>[  5524.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9747a50] width 2880 pitch 11520 (/4 2880)
>[  5524.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af488]
>[  5524.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af488] width 2880 pitch 11520 (/4 2880)
>[  5524.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dea38]
>[  5524.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dea38] width 2880 pitch 11520 (/4 2880)
>[  5524.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed1f0]
>[  5524.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed1f0] width 2880 pitch 11520 (/4 2880)
>[  5524.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af488]
>[  5524.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af488] width 2880 pitch 11520 (/4 2880)
>[  5524.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af488]
>[  5524.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af488] width 2880 pitch 11520 (/4 2880)
>[  5524.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af488]
>[  5524.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af488] width 2880 pitch 11520 (/4 2880)
>[  5525.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af488]
>[  5525.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af488] width 2880 pitch 11520 (/4 2880)
>[  5525.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972d90]
>[  5525.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972d90] width 2880 pitch 11520 (/4 2880)
>[  5525.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ae650]
>[  5525.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ae650] width 2880 pitch 11520 (/4 2880)
>[  5525.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972d90]
>[  5525.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972d90] width 2880 pitch 11520 (/4 2880)
>[  5526.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  5526.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  5526.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6b08]
>[  5526.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6b08] width 2880 pitch 11520 (/4 2880)
>[  5526.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  5526.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  5526.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5526.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5526.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  5526.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  5567.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5567.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5567.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5568.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5568.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[  5568.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[  5568.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  5568.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  5568.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5568.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5568.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5568.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5568.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5568.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5569.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5569.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5569.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5569.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5569.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5569.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5569.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5569.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5569.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5569.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5605.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5605.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5606.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ea20]
>[  5606.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ea20] width 2880 pitch 11520 (/4 2880)
>[  5606.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5606.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5606.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5606.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5606.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5606.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5606.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5606.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5607.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5607.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5607.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5607.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5607.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5607.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5607.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5607.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5607.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5607.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5607.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5607.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5608.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5608.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5609.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5609.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5609.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  5609.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  5609.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  5609.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  5609.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5609.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5609.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7508]
>[  5609.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7508] width 2880 pitch 11520 (/4 2880)
>[  5609.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e97e8]
>[  5609.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e97e8] width 2880 pitch 11520 (/4 2880)
>[  5611.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  5611.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  5611.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932910]
>[  5611.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932910] width 2880 pitch 11520 (/4 2880)
>[  5611.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5611.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5611.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5611.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5611.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5611.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5611.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5611.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5611.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5611.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5612.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5612.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5612.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e97e8]
>[  5612.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e97e8] width 2880 pitch 11520 (/4 2880)
>[  5612.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5612.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5612.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  5612.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  5612.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5612.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5612.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5612.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5613.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5613.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5613.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5613.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5613.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5613.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5624.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5624.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5624.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5624.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5624.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  5624.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  5624.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5624.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5624.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  5624.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  5624.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5624.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5624.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6ee8]
>[  5624.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6ee8] width 2880 pitch 11520 (/4 2880)
>[  5625.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5625.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5625.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd660]
>[  5625.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd660] width 2880 pitch 11520 (/4 2880)
>[  5625.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5625.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5626.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0988]
>[  5626.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0988] width 2880 pitch 11520 (/4 2880)
>[  5626.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01380]
>[  5626.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01380] width 2880 pitch 11520 (/4 2880)
>[  5626.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  5626.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  5627.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5627.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5627.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5627.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5627.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b128]
>[  5627.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b128] width 2880 pitch 11520 (/4 2880)
>[  5627.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5627.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5634.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc48]
>[  5634.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc48] width 2880 pitch 11520 (/4 2880)
>[  5638.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd420]
>[  5639.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd420] width 2880 pitch 11520 (/4 2880)
>[  5639.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eaa08]
>[  5639.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eaa08] width 2880 pitch 11520 (/4 2880)
>[  5639.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5639.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5639.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932910]
>[  5639.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932910] width 2880 pitch 11520 (/4 2880)
>[  5639.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5988]
>[  5639.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5988] width 2880 pitch 11520 (/4 2880)
>[  5639.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  5639.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  5639.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbc48]
>[  5639.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbc48] width 2880 pitch 11520 (/4 2880)
>[  5639.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5640.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5640.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968ee8]
>[  5640.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968ee8] width 2880 pitch 11520 (/4 2880)
>[  5640.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  5640.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  5640.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932910]
>[  5640.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932910] width 2880 pitch 11520 (/4 2880)
>[  5640.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5988]
>[  5640.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5988] width 2880 pitch 11520 (/4 2880)
>[  5640.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4dc8]
>[  5640.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4dc8] width 2880 pitch 11520 (/4 2880)
>[  5640.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  5640.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  5640.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a980]
>[  5640.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a980] width 2880 pitch 11520 (/4 2880)
>[  5640.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  5640.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  5652.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968ee8]
>[  5653.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968ee8] width 2880 pitch 11520 (/4 2880)
>[  5654.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5654.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5657.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5657.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5657.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5657.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5657.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99213c0]
>[  5657.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99213c0] width 2880 pitch 11520 (/4 2880)
>[  5657.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f3e58]
>[  5657.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f3e58] width 2880 pitch 11520 (/4 2880)
>[  5672.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a508]
>[  5672.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a508] width 2880 pitch 11520 (/4 2880)
>[  5672.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e150]
>[  5672.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e150] width 2880 pitch 11520 (/4 2880)
>[  5673.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a508]
>[  5673.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a508] width 2880 pitch 11520 (/4 2880)
>[  5673.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e150]
>[  5673.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e150] width 2880 pitch 11520 (/4 2880)
>[  5673.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a508]
>[  5673.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a508] width 2880 pitch 11520 (/4 2880)
>[  5673.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5673.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5673.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5673.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5673.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5673.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5673.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5673.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5673.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5674.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5674.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5674.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5674.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e150]
>[  5674.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e150] width 2880 pitch 11520 (/4 2880)
>[  5674.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2bc78]
>[  5674.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2bc78] width 2880 pitch 11520 (/4 2880)
>[  5674.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5674.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5674.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2bc78]
>[  5674.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2bc78] width 2880 pitch 11520 (/4 2880)
>[  5674.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29b50]
>[  5674.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29b50] width 2880 pitch 11520 (/4 2880)
>[  5674.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2bc78]
>[  5674.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2bc78] width 2880 pitch 11520 (/4 2880)
>[  5694.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5694.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5694.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29b50]
>[  5694.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29b50] width 2880 pitch 11520 (/4 2880)
>[  5695.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5695.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5695.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29b50]
>[  5695.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29b50] width 2880 pitch 11520 (/4 2880)
>[  5695.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5695.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5695.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5695.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5695.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5695.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5695.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5695.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5695.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5695.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5695.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5695.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5696.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5696.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5696.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5696.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5696.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29b50]
>[  5696.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29b50] width 2880 pitch 11520 (/4 2880)
>[  5696.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5696.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5708.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5708.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5710.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5710.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5710.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5710.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5710.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5710.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5715.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5715.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5715.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5715.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5715.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5715.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5715.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5715.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5745.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5745.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5746.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5746.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5746.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a58f8]
>[  5746.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a58f8] width 2880 pitch 11520 (/4 2880)
>[  5746.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5746.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5758.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5758.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5758.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5758.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5758.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5758.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5758.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5758.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5761.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5761.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5761.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5761.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5761.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a250d0]
>[  5761.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a250d0] width 2880 pitch 11520 (/4 2880)
>[  5762.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5762.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5762.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5762.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5763.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5763.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5763.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5763.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5763.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5763.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5778.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a238e8]
>[  5778.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a238e8] width 2880 pitch 11520 (/4 2880)
>[  5778.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5778.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5790.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8bc0]
>[  5790.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8bc0] width 2880 pitch 11520 (/4 2880)
>[  5790.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5790.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5790.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8bc0]
>[  5790.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8bc0] width 2880 pitch 11520 (/4 2880)
>[  5809.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919770]
>[  5809.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919770] width 2880 pitch 11520 (/4 2880)
>[  5809.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5809.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5820.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95498f8]
>[  5820.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95498f8] width 2880 pitch 11520 (/4 2880)
>[  5820.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5820.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5830.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a328a8]
>[  5830.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a328a8] width 2880 pitch 11520 (/4 2880)
>[  5830.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5830.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5840.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25120]
>[  5840.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25120] width 2880 pitch 11520 (/4 2880)
>[  5840.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a328a8]
>[  5840.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a328a8] width 2880 pitch 11520 (/4 2880)
>[  5840.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a238e8]
>[  5840.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a238e8] width 2880 pitch 11520 (/4 2880)
>[  5840.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981d58]
>[  5840.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981d58] width 2880 pitch 11520 (/4 2880)
>[  5867.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995bfd8]
>[  5867.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995bfd8] width 2880 pitch 11520 (/4 2880)
>[  5867.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5867.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5867.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a55b0]
>[  5867.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a55b0] width 2880 pitch 11520 (/4 2880)
>[  5867.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4b90]
>[  5867.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4b90] width 2880 pitch 11520 (/4 2880)
>[  5880.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993a680]
>[  5880.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993a680] width 2880 pitch 11520 (/4 2880)
>[  5880.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5880.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5880.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5880.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5883.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5883.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5883.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5883.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5883.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5884.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5884.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5884.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5884.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5884.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5884.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5884.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5884.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a238e8]
>[  5884.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a238e8] width 2880 pitch 11520 (/4 2880)
>[  5884.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96811e8]
>[  5884.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96811e8] width 2880 pitch 11520 (/4 2880)
>[  5884.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5884.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5884.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5884.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5884.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5884.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5884.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5884.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5884.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd420]
>[  5884.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd420] width 2880 pitch 11520 (/4 2880)
>[  5884.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993c318]
>[  5885.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993c318] width 2880 pitch 11520 (/4 2880)
>[  5885.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23da8]
>[  5885.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23da8] width 2880 pitch 11520 (/4 2880)
>[  5885.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95498f8]
>[  5885.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95498f8] width 2880 pitch 11520 (/4 2880)
>[  5885.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29bc8]
>[  5885.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29bc8] width 2880 pitch 11520 (/4 2880)
>[  5885.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95498f8]
>[  5885.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95498f8] width 2880 pitch 11520 (/4 2880)
>[  5885.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29bc8]
>[  5885.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29bc8] width 2880 pitch 11520 (/4 2880)
>[  5885.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95498f8]
>[  5885.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95498f8] width 2880 pitch 11520 (/4 2880)
>[  5938.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e290]
>[  5938.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e290] width 2880 pitch 11520 (/4 2880)
>[  5938.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6f58]
>[  5938.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6f58] width 2880 pitch 11520 (/4 2880)
>[  5938.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e290]
>[  5938.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e290] width 2880 pitch 11520 (/4 2880)
>[  5938.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6f58]
>[  5938.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6f58] width 2880 pitch 11520 (/4 2880)
>[  5938.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e290]
>[  5938.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e290] width 2880 pitch 11520 (/4 2880)
>[  5938.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999ea80]
>[  5938.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999ea80] width 2880 pitch 11520 (/4 2880)
>[  5938.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  5938.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  5938.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6f58]
>[  5938.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6f58] width 2880 pitch 11520 (/4 2880)
>[  5938.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a034d0]
>[  5938.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a034d0] width 2880 pitch 11520 (/4 2880)
>[  5938.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97360f8]
>[  5938.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97360f8] width 2880 pitch 11520 (/4 2880)
>[  5938.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97360f8]
>[  5938.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97360f8] width 2880 pitch 11520 (/4 2880)
>[  5938.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5938.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5942.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5942.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5942.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97787b0]
>[  5942.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97787b0] width 2880 pitch 11520 (/4 2880)
>[  5942.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97360f8]
>[  5943.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97360f8] width 2880 pitch 11520 (/4 2880)
>[  5943.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6f58]
>[  5943.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6f58] width 2880 pitch 11520 (/4 2880)
>[  5943.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a45d0]
>[  5943.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a45d0] width 2880 pitch 11520 (/4 2880)
>[  5943.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5943.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5943.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a45d0]
>[  5943.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a45d0] width 2880 pitch 11520 (/4 2880)
>[  5943.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5943.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5943.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a45d0]
>[  5943.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a45d0] width 2880 pitch 11520 (/4 2880)
>[  5943.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5943.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5943.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a45d0]
>[  5943.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a45d0] width 2880 pitch 11520 (/4 2880)
>[  5943.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97232d8]
>[  5943.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97232d8] width 2880 pitch 11520 (/4 2880)
>[  5943.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a45d0]
>[  5943.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a45d0] width 2880 pitch 11520 (/4 2880)
>[  5998.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976fd58]
>[  5998.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976fd58] width 2880 pitch 11520 (/4 2880)
>[  5998.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  5998.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  5998.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976fd58]
>[  5998.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976fd58] width 2880 pitch 11520 (/4 2880)
>[  5998.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  5998.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  5998.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976fd58]
>[  5998.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976fd58] width 2880 pitch 11520 (/4 2880)
>[  5998.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8130]
>[  5998.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8130] width 2880 pitch 11520 (/4 2880)
>[  5998.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99339c8]
>[  5999.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99339c8] width 2880 pitch 11520 (/4 2880)
>[  5999.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  5999.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  5999.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976fd58]
>[  5999.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976fd58] width 2880 pitch 11520 (/4 2880)
>[  5999.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f83b8]
>[  5999.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f83b8] width 2880 pitch 11520 (/4 2880)
>[  5999.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d29a0]
>[  5999.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d29a0] width 2880 pitch 11520 (/4 2880)
>[  5999.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f83b8]
>[  5999.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f83b8] width 2880 pitch 11520 (/4 2880)
>[  5999.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c0188]
>[  5999.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c0188] width 2880 pitch 11520 (/4 2880)
>[  6004.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b8f98]
>[  6004.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b8f98] width 2880 pitch 11520 (/4 2880)
>[  6004.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8180]
>[  6004.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8180] width 2880 pitch 11520 (/4 2880)
>[  6004.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6004.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6004.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6004.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6004.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94858a0]
>[  6004.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94858a0] width 2880 pitch 11520 (/4 2880)
>[  6004.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5f70]
>[  6004.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5f70] width 2880 pitch 11520 (/4 2880)
>[  6004.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c0188]
>[  6004.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c0188] width 2880 pitch 11520 (/4 2880)
>[  6004.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6004.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6004.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6004.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6004.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6004.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6004.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6004.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6004.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6004.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6004.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6004.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6004.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6004.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6039.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6039.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6039.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6039.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6058.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6058.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6058.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6058.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6058.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6058.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6058.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6058.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6058.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6058.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6058.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ba0]
>[  6058.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ba0] width 2880 pitch 11520 (/4 2880)
>[  6058.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6058.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6058.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6058.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6058.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6058.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6058.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6058.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6058.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ba0]
>[  6058.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ba0] width 2880 pitch 11520 (/4 2880)
>[  6062.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6062.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6062.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989330]
>[  6062.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989330] width 2880 pitch 11520 (/4 2880)
>[  6062.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6062.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6062.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6063.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6063.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6063.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6063.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6063.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6063.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6063.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6063.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6063.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6063.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6063.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6063.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6063.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6063.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6063.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6090.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991e50]
>[  6090.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991e50] width 2880 pitch 11520 (/4 2880)
>[  6090.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24d90]
>[  6090.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24d90] width 2880 pitch 11520 (/4 2880)
>[  6092.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6092.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6092.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6093.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6093.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6093.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6112.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6112.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6112.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6112.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6112.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6112.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6112.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6113.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6113.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6113.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6113.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6113.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6113.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6113.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6113.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989330]
>[  6113.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989330] width 2880 pitch 11520 (/4 2880)
>[  6113.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6113.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6114.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989330]
>[  6114.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989330] width 2880 pitch 11520 (/4 2880)
>[  6114.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6114.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6115.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6115.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6115.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438b90]
>[  6115.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438b90] width 2880 pitch 11520 (/4 2880)
>[  6115.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6116.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6116.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6116.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6117.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828880]
>[  6117.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828880] width 2880 pitch 11520 (/4 2880)
>[  6117.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6117.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6117.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6117.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6117.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6117.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6119.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d1528]
>[  6119.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d1528] width 2880 pitch 11520 (/4 2880)
>[  6121.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a238a8]
>[  6121.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a238a8] width 2880 pitch 11520 (/4 2880)
>[  6121.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f92a0]
>[  6121.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f92a0] width 2880 pitch 11520 (/4 2880)
>[  6121.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980d2a0]
>[  6121.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980d2a0] width 2880 pitch 11520 (/4 2880)
>[  6121.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a32138]
>[  6121.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a32138] width 2880 pitch 11520 (/4 2880)
>[  6121.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a32168]
>[  6121.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a32168] width 2880 pitch 11520 (/4 2880)
>[  6124.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2ba60]
>[  6124.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2ba60] width 2880 pitch 11520 (/4 2880)
>[  6125.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1f5c8]
>[  6125.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1f5c8] width 2880 pitch 11520 (/4 2880)
>[  6125.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29fd8]
>[  6125.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29fd8] width 2880 pitch 11520 (/4 2880)
>[  6126.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975cce8]
>[  6126.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975cce8] width 2880 pitch 11520 (/4 2880)
>[  6143.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1f338]
>[  6143.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1f338] width 2880 pitch 11520 (/4 2880)
>[  6143.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b6f68]
>[  6143.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b6f68] width 2880 pitch 11520 (/4 2880)
>[  6143.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6143.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6143.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6143.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6144.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a29350]
>[  6144.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a29350] width 2880 pitch 11520 (/4 2880)
>[  6148.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fd00]
>[  6148.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fd00] width 2880 pitch 11520 (/4 2880)
>[  6152.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6152.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6152.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6152.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6152.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6152.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6152.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6152.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6153.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6153.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6153.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fd00]
>[  6153.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fd00] width 2880 pitch 11520 (/4 2880)
>[  6153.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6153.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6153.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6153.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6153.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fd00]
>[  6153.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fd00] width 2880 pitch 11520 (/4 2880)
>[  6154.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6154.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6154.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6154.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6154.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e708]
>[  6154.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e708] width 2880 pitch 11520 (/4 2880)
>[  6154.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6154.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6154.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe478]
>[  6154.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe478] width 2880 pitch 11520 (/4 2880)
>[  6154.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5988]
>[  6154.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5988] width 2880 pitch 11520 (/4 2880)
>[  6154.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d688]
>[  6154.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d688] width 2880 pitch 11520 (/4 2880)
>[  6178.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  6178.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  6178.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23d00]
>[  6178.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23d00] width 2880 pitch 11520 (/4 2880)
>[  6178.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  6178.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  6178.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  6178.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  6182.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  6182.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  6182.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  6182.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  6182.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27838]
>[  6182.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27838] width 2880 pitch 11520 (/4 2880)
>[  6182.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  6182.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  6182.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23d00]
>[  6182.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23d00] width 2880 pitch 11520 (/4 2880)
>[  6183.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  6183.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  6183.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23d00]
>[  6183.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23d00] width 2880 pitch 11520 (/4 2880)
>[  6183.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c6a70]
>[  6183.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c6a70] width 2880 pitch 11520 (/4 2880)
>[  6183.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23d00]
>[  6183.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23d00] width 2880 pitch 11520 (/4 2880)
>[  6222.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27838]
>[  6222.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27838] width 2880 pitch 11520 (/4 2880)
>[  6222.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  6222.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  6223.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  6223.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  6223.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[  6223.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[  6223.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  6223.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  6223.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ffb68]
>[  6223.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ffb68] width 2880 pitch 11520 (/4 2880)
>[  6223.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  6223.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  6224.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[  6224.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[  6224.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  6224.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  6224.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  6224.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  6224.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[  6224.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[  6225.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ffb68]
>[  6225.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ffb68] width 2880 pitch 11520 (/4 2880)
>[  6225.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bb518]
>[  6225.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bb518] width 2880 pitch 11520 (/4 2880)
>[  6225.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a319a8]
>[  6225.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a319a8] width 2880 pitch 11520 (/4 2880)
>[  6225.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee58]
>[  6225.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee58] width 2880 pitch 11520 (/4 2880)
>[  6225.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732f70]
>[  6225.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732f70] width 2880 pitch 11520 (/4 2880)
>[  6238.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf1c0]
>[  6238.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf1c0] width 2880 pitch 11520 (/4 2880)
>[  6238.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  6238.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  6238.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf1c0]
>[  6238.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf1c0] width 2880 pitch 11520 (/4 2880)
>[  6238.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d780]
>[  6238.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d780] width 2880 pitch 11520 (/4 2880)
>[  6238.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf1c0]
>[  6238.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf1c0] width 2880 pitch 11520 (/4 2880)
>[  6238.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e1690]
>[  6238.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e1690] width 2880 pitch 11520 (/4 2880)
>[  6238.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf1c0]
>[  6238.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf1c0] width 2880 pitch 11520 (/4 2880)
>[  6238.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf1c0]
>[  6238.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf1c0] width 2880 pitch 11520 (/4 2880)
>[  6242.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989330]
>[  6242.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989330] width 2880 pitch 11520 (/4 2880)
>[  6242.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e290]
>[  6242.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e290] width 2880 pitch 11520 (/4 2880)
>[  6242.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999cd10]
>[  6242.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999cd10] width 2880 pitch 11520 (/4 2880)
>[  6242.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6242.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6242.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6242.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6242.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989330]
>[  6242.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989330] width 2880 pitch 11520 (/4 2880)
>[  6242.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6242.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6243.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6243.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6243.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6243.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6243.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a1440]
>[  6243.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a1440] width 2880 pitch 11520 (/4 2880)
>[  6243.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815250]
>[  6243.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815250] width 2880 pitch 11520 (/4 2880)
>[  6337.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6337.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6358.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6358.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6358.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6358.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6358.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6358.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6358.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6358.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6358.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6358.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6358.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6358.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6358.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6358.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6358.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6358.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6358.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d29a0]
>[  6358.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d29a0] width 2880 pitch 11520 (/4 2880)
>[  6360.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615ca0]
>[  6360.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615ca0] width 2880 pitch 11520 (/4 2880)
>[  6360.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615ca0]
>[  6360.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615ca0] width 2880 pitch 11520 (/4 2880)
>[  6361.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5a3f8]
>[  6361.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5a3f8] width 2880 pitch 11520 (/4 2880)
>[  6361.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ad18]
>[  6361.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ad18] width 2880 pitch 11520 (/4 2880)
>[  6361.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9812d90]
>[  6361.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9812d90] width 2880 pitch 11520 (/4 2880)
>[  6361.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a319a8]
>[  6361.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a319a8] width 2880 pitch 11520 (/4 2880)
>[  6362.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28ac8]
>[  6362.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28ac8] width 2880 pitch 11520 (/4 2880)
>[  6362.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6362.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6362.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6362.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6362.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615ca0]
>[  6362.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615ca0] width 2880 pitch 11520 (/4 2880)
>[  6362.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6362.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6362.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28ac8]
>[  6362.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28ac8] width 2880 pitch 11520 (/4 2880)
>[  6362.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6362.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6362.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6362.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6362.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615ca0]
>[  6362.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615ca0] width 2880 pitch 11520 (/4 2880)
>[  6362.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6362.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6362.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28ac8]
>[  6362.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28ac8] width 2880 pitch 11520 (/4 2880)
>[  6362.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6362.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6362.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6362.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6366.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6366.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6366.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6366.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6366.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6366.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6366.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6366.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6366.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6366.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6366.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6366.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6366.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6366.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6366.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6366.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6366.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6366.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6367.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6367.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6367.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6367.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6367.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6367.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6396.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9920b28]
>[  6396.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9920b28] width 2880 pitch 11520 (/4 2880)
>[  6396.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e9318]
>[  6396.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e9318] width 2880 pitch 11520 (/4 2880)
>[  6396.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6396.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6396.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e9318]
>[  6396.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e9318] width 2880 pitch 11520 (/4 2880)
>[  6397.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6397.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6397.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2338]
>[  6397.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2338] width 2880 pitch 11520 (/4 2880)
>[  6397.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608658]
>[  6397.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608658] width 2880 pitch 11520 (/4 2880)
>[  6397.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1df80]
>[  6397.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1df80] width 2880 pitch 11520 (/4 2880)
>[  6398.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975cef8]
>[  6398.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975cef8] width 2880 pitch 11520 (/4 2880)
>[  6398.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6398.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6398.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6398.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6398.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6398.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6398.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6398.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6478.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6478.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6478.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6478.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6478.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6478.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6478.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6478.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6478.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6478.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6478.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6478.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6478.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6478.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6478.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6478.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6478.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6478.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6478.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  6478.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  6478.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6478.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6478.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6478.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6482.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6482.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6482.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6482.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6482.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6482.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6482.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6482.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6482.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6482.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6482.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6482.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6482.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6482.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6482.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6482.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6482.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6482.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6482.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6482.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6482.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6482.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6482.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6499.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6499.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6499.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6499.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6499.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6499.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6499.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6499.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6499.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6499.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6499.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6499.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6499.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6499.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6500.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960df80]
>[  6500.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960df80] width 2880 pitch 11520 (/4 2880)
>[  6500.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6500.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6500.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6500.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6500.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6500.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6500.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6500.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6500.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6500.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6500.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6501.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6501.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6501.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6501.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6501.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6501.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ec08]
>[  6501.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ec08] width 2880 pitch 11520 (/4 2880)
>[  6501.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24ea8]
>[  6501.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24ea8] width 2880 pitch 11520 (/4 2880)
>[  6504.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a14128]
>[  6504.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a14128] width 2880 pitch 11520 (/4 2880)
>[  6504.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6aa68]
>[  6504.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6aa68] width 2880 pitch 11520 (/4 2880)
>[  6504.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a14128]
>[  6504.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a14128] width 2880 pitch 11520 (/4 2880)
>[  6504.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6aa68]
>[  6504.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6aa68] width 2880 pitch 11520 (/4 2880)
>[  6504.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fde28]
>[  6504.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fde28] width 2880 pitch 11520 (/4 2880)
>[  6504.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fda70]
>[  6504.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fda70] width 2880 pitch 11520 (/4 2880)
>[  6504.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a14128]
>[  6504.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a14128] width 2880 pitch 11520 (/4 2880)
>[  6504.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6aa68]
>[  6504.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6aa68] width 2880 pitch 11520 (/4 2880)
>[  6504.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fdfa0]
>[  6504.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fdfa0] width 2880 pitch 11520 (/4 2880)
>[  6504.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fddf8]
>[  6504.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fddf8] width 2880 pitch 11520 (/4 2880)
>[  6504.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e0f0]
>[  6504.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e0f0] width 2880 pitch 11520 (/4 2880)
>[  6504.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fddf8]
>[  6504.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fddf8] width 2880 pitch 11520 (/4 2880)
>[  6504.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6aa68]
>[  6504.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6aa68] width 2880 pitch 11520 (/4 2880)
>[  6507.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6507.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6507.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986e818]
>[  6507.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986e818] width 2880 pitch 11520 (/4 2880)
>[  6508.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626388]
>[  6508.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626388] width 2880 pitch 11520 (/4 2880)
>[  6509.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9625200]
>[  6509.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9625200] width 2880 pitch 11520 (/4 2880)
>[  6509.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96243a0]
>[  6509.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96243a0] width 2880 pitch 11520 (/4 2880)
>[  6509.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624a80]
>[  6509.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624a80] width 2880 pitch 11520 (/4 2880)
>[  6509.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96265e8]
>[  6509.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96265e8] width 2880 pitch 11520 (/4 2880)
>[  6509.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626188]
>[  6509.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626188] width 2880 pitch 11520 (/4 2880)
>[  6509.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626158]
>[  6509.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626158] width 2880 pitch 11520 (/4 2880)
>[  6509.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96243a0]
>[  6509.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96243a0] width 2880 pitch 11520 (/4 2880)
>[  6509.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6509.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6509.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988838]
>[  6509.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988838] width 2880 pitch 11520 (/4 2880)
>[  6509.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988838]
>[  6509.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988838] width 2880 pitch 11520 (/4 2880)
>[  6510.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6510.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6510.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6510.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6510.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6510.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6510.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6510.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6510.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6510.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6511.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6511.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6511.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6511.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6511.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e800]
>[  6511.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e800] width 2880 pitch 11520 (/4 2880)
>[  6511.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6511.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6512.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6512.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6512.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94386f8]
>[  6512.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94386f8] width 2880 pitch 11520 (/4 2880)
>[  6512.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e1998]
>[  6512.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e1998] width 2880 pitch 11520 (/4 2880)
>[  6512.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  6512.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  6514.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97048a0]
>[  6514.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97048a0] width 2880 pitch 11520 (/4 2880)
>[  6516.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecdb8]
>[  6516.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecdb8] width 2880 pitch 11520 (/4 2880)
>[  6524.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986e7d8]
>[  6524.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986e7d8] width 2880 pitch 11520 (/4 2880)
>[  6524.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963af30]
>[  6524.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963af30] width 2880 pitch 11520 (/4 2880)
>[  6528.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9639de0]
>[  6528.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9639de0] width 2880 pitch 11520 (/4 2880)
>[  6539.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f1b18]
>[  6539.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f1b18] width 2880 pitch 11520 (/4 2880)
>[  6539.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f1b18]
>[  6539.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f1b18] width 2880 pitch 11520 (/4 2880)
>[  6539.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99889b8]
>[  6539.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99889b8] width 2880 pitch 11520 (/4 2880)
>[  6539.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f1b18]
>[  6539.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f1b18] width 2880 pitch 11520 (/4 2880)
>[  6539.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  6539.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  6542.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b350]
>[  6542.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b350] width 2880 pitch 11520 (/4 2880)
>[  6542.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99889b8]
>[  6542.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99889b8] width 2880 pitch 11520 (/4 2880)
>[  6542.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b350]
>[  6542.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b350] width 2880 pitch 11520 (/4 2880)
>[  6543.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a670]
>[  6543.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a670] width 2880 pitch 11520 (/4 2880)
>[  6543.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a5f0]
>[  6543.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a5f0] width 2880 pitch 11520 (/4 2880)
>[  6543.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a5f0]
>[  6543.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a5f0] width 2880 pitch 11520 (/4 2880)
>[  6543.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616b28]
>[  6543.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616b28] width 2880 pitch 11520 (/4 2880)
>[  6543.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99889b8]
>[  6543.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99889b8] width 2880 pitch 11520 (/4 2880)
>[  6544.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9938bc8]
>[  6544.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9938bc8] width 2880 pitch 11520 (/4 2880)
>[  6544.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99889b8]
>[  6544.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99889b8] width 2880 pitch 11520 (/4 2880)
>[  6544.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96155a0]
>[  6544.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96155a0] width 2880 pitch 11520 (/4 2880)
>[  6544.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6544.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6544.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96155a0]
>[  6544.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96155a0] width 2880 pitch 11520 (/4 2880)
>[  6545.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6545.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6599.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  6599.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  6599.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6599.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6599.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  6599.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  6599.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6599.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6599.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6599.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6603.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6603.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6603.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6603.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6603.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6603.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6603.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6603.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6603.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6603.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6603.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6603.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6603.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6603.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6603.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6603.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6603.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6603.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6603.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6603.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6603.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6603.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6603.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6603.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6603.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6603.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6603.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6603.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6604.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6604.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6604.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6604.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6604.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6604.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6604.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  6604.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  6604.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6604.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6604.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6604.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6604.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6604.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6604.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6604.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6604.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6604.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6658.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6658.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6658.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6658.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6658.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6658.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6658.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6658.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6658.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6658.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6658.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6658.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6658.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6658.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6658.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6658.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6658.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6658.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6658.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6658.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6662.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6662.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6662.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6662.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6662.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6662.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6662.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6662.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6662.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6662.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6662.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6662.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6662.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6662.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6662.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6662.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6662.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff148]
>[  6662.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff148] width 2880 pitch 11520 (/4 2880)
>[  6692.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  6692.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  6692.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6692.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6692.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6692.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6692.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6692.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6692.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6692.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6692.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6692.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6692.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6692.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6692.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6692.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6692.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6692.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6696.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6696.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6696.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6696.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6696.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6696.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6696.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9611b58]
>[  6696.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9611b58] width 2880 pitch 11520 (/4 2880)
>[  6696.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6696.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6696.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6696.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6696.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6696.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6696.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6696.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6696.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6696.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6696.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6696.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6696.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6696.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6718.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  6718.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  6718.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6718.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6718.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6718.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6718.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6718.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6718.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6718.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6718.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5ab78]
>[  6718.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5ab78] width 2880 pitch 11520 (/4 2880)
>[  6718.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6718.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6718.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6718.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6718.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6718.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6718.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6718.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6722.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6722.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6722.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6722.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6722.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9300]
>[  6722.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9300] width 2880 pitch 11520 (/4 2880)
>[  6722.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6722.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6722.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6722.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6723.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6723.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6723.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6723.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6723.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6723.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6723.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6723.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6740.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  6740.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  6740.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6740.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6740.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  6740.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  6740.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6740.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6740.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6740.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6740.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6740.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6740.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  6740.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  6740.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6740.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6740.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6740.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6740.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6740.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6740.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7d48]
>[  6740.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7d48] width 2880 pitch 11520 (/4 2880)
>[  6741.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6741.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6741.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6741.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6741.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6741.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6741.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6741.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6741.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6741.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6741.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a49a70]
>[  6741.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a49a70] width 2880 pitch 11520 (/4 2880)
>[  6742.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6742.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6742.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6742.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6742.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9611b58]
>[  6742.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9611b58] width 2880 pitch 11520 (/4 2880)
>[  6743.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6743.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6743.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6743.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6743.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6743.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6743.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cd38]
>[  6743.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cd38] width 2880 pitch 11520 (/4 2880)
>[  6743.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6743.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6743.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1f78]
>[  6743.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1f78] width 2880 pitch 11520 (/4 2880)
>[  6744.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6744.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6744.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6744.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6744.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9611b58]
>[  6744.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9611b58] width 2880 pitch 11520 (/4 2880)
>[  6744.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b8c8]
>[  6744.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b8c8] width 2880 pitch 11520 (/4 2880)
>[  6744.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6744.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6744.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6744.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6744.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6744.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6744.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6744.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6744.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6744.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6744.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616a38]
>[  6744.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616a38] width 2880 pitch 11520 (/4 2880)
>[  6744.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a56d0]
>[  6744.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a56d0] width 2880 pitch 11520 (/4 2880)
>[  6769.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647900]
>[  6769.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647900] width 2880 pitch 11520 (/4 2880)
>[  6786.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13288]
>[  6786.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13288] width 2880 pitch 11520 (/4 2880)
>[  6788.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ae030]
>[  6788.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ae030] width 2880 pitch 11520 (/4 2880)
>[  6788.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a55f88]
>[  6788.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a55f88] width 2880 pitch 11520 (/4 2880)
>[  6788.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614f98]
>[  6788.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614f98] width 2880 pitch 11520 (/4 2880)
>[  6788.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960f0f8]
>[  6788.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960f0f8] width 2880 pitch 11520 (/4 2880)
>[  6788.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614f98]
>[  6788.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614f98] width 2880 pitch 11520 (/4 2880)
>[  6788.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960f0f8]
>[  6788.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960f0f8] width 2880 pitch 11520 (/4 2880)
>[  6789.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ae030]
>[  6789.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ae030] width 2880 pitch 11520 (/4 2880)
>[  6789.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a88]
>[  6789.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a88] width 2880 pitch 11520 (/4 2880)
>[  6789.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ae030]
>[  6789.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ae030] width 2880 pitch 11520 (/4 2880)
>[  6789.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a88]
>[  6789.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a88] width 2880 pitch 11520 (/4 2880)
>[  6789.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ae030]
>[  6789.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ae030] width 2880 pitch 11520 (/4 2880)
>[  6811.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96226c0]
>[  6811.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96226c0] width 2880 pitch 11520 (/4 2880)
>[  6838.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6838.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6869.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a681f8]
>[  6869.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a681f8] width 2880 pitch 11520 (/4 2880)
>[  6958.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6958.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6958.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6958.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6958.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6958.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6958.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6958.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6958.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93da790]
>[  6958.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93da790] width 2880 pitch 11520 (/4 2880)
>[  6958.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6958.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6958.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6958.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6958.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6958.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6958.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6959.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6959.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6959.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6963.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6963.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6963.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6963.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6963.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6963.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6963.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6963.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6963.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96231c0]
>[  6963.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96231c0] width 2880 pitch 11520 (/4 2880)
>[  6963.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6963.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6963.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96231c0]
>[  6963.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96231c0] width 2880 pitch 11520 (/4 2880)
>[  6963.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6963.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6965.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf178]
>[  6965.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf178] width 2880 pitch 11520 (/4 2880)
>[  6965.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96231c0]
>[  6965.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96231c0] width 2880 pitch 11520 (/4 2880)
>[  6965.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6965.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6965.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6965.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6965.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6965.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6965.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96231c0]
>[  6965.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96231c0] width 2880 pitch 11520 (/4 2880)
>[  6965.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6965.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6965.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6965.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6965.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b6a8]
>[  6965.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b6a8] width 2880 pitch 11520 (/4 2880)
>[  6968.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614aa0]
>[  6968.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614aa0] width 2880 pitch 11520 (/4 2880)
>[  6969.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52de0]
>[  6969.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52de0] width 2880 pitch 11520 (/4 2880)
>[  6969.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6969.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6969.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6969.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  6969.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c58]
>[  6969.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c58] width 2880 pitch 11520 (/4 2880)
>[  6969.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52de0]
>[  6969.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52de0] width 2880 pitch 11520 (/4 2880)
>[  6969.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6969.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6969.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52de0]
>[  6969.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52de0] width 2880 pitch 11520 (/4 2880)
>[  6969.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6969.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6969.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52de0]
>[  6970.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52de0] width 2880 pitch 11520 (/4 2880)
>[  6970.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb58]
>[  6970.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb58] width 2880 pitch 11520 (/4 2880)
>[  6970.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9964058]
>[  6970.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9964058] width 2880 pitch 11520 (/4 2880)
>[  7018.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7018.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7018.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7018.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7018.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7018.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7018.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7018.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7018.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7018.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7018.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7018.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7018.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7018.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7018.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7018.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7024.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7024.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7024.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968778]
>[  7024.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968778] width 2880 pitch 11520 (/4 2880)
>[  7024.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7024.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7024.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7024.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7024.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7024.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7024.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7024.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7024.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7024.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7024.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96292e8]
>[  7024.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96292e8] width 2880 pitch 11520 (/4 2880)
>[  7024.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7024.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7078.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7078.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7078.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935b40]
>[  7078.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935b40] width 2880 pitch 11520 (/4 2880)
>[  7078.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7078.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7078.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7078.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7078.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7078.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7078.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980cdc8]
>[  7078.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980cdc8] width 2880 pitch 11520 (/4 2880)
>[  7078.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935b40]
>[  7078.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935b40] width 2880 pitch 11520 (/4 2880)
>[  7078.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  7078.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  7078.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22148]
>[  7078.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22148] width 2880 pitch 11520 (/4 2880)
>[  7078.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  7078.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  7082.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  7082.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  7082.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935b40]
>[  7082.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935b40] width 2880 pitch 11520 (/4 2880)
>[  7082.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11c88]
>[  7082.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11c88] width 2880 pitch 11520 (/4 2880)
>[  7082.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13f68]
>[  7082.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13f68] width 2880 pitch 11520 (/4 2880)
>[  7082.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980cdc8]
>[  7083.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980cdc8] width 2880 pitch 11520 (/4 2880)
>[  7083.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  7083.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  7083.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980cdc8]
>[  7083.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980cdc8] width 2880 pitch 11520 (/4 2880)
>[  7083.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[  7083.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[  7083.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980cdc8]
>[  7083.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980cdc8] width 2880 pitch 11520 (/4 2880)
>[  7183.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972458]
>[  7183.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972458] width 2880 pitch 11520 (/4 2880)
>[  7198.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7198.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7198.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7198.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  7198.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7198.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7198.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7198.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7198.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7198.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  7198.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7198.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7198.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7198.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7198.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7198.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7198.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7198.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7202.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7202.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7202.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7202.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7202.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7202.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7202.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7202.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7202.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941c608]
>[  7202.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941c608] width 2880 pitch 11520 (/4 2880)
>[  7202.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7203.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7203.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7203.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7203.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7203.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7203.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7203.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7203.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941c608]
>[  7203.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941c608] width 2880 pitch 11520 (/4 2880)
>[  7203.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7203.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7203.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7203.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7203.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7203.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7207.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7207.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7207.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7207.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7207.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7207.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7207.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7207.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7207.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7207.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7207.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7207.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7207.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7207.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7207.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7207.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7207.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7207.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7207.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7207.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7207.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7207.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7283.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7283.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7283.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7283.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7283.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7283.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7284.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7284.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7284.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7284.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7284.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7284.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7284.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f48]
>[  7284.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f48] width 2880 pitch 11520 (/4 2880)
>[  7285.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8988]
>[  7285.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8988] width 2880 pitch 11520 (/4 2880)
>[  7285.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[  7285.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[  7285.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a57690]
>[  7285.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a57690] width 2880 pitch 11520 (/4 2880)
>[  7285.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[  7285.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[  7287.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7287.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7318.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7318.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7318.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7318.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7318.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  7318.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  7318.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7318.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7318.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935b40]
>[  7318.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935b40] width 2880 pitch 11520 (/4 2880)
>[  7318.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5c628]
>[  7318.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5c628] width 2880 pitch 11520 (/4 2880)
>[  7318.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7318.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7318.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7318.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7322.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a54728]
>[  7322.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a54728] width 2880 pitch 11520 (/4 2880)
>[  7322.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9402208]
>[  7322.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9402208] width 2880 pitch 11520 (/4 2880)
>[  7322.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7322.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7322.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7322.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7322.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ecd80]
>[  7322.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ecd80] width 2880 pitch 11520 (/4 2880)
>[  7323.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7323.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7323.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ecd80]
>[  7323.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ecd80] width 2880 pitch 11520 (/4 2880)
>[  7323.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7323.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7323.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ecd80]
>[  7323.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ecd80] width 2880 pitch 11520 (/4 2880)
>[  7333.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7333.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7333.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7333.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7333.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7333.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7333.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7333.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7333.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e280]
>[  7333.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e280] width 2880 pitch 11520 (/4 2880)
>[  7333.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7333.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7333.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7333.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7333.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7333.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7333.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e280]
>[  7333.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e280] width 2880 pitch 11520 (/4 2880)
>[  7333.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7333.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7337.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7337.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7337.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7337.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7337.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e280]
>[  7337.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e280] width 2880 pitch 11520 (/4 2880)
>[  7337.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7337.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7337.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7337.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7337.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7337.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7337.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7337.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7337.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7337.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7337.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[  7337.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[  7378.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7378.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7378.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7378.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7378.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8de8]
>[  7378.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8de8] width 2880 pitch 11520 (/4 2880)
>[  7378.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7378.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7378.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a54728]
>[  7378.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a54728] width 2880 pitch 11520 (/4 2880)
>[  7378.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13cd8]
>[  7378.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13cd8] width 2880 pitch 11520 (/4 2880)
>[  7378.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7378.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7378.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7378.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7382.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7382.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7382.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7382.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7382.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7382.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7382.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7382.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7382.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7382.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7382.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7383.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7383.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7383.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7383.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7383.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7383.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7383.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7383.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7383.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7395.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7395.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7395.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7395.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7395.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7395.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7395.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7395.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7395.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7395.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7395.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7395.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7395.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7395.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7395.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7395.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7399.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7399.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7399.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7399.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7399.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7399.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7399.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7399.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7399.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7400.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7400.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7400.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7400.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7400.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7400.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7400.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7400.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7400.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7400.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7400.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7502.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7502.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7502.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7502.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7502.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7502.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7503.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7503.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7503.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7503.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7503.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7503.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7503.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7503.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7503.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7503.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7504.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7504.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7504.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7504.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7504.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7504.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7504.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7504.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7504.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7504.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7505.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7505.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7505.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7505.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7505.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7505.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7505.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7505.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7505.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7505.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7505.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7505.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7515.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7515.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7516.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7516.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7523.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7523.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7523.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980f030]
>[  7523.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980f030] width 2880 pitch 11520 (/4 2880)
>[  7524.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7524.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7524.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7524.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7524.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7524.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7524.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788030]
>[  7524.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788030] width 2880 pitch 11520 (/4 2880)
>[  7524.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7524.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7525.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7525.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7525.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  7525.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  7525.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a134a0]
>[  7525.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a134a0] width 2880 pitch 11520 (/4 2880)
>[  7525.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  7525.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  7525.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a134a0]
>[  7525.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a134a0] width 2880 pitch 11520 (/4 2880)
>[  7525.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  7525.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  7563.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7563.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7588.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7588.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7678.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7678.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7678.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7678.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7678.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  7678.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  7678.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7678.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7678.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2d30]
>[  7679.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2d30] width 2880 pitch 11520 (/4 2880)
>[  7679.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7679.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7679.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b898]
>[  7679.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b898] width 2880 pitch 11520 (/4 2880)
>[  7683.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fce8]
>[  7683.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fce8] width 2880 pitch 11520 (/4 2880)
>[  7683.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919a70]
>[  7683.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919a70] width 2880 pitch 11520 (/4 2880)
>[  7683.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7683.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7683.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7683.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7683.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7683.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7683.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fce8]
>[  7683.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fce8] width 2880 pitch 11520 (/4 2880)
>[  7683.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b898]
>[  7683.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b898] width 2880 pitch 11520 (/4 2880)
>[  7683.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fce8]
>[  7683.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fce8] width 2880 pitch 11520 (/4 2880)
>[  7683.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a5b898]
>[  7683.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a5b898] width 2880 pitch 11520 (/4 2880)
>[  7696.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7696.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7696.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53140]
>[  7696.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53140] width 2880 pitch 11520 (/4 2880)
>[  7696.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7696.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7696.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53140]
>[  7696.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53140] width 2880 pitch 11520 (/4 2880)
>[  7696.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919a70]
>[  7696.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919a70] width 2880 pitch 11520 (/4 2880)
>[  7696.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7696.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7696.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7696.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7696.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7696.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7697.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7697.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7697.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7697.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7697.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7697.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7697.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53140]
>[  7697.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53140] width 2880 pitch 11520 (/4 2880)
>[  7697.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7697.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7697.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7697.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7697.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13410]
>[  7697.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13410] width 2880 pitch 11520 (/4 2880)
>[  7697.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7697.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7697.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919a70]
>[  7697.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919a70] width 2880 pitch 11520 (/4 2880)
>[  7733.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7733.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7878.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984f80]
>[  7878.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984f80] width 2880 pitch 11520 (/4 2880)
>[  7878.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7878.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7878.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7878.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7878.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7878.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7879.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53140]
>[  7879.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53140] width 2880 pitch 11520 (/4 2880)
>[  7879.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[  7879.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[  7879.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7879.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7879.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ed170]
>[  7879.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ed170] width 2880 pitch 11520 (/4 2880)
>[  7880.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53140]
>[  7880.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53140] width 2880 pitch 11520 (/4 2880)
>[  7881.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632958]
>[  7881.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632958] width 2880 pitch 11520 (/4 2880)
>[  7881.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9901fd8]
>[  7881.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9901fd8] width 2880 pitch 11520 (/4 2880)
>[  7882.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632958]
>[  7882.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632958] width 2880 pitch 11520 (/4 2880)
>[  7882.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7882.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7882.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7882.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7882.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7882.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7882.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a3c0]
>[  7882.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a3c0] width 2880 pitch 11520 (/4 2880)
>[  7978.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7978.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7978.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7978.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7978.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7978.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7978.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7978.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7978.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  7978.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  7978.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7978.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7978.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13d18]
>[  7978.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13d18] width 2880 pitch 11520 (/4 2880)
>[  7978.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7978.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7978.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7978.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  7982.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7982.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7982.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13d18]
>[  7982.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13d18] width 2880 pitch 11520 (/4 2880)
>[  7982.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  7982.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  7982.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7982.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  7982.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7982.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7983.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7983.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  7983.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  7983.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  7983.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  7983.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  8038.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8038.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8038.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  8038.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  8038.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8038.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8038.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  8038.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  8038.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ae868]
>[  8038.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ae868] width 2880 pitch 11520 (/4 2880)
>[  8038.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd988]
>[  8038.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd988] width 2880 pitch 11520 (/4 2880)
>[  8038.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8098]
>[  8038.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8098] width 2880 pitch 11520 (/4 2880)
>[  8038.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  8038.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  8038.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  8038.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  8046.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960e5c0]
>[  8046.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960e5c0] width 2880 pitch 11520 (/4 2880)
>[  8046.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  8046.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  8046.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96467f8]
>[  8046.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96467f8] width 2880 pitch 11520 (/4 2880)
>[  8046.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96114a8]
>[  8046.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96114a8] width 2880 pitch 11520 (/4 2880)
>[  8046.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0868]
>[  8046.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0868] width 2880 pitch 11520 (/4 2880)
>[  8046.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960e5c0]
>[  8046.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960e5c0] width 2880 pitch 11520 (/4 2880)
>[  8047.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0868]
>[  8047.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0868] width 2880 pitch 11520 (/4 2880)
>[  8047.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960e5c0]
>[  8047.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960e5c0] width 2880 pitch 11520 (/4 2880)
>[  8047.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0868]
>[  8047.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0868] width 2880 pitch 11520 (/4 2880)
>[  8098.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ace50]
>[  8098.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ace50] width 2880 pitch 11520 (/4 2880)
>[  8098.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53658]
>[  8098.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53658] width 2880 pitch 11520 (/4 2880)
>[  8098.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ace50]
>[  8098.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ace50] width 2880 pitch 11520 (/4 2880)
>[  8098.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b81a8]
>[  8098.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b81a8] width 2880 pitch 11520 (/4 2880)
>[  8098.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd988]
>[  8098.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd988] width 2880 pitch 11520 (/4 2880)
>[  8098.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2e280]
>[  8098.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2e280] width 2880 pitch 11520 (/4 2880)
>[  8098.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  8098.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  8105.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[  8105.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[  8105.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a53658]
>[  8105.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a53658] width 2880 pitch 11520 (/4 2880)
>[  8105.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[  8105.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[  8105.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643740]
>[  8105.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643740] width 2880 pitch 11520 (/4 2880)
>[  8105.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d30]
>[  8106.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d30] width 2880 pitch 11520 (/4 2880)
>[  8106.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[  8106.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[  8106.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d30]
>[  8106.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d30] width 2880 pitch 11520 (/4 2880)
>[  8106.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[  8106.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[  8106.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d30]
>[  8106.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d30] width 2880 pitch 11520 (/4 2880)
>[  8218.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a4c0]
>[  8218.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a4c0] width 2880 pitch 11520 (/4 2880)
>[  8218.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642da8]
>[  8218.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642da8] width 2880 pitch 11520 (/4 2880)
>[  8218.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a190]
>[  8218.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a190] width 2880 pitch 11520 (/4 2880)
>[  8218.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a4c0]
>[  8218.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a4c0] width 2880 pitch 11520 (/4 2880)
>[  8218.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd818]
>[  8218.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd818] width 2880 pitch 11520 (/4 2880)
>[  8218.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a4c0]
>[  8218.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a4c0] width 2880 pitch 11520 (/4 2880)
>[  8218.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69a38]
>[  8218.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69a38] width 2880 pitch 11520 (/4 2880)
>[  8218.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a4c0]
>[  8218.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a4c0] width 2880 pitch 11520 (/4 2880)
>[  8218.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642da8]
>[  8218.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642da8] width 2880 pitch 11520 (/4 2880)
>[  8222.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fce28]
>[  8222.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fce28] width 2880 pitch 11520 (/4 2880)
>[  8222.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcd90]
>[  8222.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcd90] width 2880 pitch 11520 (/4 2880)
>[  8222.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  8222.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  8222.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a118]
>[  8222.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a118] width 2880 pitch 11520 (/4 2880)
>[  8222.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982eb8]
>[  8222.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982eb8] width 2880 pitch 11520 (/4 2880)
>[  8222.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fce28]
>[  8223.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fce28] width 2880 pitch 11520 (/4 2880)
>[  8223.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982eb8]
>[  8223.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982eb8] width 2880 pitch 11520 (/4 2880)
>[  8223.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fce28]
>[  8223.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fce28] width 2880 pitch 11520 (/4 2880)
>[  8264.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd288]
>[  8264.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd288] width 2880 pitch 11520 (/4 2880)
>[  8274.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a0e8]
>[  8274.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a0e8] width 2880 pitch 11520 (/4 2880)
>[  8274.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd1d8]
>[  8274.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd1d8] width 2880 pitch 11520 (/4 2880)
>[  8274.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633ed8]
>[  8274.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633ed8] width 2880 pitch 11520 (/4 2880)
>[  8274.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69d38]
>[  8274.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69d38] width 2880 pitch 11520 (/4 2880)
>[  8274.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633ed8]
>[  8274.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633ed8] width 2880 pitch 11520 (/4 2880)
>[  8274.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69d38]
>[  8274.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69d38] width 2880 pitch 11520 (/4 2880)
>[  8274.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964a120]
>[  8274.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964a120] width 2880 pitch 11520 (/4 2880)
>[  8274.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69d38]
>[  8274.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69d38] width 2880 pitch 11520 (/4 2880)
>[  8274.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964a120]
>[  8274.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964a120] width 2880 pitch 11520 (/4 2880)
>[  8274.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69d38]
>[  8274.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69d38] width 2880 pitch 11520 (/4 2880)
>[  8274.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643070]
>[  8274.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643070] width 2880 pitch 11520 (/4 2880)
>[  8274.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69d38]
>[  8274.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69d38] width 2880 pitch 11520 (/4 2880)
>[  8274.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643070]
>[  8274.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643070] width 2880 pitch 11520 (/4 2880)
>[  8274.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d98]
>[  8274.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d98] width 2880 pitch 11520 (/4 2880)
>[  8274.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643070]
>[  8274.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643070] width 2880 pitch 11520 (/4 2880)
>[  8274.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d98]
>[  8274.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d98] width 2880 pitch 11520 (/4 2880)
>[  8277.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0f78]
>[  8277.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0f78] width 2880 pitch 11520 (/4 2880)
>[  8277.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d98]
>[  8277.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d98] width 2880 pitch 11520 (/4 2880)
>[  8277.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8277.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84378]
>[  8277.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84378] width 2880 pitch 11520 (/4 2880)
>[  8277.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b843a8]
>[  8277.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b843a8] width 2880 pitch 11520 (/4 2880)
>[  8278.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd1d8]
>[  8278.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd1d8] width 2880 pitch 11520 (/4 2880)
>[  8278.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608590]
>[  8278.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608590] width 2880 pitch 11520 (/4 2880)
>[  8278.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd8c0]
>[  8278.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd8c0] width 2880 pitch 11520 (/4 2880)
>[  8278.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3088]
>[  8278.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3088] width 2880 pitch 11520 (/4 2880)
>[  8278.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a644f0]
>[  8279.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a644f0] width 2880 pitch 11520 (/4 2880)
>[  8279.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd8c0]
>[  8279.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd8c0] width 2880 pitch 11520 (/4 2880)
>[  8284.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3058]
>[  8284.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3058] width 2880 pitch 11520 (/4 2880)
>[  8284.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64578]
>[  8284.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64578] width 2880 pitch 11520 (/4 2880)
>[  8284.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a644f0]
>[  8284.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a644f0] width 2880 pitch 11520 (/4 2880)
>[  8284.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13ab0]
>[  8284.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13ab0] width 2880 pitch 11520 (/4 2880)
>[  8284.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9990180]
>[  8284.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9990180] width 2880 pitch 11520 (/4 2880)
>[  8284.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3058]
>[  8284.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3058] width 2880 pitch 11520 (/4 2880)
>[  8284.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8648]
>[  8284.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8648] width 2880 pitch 11520 (/4 2880)
>[  8284.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a13ab0]
>[  8284.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a13ab0] width 2880 pitch 11520 (/4 2880)
>[  8333.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8333.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8338.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844a0]
>[  8338.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844a0] width 2880 pitch 11520 (/4 2880)
>[  8338.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8338.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8338.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8f2d0]
>[  8338.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8f2d0] width 2880 pitch 11520 (/4 2880)
>[  8338.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8338.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8338.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f45c8]
>[  8338.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f45c8] width 2880 pitch 11520 (/4 2880)
>[  8338.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8338.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8342.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[  8342.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[  8342.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8342.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8342.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8342.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8342.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[  8342.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[  8342.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a0c0]
>[  8342.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a0c0] width 2880 pitch 11520 (/4 2880)
>[  8342.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[  8342.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[  8342.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a0c0]
>[  8342.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a0c0] width 2880 pitch 11520 (/4 2880)
>[  8342.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[  8342.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[  8342.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a0c0]
>[  8342.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a0c0] width 2880 pitch 11520 (/4 2880)
>[  8342.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[  8342.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[  8363.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad158]
>[  8363.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad158] width 2880 pitch 11520 (/4 2880)
>[  8363.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad158]
>[  8363.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad158] width 2880 pitch 11520 (/4 2880)
>[  8363.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad158]
>[  8363.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad158] width 2880 pitch 11520 (/4 2880)
>[  8363.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad158]
>[  8363.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad158] width 2880 pitch 11520 (/4 2880)
>[  8363.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad708]
>[  8363.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad708] width 2880 pitch 11520 (/4 2880)
>[  8363.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad708]
>[  8363.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad708] width 2880 pitch 11520 (/4 2880)
>[  8363.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad708]
>[  8363.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad708] width 2880 pitch 11520 (/4 2880)
>[  8363.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad708]
>[  8363.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad708] width 2880 pitch 11520 (/4 2880)
>[  8363.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafcb0]
>[  8363.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafcb0] width 2880 pitch 11520 (/4 2880)
>[  8363.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad708]
>[  8363.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad708] width 2880 pitch 11520 (/4 2880)
>[  8365.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8365.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8365.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8365.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8365.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b94600]
>[  8365.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b94600] width 2880 pitch 11520 (/4 2880)
>[  8365.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9590]
>[  8365.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9590] width 2880 pitch 11520 (/4 2880)
>[  8365.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9625710]
>[  8365.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9625710] width 2880 pitch 11520 (/4 2880)
>[  8365.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9590]
>[  8365.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9590] width 2880 pitch 11520 (/4 2880)
>[  8365.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9590]
>[  8365.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9590] width 2880 pitch 11520 (/4 2880)
>[  8365.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9590]
>[  8365.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9590] width 2880 pitch 11520 (/4 2880)
>[  8365.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9590]
>[  8365.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9590] width 2880 pitch 11520 (/4 2880)
>[  8365.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8365.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8365.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8365.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8365.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8367.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8367.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8368.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8368.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8368.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[  8368.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[  8368.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6a370]
>[  8368.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6a370] width 2880 pitch 11520 (/4 2880)
>[  8368.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[  8368.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[  8368.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[  8368.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[  8368.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[  8368.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[  8369.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[  8369.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[  8369.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[  8369.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[  8369.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f3fe8]
>[  8369.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f3fe8] width 2880 pitch 11520 (/4 2880)
>[  8369.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8369.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8369.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f3fe8]
>[  8369.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f3fe8] width 2880 pitch 11520 (/4 2880)
>[  8369.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a105f0]
>[  8369.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a105f0] width 2880 pitch 11520 (/4 2880)
>[  8371.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6920]
>[  8371.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6920] width 2880 pitch 11520 (/4 2880)
>[  8371.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844a0]
>[  8371.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844a0] width 2880 pitch 11520 (/4 2880)
>[  8371.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a025f0]
>[  8371.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a025f0] width 2880 pitch 11520 (/4 2880)
>[  8371.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844a0]
>[  8371.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844a0] width 2880 pitch 11520 (/4 2880)
>[  8389.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8398]
>[  8389.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8398] width 2880 pitch 11520 (/4 2880)
>[  8389.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8398]
>[  8389.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8398] width 2880 pitch 11520 (/4 2880)
>[  8398.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc1440]
>[  8398.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc1440] width 2880 pitch 11520 (/4 2880)
>[  8398.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991d5f8]
>[  8398.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991d5f8] width 2880 pitch 11520 (/4 2880)
>[  8398.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf238]
>[  8398.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf238] width 2880 pitch 11520 (/4 2880)
>[  8398.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ad258]
>[  8398.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ad258] width 2880 pitch 11520 (/4 2880)
>[  8398.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3088]
>[  8398.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3088] width 2880 pitch 11520 (/4 2880)
>[  8398.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf238]
>[  8398.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf238] width 2880 pitch 11520 (/4 2880)
>[  8398.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd4d8]
>[  8398.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd4d8] width 2880 pitch 11520 (/4 2880)
>[  8402.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3088]
>[  8402.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3088] width 2880 pitch 11520 (/4 2880)
>[  8402.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb72e8]
>[  8402.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb72e8] width 2880 pitch 11520 (/4 2880)
>[  8403.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8140]
>[  8403.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8140] width 2880 pitch 11520 (/4 2880)
>[  8403.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd4d8]
>[  8403.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd4d8] width 2880 pitch 11520 (/4 2880)
>[  8403.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3088]
>[  8403.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3088] width 2880 pitch 11520 (/4 2880)
>[  8403.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc1440]
>[  8403.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc1440] width 2880 pitch 11520 (/4 2880)
>[  8403.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab3088]
>[  8403.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab3088] width 2880 pitch 11520 (/4 2880)
>[  8403.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc1440]
>[  8403.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc1440] width 2880 pitch 11520 (/4 2880)
>[  8404.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6700]
>[  8404.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6700] width 2880 pitch 11520 (/4 2880)
>[  8433.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8433.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8433.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afeed0]
>[  8433.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afeed0] width 2880 pitch 11520 (/4 2880)
>[  8433.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8433.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8433.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afeed0]
>[  8433.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afeed0] width 2880 pitch 11520 (/4 2880)
>[  8433.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8433.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8433.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afeed0]
>[  8433.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afeed0] width 2880 pitch 11520 (/4 2880)
>[  8433.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8433.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8433.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef58]
>[  8433.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef58] width 2880 pitch 11520 (/4 2880)
>[  8433.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8433.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8433.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afeed0]
>[  8433.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afeed0] width 2880 pitch 11520 (/4 2880)
>[  8433.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff058]
>[  8433.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff058] width 2880 pitch 11520 (/4 2880)
>[  8433.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8433.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8433.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef58]
>[  8433.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef58] width 2880 pitch 11520 (/4 2880)
>[  8433.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8433.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8433.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afeed0]
>[  8433.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afeed0] width 2880 pitch 11520 (/4 2880)
>[  8436.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84900]
>[  8436.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84900] width 2880 pitch 11520 (/4 2880)
>[  8436.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd390]
>[  8436.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd390] width 2880 pitch 11520 (/4 2880)
>[  8436.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bba0b8]
>[  8436.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bba0b8] width 2880 pitch 11520 (/4 2880)
>[  8436.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8436.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8436.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84900]
>[  8436.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84900] width 2880 pitch 11520 (/4 2880)
>[  8436.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8436.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8436.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84900]
>[  8436.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84900] width 2880 pitch 11520 (/4 2880)
>[  8436.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84900]
>[  8436.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84900] width 2880 pitch 11520 (/4 2880)
>[  8436.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe838]
>[  8436.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe838] width 2880 pitch 11520 (/4 2880)
>[  8436.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84900]
>[  8436.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84900] width 2880 pitch 11520 (/4 2880)
>[  8439.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9930720]
>[  8439.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9930720] width 2880 pitch 11520 (/4 2880)
>[  8440.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b84558]
>[  8440.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b84558] width 2880 pitch 11520 (/4 2880)
>[  8455.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2980]
>[  8455.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2980] width 2880 pitch 11520 (/4 2880)
>[  8458.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26020]
>[  8458.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26020] width 2880 pitch 11520 (/4 2880)
>[  8458.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdc30]
>[  8458.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdc30] width 2880 pitch 11520 (/4 2880)
>[  8458.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc938]
>[  8458.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc938] width 2880 pitch 11520 (/4 2880)
>[  8458.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bacf28]
>[  8458.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bacf28] width 2880 pitch 11520 (/4 2880)
>[  8458.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad100]
>[  8458.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad100] width 2880 pitch 11520 (/4 2880)
>[  8458.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc938]
>[  8458.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc938] width 2880 pitch 11520 (/4 2880)
>[  8458.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad018]
>[  8458.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad018] width 2880 pitch 11520 (/4 2880)
>[  8458.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad2b0]
>[  8458.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad2b0] width 2880 pitch 11520 (/4 2880)
>[  8458.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a190]
>[  8458.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a190] width 2880 pitch 11520 (/4 2880)
>[  8458.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02890]
>[  8458.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02890] width 2880 pitch 11520 (/4 2880)
>[  8459.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd818]
>[  8459.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd818] width 2880 pitch 11520 (/4 2880)
>[  8459.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad2b0]
>[  8459.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad2b0] width 2880 pitch 11520 (/4 2880)
>[  8459.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2990]
>[  8459.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2990] width 2880 pitch 11520 (/4 2880)
>[  8459.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bad2b0]
>[  8459.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bad2b0] width 2880 pitch 11520 (/4 2880)
>[  8459.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2980]
>[  8459.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2980] width 2880 pitch 11520 (/4 2880)
>[  8474.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac2d0]
>[  8474.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac2d0] width 2880 pitch 11520 (/4 2880)
>[  8474.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe0e8]
>[  8474.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe0e8] width 2880 pitch 11520 (/4 2880)
>[  8474.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a190]
>[  8474.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a190] width 2880 pitch 11520 (/4 2880)
>[  8474.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8474.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8475.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a190]
>[  8475.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a190] width 2880 pitch 11520 (/4 2880)
>[  8476.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c5b0]
>[  8476.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c5b0] width 2880 pitch 11520 (/4 2880)
>[  8491.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a720]
>[  8491.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a720] width 2880 pitch 11520 (/4 2880)
>[  8497.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8497.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8497.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c4d0]
>[  8497.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c4d0] width 2880 pitch 11520 (/4 2880)
>[  8497.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8497.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8497.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  8497.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  8497.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fabe0]
>[  8497.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fabe0] width 2880 pitch 11520 (/4 2880)
>[  8500.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a65a08]
>[  8500.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a65a08] width 2880 pitch 11520 (/4 2880)
>[  8500.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc1440]
>[  8500.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc1440] width 2880 pitch 11520 (/4 2880)
>[  8500.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf238]
>[  8500.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf238] width 2880 pitch 11520 (/4 2880)
>[  8500.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a134a0]
>[  8500.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a134a0] width 2880 pitch 11520 (/4 2880)
>[  8501.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844a0]
>[  8501.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844a0] width 2880 pitch 11520 (/4 2880)
>[  8501.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952838]
>[  8501.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952838] width 2880 pitch 11520 (/4 2880)
>[  8501.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ab598]
>[  8501.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ab598] width 2880 pitch 11520 (/4 2880)
>[  8501.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952838]
>[  8502.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952838] width 2880 pitch 11520 (/4 2880)
>[  8502.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975f78]
>[  8502.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975f78] width 2880 pitch 11520 (/4 2880)
>[  8502.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  8502.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  8502.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975f78]
>[  8502.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975f78] width 2880 pitch 11520 (/4 2880)
>[  8502.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a494d0]
>[  8502.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a494d0] width 2880 pitch 11520 (/4 2880)
>[  8503.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975f78]
>[  8503.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975f78] width 2880 pitch 11520 (/4 2880)
>[  8503.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a190]
>[  8503.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a190] width 2880 pitch 11520 (/4 2880)
>[  8503.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd7d0]
>[  8503.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd7d0] width 2880 pitch 11520 (/4 2880)
>[  8504.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9619608]
>[  8504.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9619608] width 2880 pitch 11520 (/4 2880)
>[  8504.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd7d0]
>[  8504.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd7d0] width 2880 pitch 11520 (/4 2880)
>[  8504.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9619608]
>[  8504.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9619608] width 2880 pitch 11520 (/4 2880)
>[  8509.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fc790]
>[  8509.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fc790] width 2880 pitch 11520 (/4 2880)
>[  8509.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9525aa0]
>[  8509.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9525aa0] width 2880 pitch 11520 (/4 2880)
>[  8518.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8740]
>[  8518.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8740] width 2880 pitch 11520 (/4 2880)
>[  8518.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba3df8]
>[  8518.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba3df8] width 2880 pitch 11520 (/4 2880)
>[  8518.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8740]
>[  8518.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8740] width 2880 pitch 11520 (/4 2880)
>[  8518.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9168]
>[  8518.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9168] width 2880 pitch 11520 (/4 2880)
>[  8518.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8518.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8518.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8518.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8518.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8518.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8518.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9619bc0]
>[  8518.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9619bc0] width 2880 pitch 11520 (/4 2880)
>[  8518.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8588]
>[  8518.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8588] width 2880 pitch 11520 (/4 2880)
>[  8519.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8588]
>[  8519.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8588] width 2880 pitch 11520 (/4 2880)
>[  8519.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8588]
>[  8519.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8588] width 2880 pitch 11520 (/4 2880)
>[  8519.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687d8]
>[  8519.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687d8] width 2880 pitch 11520 (/4 2880)
>[  8519.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687d8]
>[  8519.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687d8] width 2880 pitch 11520 (/4 2880)
>[  8519.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830c00]
>[  8519.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830c00] width 2880 pitch 11520 (/4 2880)
>[  8519.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687d8]
>[  8519.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687d8] width 2880 pitch 11520 (/4 2880)
>[  8519.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd7b0]
>[  8519.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd7b0] width 2880 pitch 11520 (/4 2880)
>[  8519.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687d8]
>[  8519.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687d8] width 2880 pitch 11520 (/4 2880)
>[  8521.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafbd8]
>[  8521.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafbd8] width 2880 pitch 11520 (/4 2880)
>[  8528.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2da8]
>[  8528.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2da8] width 2880 pitch 11520 (/4 2880)
>[  8528.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8528.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8528.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8528.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8528.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8528.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8528.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8528.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8528.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8528.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8528.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8529.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8529.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8529.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8529.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8529.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8529.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8529.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8529.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8529.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8529.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8529.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8529.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b99170]
>[  8529.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b99170] width 2880 pitch 11520 (/4 2880)
>[  8529.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8328]
>[  8529.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8328] width 2880 pitch 11520 (/4 2880)
>[  8531.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8531.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8531.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[  8531.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[  8531.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8531.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8532.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf370]
>[  8532.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf370] width 2880 pitch 11520 (/4 2880)
>[  8532.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[  8532.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[  8532.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf370]
>[  8532.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf370] width 2880 pitch 11520 (/4 2880)
>[  8532.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[  8532.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[  8532.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95315e8]
>[  8532.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95315e8] width 2880 pitch 11520 (/4 2880)
>[  8533.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[  8533.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[  8533.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8533.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8533.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[  8533.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[  8533.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8533.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8533.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[  8533.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[  8533.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8533.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8534.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[  8534.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[  8534.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  8534.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  8534.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23d00]
>[  8534.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23d00] width 2880 pitch 11520 (/4 2880)
>[  8534.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  8534.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  8534.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[  8534.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[  8540.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8540.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8541.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8541.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8542.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[  8542.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[  8544.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8544.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8545.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b708]
>[  8545.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b708] width 2880 pitch 11520 (/4 2880)
>[  8546.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[  8546.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[  8550.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  8550.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  8550.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[  8550.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[  8550.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  8550.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  8550.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[  8550.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[  8550.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  8550.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  8550.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b708]
>[  8550.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b708] width 2880 pitch 11520 (/4 2880)
>[  8550.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[  8550.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[  8550.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[  8550.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[  8550.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  8550.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  8550.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[  8550.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[  8550.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b708]
>[  8550.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b708] width 2880 pitch 11520 (/4 2880)
>[  8550.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[  8550.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[  8550.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[  8550.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[  8551.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[  8551.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[  8555.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[  8555.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[  8555.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[  8555.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[  8555.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb630]
>[  8555.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb630] width 2880 pitch 11520 (/4 2880)
>[  8555.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e768]
>[  8555.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e768] width 2880 pitch 11520 (/4 2880)
>[  8555.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e768]
>[  8555.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e768] width 2880 pitch 11520 (/4 2880)
>[  8555.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e768]
>[  8555.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e768] width 2880 pitch 11520 (/4 2880)
>[  8555.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cd48]
>[  8555.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cd48] width 2880 pitch 11520 (/4 2880)
>[  8555.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7318]
>[  8555.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7318] width 2880 pitch 11520 (/4 2880)
>[  8569.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb6b8]
>[  8569.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb6b8] width 2880 pitch 11520 (/4 2880)
>[  8569.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8569.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8569.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90150]
>[  8569.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90150] width 2880 pitch 11520 (/4 2880)
>[  8569.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8569.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8569.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90150]
>[  8569.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90150] width 2880 pitch 11520 (/4 2880)
>[  8569.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8569.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8569.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[  8569.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[  8569.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8569.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8569.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90150]
>[  8569.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90150] width 2880 pitch 11520 (/4 2880)
>[  8569.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba3b10]
>[  8569.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba3b10] width 2880 pitch 11520 (/4 2880)
>[  8569.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8569.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8569.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[  8569.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[  8569.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8569.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8569.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90150]
>[  8569.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90150] width 2880 pitch 11520 (/4 2880)
>[  8573.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8573.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8573.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8573.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8573.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[  8573.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[  8573.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90150]
>[  8573.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90150] width 2880 pitch 11520 (/4 2880)
>[  8573.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8573.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8573.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8573.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8573.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8573.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8573.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8573.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8573.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8573.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8573.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8573.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8573.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961ccb8]
>[  8573.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961ccb8] width 2880 pitch 11520 (/4 2880)
>[  8573.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[  8573.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[  8573.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[  8573.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[  8573.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8574.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8575.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd118]
>[  8575.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd118] width 2880 pitch 11520 (/4 2880)
>[  8578.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba84d0]
>[  8578.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba84d0] width 2880 pitch 11520 (/4 2880)
>[  8594.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e628]
>[  8594.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e628] width 2880 pitch 11520 (/4 2880)
>[  8598.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934c30]
>[  8598.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934c30] width 2880 pitch 11520 (/4 2880)
>[  8631.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964abe0]
>[  8631.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964abe0] width 2880 pitch 11520 (/4 2880)
>[  8632.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cc38]
>[  8632.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cc38] width 2880 pitch 11520 (/4 2880)
>[  8632.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8632.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8632.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cc38]
>[  8632.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cc38] width 2880 pitch 11520 (/4 2880)
>[  8632.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8632.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8632.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cc38]
>[  8632.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cc38] width 2880 pitch 11520 (/4 2880)
>[  8633.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8633.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8633.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cc38]
>[  8633.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cc38] width 2880 pitch 11520 (/4 2880)
>[  8633.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8633.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8633.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cc38]
>[  8633.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cc38] width 2880 pitch 11520 (/4 2880)
>[  8634.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8634.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8634.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8634.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8634.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8634.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8635.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8635.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8635.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8635.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8635.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8635.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8635.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8635.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8636.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8636.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8636.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8636.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8636.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8636.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8636.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8636.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8636.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8636.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8636.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90070]
>[  8636.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90070] width 2880 pitch 11520 (/4 2880)
>[  8637.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c890]
>[  8637.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c890] width 2880 pitch 11520 (/4 2880)
>[  8639.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c190]
>[  8639.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c190] width 2880 pitch 11520 (/4 2880)
>[  8641.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97df0]
>[  8641.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97df0] width 2880 pitch 11520 (/4 2880)
>[  8641.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97dc0]
>[  8641.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97dc0] width 2880 pitch 11520 (/4 2880)
>[  8641.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0d668]
>[  8641.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0d668] width 2880 pitch 11520 (/4 2880)
>[  8642.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93440]
>[  8642.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93440] width 2880 pitch 11520 (/4 2880)
>[  8643.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22448]
>[  8643.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22448] width 2880 pitch 11520 (/4 2880)
>[  8644.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22448]
>[  8644.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22448] width 2880 pitch 11520 (/4 2880)
>[  8644.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22448]
>[  8644.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22448] width 2880 pitch 11520 (/4 2880)
>[  8644.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f78]
>[  8644.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f78] width 2880 pitch 11520 (/4 2880)
>[  8644.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f78]
>[  8644.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f78] width 2880 pitch 11520 (/4 2880)
>[  8644.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f78]
>[  8644.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f78] width 2880 pitch 11520 (/4 2880)
>[  8644.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f78]
>[  8644.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f78] width 2880 pitch 11520 (/4 2880)
>[  8644.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8644.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f78]
>[  8644.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f78] width 2880 pitch 11520 (/4 2880)
>[  8644.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27fc8]
>[  8644.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27fc8] width 2880 pitch 11520 (/4 2880)
>[  8651.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0d630]
>[  8651.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0d630] width 2880 pitch 11520 (/4 2880)
>[  8652.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29020]
>[  8652.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29020] width 2880 pitch 11520 (/4 2880)
>[  8654.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20380]
>[  8654.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20380] width 2880 pitch 11520 (/4 2880)
>[  8669.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b203a0]
>[  8669.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b203a0] width 2880 pitch 11520 (/4 2880)
>[  8676.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  8676.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  8676.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8676.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8676.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f0a8]
>[  8676.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f0a8] width 2880 pitch 11520 (/4 2880)
>[  8676.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8fa70]
>[  8676.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8fa70] width 2880 pitch 11520 (/4 2880)
>[  8677.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  8677.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  8677.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8fa70]
>[  8677.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8fa70] width 2880 pitch 11520 (/4 2880)
>[  8678.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  8678.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  8678.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8fa70]
>[  8678.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8fa70] width 2880 pitch 11520 (/4 2880)
>[  8679.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f0a8]
>[  8679.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f0a8] width 2880 pitch 11520 (/4 2880)
>[  8679.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[  8679.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[  8679.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f0a8]
>[  8679.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f0a8] width 2880 pitch 11520 (/4 2880)
>[  8680.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[  8680.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[  8680.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f0a8]
>[  8680.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f0a8] width 2880 pitch 11520 (/4 2880)
>[  8680.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2e6d8]
>[  8680.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2e6d8] width 2880 pitch 11520 (/4 2880)
>[  8680.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8680.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8680.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2e6d8]
>[  8680.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2e6d8] width 2880 pitch 11520 (/4 2880)
>[  8684.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e2430]
>[  8684.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e2430] width 2880 pitch 11520 (/4 2880)
>[  8687.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[  8687.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[  8687.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac368]
>[  8687.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac368] width 2880 pitch 11520 (/4 2880)
>[  8687.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfaa0]
>[  8687.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfaa0] width 2880 pitch 11520 (/4 2880)
>[  8687.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac368]
>[  8687.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac368] width 2880 pitch 11520 (/4 2880)
>[  8687.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfaa0]
>[  8687.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfaa0] width 2880 pitch 11520 (/4 2880)
>[  8687.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac368]
>[  8687.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac368] width 2880 pitch 11520 (/4 2880)
>[  8687.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfaa0]
>[  8687.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfaa0] width 2880 pitch 11520 (/4 2880)
>[  8687.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac368]
>[  8687.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac368] width 2880 pitch 11520 (/4 2880)
>[  8687.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20878]
>[  8687.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20878] width 2880 pitch 11520 (/4 2880)
>[  8687.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20a60]
>[  8687.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20a60] width 2880 pitch 11520 (/4 2880)
>[  8687.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20a60]
>[  8687.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20a60] width 2880 pitch 11520 (/4 2880)
>[  8687.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453740]
>[  8687.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453740] width 2880 pitch 11520 (/4 2880)
>[  8687.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20a60]
>[  8687.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20a60] width 2880 pitch 11520 (/4 2880)
>[  8690.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9530068]
>[  8690.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9530068] width 2880 pitch 11520 (/4 2880)
>[  8692.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34790]
>[  8692.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34790] width 2880 pitch 11520 (/4 2880)
>[  8699.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8699.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8699.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8699.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8699.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8700.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8700.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8700.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8700.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8700.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8700.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8700.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8700.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8700.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8701.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8701.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8701.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8701.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8701.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8702.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8703.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8703.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8703.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8703.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8703.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8703.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8703.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8703.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8704.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8704.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8704.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  8704.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  8704.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b36640]
>[  8704.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b36640] width 2880 pitch 11520 (/4 2880)
>[  8705.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8705.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8705.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8705.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8705.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8705.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8705.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8705.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8705.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0d0]
>[  8705.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0d0] width 2880 pitch 11520 (/4 2880)
>[  8705.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  8705.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  8711.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8711.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8718.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8718.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8718.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34a40]
>[  8718.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34a40] width 2880 pitch 11520 (/4 2880)
>[  8718.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c18]
>[  8718.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c18] width 2880 pitch 11520 (/4 2880)
>[  8718.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34a40]
>[  8719.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34a40] width 2880 pitch 11520 (/4 2880)
>[  8719.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c18]
>[  8719.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c18] width 2880 pitch 11520 (/4 2880)
>[  8719.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af9098]
>[  8719.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af9098] width 2880 pitch 11520 (/4 2880)
>[  8719.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcae0]
>[  8719.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcae0] width 2880 pitch 11520 (/4 2880)
>[  8719.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34a40]
>[  8719.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34a40] width 2880 pitch 11520 (/4 2880)
>[  8719.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c18]
>[  8719.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c18] width 2880 pitch 11520 (/4 2880)
>[  8719.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94df9e0]
>[  8719.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94df9e0] width 2880 pitch 11520 (/4 2880)
>[  8719.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af9098]
>[  8719.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af9098] width 2880 pitch 11520 (/4 2880)
>[  8719.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcae0]
>[  8719.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcae0] width 2880 pitch 11520 (/4 2880)
>[  8719.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34a40]
>[  8719.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34a40] width 2880 pitch 11520 (/4 2880)
>[  8719.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e8b8]
>[  8719.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e8b8] width 2880 pitch 11520 (/4 2880)
>[  8720.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e8b8]
>[  8720.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e8b8] width 2880 pitch 11520 (/4 2880)
>[  8720.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0b520]
>[  8720.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0b520] width 2880 pitch 11520 (/4 2880)
>[  8720.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c18]
>[  8720.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c18] width 2880 pitch 11520 (/4 2880)
>[  8720.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0b520]
>[  8720.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0b520] width 2880 pitch 11520 (/4 2880)
>[  8721.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8721.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8721.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620d50]
>[  8721.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620d50] width 2880 pitch 11520 (/4 2880)
>[  8721.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8721.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8721.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620d50]
>[  8721.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620d50] width 2880 pitch 11520 (/4 2880)
>[  8721.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20620]
>[  8721.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20620] width 2880 pitch 11520 (/4 2880)
>[  8721.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620d50]
>[  8721.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620d50] width 2880 pitch 11520 (/4 2880)
>[  8721.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20620]
>[  8721.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20620] width 2880 pitch 11520 (/4 2880)
>[  8721.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620d50]
>[  8721.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620d50] width 2880 pitch 11520 (/4 2880)
>[  8721.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20620]
>[  8721.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20620] width 2880 pitch 11520 (/4 2880)
>[  8724.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b28d88]
>[  8724.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b28d88] width 2880 pitch 11520 (/4 2880)
>[  8727.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af9098]
>[  8727.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af9098] width 2880 pitch 11520 (/4 2880)
>[  8735.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b28d78]
>[  8735.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b28d78] width 2880 pitch 11520 (/4 2880)
>[  8742.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfb58]
>[  8742.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfb58] width 2880 pitch 11520 (/4 2880)
>[  8744.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e588]
>[  8744.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e588] width 2880 pitch 11520 (/4 2880)
>[  8745.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944ef88]
>[  8745.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944ef88] width 2880 pitch 11520 (/4 2880)
>[  8748.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23c30]
>[  8748.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23c30] width 2880 pitch 11520 (/4 2880)
>[  8757.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8757.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8757.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22408]
>[  8757.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22408] width 2880 pitch 11520 (/4 2880)
>[  8757.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e588]
>[  8757.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e588] width 2880 pitch 11520 (/4 2880)
>[  8757.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22408]
>[  8757.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22408] width 2880 pitch 11520 (/4 2880)
>[  8757.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e588]
>[  8757.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e588] width 2880 pitch 11520 (/4 2880)
>[  8757.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22408]
>[  8757.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22408] width 2880 pitch 11520 (/4 2880)
>[  8757.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0b560]
>[  8757.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0b560] width 2880 pitch 11520 (/4 2880)
>[  8757.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22408]
>[  8757.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22408] width 2880 pitch 11520 (/4 2880)
>[  8757.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69938]
>[  8757.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69938] width 2880 pitch 11520 (/4 2880)
>[  8757.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97c90]
>[  8757.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97c90] width 2880 pitch 11520 (/4 2880)
>[  8757.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afee48]
>[  8757.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afee48] width 2880 pitch 11520 (/4 2880)
>[  8757.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8757.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8757.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22408]
>[  8757.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22408] width 2880 pitch 11520 (/4 2880)
>[  8757.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69938]
>[  8757.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69938] width 2880 pitch 11520 (/4 2880)
>[  8758.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25f08]
>[  8758.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25f08] width 2880 pitch 11520 (/4 2880)
>[  8762.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e588]
>[  8762.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e588] width 2880 pitch 11520 (/4 2880)
>[  8764.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8764.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8765.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b29120]
>[  8765.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b29120] width 2880 pitch 11520 (/4 2880)
>[  8765.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986afd8]
>[  8765.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986afd8] width 2880 pitch 11520 (/4 2880)
>[  8765.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fdd0]
>[  8765.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fdd0] width 2880 pitch 11520 (/4 2880)
>[  8765.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9825630]
>[  8765.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9825630] width 2880 pitch 11520 (/4 2880)
>[  8765.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8765.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8765.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8765.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8765.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf0c0]
>[  8765.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf0c0] width 2880 pitch 11520 (/4 2880)
>[  8765.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf0c0]
>[  8765.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf0c0] width 2880 pitch 11520 (/4 2880)
>[  8765.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afee48]
>[  8765.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afee48] width 2880 pitch 11520 (/4 2880)
>[  8765.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8765.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8765.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8765.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8765.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8765.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8765.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afee48]
>[  8765.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afee48] width 2880 pitch 11520 (/4 2880)
>[  8765.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8765.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8765.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8765.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8766.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9642d50]
>[  8766.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9642d50] width 2880 pitch 11520 (/4 2880)
>[  8766.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8766.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8766.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9825630]
>[  8766.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9825630] width 2880 pitch 11520 (/4 2880)
>[  8766.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8766.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8766.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9621968]
>[  8766.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9621968] width 2880 pitch 11520 (/4 2880)
>[  8767.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8767.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8767.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9621968]
>[  8767.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9621968] width 2880 pitch 11520 (/4 2880)
>[  8767.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fdd0]
>[  8767.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fdd0] width 2880 pitch 11520 (/4 2880)
>[  8767.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8767.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8767.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8767.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8768.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9825630]
>[  8768.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9825630] width 2880 pitch 11520 (/4 2880)
>[  8768.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99adc48]
>[  8768.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99adc48] width 2880 pitch 11520 (/4 2880)
>[  8768.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8768.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8768.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8768.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8768.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fdd0]
>[  8768.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fdd0] width 2880 pitch 11520 (/4 2880)
>[  8768.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25770]
>[  8768.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25770] width 2880 pitch 11520 (/4 2880)
>[  8768.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8769.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8769.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fdd0]
>[  8769.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fdd0] width 2880 pitch 11520 (/4 2880)
>[  8769.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8769.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8769.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31148]
>[  8769.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31148] width 2880 pitch 11520 (/4 2880)
>[  8769.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fdd0]
>[  8769.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fdd0] width 2880 pitch 11520 (/4 2880)
>[  8769.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c588]
>[  8769.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c588] width 2880 pitch 11520 (/4 2880)
>[  8769.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970b7b0]
>[  8769.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970b7b0] width 2880 pitch 11520 (/4 2880)
>[  8770.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8770.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8770.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8770.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8770.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8770.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8770.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  8770.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  8771.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0be8]
>[  8771.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0be8] width 2880 pitch 11520 (/4 2880)
>[  8783.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0aad0]
>[  8783.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0aad0] width 2880 pitch 11520 (/4 2880)
>[  8783.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8783.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8783.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0af0]
>[  8783.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0af0] width 2880 pitch 11520 (/4 2880)
>[  8783.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0be8]
>[  8783.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0be8] width 2880 pitch 11520 (/4 2880)
>[  8784.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0aad0]
>[  8784.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0aad0] width 2880 pitch 11520 (/4 2880)
>[  8784.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0af0]
>[  8784.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0af0] width 2880 pitch 11520 (/4 2880)
>[  8784.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  8784.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  8784.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab73b8]
>[  8784.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab73b8] width 2880 pitch 11520 (/4 2880)
>[  8784.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[  8784.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[  8784.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96219a8]
>[  8784.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96219a8] width 2880 pitch 11520 (/4 2880)
>[  8784.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e28]
>[  8784.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e28] width 2880 pitch 11520 (/4 2880)
>[  8784.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96219a8]
>[  8784.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96219a8] width 2880 pitch 11520 (/4 2880)
>[  8786.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a7e0]
>[  8786.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a7e0] width 2880 pitch 11520 (/4 2880)
>[  8787.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e28]
>[  8787.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e28] width 2880 pitch 11520 (/4 2880)
>[  8806.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34a40]
>[  8806.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34a40] width 2880 pitch 11520 (/4 2880)
>[  8831.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b200]
>[  8831.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b200] width 2880 pitch 11520 (/4 2880)
>[  8834.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6a20]
>[  8834.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6a20] width 2880 pitch 11520 (/4 2880)
>[  8873.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9958410]
>[  8873.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9958410] width 2880 pitch 11520 (/4 2880)
>[  8873.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b200]
>[  8873.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b200] width 2880 pitch 11520 (/4 2880)
>[  8873.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  8873.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  8874.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8874.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8874.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b200]
>[  8874.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b200] width 2880 pitch 11520 (/4 2880)
>[  8874.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  8874.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  8874.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e060]
>[  8874.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e060] width 2880 pitch 11520 (/4 2880)
>[  8875.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  8875.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  8875.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e060]
>[  8875.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e060] width 2880 pitch 11520 (/4 2880)
>[  8875.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  8875.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  8877.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9958410]
>[  8877.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9958410] width 2880 pitch 11520 (/4 2880)
>[  8878.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2df0]
>[  8878.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2df0] width 2880 pitch 11520 (/4 2880)
>[  8878.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  8878.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  8878.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  8878.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  8879.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b200]
>[  8879.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b200] width 2880 pitch 11520 (/4 2880)
>[  8879.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  8879.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  8880.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad08c8]
>[  8880.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad08c8] width 2880 pitch 11520 (/4 2880)
>[  8880.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8880.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8880.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad08c8]
>[  8880.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad08c8] width 2880 pitch 11520 (/4 2880)
>[  8880.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e578]
>[  8880.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e578] width 2880 pitch 11520 (/4 2880)
>[  8881.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8881.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8881.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8881.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8881.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad08c8]
>[  8881.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad08c8] width 2880 pitch 11520 (/4 2880)
>[  8881.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997e578]
>[  8881.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997e578] width 2880 pitch 11520 (/4 2880)
>[  8881.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8881.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8881.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8881.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8881.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad08c8]
>[  8881.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad08c8] width 2880 pitch 11520 (/4 2880)
>[  8881.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8881.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8881.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad08c8]
>[  8881.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad08c8] width 2880 pitch 11520 (/4 2880)
>[  8881.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8881.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8920.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8920.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8920.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8920.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8920.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8920.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8920.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8920.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8920.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8920.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8920.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8920.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8920.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[  8920.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[  8920.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963d6d8]
>[  8921.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963d6d8] width 2880 pitch 11520 (/4 2880)
>[  8921.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8921.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8921.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8921.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8921.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8921.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8921.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[  8921.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[  8921.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963d6d8]
>[  8921.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963d6d8] width 2880 pitch 11520 (/4 2880)
>[  8921.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8921.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8925.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b21c68]
>[  8925.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b21c68] width 2880 pitch 11520 (/4 2880)
>[  8925.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8925.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8925.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[  8925.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[  8925.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8925.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8925.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8925.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8925.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8925.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8925.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8925.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8925.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8925.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8925.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8925.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8925.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8925.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8925.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8925.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8925.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830aa0]
>[  8925.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830aa0] width 2880 pitch 11520 (/4 2880)
>[  8925.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8925.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8927.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8927.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8927.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8927.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8927.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8927.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8927.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8927.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8927.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8927.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8927.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8927.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8927.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbced0]
>[  8927.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbced0] width 2880 pitch 11520 (/4 2880)
>[  8927.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8927.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8927.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8927.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8927.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8927.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8927.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8927.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8927.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbced0]
>[  8927.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbced0] width 2880 pitch 11520 (/4 2880)
>[  8927.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8927.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8931.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8931.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8931.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8931.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8931.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8931.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8931.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbced0]
>[  8931.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbced0] width 2880 pitch 11520 (/4 2880)
>[  8931.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8931.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8931.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8931.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8931.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8931.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8931.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8931.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8931.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8931.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8931.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8931.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8931.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8931.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8931.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8931.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8931.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8e28]
>[  8931.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8e28] width 2880 pitch 11520 (/4 2880)
>[  8935.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8935.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8935.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8935.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8935.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8935.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8935.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8935.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8935.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8935.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8935.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8935.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8935.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8935.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8935.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbced0]
>[  8935.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbced0] width 2880 pitch 11520 (/4 2880)
>[  8935.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8935.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8935.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8935.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8935.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24358]
>[  8935.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24358] width 2880 pitch 11520 (/4 2880)
>[  8935.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbced0]
>[  8935.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbced0] width 2880 pitch 11520 (/4 2880)
>[  8935.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8935.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8935.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924c40]
>[  8935.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924c40] width 2880 pitch 11520 (/4 2880)
>[  8939.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986e498]
>[  8939.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986e498] width 2880 pitch 11520 (/4 2880)
>[  8939.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba3df8]
>[  8939.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba3df8] width 2880 pitch 11520 (/4 2880)
>[  8939.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8939.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8939.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986e498]
>[  8939.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986e498] width 2880 pitch 11520 (/4 2880)
>[  8939.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2df0]
>[  8939.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2df0] width 2880 pitch 11520 (/4 2880)
>[  8939.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986e498]
>[  8939.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986e498] width 2880 pitch 11520 (/4 2880)
>[  8939.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a22bd8]
>[  8939.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a22bd8] width 2880 pitch 11520 (/4 2880)
>[  8939.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba3df8]
>[  8939.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba3df8] width 2880 pitch 11520 (/4 2880)
>[  8939.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2ef0]
>[  8939.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2ef0] width 2880 pitch 11520 (/4 2880)
>[  8976.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2dc8]
>[  8976.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2dc8] width 2880 pitch 11520 (/4 2880)
>[  8976.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7da8]
>[  8976.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7da8] width 2880 pitch 11520 (/4 2880)
>[  8976.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad7b10]
>[  8976.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad7b10] width 2880 pitch 11520 (/4 2880)
>[  8976.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad7fc0]
>[  8976.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad7fc0] width 2880 pitch 11520 (/4 2880)
>[  8976.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad8d88]
>[  8976.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad8d88] width 2880 pitch 11520 (/4 2880)
>[  8977.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baa810]
>[  8977.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baa810] width 2880 pitch 11520 (/4 2880)
>[  8977.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7760]
>[  8977.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7760] width 2880 pitch 11520 (/4 2880)
>[  8979.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adfc58]
>[  8979.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adfc58] width 2880 pitch 11520 (/4 2880)
>[  8979.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad8d88]
>[  8979.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad8d88] width 2880 pitch 11520 (/4 2880)
>[  8979.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8979.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8979.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8979.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8979.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9953648]
>[  8979.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9953648] width 2880 pitch 11520 (/4 2880)
>[  8979.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8979.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8992.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99be670]
>[  8992.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99be670] width 2880 pitch 11520 (/4 2880)
>[  8992.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae0e68]
>[  8992.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae0e68] width 2880 pitch 11520 (/4 2880)
>[  8992.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99be670]
>[  8992.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99be670] width 2880 pitch 11520 (/4 2880)
>[  8992.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8992.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8992.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb908]
>[  8992.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb908] width 2880 pitch 11520 (/4 2880)
>[  8993.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8993.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8993.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb908]
>[  8993.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb908] width 2880 pitch 11520 (/4 2880)
>[  8993.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8993.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8993.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb908]
>[  8993.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb908] width 2880 pitch 11520 (/4 2880)
>[  8993.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8993.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  8993.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb908]
>[  8993.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb908] width 2880 pitch 11520 (/4 2880)
>[  8993.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2bf8]
>[  8993.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2bf8] width 2880 pitch 11520 (/4 2880)
>[  9043.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7760]
>[  9043.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7760] width 2880 pitch 11520 (/4 2880)
>[  9043.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39518]
>[  9043.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39518] width 2880 pitch 11520 (/4 2880)
>[  9043.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7760]
>[  9043.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7760] width 2880 pitch 11520 (/4 2880)
>[  9043.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6cb8]
>[  9044.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6cb8] width 2880 pitch 11520 (/4 2880)
>[  9044.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7760]
>[  9044.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7760] width 2880 pitch 11520 (/4 2880)
>[  9044.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6cb8]
>[  9044.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6cb8] width 2880 pitch 11520 (/4 2880)
>[  9044.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7760]
>[  9044.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7760] width 2880 pitch 11520 (/4 2880)
>[  9044.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6cb8]
>[  9045.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6cb8] width 2880 pitch 11520 (/4 2880)
>[  9045.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69908]
>[  9045.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69908] width 2880 pitch 11520 (/4 2880)
>[  9045.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[  9045.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[  9045.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e28]
>[  9045.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e28] width 2880 pitch 11520 (/4 2880)
>[  9045.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623df0]
>[  9045.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623df0] width 2880 pitch 11520 (/4 2880)
>[  9048.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[  9048.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[  9050.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99732f8]
>[  9050.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99732f8] width 2880 pitch 11520 (/4 2880)
>[  9065.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e28]
>[  9065.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e28] width 2880 pitch 11520 (/4 2880)
>[  9067.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99732f8]
>[  9067.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99732f8] width 2880 pitch 11520 (/4 2880)
>[  9081.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[  9083.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[  9117.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ad2d8]
>[  9117.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ad2d8] width 2880 pitch 11520 (/4 2880)
>[  9124.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28548]
>[  9124.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28548] width 2880 pitch 11520 (/4 2880)
>[  9133.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba11f0]
>[  9133.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba11f0] width 2880 pitch 11520 (/4 2880)
>[  9141.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ad2d8]
>[  9141.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ad2d8] width 2880 pitch 11520 (/4 2880)
>[  9151.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970b7b0]
>[  9151.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970b7b0] width 2880 pitch 11520 (/4 2880)
>[  9152.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b205f8]
>[  9152.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b205f8] width 2880 pitch 11520 (/4 2880)
>[  9156.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[  9156.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[  9158.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[  9158.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[  9160.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96219a8]
>[  9160.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96219a8] width 2880 pitch 11520 (/4 2880)
>[  9178.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[  9178.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[  9178.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0828]
>[  9178.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0828] width 2880 pitch 11520 (/4 2880)
>[  9178.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[  9178.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[  9178.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9990390]
>[  9178.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9990390] width 2880 pitch 11520 (/4 2880)
>[  9178.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a028d8]
>[  9178.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a028d8] width 2880 pitch 11520 (/4 2880)
>[  9178.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[  9178.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[  9178.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9727e28]
>[  9179.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9727e28] width 2880 pitch 11520 (/4 2880)
>[  9179.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57428]
>[  9179.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57428] width 2880 pitch 11520 (/4 2880)
>[  9179.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[  9179.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[  9179.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a028d8]
>[  9179.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a028d8] width 2880 pitch 11520 (/4 2880)
>[  9181.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dca8]
>[  9181.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dca8] width 2880 pitch 11520 (/4 2880)
>[  9182.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb878]
>[  9182.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb878] width 2880 pitch 11520 (/4 2880)
>[  9182.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeb878]
>[  9182.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeb878] width 2880 pitch 11520 (/4 2880)
>[  9182.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22aa0]
>[  9182.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22aa0] width 2880 pitch 11520 (/4 2880)
>[  9182.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae74c8]
>[  9182.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae74c8] width 2880 pitch 11520 (/4 2880)
>[  9182.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22aa0]
>[  9182.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22aa0] width 2880 pitch 11520 (/4 2880)
>[  9182.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3e150]
>[  9182.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3e150] width 2880 pitch 11520 (/4 2880)
>[  9182.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96219a8]
>[  9182.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96219a8] width 2880 pitch 11520 (/4 2880)
>[  9182.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22aa0]
>[  9182.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22aa0] width 2880 pitch 11520 (/4 2880)
>[  9185.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20388]
>[  9185.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20388] width 2880 pitch 11520 (/4 2880)
>[  9185.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baa810]
>[  9185.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baa810] width 2880 pitch 11520 (/4 2880)
>[  9185.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b20388]
>[  9185.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b20388] width 2880 pitch 11520 (/4 2880)
>[  9186.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57428]
>[  9186.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57428] width 2880 pitch 11520 (/4 2880)
>[  9186.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adff80]
>[  9186.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adff80] width 2880 pitch 11520 (/4 2880)
>[  9186.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57428]
>[  9186.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57428] width 2880 pitch 11520 (/4 2880)
>[  9186.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c496e0]
>[  9186.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c496e0] width 2880 pitch 11520 (/4 2880)
>[  9187.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c496e0]
>[  9187.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c496e0] width 2880 pitch 11520 (/4 2880)
>[  9187.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c496e0]
>[  9188.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c496e0] width 2880 pitch 11520 (/4 2880)
>[  9188.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9188.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9188.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9188.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9188.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af4f38]
>[  9188.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af4f38] width 2880 pitch 11520 (/4 2880)
>[  9188.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9188.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9201.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9201.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9201.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9201.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9201.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9201.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9201.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9201.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9202.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9202.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9202.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9202.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9202.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9202.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9202.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9202.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9203.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23e88]
>[  9203.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23e88] width 2880 pitch 11520 (/4 2880)
>[  9203.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9203.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9203.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9203.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9203.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56528]
>[  9203.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56528] width 2880 pitch 11520 (/4 2880)
>[  9204.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9204.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9204.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56528]
>[  9204.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56528] width 2880 pitch 11520 (/4 2880)
>[  9204.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9204.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9204.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56528]
>[  9204.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56528] width 2880 pitch 11520 (/4 2880)
>[  9222.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9222.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9224.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae9378]
>[  9225.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae9378] width 2880 pitch 11520 (/4 2880)
>[  9246.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b38b80]
>[  9246.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b38b80] width 2880 pitch 11520 (/4 2880)
>[  9256.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c569a0]
>[  9256.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c569a0] width 2880 pitch 11520 (/4 2880)
>[  9257.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c569a0]
>[  9257.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c569a0] width 2880 pitch 11520 (/4 2880)
>[  9257.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9257.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9257.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9257.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9257.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9257.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9257.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9258.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9258.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9258.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9259.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9259.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9259.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9259.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9259.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9259.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9259.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9260.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9260.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf598]
>[  9260.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf598] width 2880 pitch 11520 (/4 2880)
>[  9260.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9260.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9282.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af4f38]
>[  9283.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af4f38] width 2880 pitch 11520 (/4 2880)
>[  9312.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b30168]
>[  9312.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b30168] width 2880 pitch 11520 (/4 2880)
>[  9329.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af11d8]
>[  9329.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af11d8] width 2880 pitch 11520 (/4 2880)
>[  9329.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c135e0]
>[  9329.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c135e0] width 2880 pitch 11520 (/4 2880)
>[  9329.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c252d8]
>[  9329.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c252d8] width 2880 pitch 11520 (/4 2880)
>[  9329.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd4d0]
>[  9329.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd4d0] width 2880 pitch 11520 (/4 2880)
>[  9329.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[  9329.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[  9329.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd4d0]
>[  9329.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd4d0] width 2880 pitch 11520 (/4 2880)
>[  9330.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[  9330.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[  9330.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4abd8]
>[  9330.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4abd8] width 2880 pitch 11520 (/4 2880)
>[  9330.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4abd8]
>[  9330.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4abd8] width 2880 pitch 11520 (/4 2880)
>[  9330.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9330.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9330.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9330.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9336.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9336.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9340.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfa38]
>[  9340.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfa38] width 2880 pitch 11520 (/4 2880)
>[  9348.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d2c8]
>[  9349.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d2c8] width 2880 pitch 11520 (/4 2880)
>[  9358.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9358.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9358.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfa38]
>[  9358.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfa38] width 2880 pitch 11520 (/4 2880)
>[  9358.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54618]
>[  9358.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54618] width 2880 pitch 11520 (/4 2880)
>[  9358.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c135b0]
>[  9358.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c135b0] width 2880 pitch 11520 (/4 2880)
>[  9358.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3b40]
>[  9358.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3b40] width 2880 pitch 11520 (/4 2880)
>[  9358.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9358.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9358.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9358.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9361.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c133c0]
>[  9361.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c133c0] width 2880 pitch 11520 (/4 2880)
>[  9361.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c133c0]
>[  9361.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c133c0] width 2880 pitch 11520 (/4 2880)
>[  9361.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4abd8]
>[  9361.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4abd8] width 2880 pitch 11520 (/4 2880)
>[  9361.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9361.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9361.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9361.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9367.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8dd8]
>[  9367.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8dd8] width 2880 pitch 11520 (/4 2880)
>[  9370.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c60e88]
>[  9370.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c60e88] width 2880 pitch 11520 (/4 2880)
>[  9371.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9371.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9371.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c60e88]
>[  9371.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c60e88] width 2880 pitch 11520 (/4 2880)
>[  9371.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9371.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9371.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[  9371.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[  9371.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9371.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9371.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c60e88]
>[  9371.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c60e88] width 2880 pitch 11520 (/4 2880)
>[  9371.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9371.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9371.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9371.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9371.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[  9371.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[  9371.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9371.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9372.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[  9372.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[  9373.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9373.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9373.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[  9373.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[  9373.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c60e48]
>[  9373.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c60e48] width 2880 pitch 11520 (/4 2880)
>[  9374.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[  9374.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[  9374.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfa38]
>[  9374.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfa38] width 2880 pitch 11520 (/4 2880)
>[  9374.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[  9374.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[  9374.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[  9374.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[  9382.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9382.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9398.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9398.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9414.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af07e0]
>[  9414.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af07e0] width 2880 pitch 11520 (/4 2880)
>[  9419.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9419.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9419.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af07e0]
>[  9419.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af07e0] width 2880 pitch 11520 (/4 2880)
>[  9419.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9419.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9419.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9419.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9419.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9419.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9419.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9419.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9419.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c830]
>[  9419.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c830] width 2880 pitch 11520 (/4 2880)
>[  9419.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b408]
>[  9419.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b408] width 2880 pitch 11520 (/4 2880)
>[  9419.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c830]
>[  9419.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c830] width 2880 pitch 11520 (/4 2880)
>[  9423.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9423.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9423.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9423.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9423.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9423.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9424.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9424.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9424.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9424.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9424.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54618]
>[  9424.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54618] width 2880 pitch 11520 (/4 2880)
>[  9424.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9424.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9424.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2c830]
>[  9424.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2c830] width 2880 pitch 11520 (/4 2880)
>[  9424.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e2678]
>[  9424.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e2678] width 2880 pitch 11520 (/4 2880)
>[  9424.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9424.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9424.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9424.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9424.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d5c8]
>[  9424.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d5c8] width 2880 pitch 11520 (/4 2880)
>[  9424.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9424.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9424.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e2678]
>[  9424.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e2678] width 2880 pitch 11520 (/4 2880)
>[  9425.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9425.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9425.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d5c8]
>[  9425.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d5c8] width 2880 pitch 11520 (/4 2880)
>[  9425.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9425.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9425.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9425.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9425.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9425.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9425.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d5c8]
>[  9425.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d5c8] width 2880 pitch 11520 (/4 2880)
>[  9425.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9425.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9425.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9425.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9474.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b7638]
>[  9474.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b7638] width 2880 pitch 11520 (/4 2880)
>[  9476.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9476.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9478.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9478.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9478.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9478.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9478.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9478.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9478.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9968840]
>[  9478.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9968840] width 2880 pitch 11520 (/4 2880)
>[  9478.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec678]
>[  9479.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec678] width 2880 pitch 11520 (/4 2880)
>[  9479.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c391d0]
>[  9479.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c391d0] width 2880 pitch 11520 (/4 2880)
>[  9484.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9484.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9484.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34988]
>[  9484.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34988] width 2880 pitch 11520 (/4 2880)
>[  9484.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9484.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9484.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[  9484.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[  9484.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9484.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9484.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9484.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9484.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9484.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9484.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9484.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9492.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9492.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9493.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9493.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9493.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9493.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9493.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9493.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9493.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f060]
>[  9493.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f060] width 2880 pitch 11520 (/4 2880)
>[  9493.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e410]
>[  9493.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e410] width 2880 pitch 11520 (/4 2880)
>[  9493.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34988]
>[  9493.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34988] width 2880 pitch 11520 (/4 2880)
>[  9493.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613330]
>[  9493.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613330] width 2880 pitch 11520 (/4 2880)
>[  9493.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9493.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9495.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9495.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9495.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9495.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9496.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb0190]
>[  9496.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb0190] width 2880 pitch 11520 (/4 2880)
>[  9496.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[  9496.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[  9498.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[  9498.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[  9498.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[  9498.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[  9498.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9498.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9498.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[  9498.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[  9498.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[  9498.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[  9498.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e3148]
>[  9498.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e3148] width 2880 pitch 11520 (/4 2880)
>[  9498.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[  9498.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[  9498.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9498.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9498.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[  9498.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[  9498.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[  9498.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[  9498.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e3148]
>[  9498.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e3148] width 2880 pitch 11520 (/4 2880)
>[  9498.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[  9498.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[  9498.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9498.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9502.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[  9502.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[  9502.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e3148]
>[  9502.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e3148] width 2880 pitch 11520 (/4 2880)
>[  9502.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[  9502.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[  9502.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[  9502.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[  9502.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9502.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9502.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e3148]
>[  9502.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e3148] width 2880 pitch 11520 (/4 2880)
>[  9502.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9502.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9502.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[  9502.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[  9502.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[  9502.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[  9515.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409f60]
>[  9515.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409f60] width 2880 pitch 11520 (/4 2880)
>[  9520.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e6b18]
>[  9520.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e6b18] width 2880 pitch 11520 (/4 2880)
>[  9521.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9521.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9521.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775f28]
>[  9521.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775f28] width 2880 pitch 11520 (/4 2880)
>[  9521.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9521.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9521.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775f28]
>[  9521.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775f28] width 2880 pitch 11520 (/4 2880)
>[  9523.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9523.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9524.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775f28]
>[  9524.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775f28] width 2880 pitch 11520 (/4 2880)
>[  9524.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775f28]
>[  9524.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775f28] width 2880 pitch 11520 (/4 2880)
>[  9524.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  9524.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  9524.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bbae0]
>[  9524.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bbae0] width 2880 pitch 11520 (/4 2880)
>[  9524.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2be78]
>[  9524.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2be78] width 2880 pitch 11520 (/4 2880)
>[  9562.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9562.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9562.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9562.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9563.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9563.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9563.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9563.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9563.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9563.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9563.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9563.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9563.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9564.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9564.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  9564.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  9564.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bbd8]
>[  9564.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bbd8] width 2880 pitch 11520 (/4 2880)
>[  9564.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  9564.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  9566.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b253a0]
>[  9566.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b253a0] width 2880 pitch 11520 (/4 2880)
>[  9566.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4a398]
>[  9566.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4a398] width 2880 pitch 11520 (/4 2880)
>[  9585.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b8c0]
>[  9585.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b8c0] width 2880 pitch 11520 (/4 2880)
>[  9585.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4a398]
>[  9585.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4a398] width 2880 pitch 11520 (/4 2880)
>[  9585.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9585.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9585.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99691e0]
>[  9586.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99691e0] width 2880 pitch 11520 (/4 2880)
>[  9586.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9586.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9586.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9586.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9586.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9586.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9586.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9586.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9587.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b253a0]
>[  9587.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b253a0] width 2880 pitch 11520 (/4 2880)
>[  9588.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b8c0]
>[  9588.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b8c0] width 2880 pitch 11520 (/4 2880)
>[  9589.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22ba0]
>[  9589.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22ba0] width 2880 pitch 11520 (/4 2880)
>[  9589.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9589.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9589.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9589.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9589.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9589.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9607.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16578]
>[  9608.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16578] width 2880 pitch 11520 (/4 2880)
>[  9608.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b253a0]
>[  9608.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b253a0] width 2880 pitch 11520 (/4 2880)
>[  9608.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  9608.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  9608.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9608.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9608.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  9608.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  9608.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fcbc0]
>[  9608.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fcbc0] width 2880 pitch 11520 (/4 2880)
>[  9608.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdb18]
>[  9608.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdb18] width 2880 pitch 11520 (/4 2880)
>[  9609.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9609.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9609.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdb18]
>[  9609.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdb18] width 2880 pitch 11520 (/4 2880)
>[  9609.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9609.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9609.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdb18]
>[  9609.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdb18] width 2880 pitch 11520 (/4 2880)
>[  9609.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9609.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9609.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdb18]
>[  9610.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdb18] width 2880 pitch 11520 (/4 2880)
>[  9610.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16578]
>[  9610.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16578] width 2880 pitch 11520 (/4 2880)
>[  9610.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9610.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9610.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16578]
>[  9610.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16578] width 2880 pitch 11520 (/4 2880)
>[  9610.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9610.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9613.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16578]
>[  9613.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16578] width 2880 pitch 11520 (/4 2880)
>[  9613.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9613.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9613.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16578]
>[  9613.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16578] width 2880 pitch 11520 (/4 2880)
>[  9613.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9613.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9614.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9614.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9614.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  9614.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  9614.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9614.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9614.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9614.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9614.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9614.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9614.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9614.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9614.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9614.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9615.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9615.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9615.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9615.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9616.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9616.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9616.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96da8d0]
>[  9616.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96da8d0] width 2880 pitch 11520 (/4 2880)
>[  9617.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9617.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9617.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  9617.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  9617.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9617.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9617.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986b3e8]
>[  9617.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986b3e8] width 2880 pitch 11520 (/4 2880)
>[  9618.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9618.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9619.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  9619.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  9619.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9619.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9619.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1480]
>[  9619.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1480] width 2880 pitch 11520 (/4 2880)
>[  9620.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9620.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9620.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b8c0]
>[  9620.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b8c0] width 2880 pitch 11520 (/4 2880)
>[  9620.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9620.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9620.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b8c0]
>[  9620.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b8c0] width 2880 pitch 11520 (/4 2880)
>[  9648.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9648.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9649.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9649.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9649.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9649.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9649.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9649.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9649.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b853e0]
>[  9649.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b853e0] width 2880 pitch 11520 (/4 2880)
>[  9649.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993b8c0]
>[  9649.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993b8c0] width 2880 pitch 11520 (/4 2880)
>[  9650.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9650.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9650.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9650.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9650.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9650.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9650.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac720]
>[  9650.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac720] width 2880 pitch 11520 (/4 2880)
>[  9650.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9650.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9651.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9651.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9651.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9651.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9651.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9651.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9652.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34988]
>[  9652.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34988] width 2880 pitch 11520 (/4 2880)
>[  9653.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9653.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9658.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9658.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9658.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9658.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9658.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9658.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9658.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9658.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9658.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43750]
>[  9658.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43750] width 2880 pitch 11520 (/4 2880)
>[  9658.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c565a8]
>[  9658.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c565a8] width 2880 pitch 11520 (/4 2880)
>[  9658.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9658.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9658.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9658.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9662.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[  9662.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[  9662.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9662.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9662.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9662.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9662.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9662.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9662.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43750]
>[  9662.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43750] width 2880 pitch 11520 (/4 2880)
>[  9662.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[  9662.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[  9662.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43750]
>[  9663.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43750] width 2880 pitch 11520 (/4 2880)
>[  9663.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[  9663.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[  9663.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43750]
>[  9663.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43750] width 2880 pitch 11520 (/4 2880)
>[  9663.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[  9663.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[  9664.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d7cb0]
>[  9664.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d7cb0] width 2880 pitch 11520 (/4 2880)
>[  9664.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c438]
>[  9664.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c438] width 2880 pitch 11520 (/4 2880)
>[  9673.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b247d0]
>[  9673.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b247d0] width 2880 pitch 11520 (/4 2880)
>[  9673.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[  9673.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[  9673.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9673.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9675.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9675.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9675.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9675.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9704.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9704.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9704.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9704.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9704.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[  9704.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[  9705.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9705.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9705.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9705.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9705.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9705.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9705.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9705.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9705.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[  9705.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[  9705.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[  9706.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[  9706.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[  9706.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[  9706.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bbd8]
>[  9706.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bbd8] width 2880 pitch 11520 (/4 2880)
>[  9706.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9706.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9724.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[  9724.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[  9725.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9725.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9725.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9725.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9725.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[  9725.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[  9725.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9725.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9725.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9725.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9726.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9726.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9726.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9726.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9726.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9726.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9726.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9727.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9727.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9727.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9727.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9727.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9739.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[  9739.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[  9741.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baaa18]
>[  9741.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baaa18] width 2880 pitch 11520 (/4 2880)
>[  9772.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9772.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9778.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[  9778.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[  9778.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9778.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9778.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[  9778.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[  9778.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c438c8]
>[  9778.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c438c8] width 2880 pitch 11520 (/4 2880)
>[  9778.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbec20]
>[  9778.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbec20] width 2880 pitch 11520 (/4 2880)
>[  9778.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d290]
>[  9778.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d290] width 2880 pitch 11520 (/4 2880)
>[  9778.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9778.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9778.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[  9778.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[  9782.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9782.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9782.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baa9c0]
>[  9782.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baa9c0] width 2880 pitch 11520 (/4 2880)
>[  9782.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9782.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9782.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9782.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9782.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9782.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9782.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baa9c0]
>[  9782.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baa9c0] width 2880 pitch 11520 (/4 2880)
>[  9782.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d128]
>[  9782.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d128] width 2880 pitch 11520 (/4 2880)
>[  9782.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9782.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9782.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9782.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9782.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9782.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9782.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baa9c0]
>[  9782.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baa9c0] width 2880 pitch 11520 (/4 2880)
>[  9782.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d128]
>[  9782.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d128] width 2880 pitch 11520 (/4 2880)
>[  9782.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9782.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9782.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9782.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9786.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9786.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9786.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d128]
>[  9786.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d128] width 2880 pitch 11520 (/4 2880)
>[  9786.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9786.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9786.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9787.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9787.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9787.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9787.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9787.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9787.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9787.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9787.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9787.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9787.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9787.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9787.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9787.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9797.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9797.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9798.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9798.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9801.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9801.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9803.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9803.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9818.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9818.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9818.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9818.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9818.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9818.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9818.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9818.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9818.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9818.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9819.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9819.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9819.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9819.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9819.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c2438]
>[  9819.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c2438] width 2880 pitch 11520 (/4 2880)
>[  9819.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9819.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9821.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dfe0]
>[  9821.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dfe0] width 2880 pitch 11520 (/4 2880)
>[  9821.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9821.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9821.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9821.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9821.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ea30]
>[  9821.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ea30] width 2880 pitch 11520 (/4 2880)
>[  9821.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27d08]
>[  9821.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27d08] width 2880 pitch 11520 (/4 2880)
>[  9821.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ea30]
>[  9821.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ea30] width 2880 pitch 11520 (/4 2880)
>[  9837.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3ad00]
>[  9837.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3ad00] width 2880 pitch 11520 (/4 2880)
>[  9865.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9865.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9892.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9892.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9898.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae97f0]
>[  9898.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae97f0] width 2880 pitch 11520 (/4 2880)
>[  9898.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9898.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9898.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9898.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9898.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae4c80]
>[  9898.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae4c80] width 2880 pitch 11520 (/4 2880)
>[  9898.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab9a20]
>[  9898.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab9a20] width 2880 pitch 11520 (/4 2880)
>[  9898.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5f160]
>[  9898.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5f160] width 2880 pitch 11520 (/4 2880)
>[  9898.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960a2c0]
>[  9898.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960a2c0] width 2880 pitch 11520 (/4 2880)
>[  9898.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bb968]
>[  9898.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bb968] width 2880 pitch 11520 (/4 2880)
>[  9902.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bb968]
>[  9902.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bb968] width 2880 pitch 11520 (/4 2880)
>[  9903.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853640]
>[  9903.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853640] width 2880 pitch 11520 (/4 2880)
>[  9903.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960a2a8]
>[  9903.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960a2a8] width 2880 pitch 11520 (/4 2880)
>[  9903.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9903.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9903.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a69908]
>[  9903.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a69908] width 2880 pitch 11520 (/4 2880)
>[  9903.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9903.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9903.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984e020]
>[  9903.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984e020] width 2880 pitch 11520 (/4 2880)
>[  9903.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9903.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9903.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55810]
>[  9903.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55810] width 2880 pitch 11520 (/4 2880)
>[  9903.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9853640]
>[  9903.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9853640] width 2880 pitch 11520 (/4 2880)
>[  9907.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9907.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9907.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9908.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9908.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9908.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9908.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9908.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9908.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[  9908.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[  9908.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9908.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9908.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55810]
>[  9909.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55810] width 2880 pitch 11520 (/4 2880)
>[  9909.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9909.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9909.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55810]
>[  9909.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55810] width 2880 pitch 11520 (/4 2880)
>[  9909.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9909.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9909.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55810]
>[  9909.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55810] width 2880 pitch 11520 (/4 2880)
>[  9910.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fd48]
>[  9910.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fd48] width 2880 pitch 11520 (/4 2880)
>[  9910.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9911.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9911.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9911.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9911.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9911.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9911.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afef88]
>[  9912.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afef88] width 2880 pitch 11520 (/4 2880)
>[  9912.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57330]
>[  9912.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57330] width 2880 pitch 11520 (/4 2880)
>[  9912.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf458]
>[  9912.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf458] width 2880 pitch 11520 (/4 2880)
>[  9912.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9912.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9912.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9912.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9932.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e150]
>[  9932.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e150] width 2880 pitch 11520 (/4 2880)
>[  9940.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95296d8]
>[  9940.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95296d8] width 2880 pitch 11520 (/4 2880)
>[  9941.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3de60]
>[  9941.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3de60] width 2880 pitch 11520 (/4 2880)
>[  9941.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[  9941.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[  9941.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3de60]
>[  9941.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3de60] width 2880 pitch 11520 (/4 2880)
>[  9941.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[  9941.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[  9941.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9941.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9941.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25080]
>[  9942.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25080] width 2880 pitch 11520 (/4 2880)
>[  9942.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[  9942.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[  9942.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9942.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9942.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[  9942.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[  9944.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7618]
>[  9944.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7618] width 2880 pitch 11520 (/4 2880)
>[  9944.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998bd0]
>[  9944.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998bd0] width 2880 pitch 11520 (/4 2880)
>[  9944.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7618]
>[  9944.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7618] width 2880 pitch 11520 (/4 2880)
>[  9944.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998bd0]
>[  9944.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998bd0] width 2880 pitch 11520 (/4 2880)
>[  9945.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7618]
>[  9945.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7618] width 2880 pitch 11520 (/4 2880)
>[  9945.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b82b18]
>[  9945.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b82b18] width 2880 pitch 11520 (/4 2880)
>[  9945.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9945.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9945.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9945.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9945.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[  9945.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[  9948.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc09b8]
>[  9948.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc09b8] width 2880 pitch 11520 (/4 2880)
>[  9951.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9951.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9953.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9b490]
>[  9953.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9b490] width 2880 pitch 11520 (/4 2880)
>[  9959.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc09b8]
>[  9959.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc09b8] width 2880 pitch 11520 (/4 2880)
>[  9959.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9959.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9959.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc09b8]
>[  9959.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc09b8] width 2880 pitch 11520 (/4 2880)
>[  9959.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9959.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9959.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9b490]
>[  9959.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9b490] width 2880 pitch 11520 (/4 2880)
>[  9959.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb65b8]
>[  9959.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb65b8] width 2880 pitch 11520 (/4 2880)
>[  9959.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd7e8]
>[  9959.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd7e8] width 2880 pitch 11520 (/4 2880)
>[  9959.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43750]
>[  9959.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43750] width 2880 pitch 11520 (/4 2880)
>[  9959.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9959.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9959.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9959.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9959.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[  9959.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[  9960.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c12a00]
>[  9960.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c12a00] width 2880 pitch 11520 (/4 2880)
>[  9963.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e048]
>[  9963.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e048] width 2880 pitch 11520 (/4 2880)
>[  9965.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9965.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9965.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9965.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9965.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9966.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9966.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823f38]
>[  9966.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823f38] width 2880 pitch 11520 (/4 2880)
>[  9966.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8760]
>[  9966.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8760] width 2880 pitch 11520 (/4 2880)
>[  9966.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9966.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9966.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9966.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9966.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9966.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9966.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823f38]
>[  9966.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823f38] width 2880 pitch 11520 (/4 2880)
>[  9966.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8760]
>[  9966.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8760] width 2880 pitch 11520 (/4 2880)
>[  9966.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b9ce8]
>[  9966.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b9ce8] width 2880 pitch 11520 (/4 2880)
>[  9966.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9966.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9966.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9966.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9966.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[  9966.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[  9967.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[  9967.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[  9967.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9967.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9967.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9967.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9967.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9967.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9967.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[  9967.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[  9967.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9967.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9967.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9967.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9967.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9967.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9967.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9967.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9967.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9967.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9967.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9967.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9967.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9967.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9967.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9967.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9979.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[  9979.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[  9984.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9984.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9984.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d6c0]
>[  9984.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d6c0] width 2880 pitch 11520 (/4 2880)
>[  9984.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba0068]
>[  9984.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba0068] width 2880 pitch 11520 (/4 2880)
>[  9984.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d6c0]
>[  9984.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d6c0] width 2880 pitch 11520 (/4 2880)
>[  9985.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d310]
>[  9985.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d310] width 2880 pitch 11520 (/4 2880)
>[  9986.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9987.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9987.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9987.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9987.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5710]
>[  9987.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5710] width 2880 pitch 11520 (/4 2880)
>[  9987.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae0cf8]
>[  9987.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae0cf8] width 2880 pitch 11520 (/4 2880)
>[  9987.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae0cf8]
>[  9988.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae0cf8] width 2880 pitch 11520 (/4 2880)
>[  9988.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9988.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9988.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[  9988.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[  9990.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb65b8]
>[  9990.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb65b8] width 2880 pitch 11520 (/4 2880)
>[  9991.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c37630]
>[  9991.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c37630] width 2880 pitch 11520 (/4 2880)
>[  9991.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af7e48]
>[  9991.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af7e48] width 2880 pitch 11520 (/4 2880)
>[  9991.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66a20]
>[  9991.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66a20] width 2880 pitch 11520 (/4 2880)
>[  9991.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d6c0]
>[  9991.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d6c0] width 2880 pitch 11520 (/4 2880)
>[  9991.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15410]
>[  9991.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15410] width 2880 pitch 11520 (/4 2880)
>[  9991.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc09b8]
>[  9991.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc09b8] width 2880 pitch 11520 (/4 2880)
>[  9992.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975550]
>[  9992.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975550] width 2880 pitch 11520 (/4 2880)
>[  9992.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c37630]
>[  9992.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c37630] width 2880 pitch 11520 (/4 2880)
>[  9992.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975550]
>[  9992.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975550] width 2880 pitch 11520 (/4 2880)
>[  9992.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c37630]
>[  9992.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c37630] width 2880 pitch 11520 (/4 2880)
>[  9992.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975550]
>[  9992.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975550] width 2880 pitch 11520 (/4 2880)
>[  9992.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c37630]
>[  9993.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c37630] width 2880 pitch 11520 (/4 2880)
>[  9995.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[  9995.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[  9995.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[  9995.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[  9995.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8ef90]
>[  9995.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8ef90] width 2880 pitch 11520 (/4 2880)
>[  9995.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8ef90]
>[  9995.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8ef90] width 2880 pitch 11520 (/4 2880)
>[  9995.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8ef90]
>[  9995.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8ef90] width 2880 pitch 11520 (/4 2880)
>[  9998.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9998.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9998.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbec8]
>[  9998.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbec8] width 2880 pitch 11520 (/4 2880)
>[  9998.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9998.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9998.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbec8]
>[  9998.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbec8] width 2880 pitch 11520 (/4 2880)
>[  9999.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9999.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9999.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbec8]
>[  9999.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbec8] width 2880 pitch 11520 (/4 2880)
>[  9999.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[  9999.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[  9999.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbec8]
>[  9999.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbec8] width 2880 pitch 11520 (/4 2880)
>[ 10000.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b7638]
>[ 10000.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b7638] width 2880 pitch 11520 (/4 2880)
>[ 10000.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[ 10000.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[ 10000.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[ 10000.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[ 10000.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[ 10000.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[ 10004.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d3a8]
>[ 10004.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d3a8] width 2880 pitch 11520 (/4 2880)
>[ 10009.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cac40]
>[ 10009.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cac40] width 2880 pitch 11520 (/4 2880)
>[ 10009.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 10009.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 10018.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cff0]
>[ 10018.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cff0] width 2880 pitch 11520 (/4 2880)
>[ 10019.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985768]
>[ 10019.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985768] width 2880 pitch 11520 (/4 2880)
>[ 10019.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07e08]
>[ 10019.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07e08] width 2880 pitch 11520 (/4 2880)
>[ 10019.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c4cf8]
>[ 10019.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c4cf8] width 2880 pitch 11520 (/4 2880)
>[ 10019.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cff0]
>[ 10019.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cff0] width 2880 pitch 11520 (/4 2880)
>[ 10019.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c4cf8]
>[ 10019.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c4cf8] width 2880 pitch 11520 (/4 2880)
>[ 10019.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e098]
>[ 10019.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e098] width 2880 pitch 11520 (/4 2880)
>[ 10019.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985768]
>[ 10019.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985768] width 2880 pitch 11520 (/4 2880)
>[ 10019.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa1a8]
>[ 10019.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa1a8] width 2880 pitch 11520 (/4 2880)
>[ 10019.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8368]
>[ 10019.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8368] width 2880 pitch 11520 (/4 2880)
>[ 10025.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a8c8]
>[ 10025.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a8c8] width 2880 pitch 11520 (/4 2880)
>[ 10025.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649818]
>[ 10025.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649818] width 2880 pitch 11520 (/4 2880)
>[ 10025.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10025.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10026.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13ba8]
>[ 10026.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13ba8] width 2880 pitch 11520 (/4 2880)
>[ 10026.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[ 10026.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[ 10026.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 10026.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 10026.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649818]
>[ 10026.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649818] width 2880 pitch 11520 (/4 2880)
>[ 10026.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10026.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10026.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13ba8]
>[ 10026.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13ba8] width 2880 pitch 11520 (/4 2880)
>[ 10026.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[ 10026.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[ 10026.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 10026.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 10026.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649818]
>[ 10026.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649818] width 2880 pitch 11520 (/4 2880)
>[ 10026.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10026.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10026.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13ba8]
>[ 10026.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13ba8] width 2880 pitch 11520 (/4 2880)
>[ 10026.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05808]
>[ 10026.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05808] width 2880 pitch 11520 (/4 2880)
>[ 10027.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10027.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10027.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10027.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13ba8]
>[ 10027.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13ba8] width 2880 pitch 11520 (/4 2880)
>[ 10027.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9c3e8]
>[ 10027.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9c3e8] width 2880 pitch 11520 (/4 2880)
>[ 10027.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10027.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10027.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10027.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10027.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10027.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10027.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10027.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10027.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10027.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10027.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10027.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10027.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978afb8]
>[ 10027.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978afb8] width 2880 pitch 11520 (/4 2880)
>[ 10031.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961cff0]
>[ 10031.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961cff0] width 2880 pitch 11520 (/4 2880)
>[ 10031.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba00a0]
>[ 10031.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba00a0] width 2880 pitch 11520 (/4 2880)
>[ 10032.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c139d8]
>[ 10032.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c139d8] width 2880 pitch 11520 (/4 2880)
>[ 10034.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c139d8]
>[ 10034.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c139d8] width 2880 pitch 11520 (/4 2880)
>[ 10034.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10034.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10034.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10035.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10035.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10035.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10035.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10035.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10035.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10035.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10035.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10035.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10036.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10036.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10036.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10036.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10036.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10036.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10036.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10036.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10036.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b608]
>[ 10036.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b608] width 2880 pitch 11520 (/4 2880)
>[ 10037.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c139d8]
>[ 10037.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c139d8] width 2880 pitch 11520 (/4 2880)
>[ 10037.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10037.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10037.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10037.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10037.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10037.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10038.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10038.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10038.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10038.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10038.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10038.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10038.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10038.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10038.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10038.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10038.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10038.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10039.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10039.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10039.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ade5d8]
>[ 10039.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ade5d8] width 2880 pitch 11520 (/4 2880)
>[ 10039.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c49be8]
>[ 10039.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c49be8] width 2880 pitch 11520 (/4 2880)
>[ 10039.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8950]
>[ 10039.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8950] width 2880 pitch 11520 (/4 2880)
>[ 10039.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8950]
>[ 10039.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8950] width 2880 pitch 11520 (/4 2880)
>[ 10068.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef400]
>[ 10068.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef400] width 2880 pitch 11520 (/4 2880)
>[ 10068.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba00a8]
>[ 10068.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba00a8] width 2880 pitch 11520 (/4 2880)
>[ 10069.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9848038]
>[ 10069.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9848038] width 2880 pitch 11520 (/4 2880)
>[ 10069.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9848038]
>[ 10069.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9848038] width 2880 pitch 11520 (/4 2880)
>[ 10069.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba00a8]
>[ 10069.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba00a8] width 2880 pitch 11520 (/4 2880)
>[ 10069.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975500]
>[ 10069.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975500] width 2880 pitch 11520 (/4 2880)
>[ 10069.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba00a8]
>[ 10069.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba00a8] width 2880 pitch 11520 (/4 2880)
>[ 10069.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975500]
>[ 10070.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975500] width 2880 pitch 11520 (/4 2880)
>[ 10070.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a178]
>[ 10070.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a178] width 2880 pitch 11520 (/4 2880)
>[ 10071.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c139d8]
>[ 10071.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c139d8] width 2880 pitch 11520 (/4 2880)
>[ 10072.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960a298]
>[ 10072.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960a298] width 2880 pitch 11520 (/4 2880)
>[ 10073.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c139d8]
>[ 10073.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c139d8] width 2880 pitch 11520 (/4 2880)
>[ 10074.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a178]
>[ 10074.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a178] width 2880 pitch 11520 (/4 2880)
>[ 10074.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbf08]
>[ 10074.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbf08] width 2880 pitch 11520 (/4 2880)
>[ 10074.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba00a8]
>[ 10074.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba00a8] width 2880 pitch 11520 (/4 2880)
>[ 10075.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbf08]
>[ 10075.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbf08] width 2880 pitch 11520 (/4 2880)
>[ 10075.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbf08]
>[ 10075.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbf08] width 2880 pitch 11520 (/4 2880)
>[ 10075.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbf08]
>[ 10075.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbf08] width 2880 pitch 11520 (/4 2880)
>[ 10075.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fbf08]
>[ 10075.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fbf08] width 2880 pitch 11520 (/4 2880)
>[ 10129.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a24d90]
>[ 10129.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a24d90] width 2880 pitch 11520 (/4 2880)
>[ 10293.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce9050]
>[ 10293.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce9050] width 2880 pitch 11520 (/4 2880)
>[ 10293.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2bb30]
>[ 10293.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2bb30] width 2880 pitch 11520 (/4 2880)
>[ 10299.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b2f0]
>[ 10299.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b2f0] width 2880 pitch 11520 (/4 2880)
>[ 10300.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655c38]
>[ 10300.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655c38] width 2880 pitch 11520 (/4 2880)
>[ 10300.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce9050]
>[ 10300.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce9050] width 2880 pitch 11520 (/4 2880)
>[ 10300.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b680]
>[ 10300.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b680] width 2880 pitch 11520 (/4 2880)
>[ 10301.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce9050]
>[ 10301.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce9050] width 2880 pitch 11520 (/4 2880)
>[ 10384.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b680]
>[ 10384.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b680] width 2880 pitch 11520 (/4 2880)
>[ 10384.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10384.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10384.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b680]
>[ 10384.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b680] width 2880 pitch 11520 (/4 2880)
>[ 10385.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10385.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10385.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b680]
>[ 10385.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b680] width 2880 pitch 11520 (/4 2880)
>[ 10385.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10385.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10386.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2020]
>[ 10386.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2020] width 2880 pitch 11520 (/4 2880)
>[ 10386.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b308]
>[ 10386.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b308] width 2880 pitch 11520 (/4 2880)
>[ 10386.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2020]
>[ 10386.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2020] width 2880 pitch 11520 (/4 2880)
>[ 10386.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b308]
>[ 10386.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b308] width 2880 pitch 11520 (/4 2880)
>[ 10388.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2f150]
>[ 10388.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2f150] width 2880 pitch 11520 (/4 2880)
>[ 10389.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2eb08]
>[ 10389.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2eb08] width 2880 pitch 11520 (/4 2880)
>[ 10389.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892290]
>[ 10389.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892290] width 2880 pitch 11520 (/4 2880)
>[ 10389.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10389.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10389.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10390.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10390.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10390.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10429.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9848f20]
>[ 10429.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9848f20] width 2880 pitch 11520 (/4 2880)
>[ 10429.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10429.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10429.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9848f20]
>[ 10429.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9848f20] width 2880 pitch 11520 (/4 2880)
>[ 10429.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10429.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10429.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10429.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10430.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbd708]
>[ 10430.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbd708] width 2880 pitch 11520 (/4 2880)
>[ 10430.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10430.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10430.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10430.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10430.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10430.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10433.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10433.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10434.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10434.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10434.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10434.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10434.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10434.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10434.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10434.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10434.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10434.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10435.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10435.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10435.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10435.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10435.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10435.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10436.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10436.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10436.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10436.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10436.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10436.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10436.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbd708]
>[ 10436.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbd708] width 2880 pitch 11520 (/4 2880)
>[ 10437.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10437.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ea8]
>[ 10437.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ea8] width 2880 pitch 11520 (/4 2880)
>[ 10437.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 10437.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 10438.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923f20]
>[ 10438.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923f20] width 2880 pitch 11520 (/4 2880)
>[ 10438.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4a408]
>[ 10438.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4a408] width 2880 pitch 11520 (/4 2880)
>[ 10438.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10438.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10438.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[ 10438.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[ 10438.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10438.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10438.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10438.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10438.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[ 10438.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[ 10438.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10438.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10438.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[ 10438.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[ 10438.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bae68]
>[ 10438.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bae68] width 2880 pitch 11520 (/4 2880)
>[ 10438.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10438.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10438.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10438.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10438.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10438.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10438.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10438.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10438.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10438.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10439.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10439.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10440.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10440.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10440.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10440.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10440.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10440.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10440.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10440.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10440.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10440.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10440.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 10440.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 10440.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10440.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10441.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10441.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10441.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923f88]
>[ 10441.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923f88] width 2880 pitch 11520 (/4 2880)
>[ 10441.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99240f8]
>[ 10441.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99240f8] width 2880 pitch 11520 (/4 2880)
>[ 10442.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10442.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10442.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10442.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10442.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10442.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10442.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10442.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10442.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10442.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10442.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10442.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10442.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770718]
>[ 10442.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770718] width 2880 pitch 11520 (/4 2880)
>[ 10444.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10444.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10444.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2668]
>[ 10444.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2668] width 2880 pitch 11520 (/4 2880)
>[ 10445.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[ 10445.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[ 10445.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bae68]
>[ 10445.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bae68] width 2880 pitch 11520 (/4 2880)
>[ 10445.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[ 10445.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[ 10445.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bae68]
>[ 10445.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bae68] width 2880 pitch 11520 (/4 2880)
>[ 10445.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993cd20]
>[ 10445.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993cd20] width 2880 pitch 11520 (/4 2880)
>[ 10446.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10446.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10446.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98babc8]
>[ 10446.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98babc8] width 2880 pitch 11520 (/4 2880)
>[ 10446.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10446.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10446.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10446.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10446.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10446.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10446.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10446.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10446.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10446.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10446.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10446.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10446.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10446.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 10446.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10446.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10446.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10446.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 10446.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10446.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10446.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2e80]
>[ 10446.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2e80] width 2880 pitch 11520 (/4 2880)
>[ 10446.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10446.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10447.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10447.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 10447.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10447.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10447.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10447.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10447.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2e80]
>[ 10447.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2e80] width 2880 pitch 11520 (/4 2880)
>[ 10447.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10447.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10447.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10447.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 10447.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10447.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10447.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bae68]
>[ 10447.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bae68] width 2880 pitch 11520 (/4 2880)
>[ 10448.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10448.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10448.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10448.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10448.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10448.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10448.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10448.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10448.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10448.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10448.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10448.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10448.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10448.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10448.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10448.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10448.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10449.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10449.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10449.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10449.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10449.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10450.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10450.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10452.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10452.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10454.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10454.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10485.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1d690]
>[ 10485.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1d690] width 2880 pitch 11520 (/4 2880)
>[ 10498.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10498.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10498.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[ 10498.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[ 10498.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10498.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10498.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10498.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10499.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1b20]
>[ 10499.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1b20] width 2880 pitch 11520 (/4 2880)
>[ 10499.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10499.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10499.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10499.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10499.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99244d0]
>[ 10499.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99244d0] width 2880 pitch 11520 (/4 2880)
>[ 10499.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad72e0]
>[ 10499.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad72e0] width 2880 pitch 11520 (/4 2880)
>[ 10500.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99244d0]
>[ 10500.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99244d0] width 2880 pitch 11520 (/4 2880)
>[ 10500.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[ 10500.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[ 10500.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10500.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10501.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10501.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10502.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10502.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10502.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[ 10502.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[ 10502.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10502.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10503.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 10503.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 10503.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 10503.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 10503.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10503.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10503.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 10503.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 10503.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10503.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10503.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10503.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10504.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10504.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10504.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10504.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10504.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10504.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10504.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10504.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10504.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10504.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10504.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10505.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10505.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10505.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10505.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10505.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10505.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10505.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10507.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10508.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10508.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10508.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10508.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10508.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10508.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10508.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10509.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4200]
>[ 10509.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4200] width 2880 pitch 11520 (/4 2880)
>[ 10509.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 10509.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 10509.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38bc8]
>[ 10509.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38bc8] width 2880 pitch 11520 (/4 2880)
>[ 10509.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 10509.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 10515.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10515.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10515.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10515.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10516.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10516.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10516.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10516.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10516.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10516.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10516.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10516.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10516.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10516.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10516.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10517.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10517.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10517.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10518.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10518.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10518.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10518.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10518.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10518.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10521.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10521.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10521.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10522.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10522.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10522.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10522.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10522.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10522.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10522.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10523.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982fa30]
>[ 10523.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982fa30] width 2880 pitch 11520 (/4 2880)
>[ 10523.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bfc30]
>[ 10523.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bfc30] width 2880 pitch 11520 (/4 2880)
>[ 10523.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868a88]
>[ 10523.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868a88] width 2880 pitch 11520 (/4 2880)
>[ 10524.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[ 10525.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[ 10525.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3a9e0]
>[ 10525.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3a9e0] width 2880 pitch 11520 (/4 2880)
>[ 10525.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613cb8]
>[ 10525.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613cb8] width 2880 pitch 11520 (/4 2880)
>[ 10525.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10525.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10525.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851fd0]
>[ 10525.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851fd0] width 2880 pitch 11520 (/4 2880)
>[ 10525.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10525.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10525.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851fd0]
>[ 10525.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851fd0] width 2880 pitch 11520 (/4 2880)
>[ 10525.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10525.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10525.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851fd0]
>[ 10525.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851fd0] width 2880 pitch 11520 (/4 2880)
>[ 10525.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10525.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10525.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10525.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10525.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bf140]
>[ 10526.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bf140] width 2880 pitch 11520 (/4 2880)
>[ 10530.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613cb8]
>[ 10530.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613cb8] width 2880 pitch 11520 (/4 2880)
>[ 10530.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97113d8]
>[ 10530.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97113d8] width 2880 pitch 11520 (/4 2880)
>[ 10530.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613cb8]
>[ 10530.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613cb8] width 2880 pitch 11520 (/4 2880)
>[ 10530.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9851fd0]
>[ 10530.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9851fd0] width 2880 pitch 11520 (/4 2880)
>[ 10530.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613cb8]
>[ 10530.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613cb8] width 2880 pitch 11520 (/4 2880)
>[ 10530.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38040]
>[ 10530.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38040] width 2880 pitch 11520 (/4 2880)
>[ 10530.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bf140]
>[ 10530.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bf140] width 2880 pitch 11520 (/4 2880)
>[ 10530.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613cb8]
>[ 10530.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613cb8] width 2880 pitch 11520 (/4 2880)
>[ 10531.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x982f558]
>[ 10531.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x982f558] width 2880 pitch 11520 (/4 2880)
>[ 10531.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9902288]
>[ 10531.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9902288] width 2880 pitch 11520 (/4 2880)
>[ 10531.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c389c8]
>[ 10531.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c389c8] width 2880 pitch 11520 (/4 2880)
>[ 10532.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9869288]
>[ 10532.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9869288] width 2880 pitch 11520 (/4 2880)
>[ 10556.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5a150]
>[ 10557.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5a150] width 2880 pitch 11520 (/4 2880)
>[ 10557.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3a9e0]
>[ 10557.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3a9e0] width 2880 pitch 11520 (/4 2880)
>[ 10557.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5a150]
>[ 10557.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5a150] width 2880 pitch 11520 (/4 2880)
>[ 10557.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3a9e0]
>[ 10557.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3a9e0] width 2880 pitch 11520 (/4 2880)
>[ 10557.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95af810]
>[ 10557.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95af810] width 2880 pitch 11520 (/4 2880)
>[ 10558.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce09c0]
>[ 10558.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce09c0] width 2880 pitch 11520 (/4 2880)
>[ 10558.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919520]
>[ 10559.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919520] width 2880 pitch 11520 (/4 2880)
>[ 10559.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850e08]
>[ 10559.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850e08] width 2880 pitch 11520 (/4 2880)
>[ 10559.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988f9f8]
>[ 10559.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988f9f8] width 2880 pitch 11520 (/4 2880)
>[ 10562.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919520]
>[ 10562.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919520] width 2880 pitch 11520 (/4 2880)
>[ 10562.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b570]
>[ 10562.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b570] width 2880 pitch 11520 (/4 2880)
>[ 10562.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9702b70]
>[ 10562.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9702b70] width 2880 pitch 11520 (/4 2880)
>[ 10562.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b30e0]
>[ 10562.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b30e0] width 2880 pitch 11520 (/4 2880)
>[ 10563.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b570]
>[ 10563.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b570] width 2880 pitch 11520 (/4 2880)
>[ 10563.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b570]
>[ 10563.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b570] width 2880 pitch 11520 (/4 2880)
>[ 10563.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919520]
>[ 10563.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919520] width 2880 pitch 11520 (/4 2880)
>[ 10563.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9673d68]
>[ 10563.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9673d68] width 2880 pitch 11520 (/4 2880)
>[ 10563.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941b570]
>[ 10563.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941b570] width 2880 pitch 11520 (/4 2880)
>[ 10563.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e108]
>[ 10563.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e108] width 2880 pitch 11520 (/4 2880)
>[ 10563.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e0d8]
>[ 10563.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e0d8] width 2880 pitch 11520 (/4 2880)
>[ 10563.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e108]
>[ 10564.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e108] width 2880 pitch 11520 (/4 2880)
>[ 10564.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8c88]
>[ 10564.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8c88] width 2880 pitch 11520 (/4 2880)
>[ 10564.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8c88]
>[ 10564.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8c88] width 2880 pitch 11520 (/4 2880)
>[ 10564.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8c88]
>[ 10564.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8c88] width 2880 pitch 11520 (/4 2880)
>[ 10564.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae59b0]
>[ 10565.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae59b0] width 2880 pitch 11520 (/4 2880)
>[ 10565.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a9d8]
>[ 10565.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a9d8] width 2880 pitch 11520 (/4 2880)
>[ 10565.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae59b0]
>[ 10565.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae59b0] width 2880 pitch 11520 (/4 2880)
>[ 10565.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8c88]
>[ 10565.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8c88] width 2880 pitch 11520 (/4 2880)
>[ 10565.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a9d8]
>[ 10565.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a9d8] width 2880 pitch 11520 (/4 2880)
>[ 10565.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a9d8]
>[ 10565.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a9d8] width 2880 pitch 11520 (/4 2880)
>[ 10566.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21c60]
>[ 10566.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21c60] width 2880 pitch 11520 (/4 2880)
>[ 10566.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a9d8]
>[ 10566.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a9d8] width 2880 pitch 11520 (/4 2880)
>[ 10566.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0008]
>[ 10566.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0008] width 2880 pitch 11520 (/4 2880)
>[ 10567.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7df0]
>[ 10567.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7df0] width 2880 pitch 11520 (/4 2880)
>[ 10567.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21c60]
>[ 10567.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21c60] width 2880 pitch 11520 (/4 2880)
>[ 10567.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0008]
>[ 10567.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0008] width 2880 pitch 11520 (/4 2880)
>[ 10567.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0008]
>[ 10567.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0008] width 2880 pitch 11520 (/4 2880)
>[ 10568.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95af6f0]
>[ 10568.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95af6f0] width 2880 pitch 11520 (/4 2880)
>[ 10568.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99244d0]
>[ 10568.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99244d0] width 2880 pitch 11520 (/4 2880)
>[ 10568.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2668]
>[ 10568.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2668] width 2880 pitch 11520 (/4 2880)
>[ 10568.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850e10]
>[ 10568.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850e10] width 2880 pitch 11520 (/4 2880)
>[ 10568.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850e10]
>[ 10568.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850e10] width 2880 pitch 11520 (/4 2880)
>[ 10619.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a69d8]
>[ 10619.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a69d8] width 2880 pitch 11520 (/4 2880)
>[ 10619.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10619.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10619.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98babc8]
>[ 10619.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98babc8] width 2880 pitch 11520 (/4 2880)
>[ 10619.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10619.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10619.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10619.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10623.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10623.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10623.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10623.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10623.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90780]
>[ 10623.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90780] width 2880 pitch 11520 (/4 2880)
>[ 10623.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8d70]
>[ 10623.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8d70] width 2880 pitch 11520 (/4 2880)
>[ 10623.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98babc8]
>[ 10623.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98babc8] width 2880 pitch 11520 (/4 2880)
>[ 10623.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a69d8]
>[ 10623.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a69d8] width 2880 pitch 11520 (/4 2880)
>[ 10623.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10623.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10623.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8d70]
>[ 10623.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8d70] width 2880 pitch 11520 (/4 2880)
>[ 10624.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8d70]
>[ 10624.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8d70] width 2880 pitch 11520 (/4 2880)
>[ 10624.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10624.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10624.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21c90]
>[ 10624.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21c90] width 2880 pitch 11520 (/4 2880)
>[ 10624.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a69d8]
>[ 10624.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a69d8] width 2880 pitch 11520 (/4 2880)
>[ 10624.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10624.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10625.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2dd0]
>[ 10625.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2dd0] width 2880 pitch 11520 (/4 2880)
>[ 10625.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90780]
>[ 10625.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90780] width 2880 pitch 11520 (/4 2880)
>[ 10625.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2eb08]
>[ 10625.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2eb08] width 2880 pitch 11520 (/4 2880)
>[ 10625.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24508]
>[ 10625.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24508] width 2880 pitch 11520 (/4 2880)
>[ 10627.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2feb8]
>[ 10628.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2feb8] width 2880 pitch 11520 (/4 2880)
>[ 10628.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8d70]
>[ 10628.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8d70] width 2880 pitch 11520 (/4 2880)
>[ 10628.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0448]
>[ 10628.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0448] width 2880 pitch 11520 (/4 2880)
>[ 10628.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832110]
>[ 10628.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832110] width 2880 pitch 11520 (/4 2880)
>[ 10628.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24508]
>[ 10628.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24508] width 2880 pitch 11520 (/4 2880)
>[ 10628.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8d70]
>[ 10628.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8d70] width 2880 pitch 11520 (/4 2880)
>[ 10628.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea2c8]
>[ 10628.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea2c8] width 2880 pitch 11520 (/4 2880)
>[ 10628.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2d40]
>[ 10628.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2d40] width 2880 pitch 11520 (/4 2880)
>[ 10628.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b308]
>[ 10628.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b308] width 2880 pitch 11520 (/4 2880)
>[ 10628.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2d40]
>[ 10628.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2d40] width 2880 pitch 11520 (/4 2880)
>[ 10630.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2f150]
>[ 10630.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2f150] width 2880 pitch 11520 (/4 2880)
>[ 10679.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24508]
>[ 10679.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24508] width 2880 pitch 11520 (/4 2880)
>[ 10679.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10679.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10679.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10679.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10679.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd578]
>[ 10679.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd578] width 2880 pitch 11520 (/4 2880)
>[ 10679.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892290]
>[ 10679.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892290] width 2880 pitch 11520 (/4 2880)
>[ 10679.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3dca8]
>[ 10679.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3dca8] width 2880 pitch 11520 (/4 2880)
>[ 10679.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10679.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10679.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b308]
>[ 10679.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b308] width 2880 pitch 11520 (/4 2880)
>[ 10679.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2020]
>[ 10679.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2020] width 2880 pitch 11520 (/4 2880)
>[ 10679.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b680]
>[ 10679.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b680] width 2880 pitch 11520 (/4 2880)
>[ 10683.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c252d8]
>[ 10683.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c252d8] width 2880 pitch 11520 (/4 2880)
>[ 10683.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10683.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10683.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10683.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10683.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10683.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10683.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd4d0]
>[ 10683.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd4d0] width 2880 pitch 11520 (/4 2880)
>[ 10683.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10683.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10683.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd4d0]
>[ 10684.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd4d0] width 2880 pitch 11520 (/4 2880)
>[ 10684.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10684.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10684.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bd4d0]
>[ 10684.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bd4d0] width 2880 pitch 11520 (/4 2880)
>[ 10738.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9899c98]
>[ 10738.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9899c98] width 2880 pitch 11520 (/4 2880)
>[ 10738.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90780]
>[ 10738.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90780] width 2880 pitch 11520 (/4 2880)
>[ 10738.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9683798]
>[ 10738.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9683798] width 2880 pitch 11520 (/4 2880)
>[ 10738.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10738.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10738.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10738.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10738.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892290]
>[ 10738.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892290] width 2880 pitch 11520 (/4 2880)
>[ 10738.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd578]
>[ 10738.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd578] width 2880 pitch 11520 (/4 2880)
>[ 10738.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24508]
>[ 10738.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24508] width 2880 pitch 11520 (/4 2880)
>[ 10742.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10742.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10742.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10742.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10742.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd578]
>[ 10742.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd578] width 2880 pitch 11520 (/4 2880)
>[ 10742.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2feb8]
>[ 10742.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2feb8] width 2880 pitch 11520 (/4 2880)
>[ 10742.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e3c0]
>[ 10742.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e3c0] width 2880 pitch 11520 (/4 2880)
>[ 10742.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2020]
>[ 10742.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2020] width 2880 pitch 11520 (/4 2880)
>[ 10742.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10742.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10742.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd578]
>[ 10742.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd578] width 2880 pitch 11520 (/4 2880)
>[ 10742.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af11d8]
>[ 10742.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af11d8] width 2880 pitch 11520 (/4 2880)
>[ 10742.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10742.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10742.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c2020]
>[ 10742.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c2020] width 2880 pitch 11520 (/4 2880)
>[ 10742.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10742.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10743.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd578]
>[ 10743.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd578] width 2880 pitch 11520 (/4 2880)
>[ 10743.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[ 10743.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[ 10746.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9659f90]
>[ 10747.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9659f90] width 2880 pitch 11520 (/4 2880)
>[ 10747.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9af38]
>[ 10747.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9af38] width 2880 pitch 11520 (/4 2880)
>[ 10747.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671500]
>[ 10747.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671500] width 2880 pitch 11520 (/4 2880)
>[ 10747.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a178]
>[ 10747.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a178] width 2880 pitch 11520 (/4 2880)
>[ 10747.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54ec0]
>[ 10747.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54ec0] width 2880 pitch 11520 (/4 2880)
>[ 10747.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a78]
>[ 10747.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a78] width 2880 pitch 11520 (/4 2880)
>[ 10747.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10747.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10747.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 10747.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 10747.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10747.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10747.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a78]
>[ 10747.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a78] width 2880 pitch 11520 (/4 2880)
>[ 10747.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10747.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10761.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90550]
>[ 10761.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90550] width 2880 pitch 11520 (/4 2880)
>[ 10761.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93828]
>[ 10761.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93828] width 2880 pitch 11520 (/4 2880)
>[ 10762.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0be8]
>[ 10762.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0be8] width 2880 pitch 11520 (/4 2880)
>[ 10762.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90550]
>[ 10762.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90550] width 2880 pitch 11520 (/4 2880)
>[ 10762.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93828]
>[ 10763.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93828] width 2880 pitch 11520 (/4 2880)
>[ 10763.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce1648]
>[ 10763.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce1648] width 2880 pitch 11520 (/4 2880)
>[ 10763.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833ef8]
>[ 10763.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833ef8] width 2880 pitch 11520 (/4 2880)
>[ 10763.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10763.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10763.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac4f38]
>[ 10763.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac4f38] width 2880 pitch 11520 (/4 2880)
>[ 10764.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93828]
>[ 10764.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93828] width 2880 pitch 11520 (/4 2880)
>[ 10764.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac50b0]
>[ 10764.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac50b0] width 2880 pitch 11520 (/4 2880)
>[ 10764.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a78]
>[ 10764.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a78] width 2880 pitch 11520 (/4 2880)
>[ 10764.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10765.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10765.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966a010]
>[ 10765.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966a010] width 2880 pitch 11520 (/4 2880)
>[ 10765.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93cd0]
>[ 10765.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93cd0] width 2880 pitch 11520 (/4 2880)
>[ 10765.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90550]
>[ 10765.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90550] width 2880 pitch 11520 (/4 2880)
>[ 10765.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90550]
>[ 10765.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90550] width 2880 pitch 11520 (/4 2880)
>[ 10766.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a78]
>[ 10766.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a78] width 2880 pitch 11520 (/4 2880)
>[ 10766.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93828]
>[ 10766.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93828] width 2880 pitch 11520 (/4 2880)
>[ 10766.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90550]
>[ 10766.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90550] width 2880 pitch 11520 (/4 2880)
>[ 10767.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10767.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10767.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac50b0]
>[ 10767.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac50b0] width 2880 pitch 11520 (/4 2880)
>[ 10767.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2afc8]
>[ 10767.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2afc8] width 2880 pitch 11520 (/4 2880)
>[ 10767.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a78]
>[ 10768.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a78] width 2880 pitch 11520 (/4 2880)
>[ 10799.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10799.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10799.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce1198]
>[ 10799.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce1198] width 2880 pitch 11520 (/4 2880)
>[ 10799.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3588]
>[ 10799.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3588] width 2880 pitch 11520 (/4 2880)
>[ 10799.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9657be0]
>[ 10799.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9657be0] width 2880 pitch 11520 (/4 2880)
>[ 10803.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3090]
>[ 10803.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3090] width 2880 pitch 11520 (/4 2880)
>[ 10803.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3090]
>[ 10803.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3090] width 2880 pitch 11520 (/4 2880)
>[ 10803.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 10803.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 10803.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9657be0]
>[ 10803.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9657be0] width 2880 pitch 11520 (/4 2880)
>[ 10803.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 10803.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 10803.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ec2c0]
>[ 10803.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ec2c0] width 2880 pitch 11520 (/4 2880)
>[ 10803.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3090]
>[ 10803.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3090] width 2880 pitch 11520 (/4 2880)
>[ 10803.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fd78]
>[ 10803.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fd78] width 2880 pitch 11520 (/4 2880)
>[ 10803.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857f80]
>[ 10804.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857f80] width 2880 pitch 11520 (/4 2880)
>[ 10804.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x988fd78]
>[ 10804.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x988fd78] width 2880 pitch 11520 (/4 2880)
>[ 10804.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e53f8]
>[ 10804.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e53f8] width 2880 pitch 11520 (/4 2880)
>[ 10804.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9524488]
>[ 10804.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9524488] width 2880 pitch 11520 (/4 2880)
>[ 10805.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6718]
>[ 10805.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6718] width 2880 pitch 11520 (/4 2880)
>[ 10805.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10805.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10805.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10805.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10805.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95242f8]
>[ 10805.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95242f8] width 2880 pitch 11520 (/4 2880)
>[ 10805.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95242f8]
>[ 10805.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95242f8] width 2880 pitch 11520 (/4 2880)
>[ 10805.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6718]
>[ 10805.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6718] width 2880 pitch 11520 (/4 2880)
>[ 10805.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99240f8]
>[ 10805.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99240f8] width 2880 pitch 11520 (/4 2880)
>[ 10805.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ec2c0]
>[ 10805.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ec2c0] width 2880 pitch 11520 (/4 2880)
>[ 10810.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceca80]
>[ 10810.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceca80] width 2880 pitch 11520 (/4 2880)
>[ 10810.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce65c8]
>[ 10810.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce65c8] width 2880 pitch 11520 (/4 2880)
>[ 10810.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf64d0]
>[ 10810.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf64d0] width 2880 pitch 11520 (/4 2880)
>[ 10810.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10810.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10810.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10810.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10810.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce65c8]
>[ 10810.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce65c8] width 2880 pitch 11520 (/4 2880)
>[ 10810.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10810.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10810.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10810.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10810.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6e98]
>[ 10810.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6e98] width 2880 pitch 11520 (/4 2880)
>[ 10810.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10810.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10810.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6e98]
>[ 10810.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6e98] width 2880 pitch 11520 (/4 2880)
>[ 10810.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10810.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10810.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6e98]
>[ 10810.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6e98] width 2880 pitch 11520 (/4 2880)
>[ 10810.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10810.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10810.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6e98]
>[ 10810.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6e98] width 2880 pitch 11520 (/4 2880)
>[ 10810.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10810.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10811.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6808]
>[ 10811.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6808] width 2880 pitch 11520 (/4 2880)
>[ 10811.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce65c8]
>[ 10811.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce65c8] width 2880 pitch 11520 (/4 2880)
>[ 10811.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10811.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10811.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf64d0]
>[ 10811.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf64d0] width 2880 pitch 11520 (/4 2880)
>[ 10811.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10811.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10811.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf64d0]
>[ 10811.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf64d0] width 2880 pitch 11520 (/4 2880)
>[ 10812.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10812.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10812.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf64d0]
>[ 10812.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf64d0] width 2880 pitch 11520 (/4 2880)
>[ 10812.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10812.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10812.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6508]
>[ 10812.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6508] width 2880 pitch 11520 (/4 2880)
>[ 10812.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10812.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10813.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b288c8]
>[ 10813.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b288c8] width 2880 pitch 11520 (/4 2880)
>[ 10813.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce65c8]
>[ 10813.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce65c8] width 2880 pitch 11520 (/4 2880)
>[ 10813.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10813.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10813.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10813.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10816.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10816.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10817.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1d90]
>[ 10817.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1d90] width 2880 pitch 11520 (/4 2880)
>[ 10837.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10837.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10858.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0bfc0]
>[ 10858.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0bfc0] width 2880 pitch 11520 (/4 2880)
>[ 10858.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10858.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10858.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10858.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10858.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 10858.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 10858.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10858.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10859.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10859.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10859.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10859.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10860.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10860.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10860.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924010]
>[ 10860.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924010] width 2880 pitch 11520 (/4 2880)
>[ 10860.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924010]
>[ 10860.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924010] width 2880 pitch 11520 (/4 2880)
>[ 10860.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff268]
>[ 10860.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff268] width 2880 pitch 11520 (/4 2880)
>[ 10860.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e468]
>[ 10860.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e468] width 2880 pitch 11520 (/4 2880)
>[ 10860.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e468]
>[ 10860.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e468] width 2880 pitch 11520 (/4 2880)
>[ 10860.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 10860.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 10860.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c16158]
>[ 10861.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c16158] width 2880 pitch 11520 (/4 2880)
>[ 10863.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1020]
>[ 10863.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1020] width 2880 pitch 11520 (/4 2880)
>[ 10863.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6ed8]
>[ 10863.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6ed8] width 2880 pitch 11520 (/4 2880)
>[ 10864.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca60]
>[ 10864.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca60] width 2880 pitch 11520 (/4 2880)
>[ 10864.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e468]
>[ 10864.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e468] width 2880 pitch 11520 (/4 2880)
>[ 10864.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924010]
>[ 10864.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924010] width 2880 pitch 11520 (/4 2880)
>[ 10864.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6ed8]
>[ 10864.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6ed8] width 2880 pitch 11520 (/4 2880)
>[ 10865.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 10865.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 10865.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924010]
>[ 10865.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924010] width 2880 pitch 11520 (/4 2880)
>[ 10865.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9526d30]
>[ 10865.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9526d30] width 2880 pitch 11520 (/4 2880)
>[ 10865.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e468]
>[ 10865.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e468] width 2880 pitch 11520 (/4 2880)
>[ 10866.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e468]
>[ 10866.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e468] width 2880 pitch 11520 (/4 2880)
>[ 10866.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf71f8]
>[ 10866.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf71f8] width 2880 pitch 11520 (/4 2880)
>[ 10867.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6ed8]
>[ 10867.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6ed8] width 2880 pitch 11520 (/4 2880)
>[ 10867.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924010]
>[ 10867.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924010] width 2880 pitch 11520 (/4 2880)
>[ 10867.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24508]
>[ 10867.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24508] width 2880 pitch 11520 (/4 2880)
>[ 10867.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10867.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10867.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96501e0]
>[ 10867.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96501e0] width 2880 pitch 11520 (/4 2880)
>[ 10867.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af11d8]
>[ 10867.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af11d8] width 2880 pitch 11520 (/4 2880)
>[ 10868.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9ec8]
>[ 10868.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9ec8] width 2880 pitch 11520 (/4 2880)
>[ 10868.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af11d8]
>[ 10868.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af11d8] width 2880 pitch 11520 (/4 2880)
>[ 10868.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10868.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10868.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2feb8]
>[ 10868.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2feb8] width 2880 pitch 11520 (/4 2880)
>[ 10869.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af11d8]
>[ 10869.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af11d8] width 2880 pitch 11520 (/4 2880)
>[ 10869.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2eb08]
>[ 10869.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2eb08] width 2880 pitch 11520 (/4 2880)
>[ 10869.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10869.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10870.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c252d8]
>[ 10870.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c252d8] width 2880 pitch 11520 (/4 2880)
>[ 10874.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b90780]
>[ 10874.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b90780] width 2880 pitch 11520 (/4 2880)
>[ 10874.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892020]
>[ 10874.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892020] width 2880 pitch 11520 (/4 2880)
>[ 10874.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978140]
>[ 10874.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978140] width 2880 pitch 11520 (/4 2880)
>[ 10875.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2eb08]
>[ 10875.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2eb08] width 2880 pitch 11520 (/4 2880)
>[ 10875.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acc4c0]
>[ 10875.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acc4c0] width 2880 pitch 11520 (/4 2880)
>[ 10875.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25440]
>[ 10875.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25440] width 2880 pitch 11520 (/4 2880)
>[ 10875.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97315b8]
>[ 10875.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97315b8] width 2880 pitch 11520 (/4 2880)
>[ 10919.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850e10]
>[ 10919.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850e10] width 2880 pitch 11520 (/4 2880)
>[ 10919.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9850e10]
>[ 10919.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9850e10] width 2880 pitch 11520 (/4 2880)
>[ 10919.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10919.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10919.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10919.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10919.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10919.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10919.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e010]
>[ 10919.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e010] width 2880 pitch 11520 (/4 2880)
>[ 10919.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10919.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10919.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10919.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10923.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10923.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10923.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10923.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10923.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0f98]
>[ 10923.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0f98] width 2880 pitch 11520 (/4 2880)
>[ 10923.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5a550]
>[ 10923.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5a550] width 2880 pitch 11520 (/4 2880)
>[ 10923.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 10923.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 10923.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10923.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10923.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10923.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10923.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10923.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10923.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5a550]
>[ 10923.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5a550] width 2880 pitch 11520 (/4 2880)
>[ 10923.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 10923.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 10923.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10923.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10923.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2598]
>[ 10924.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2598] width 2880 pitch 11520 (/4 2880)
>[ 10924.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10924.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10924.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10924.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10925.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10925.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10925.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10925.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10925.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e010]
>[ 10925.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e010] width 2880 pitch 11520 (/4 2880)
>[ 10925.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 10925.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 10925.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2598]
>[ 10925.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2598] width 2880 pitch 11520 (/4 2880)
>[ 10925.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10925.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10925.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10925.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10925.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10925.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10925.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10925.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10925.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10925.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10925.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10925.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10925.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10925.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10925.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10925.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10939.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10939.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10939.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10939.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10939.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10939.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10939.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10939.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10939.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10939.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10939.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2240]
>[ 10939.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2240] width 2880 pitch 11520 (/4 2880)
>[ 10939.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10939.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10939.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a3318]
>[ 10939.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a3318] width 2880 pitch 11520 (/4 2880)
>[ 10939.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10939.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10939.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10939.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10939.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15d08]
>[ 10939.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15d08] width 2880 pitch 11520 (/4 2880)
>[ 10939.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10939.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10939.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10939.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10939.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe578]
>[ 10939.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe578] width 2880 pitch 11520 (/4 2880)
>[ 10939.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10939.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10940.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10940.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10940.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10940.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10940.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10940.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10940.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10940.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10940.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10941.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10941.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10941.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10941.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d20]
>[ 10941.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d20] width 2880 pitch 11520 (/4 2880)
>[ 10941.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 10941.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 10941.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10942.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10942.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10942.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10942.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 10942.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 10942.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10942.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10942.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10942.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10943.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10943.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10943.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10943.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10943.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 10943.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 10943.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 10943.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 10943.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10943.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10943.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10943.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10943.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10943.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10943.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10943.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10943.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10943.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10943.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10943.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10943.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10943.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10943.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10943.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10943.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10943.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10947.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10947.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10981.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10981.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10982.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10982.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10984.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10984.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10988.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 10989.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 10989.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10989.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10989.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 10989.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 10989.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fe580]
>[ 10989.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fe580] width 2880 pitch 11520 (/4 2880)
>[ 10989.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 10989.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 10989.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10989.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10990.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10990.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10990.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 10990.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 10990.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10990.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10990.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10990.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10990.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 10990.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 10991.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 10991.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 10991.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10991.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10991.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10991.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10991.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 10991.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 10991.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 10991.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 10995.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10995.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 10997.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 10997.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11009.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 11009.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 11009.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11009.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11009.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11009.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11009.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11009.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11010.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 11010.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 11010.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11010.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11010.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 11010.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 11010.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 11010.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 11011.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923fc8]
>[ 11011.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923fc8] width 2880 pitch 11520 (/4 2880)
>[ 11011.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a8c8]
>[ 11011.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a8c8] width 2880 pitch 11520 (/4 2880)
>[ 11011.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7df0]
>[ 11011.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7df0] width 2880 pitch 11520 (/4 2880)
>[ 11022.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 11022.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 11024.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11024.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11073.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 11073.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 11076.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11076.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11091.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6710]
>[ 11091.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6710] width 2880 pitch 11520 (/4 2880)
>[ 11091.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11091.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11092.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11092.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11092.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 11092.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 11092.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816000]
>[ 11092.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816000] width 2880 pitch 11520 (/4 2880)
>[ 11092.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 11092.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 11092.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 11093.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 11093.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816000]
>[ 11093.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816000] width 2880 pitch 11520 (/4 2880)
>[ 11093.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11093.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11094.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11094.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11094.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11094.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11094.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c138]
>[ 11094.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c138] width 2880 pitch 11520 (/4 2880)
>[ 11098.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11098.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11108.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11108.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11108.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 11108.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 11108.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11108.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11108.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11108.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11109.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11109.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11109.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833f88]
>[ 11109.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833f88] width 2880 pitch 11520 (/4 2880)
>[ 11109.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11109.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11109.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11109.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11109.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11109.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11110.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11110.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11110.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11110.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11110.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11110.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11110.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 11110.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 11123.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11123.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11123.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 11123.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 11123.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11123.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11123.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11123.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11124.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11124.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11124.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 11124.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 11124.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11124.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11124.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11124.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11124.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 11124.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 11124.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11124.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11124.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11125.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11125.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 11125.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 11125.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 11125.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 11125.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 11125.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 11125.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11125.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11125.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11125.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11146.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11146.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11146.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 11146.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 11146.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eba80]
>[ 11146.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eba80] width 2880 pitch 11520 (/4 2880)
>[ 11146.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11146.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11147.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a02148]
>[ 11147.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a02148] width 2880 pitch 11520 (/4 2880)
>[ 11147.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf71f8]
>[ 11147.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf71f8] width 2880 pitch 11520 (/4 2880)
>[ 11147.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11147.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11147.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 11148.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 11148.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11148.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11148.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97706e8]
>[ 11148.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97706e8] width 2880 pitch 11520 (/4 2880)
>[ 11149.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[ 11149.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[ 11149.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11149.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11149.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11149.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11149.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab0cb8]
>[ 11149.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab0cb8] width 2880 pitch 11520 (/4 2880)
>[ 11149.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf370]
>[ 11150.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf370] width 2880 pitch 11520 (/4 2880)
>[ 11150.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8280]
>[ 11150.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8280] width 2880 pitch 11520 (/4 2880)
>[ 11150.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11150.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11150.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11150.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11150.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11150.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11150.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11150.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11178.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11178.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11178.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11178.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11179.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11179.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11179.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11179.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11179.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11179.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11179.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11179.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11180.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11180.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11180.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11180.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11181.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11181.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11182.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b88020]
>[ 11182.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b88020] width 2880 pitch 11520 (/4 2880)
>[ 11182.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11182.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11182.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca88]
>[ 11182.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca88] width 2880 pitch 11520 (/4 2880)
>[ 11182.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11182.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11182.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 11182.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 11182.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a135f0]
>[ 11182.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a135f0] width 2880 pitch 11520 (/4 2880)
>[ 11185.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a02148]
>[ 11185.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a02148] width 2880 pitch 11520 (/4 2880)
>[ 11198.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27ea0]
>[ 11198.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27ea0] width 2880 pitch 11520 (/4 2880)
>[ 11198.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[ 11198.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[ 11198.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0828]
>[ 11198.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0828] width 2880 pitch 11520 (/4 2880)
>[ 11198.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11198.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11198.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a02148]
>[ 11199.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a02148] width 2880 pitch 11520 (/4 2880)
>[ 11199.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf71f8]
>[ 11199.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf71f8] width 2880 pitch 11520 (/4 2880)
>[ 11199.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857d20]
>[ 11199.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857d20] width 2880 pitch 11520 (/4 2880)
>[ 11200.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b826d0]
>[ 11200.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b826d0] width 2880 pitch 11520 (/4 2880)
>[ 11200.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 11200.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 11200.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0bfc0]
>[ 11200.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0bfc0] width 2880 pitch 11520 (/4 2880)
>[ 11200.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 11201.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 11201.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0bfc0]
>[ 11201.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0bfc0] width 2880 pitch 11520 (/4 2880)
>[ 11201.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 11201.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 11201.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0bfc0]
>[ 11201.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0bfc0] width 2880 pitch 11520 (/4 2880)
>[ 11219.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 11219.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 11219.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c16f0]
>[ 11219.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c16f0] width 2880 pitch 11520 (/4 2880)
>[ 11220.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba82c0]
>[ 11220.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba82c0] width 2880 pitch 11520 (/4 2880)
>[ 11220.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 11220.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 11220.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba82c0]
>[ 11220.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba82c0] width 2880 pitch 11520 (/4 2880)
>[ 11220.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11220.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11221.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c16f0]
>[ 11221.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c16f0] width 2880 pitch 11520 (/4 2880)
>[ 11221.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 11221.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 11221.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba82c0]
>[ 11221.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba82c0] width 2880 pitch 11520 (/4 2880)
>[ 11222.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11222.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11222.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c16f0]
>[ 11222.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c16f0] width 2880 pitch 11520 (/4 2880)
>[ 11223.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0c08]
>[ 11223.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0c08] width 2880 pitch 11520 (/4 2880)
>[ 11223.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3b9c8]
>[ 11223.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3b9c8] width 2880 pitch 11520 (/4 2880)
>[ 11223.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11223.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11223.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba82c0]
>[ 11223.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba82c0] width 2880 pitch 11520 (/4 2880)
>[ 11223.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3b9c8]
>[ 11224.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3b9c8] width 2880 pitch 11520 (/4 2880)
>[ 11224.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3b9c8]
>[ 11224.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3b9c8] width 2880 pitch 11520 (/4 2880)
>[ 11224.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11224.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11266.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431410]
>[ 11266.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431410] width 2880 pitch 11520 (/4 2880)
>[ 11266.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bc40]
>[ 11266.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bc40] width 2880 pitch 11520 (/4 2880)
>[ 11266.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431410]
>[ 11266.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431410] width 2880 pitch 11520 (/4 2880)
>[ 11266.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bc40]
>[ 11266.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bc40] width 2880 pitch 11520 (/4 2880)
>[ 11266.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431410]
>[ 11266.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431410] width 2880 pitch 11520 (/4 2880)
>[ 11266.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c16f0]
>[ 11266.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c16f0] width 2880 pitch 11520 (/4 2880)
>[ 11267.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11267.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11267.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98162c8]
>[ 11267.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98162c8] width 2880 pitch 11520 (/4 2880)
>[ 11267.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11267.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11267.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98162c8]
>[ 11267.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98162c8] width 2880 pitch 11520 (/4 2880)
>[ 11267.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11267.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11268.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98162c8]
>[ 11268.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98162c8] width 2880 pitch 11520 (/4 2880)
>[ 11268.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11268.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11269.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98162c8]
>[ 11269.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98162c8] width 2880 pitch 11520 (/4 2880)
>[ 11269.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11269.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11269.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11269.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11270.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c16f0]
>[ 11270.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c16f0] width 2880 pitch 11520 (/4 2880)
>[ 11270.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11270.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11270.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 11270.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 11270.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 11270.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 11270.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 11270.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 11270.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 11270.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 11288.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11288.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11313.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11313.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11316.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcda0]
>[ 11316.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcda0] width 2880 pitch 11520 (/4 2880)
>[ 11320.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcda0]
>[ 11320.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcda0] width 2880 pitch 11520 (/4 2880)
>[ 11321.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fcda0]
>[ 11321.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fcda0] width 2880 pitch 11520 (/4 2880)
>[ 11326.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11326.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11338.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd890]
>[ 11338.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd890] width 2880 pitch 11520 (/4 2880)
>[ 11338.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11338.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11338.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd890]
>[ 11338.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd890] width 2880 pitch 11520 (/4 2880)
>[ 11338.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11338.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11338.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd890]
>[ 11338.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd890] width 2880 pitch 11520 (/4 2880)
>[ 11338.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11338.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11338.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc0548]
>[ 11338.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc0548] width 2880 pitch 11520 (/4 2880)
>[ 11338.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a8658]
>[ 11338.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a8658] width 2880 pitch 11520 (/4 2880)
>[ 11338.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11338.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11338.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11338.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11338.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9856470]
>[ 11338.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9856470] width 2880 pitch 11520 (/4 2880)
>[ 11342.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1eb0]
>[ 11342.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1eb0] width 2880 pitch 11520 (/4 2880)
>[ 11342.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11342.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11342.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 11342.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 11342.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11342.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11342.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11342.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11342.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11342.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11342.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11342.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11342.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 11342.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 11342.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11342.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11342.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11342.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11342.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11342.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11342.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11343.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11343.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 11343.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 11344.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11344.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11344.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11344.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11344.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11344.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11344.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11344.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11344.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11344.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11344.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11344.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11344.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11344.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11344.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11344.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11344.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11344.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833368]
>[ 11344.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833368] width 2880 pitch 11520 (/4 2880)
>[ 11344.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833de8]
>[ 11344.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833de8] width 2880 pitch 11520 (/4 2880)
>[ 11518.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11518.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11518.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11518.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11518.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11518.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11518.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11518.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11518.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11518.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11518.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 11518.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 11518.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11518.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11518.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11518.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11518.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11518.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11518.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11518.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11518.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11518.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11518.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11518.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11522.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11522.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11522.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11522.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11522.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11522.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11522.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11522.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11522.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11522.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11522.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11522.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11522.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11522.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11522.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11522.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11522.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11523.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11523.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11523.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11523.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11523.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11523.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11523.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11523.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11523.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11551.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11551.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11551.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11551.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11551.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11551.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11551.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11551.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11551.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11551.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11551.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11551.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11551.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11551.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11551.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11551.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11551.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11551.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11551.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11551.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11551.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11551.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11552.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11552.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11552.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11552.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11552.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11552.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11552.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11552.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11552.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11552.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11552.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11552.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11552.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11552.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11552.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11649.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11649.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11651.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11651.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11652.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11652.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11654.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830a70]
>[ 11654.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830a70] width 2880 pitch 11520 (/4 2880)
>[ 11717.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11717.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11729.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11729.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11729.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11729.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11729.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11729.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11729.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11729.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11730.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11730.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11730.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11730.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11730.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11731.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11731.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11731.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11731.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11731.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11732.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11732.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11732.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11732.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11732.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11732.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11733.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 11733.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 11733.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11733.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11733.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 11733.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 11747.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 11747.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 11748.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11748.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11748.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11748.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11748.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11748.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11748.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11748.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11748.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11749.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11749.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11750.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11750.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11750.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11750.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11750.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11750.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11750.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11754.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11754.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11754.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 11754.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 11754.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11754.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11754.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6710]
>[ 11754.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6710] width 2880 pitch 11520 (/4 2880)
>[ 11754.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11754.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11754.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11754.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11755.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11755.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11755.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11755.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11755.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 11755.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 11755.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 11755.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 11757.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11757.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11757.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11757.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11757.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 11757.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 11757.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11757.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11757.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6710]
>[ 11758.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6710] width 2880 pitch 11520 (/4 2880)
>[ 11758.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11758.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11759.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b39e8]
>[ 11759.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b39e8] width 2880 pitch 11520 (/4 2880)
>[ 11759.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11759.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11759.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a12398]
>[ 11759.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a12398] width 2880 pitch 11520 (/4 2880)
>[ 11759.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11759.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11760.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11760.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11760.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11760.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11761.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf740]
>[ 11761.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf740] width 2880 pitch 11520 (/4 2880)
>[ 11761.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6710]
>[ 11761.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6710] width 2880 pitch 11520 (/4 2880)
>[ 11761.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf740]
>[ 11761.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf740] width 2880 pitch 11520 (/4 2880)
>[ 11762.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772d28]
>[ 11762.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772d28] width 2880 pitch 11520 (/4 2880)
>[ 11762.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a652a0]
>[ 11762.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a652a0] width 2880 pitch 11520 (/4 2880)
>[ 11762.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1670]
>[ 11762.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1670] width 2880 pitch 11520 (/4 2880)
>[ 11766.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11766.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11766.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9939000]
>[ 11766.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9939000] width 2880 pitch 11520 (/4 2880)
>[ 11767.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57b40]
>[ 11767.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57b40] width 2880 pitch 11520 (/4 2880)
>[ 11767.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57b40]
>[ 11767.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57b40] width 2880 pitch 11520 (/4 2880)
>[ 11767.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481788]
>[ 11767.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481788] width 2880 pitch 11520 (/4 2880)
>[ 11767.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9939000]
>[ 11767.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9939000] width 2880 pitch 11520 (/4 2880)
>[ 11768.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2f070]
>[ 11768.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2f070] width 2880 pitch 11520 (/4 2880)
>[ 11768.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9879d80]
>[ 11769.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9879d80] width 2880 pitch 11520 (/4 2880)
>[ 11769.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c57b40]
>[ 11769.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c57b40] width 2880 pitch 11520 (/4 2880)
>[ 11769.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9481788]
>[ 11769.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9481788] width 2880 pitch 11520 (/4 2880)
>[ 11770.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9879d80]
>[ 11770.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9879d80] width 2880 pitch 11520 (/4 2880)
>[ 11770.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11770.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11770.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431228]
>[ 11770.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431228] width 2880 pitch 11520 (/4 2880)
>[ 11770.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11770.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11770.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11770.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11822.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11822.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11822.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11822.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11822.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11822.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11822.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11822.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11822.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11822.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11822.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11822.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11822.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11822.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11822.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11822.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11822.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11822.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11822.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11822.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11822.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11822.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11822.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11822.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11822.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11822.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11822.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11822.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11822.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11822.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11822.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11822.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11822.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11822.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11822.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11822.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11823.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11823.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11823.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11823.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11823.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11823.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11823.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11823.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11823.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11823.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11823.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11823.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11823.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11823.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11823.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11823.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11823.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11823.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11823.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11823.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11823.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11823.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11823.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11823.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11823.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11823.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11823.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11823.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11824.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11824.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f8f48]
>[ 11824.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f8f48] width 2880 pitch 11520 (/4 2880)
>[ 11824.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11824.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11824.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11824.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11824.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11824.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11824.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11824.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11824.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 11824.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 11825.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11825.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11825.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11825.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11825.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11825.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11825.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11825.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11829.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11829.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11833.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11833.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11836.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11836.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11838.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11838.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11849.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11849.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11849.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11849.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11850.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11850.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11850.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11850.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11850.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11850.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11850.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11850.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11850.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11851.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11851.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11851.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11851.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11851.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11852.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11852.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11852.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11852.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11853.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b93e78]
>[ 11853.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b93e78] width 2880 pitch 11520 (/4 2880)
>[ 11853.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6dc8]
>[ 11853.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6dc8] width 2880 pitch 11520 (/4 2880)
>[ 11854.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11854.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11854.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11854.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11854.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11854.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11854.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11854.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11877.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd890]
>[ 11877.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd890] width 2880 pitch 11520 (/4 2880)
>[ 11880.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11880.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11902.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 11902.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 11902.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8720]
>[ 11902.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8720] width 2880 pitch 11520 (/4 2880)
>[ 11903.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11903.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11903.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59640]
>[ 11903.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59640] width 2880 pitch 11520 (/4 2880)
>[ 11903.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11903.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11904.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c60]
>[ 11904.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c60] width 2880 pitch 11520 (/4 2880)
>[ 11904.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11904.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11904.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9933770]
>[ 11904.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9933770] width 2880 pitch 11520 (/4 2880)
>[ 11904.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23558]
>[ 11905.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23558] width 2880 pitch 11520 (/4 2880)
>[ 11905.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[ 11905.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[ 11924.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceebb8]
>[ 11924.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceebb8] width 2880 pitch 11520 (/4 2880)
>[ 11924.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11924.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11924.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 11924.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 11924.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11924.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11924.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11924.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11924.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 11924.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 11925.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11925.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11925.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11925.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11925.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11925.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11925.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11925.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11925.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11925.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11925.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11925.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11925.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11926.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11926.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11926.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11926.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11926.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11926.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 11926.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 11927.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11927.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11928.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 11928.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 11929.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9933770]
>[ 11929.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9933770] width 2880 pitch 11520 (/4 2880)
>[ 11930.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceebb8]
>[ 11930.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceebb8] width 2880 pitch 11520 (/4 2880)
>[ 11930.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 11930.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 11931.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 11931.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 11937.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11937.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11937.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11937.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11937.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944ef50]
>[ 11937.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944ef50] width 2880 pitch 11520 (/4 2880)
>[ 11937.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 11937.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 11937.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11937.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11938.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460c30]
>[ 11938.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460c30] width 2880 pitch 11520 (/4 2880)
>[ 11938.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf0180]
>[ 11938.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf0180] width 2880 pitch 11520 (/4 2880)
>[ 11938.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2da8]
>[ 11938.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2da8] width 2880 pitch 11520 (/4 2880)
>[ 11938.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456680]
>[ 11938.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456680] width 2880 pitch 11520 (/4 2880)
>[ 11938.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2da8]
>[ 11938.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2da8] width 2880 pitch 11520 (/4 2880)
>[ 11938.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 11938.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 11938.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24bd0]
>[ 11938.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24bd0] width 2880 pitch 11520 (/4 2880)
>[ 11938.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456680]
>[ 11938.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456680] width 2880 pitch 11520 (/4 2880)
>[ 11938.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2da8]
>[ 11938.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2da8] width 2880 pitch 11520 (/4 2880)
>[ 11938.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cec808]
>[ 11938.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cec808] width 2880 pitch 11520 (/4 2880)
>[ 11938.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 11939.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 11939.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24bd0]
>[ 11939.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24bd0] width 2880 pitch 11520 (/4 2880)
>[ 11939.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9456680]
>[ 11939.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9456680] width 2880 pitch 11520 (/4 2880)
>[ 11939.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2da8]
>[ 11939.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2da8] width 2880 pitch 11520 (/4 2880)
>[ 11941.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9534680]
>[ 11941.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9534680] width 2880 pitch 11520 (/4 2880)
>[ 11941.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98963e8]
>[ 11941.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98963e8] width 2880 pitch 11520 (/4 2880)
>[ 11941.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98963e8]
>[ 11941.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98963e8] width 2880 pitch 11520 (/4 2880)
>[ 11942.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98963e8]
>[ 11942.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98963e8] width 2880 pitch 11520 (/4 2880)
>[ 11942.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98963e8]
>[ 11942.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98963e8] width 2880 pitch 11520 (/4 2880)
>[ 11942.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e7d78]
>[ 11942.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e7d78] width 2880 pitch 11520 (/4 2880)
>[ 11942.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e7d78]
>[ 11942.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e7d78] width 2880 pitch 11520 (/4 2880)
>[ 11943.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11943.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11944.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11944.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11944.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11944.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11944.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 11944.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 11944.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955d720]
>[ 11944.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955d720] width 2880 pitch 11520 (/4 2880)
>[ 11944.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 11944.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 11945.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 11945.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 11945.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11945.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11945.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 11945.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 11945.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11945.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11945.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 11945.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 11945.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 11945.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 11952.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11952.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11954.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11954.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11963.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11963.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11971.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a2e0]
>[ 11971.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a2e0] width 2880 pitch 11520 (/4 2880)
>[ 11978.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 11978.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 11979.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515378]
>[ 11979.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515378] width 2880 pitch 11520 (/4 2880)
>[ 11983.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23558]
>[ 11983.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23558] width 2880 pitch 11520 (/4 2880)
>[ 12000.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12000.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12000.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12000.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12000.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12000.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12000.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12000.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12000.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12000.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12000.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12000.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12000.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12000.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12000.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12000.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12000.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12000.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12000.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12000.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12000.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12000.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12000.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12000.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12000.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12000.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12004.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12004.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12004.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b86a0]
>[ 12004.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b86a0] width 2880 pitch 11520 (/4 2880)
>[ 12004.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12004.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12004.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b86a0]
>[ 12004.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b86a0] width 2880 pitch 11520 (/4 2880)
>[ 12004.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12004.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12004.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b86a0]
>[ 12004.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b86a0] width 2880 pitch 11520 (/4 2880)
>[ 12004.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12004.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12004.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b86a0]
>[ 12004.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b86a0] width 2880 pitch 11520 (/4 2880)
>[ 12004.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12004.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12004.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b86a0]
>[ 12004.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b86a0] width 2880 pitch 11520 (/4 2880)
>[ 12005.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12005.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12005.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12005.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12005.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12005.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12005.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdfd0]
>[ 12005.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdfd0] width 2880 pitch 11520 (/4 2880)
>[ 12005.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12005.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12005.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12005.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12005.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12005.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12005.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12005.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12014.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12014.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12019.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12019.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12041.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12041.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12041.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12041.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12042.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12042.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12042.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12042.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12042.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12042.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12042.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12042.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12042.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12042.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12042.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460020]
>[ 12042.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460020] width 2880 pitch 11520 (/4 2880)
>[ 12042.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12043.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12043.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12043.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12043.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12043.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12043.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12043.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12043.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 12043.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 12044.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 12044.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 12044.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12044.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12044.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12044.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12044.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef428]
>[ 12044.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef428] width 2880 pitch 11520 (/4 2880)
>[ 12044.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12044.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12044.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[ 12044.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[ 12044.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12045.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12045.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9933770]
>[ 12045.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9933770] width 2880 pitch 11520 (/4 2880)
>[ 12045.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12045.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12045.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef428]
>[ 12045.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef428] width 2880 pitch 11520 (/4 2880)
>[ 12045.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12046.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12046.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef428]
>[ 12046.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef428] width 2880 pitch 11520 (/4 2880)
>[ 12046.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[ 12046.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[ 12046.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 12047.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 12047.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12047.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12047.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12047.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12048.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12048.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12048.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c60]
>[ 12048.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c60] width 2880 pitch 11520 (/4 2880)
>[ 12048.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 12048.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 12049.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12049.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12049.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12049.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12049.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12049.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12049.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12049.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12049.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[ 12049.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[ 12050.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 12050.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 12051.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 12051.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 12051.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef428]
>[ 12051.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef428] width 2880 pitch 11520 (/4 2880)
>[ 12051.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12051.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12052.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 12052.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 12053.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12053.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12053.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 12053.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 12053.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 12053.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 12054.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 12054.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 12054.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12054.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12054.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 12054.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 12054.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95479d8]
>[ 12054.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95479d8] width 2880 pitch 11520 (/4 2880)
>[ 12054.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455810]
>[ 12054.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455810] width 2880 pitch 11520 (/4 2880)
>[ 12054.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12055.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12055.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401810]
>[ 12055.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401810] width 2880 pitch 11520 (/4 2880)
>[ 12055.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9384318]
>[ 12055.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9384318] width 2880 pitch 11520 (/4 2880)
>[ 12055.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401810]
>[ 12055.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401810] width 2880 pitch 11520 (/4 2880)
>[ 12055.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12056.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12056.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9346db8]
>[ 12056.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9346db8] width 2880 pitch 11520 (/4 2880)
>[ 12056.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12056.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12056.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12056.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12057.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 12057.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 12057.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 12057.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 12057.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ff90]
>[ 12057.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ff90] width 2880 pitch 11520 (/4 2880)
>[ 12057.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b720]
>[ 12057.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b720] width 2880 pitch 11520 (/4 2880)
>[ 12057.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ff90]
>[ 12057.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ff90] width 2880 pitch 11520 (/4 2880)
>[ 12057.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 12057.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 12071.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfe568]
>[ 12071.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfe568] width 2880 pitch 11520 (/4 2880)
>[ 12071.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 12071.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 12071.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 12071.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 12071.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 12071.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 12072.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12072.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12072.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 12072.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 12072.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12072.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12073.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c60]
>[ 12073.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c60] width 2880 pitch 11520 (/4 2880)
>[ 12073.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12073.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12073.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12073.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12073.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12073.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12074.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431328]
>[ 12074.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431328] width 2880 pitch 11520 (/4 2880)
>[ 12074.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9933770]
>[ 12074.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9933770] width 2880 pitch 11520 (/4 2880)
>[ 12074.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401718]
>[ 12074.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401718] width 2880 pitch 11520 (/4 2880)
>[ 12074.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643770]
>[ 12074.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643770] width 2880 pitch 11520 (/4 2880)
>[ 12100.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12100.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12100.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8af8]
>[ 12100.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8af8] width 2880 pitch 11520 (/4 2880)
>[ 12100.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[ 12101.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[ 12101.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9561030]
>[ 12101.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9561030] width 2880 pitch 11520 (/4 2880)
>[ 12101.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12101.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12101.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8af8]
>[ 12101.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8af8] width 2880 pitch 11520 (/4 2880)
>[ 12101.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafb60]
>[ 12101.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafb60] width 2880 pitch 11520 (/4 2880)
>[ 12101.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2318]
>[ 12101.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2318] width 2880 pitch 11520 (/4 2880)
>[ 12102.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12102.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12102.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12102.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12102.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12102.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12102.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12102.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12102.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8af8]
>[ 12102.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8af8] width 2880 pitch 11520 (/4 2880)
>[ 12102.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9634980]
>[ 12102.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9634980] width 2880 pitch 11520 (/4 2880)
>[ 12103.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12103.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12103.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9634980]
>[ 12103.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9634980] width 2880 pitch 11520 (/4 2880)
>[ 12104.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df370]
>[ 12104.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df370] width 2880 pitch 11520 (/4 2880)
>[ 12104.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12104.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12104.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12104.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12104.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12104.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12106.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12106.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12110.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12110.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12114.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12114.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12115.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12115.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12115.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12115.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12115.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12115.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12115.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12115.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12115.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d00490]
>[ 12115.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d00490] width 2880 pitch 11520 (/4 2880)
>[ 12115.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12115.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12116.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12116.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12116.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12116.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12117.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac02b8]
>[ 12117.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac02b8] width 2880 pitch 11520 (/4 2880)
>[ 12117.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a137b8]
>[ 12117.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a137b8] width 2880 pitch 11520 (/4 2880)
>[ 12117.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975cd48]
>[ 12117.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975cd48] width 2880 pitch 11520 (/4 2880)
>[ 12117.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[ 12117.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[ 12118.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[ 12118.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[ 12118.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a137b8]
>[ 12118.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a137b8] width 2880 pitch 11520 (/4 2880)
>[ 12118.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972458]
>[ 12118.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972458] width 2880 pitch 11520 (/4 2880)
>[ 12118.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655200]
>[ 12118.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655200] width 2880 pitch 11520 (/4 2880)
>[ 12118.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11f78]
>[ 12118.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11f78] width 2880 pitch 11520 (/4 2880)
>[ 12119.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[ 12120.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[ 12120.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b960]
>[ 12120.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b960] width 2880 pitch 11520 (/4 2880)
>[ 12120.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772218]
>[ 12120.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772218] width 2880 pitch 11520 (/4 2880)
>[ 12120.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942aa50]
>[ 12120.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942aa50] width 2880 pitch 11520 (/4 2880)
>[ 12120.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b960]
>[ 12120.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b960] width 2880 pitch 11520 (/4 2880)
>[ 12124.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23838]
>[ 12124.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23838] width 2880 pitch 11520 (/4 2880)
>[ 12124.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1b58]
>[ 12124.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1b58] width 2880 pitch 11520 (/4 2880)
>[ 12124.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[ 12124.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[ 12124.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b960]
>[ 12124.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b960] width 2880 pitch 11520 (/4 2880)
>[ 12124.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942aa50]
>[ 12125.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942aa50] width 2880 pitch 11520 (/4 2880)
>[ 12125.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772218]
>[ 12125.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772218] width 2880 pitch 11520 (/4 2880)
>[ 12125.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08f50]
>[ 12125.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08f50] width 2880 pitch 11520 (/4 2880)
>[ 12125.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff688]
>[ 12125.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff688] width 2880 pitch 11520 (/4 2880)
>[ 12125.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2240]
>[ 12126.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2240] width 2880 pitch 11520 (/4 2880)
>[ 12126.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1b58]
>[ 12126.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1b58] width 2880 pitch 11520 (/4 2880)
>[ 12127.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[ 12128.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[ 12128.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1b58]
>[ 12128.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1b58] width 2880 pitch 11520 (/4 2880)
>[ 12128.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12128.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12128.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9925108]
>[ 12128.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9925108] width 2880 pitch 11520 (/4 2880)
>[ 12128.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12128.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12128.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb258]
>[ 12128.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb258] width 2880 pitch 11520 (/4 2880)
>[ 12146.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[ 12146.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[ 12146.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12146.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12147.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bad68]
>[ 12147.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bad68] width 2880 pitch 11520 (/4 2880)
>[ 12147.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb258]
>[ 12147.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb258] width 2880 pitch 11520 (/4 2880)
>[ 12147.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12147.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12147.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12147.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12157.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2080]
>[ 12157.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2080] width 2880 pitch 11520 (/4 2880)
>[ 12169.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12169.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12169.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[ 12169.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[ 12170.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941bae0]
>[ 12170.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941bae0] width 2880 pitch 11520 (/4 2880)
>[ 12170.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12170.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12170.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12170.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12170.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12170.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12170.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12170.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12170.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12170.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12175.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12175.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12179.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12179.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12179.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12179.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12179.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12179.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12179.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12179.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12179.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12179.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12179.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12179.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12179.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12179.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12183.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12183.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12183.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12183.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12183.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12183.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12183.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12183.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12183.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12183.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12183.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12184.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12184.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12184.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12184.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12184.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12184.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12184.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12184.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12184.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12184.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12184.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12184.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12184.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12184.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12184.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12185.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12185.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12185.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12185.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12185.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12185.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12185.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12185.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12185.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12185.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12185.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12185.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12185.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12185.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12185.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12185.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12185.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12185.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12185.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12185.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12185.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12185.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12185.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12185.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12185.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12185.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12185.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12185.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12191.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12191.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12191.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12191.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12191.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12191.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12191.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12191.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12191.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12191.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12191.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12191.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12191.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12191.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12191.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12191.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12191.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12191.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12191.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12191.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12191.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12191.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12191.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12191.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12191.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12191.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12191.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12191.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12195.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12195.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12195.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12195.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12195.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12195.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12195.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12195.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12195.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12195.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12195.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12195.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12195.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12195.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12195.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12195.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12195.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12195.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12195.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12195.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12195.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12195.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12195.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12195.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12195.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12195.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12195.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9669fd0]
>[ 12195.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9669fd0] width 2880 pitch 11520 (/4 2880)
>[ 12196.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12196.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12224.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12224.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12231.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12231.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12240.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12240.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12248.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c808]
>[ 12248.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c808] width 2880 pitch 11520 (/4 2880)
>[ 12255.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12255.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12291.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12291.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12292.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c808]
>[ 12292.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c808] width 2880 pitch 11520 (/4 2880)
>[ 12292.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12292.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12292.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12292.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12292.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12292.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12293.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12293.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12293.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12293.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12293.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94102b0]
>[ 12293.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94102b0] width 2880 pitch 11520 (/4 2880)
>[ 12294.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12294.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12294.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12294.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12294.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12294.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12295.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12295.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12295.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12295.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12295.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdf78]
>[ 12295.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdf78] width 2880 pitch 11520 (/4 2880)
>[ 12295.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d9f58]
>[ 12295.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d9f58] width 2880 pitch 11520 (/4 2880)
>[ 12295.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9629328]
>[ 12296.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9629328] width 2880 pitch 11520 (/4 2880)
>[ 12296.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x949b960]
>[ 12296.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x949b960] width 2880 pitch 11520 (/4 2880)
>[ 12303.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9baed38]
>[ 12303.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9baed38] width 2880 pitch 11520 (/4 2880)
>[ 12309.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7c88]
>[ 12309.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7c88] width 2880 pitch 11520 (/4 2880)
>[ 12309.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7c58]
>[ 12309.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7c58] width 2880 pitch 11520 (/4 2880)
>[ 12310.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97eb258]
>[ 12310.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97eb258] width 2880 pitch 11520 (/4 2880)
>[ 12319.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d09c38]
>[ 12319.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d09c38] width 2880 pitch 11520 (/4 2880)
>[ 12320.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d0f8]
>[ 12320.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d0f8] width 2880 pitch 11520 (/4 2880)
>[ 12321.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2080]
>[ 12321.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2080] width 2880 pitch 11520 (/4 2880)
>[ 12321.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c67040]
>[ 12321.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c67040] width 2880 pitch 11520 (/4 2880)
>[ 12321.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2080]
>[ 12321.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2080] width 2880 pitch 11520 (/4 2880)
>[ 12321.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c67040]
>[ 12321.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c67040] width 2880 pitch 11520 (/4 2880)
>[ 12321.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e608]
>[ 12321.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e608] width 2880 pitch 11520 (/4 2880)
>[ 12321.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e5d8]
>[ 12321.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e5d8] width 2880 pitch 11520 (/4 2880)
>[ 12321.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2080]
>[ 12321.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2080] width 2880 pitch 11520 (/4 2880)
>[ 12321.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c67040]
>[ 12321.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c67040] width 2880 pitch 11520 (/4 2880)
>[ 12321.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453bc0]
>[ 12321.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453bc0] width 2880 pitch 11520 (/4 2880)
>[ 12321.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e608]
>[ 12321.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e608] width 2880 pitch 11520 (/4 2880)
>[ 12321.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952e5d8]
>[ 12321.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952e5d8] width 2880 pitch 11520 (/4 2880)
>[ 12321.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2080]
>[ 12321.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2080] width 2880 pitch 11520 (/4 2880)
>[ 12321.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c67040]
>[ 12321.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c67040] width 2880 pitch 11520 (/4 2880)
>[ 12323.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9520070]
>[ 12323.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9520070] width 2880 pitch 11520 (/4 2880)
>[ 12325.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26860]
>[ 12325.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26860] width 2880 pitch 11520 (/4 2880)
>[ 12325.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d093b8]
>[ 12325.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d093b8] width 2880 pitch 11520 (/4 2880)
>[ 12325.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff2f0]
>[ 12325.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff2f0] width 2880 pitch 11520 (/4 2880)
>[ 12325.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26958]
>[ 12325.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26958] width 2880 pitch 11520 (/4 2880)
>[ 12325.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26900]
>[ 12325.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26900] width 2880 pitch 11520 (/4 2880)
>[ 12325.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26958]
>[ 12325.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26958] width 2880 pitch 11520 (/4 2880)
>[ 12325.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26900]
>[ 12325.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26900] width 2880 pitch 11520 (/4 2880)
>[ 12325.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26958]
>[ 12325.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26958] width 2880 pitch 11520 (/4 2880)
>[ 12325.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71b8]
>[ 12325.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71b8] width 2880 pitch 11520 (/4 2880)
>[ 12325.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26958]
>[ 12325.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26958] width 2880 pitch 11520 (/4 2880)
>[ 12325.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71b8]
>[ 12325.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71b8] width 2880 pitch 11520 (/4 2880)
>[ 12325.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26958]
>[ 12325.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26958] width 2880 pitch 11520 (/4 2880)
>[ 12325.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71b8]
>[ 12325.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71b8] width 2880 pitch 11520 (/4 2880)
>[ 12351.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf6f0]
>[ 12351.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf6f0] width 2880 pitch 11520 (/4 2880)
>[ 12355.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72bb0]
>[ 12355.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72bb0] width 2880 pitch 11520 (/4 2880)
>[ 12366.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac60a0]
>[ 12366.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac60a0] width 2880 pitch 11520 (/4 2880)
>[ 12369.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2dea8]
>[ 12369.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2dea8] width 2880 pitch 11520 (/4 2880)
>[ 12383.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d00638]
>[ 12383.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d00638] width 2880 pitch 11520 (/4 2880)
>[ 12383.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12383.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12383.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12383.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12383.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bad68]
>[ 12383.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bad68] width 2880 pitch 11520 (/4 2880)
>[ 12383.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72028]
>[ 12383.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72028] width 2880 pitch 11520 (/4 2880)
>[ 12396.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12396.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12396.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bad68]
>[ 12396.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bad68] width 2880 pitch 11520 (/4 2880)
>[ 12398.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72f48]
>[ 12398.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72f48] width 2880 pitch 11520 (/4 2880)
>[ 12398.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12398.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12398.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12398.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12398.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 12399.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 12399.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12399.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12399.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12399.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12399.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 12399.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 12399.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12399.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12400.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12400.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12400.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12400.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12400.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 12400.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 12400.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12400.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12400.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72f48]
>[ 12400.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72f48] width 2880 pitch 11520 (/4 2880)
>[ 12400.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12400.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12400.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb118]
>[ 12400.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb118] width 2880 pitch 11520 (/4 2880)
>[ 12401.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72f48]
>[ 12401.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72f48] width 2880 pitch 11520 (/4 2880)
>[ 12401.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72f48]
>[ 12401.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72f48] width 2880 pitch 11520 (/4 2880)
>[ 12402.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12402.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12404.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72f48]
>[ 12404.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72f48] width 2880 pitch 11520 (/4 2880)
>[ 12404.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 12404.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 12404.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12405.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12405.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 12405.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 12405.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 12405.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 12405.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 12405.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 12405.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12405.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12405.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 12406.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 12406.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12406.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12406.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 12406.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 12406.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 12406.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 12406.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 12406.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 12406.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 12406.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 12406.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12406.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12417.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 12417.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 12418.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 12418.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 12420.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 12420.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 12422.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 12422.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 12422.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12422.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12423.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c60]
>[ 12423.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c60] width 2880 pitch 11520 (/4 2880)
>[ 12423.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12423.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12423.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fde0]
>[ 12423.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fde0] width 2880 pitch 11520 (/4 2880)
>[ 12423.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 12423.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 12424.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 12424.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 12424.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 12424.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 12424.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 12424.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 12424.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e80]
>[ 12424.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e80] width 2880 pitch 11520 (/4 2880)
>[ 12424.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12425.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12425.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 12425.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 12425.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12425.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12426.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 12426.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 12426.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12426.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12426.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12426.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12426.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac19a0]
>[ 12426.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac19a0] width 2880 pitch 11520 (/4 2880)
>[ 12428.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12428.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12428.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12428.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12429.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12429.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12429.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12429.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12429.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12429.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12429.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12429.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12429.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12429.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12431.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12431.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12431.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12431.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12432.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12432.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12434.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12434.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12436.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e3c48]
>[ 12436.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e3c48] width 2880 pitch 11520 (/4 2880)
>[ 12437.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e3c48]
>[ 12437.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e3c48] width 2880 pitch 11520 (/4 2880)
>[ 12437.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72ff0]
>[ 12437.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72ff0] width 2880 pitch 11520 (/4 2880)
>[ 12437.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95352b0]
>[ 12437.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95352b0] width 2880 pitch 11520 (/4 2880)
>[ 12437.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94102b0]
>[ 12437.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94102b0] width 2880 pitch 11520 (/4 2880)
>[ 12437.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12437.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12437.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[ 12437.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[ 12445.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c808]
>[ 12445.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c808] width 2880 pitch 11520 (/4 2880)
>[ 12448.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12448.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12461.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12461.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12461.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12461.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12461.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12461.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12461.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12461.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12461.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12461.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12461.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12461.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12462.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12462.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12462.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dcd8]
>[ 12462.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dcd8] width 2880 pitch 11520 (/4 2880)
>[ 12462.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12462.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12462.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12462.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12463.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95352b0]
>[ 12463.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95352b0] width 2880 pitch 11520 (/4 2880)
>[ 12463.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dcd8]
>[ 12463.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dcd8] width 2880 pitch 11520 (/4 2880)
>[ 12465.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12465.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12465.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12465.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12466.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12466.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12466.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12466.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12468.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96348a8]
>[ 12468.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96348a8] width 2880 pitch 11520 (/4 2880)
>[ 12468.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12468.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12468.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12468.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12469.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12469.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12469.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12469.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12478.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12478.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12478.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12478.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12478.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12478.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12478.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12478.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12478.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945c808]
>[ 12478.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945c808] width 2880 pitch 11520 (/4 2880)
>[ 12487.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12487.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12487.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22070]
>[ 12487.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22070] width 2880 pitch 11520 (/4 2880)
>[ 12487.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12487.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12487.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12487.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12488.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aeba28]
>[ 12488.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aeba28] width 2880 pitch 11520 (/4 2880)
>[ 12488.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12488.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12488.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 12488.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 12488.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[ 12488.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[ 12488.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12488.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12488.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12489.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12489.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94522d8]
>[ 12489.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94522d8] width 2880 pitch 11520 (/4 2880)
>[ 12489.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95352b0]
>[ 12489.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95352b0] width 2880 pitch 11520 (/4 2880)
>[ 12489.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12489.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12490.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af730]
>[ 12490.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af730] width 2880 pitch 11520 (/4 2880)
>[ 12490.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[ 12490.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[ 12490.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95251a8]
>[ 12490.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95251a8] width 2880 pitch 11520 (/4 2880)
>[ 12490.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515768]
>[ 12490.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515768] width 2880 pitch 11520 (/4 2880)
>[ 12491.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96091d8]
>[ 12491.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96091d8] width 2880 pitch 11520 (/4 2880)
>[ 12492.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95251a8]
>[ 12492.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95251a8] width 2880 pitch 11520 (/4 2880)
>[ 12492.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9515768]
>[ 12492.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9515768] width 2880 pitch 11520 (/4 2880)
>[ 12492.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12492.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12494.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[ 12495.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[ 12529.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12529.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12529.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12529.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12530.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12530.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12530.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af730]
>[ 12530.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af730] width 2880 pitch 11520 (/4 2880)
>[ 12530.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c9c60]
>[ 12530.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c9c60] width 2880 pitch 11520 (/4 2880)
>[ 12530.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1e40]
>[ 12530.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1e40] width 2880 pitch 11520 (/4 2880)
>[ 12533.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 12533.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 12533.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a3cf8]
>[ 12533.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a3cf8] width 2880 pitch 11520 (/4 2880)
>[ 12534.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12534.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12534.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a02148]
>[ 12534.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a02148] width 2880 pitch 11520 (/4 2880)
>[ 12534.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950ef70]
>[ 12534.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950ef70] width 2880 pitch 11520 (/4 2880)
>[ 12534.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9857438]
>[ 12534.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9857438] width 2880 pitch 11520 (/4 2880)
>[ 12535.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9934ee0]
>[ 12535.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9934ee0] width 2880 pitch 11520 (/4 2880)
>[ 12655.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12655.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12655.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff778]
>[ 12655.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff778] width 2880 pitch 11520 (/4 2880)
>[ 12656.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12656.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12656.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12656.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12656.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94522d8]
>[ 12656.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94522d8] width 2880 pitch 11520 (/4 2880)
>[ 12656.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff778]
>[ 12656.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff778] width 2880 pitch 11520 (/4 2880)
>[ 12656.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 12656.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 12657.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12657.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12657.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94522d8]
>[ 12657.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94522d8] width 2880 pitch 11520 (/4 2880)
>[ 12657.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 12657.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 12658.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12658.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12658.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fd00]
>[ 12658.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fd00] width 2880 pitch 11520 (/4 2880)
>[ 12658.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94522d8]
>[ 12658.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94522d8] width 2880 pitch 11520 (/4 2880)
>[ 12658.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 12658.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 12658.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95250b8]
>[ 12658.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95250b8] width 2880 pitch 11520 (/4 2880)
>[ 12660.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94653d8]
>[ 12660.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94653d8] width 2880 pitch 11520 (/4 2880)
>[ 12662.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12662.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12662.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 12662.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 12662.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6f60]
>[ 12662.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6f60] width 2880 pitch 11520 (/4 2880)
>[ 12662.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 12662.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 12664.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932220]
>[ 12664.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932220] width 2880 pitch 11520 (/4 2880)
>[ 12677.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12677.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12677.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12677.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12677.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 12677.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 12677.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 12677.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 12677.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12677.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12678.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 12678.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 12679.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12679.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12679.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12679.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12679.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12679.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12681.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12681.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12681.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12681.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12682.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12682.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12682.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 12682.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 12682.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12682.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12682.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995c118]
>[ 12682.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995c118] width 2880 pitch 11520 (/4 2880)
>[ 12718.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12718.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12718.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12718.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12718.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12718.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12718.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 12718.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 12718.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12718.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12718.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 12718.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 12718.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12718.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12718.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12718.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12718.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12718.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12718.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6ec8]
>[ 12718.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6ec8] width 2880 pitch 11520 (/4 2880)
>[ 12722.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bea88]
>[ 12722.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bea88] width 2880 pitch 11520 (/4 2880)
>[ 12722.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961d430]
>[ 12722.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961d430] width 2880 pitch 11520 (/4 2880)
>[ 12722.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12722.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12722.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12722.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12722.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[ 12722.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[ 12722.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12722.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12722.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12722.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12722.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12723.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12723.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[ 12723.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[ 12723.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12723.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12723.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12723.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12723.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d390]
>[ 12723.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d390] width 2880 pitch 11520 (/4 2880)
>[ 12723.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12723.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12723.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b8faa0]
>[ 12723.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b8faa0] width 2880 pitch 11520 (/4 2880)
>[ 12724.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12724.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12724.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d390]
>[ 12724.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d390] width 2880 pitch 11520 (/4 2880)
>[ 12724.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12724.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12724.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12724.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12724.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12724.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12724.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d390]
>[ 12724.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d390] width 2880 pitch 11520 (/4 2880)
>[ 12724.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12724.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12724.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12724.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12724.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12724.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12724.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12724.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12724.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12724.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12724.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12724.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12724.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12724.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12731.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12731.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12731.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12731.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12731.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12731.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12731.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12731.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12731.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12731.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12731.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6a10]
>[ 12731.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6a10] width 2880 pitch 11520 (/4 2880)
>[ 12731.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12731.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12731.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12731.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12731.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12732.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12732.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6a10]
>[ 12732.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6a10] width 2880 pitch 11520 (/4 2880)
>[ 12732.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 12732.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 12732.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12732.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12732.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 12732.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 12733.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 12733.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 12736.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2290]
>[ 12736.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2290] width 2880 pitch 11520 (/4 2880)
>[ 12736.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12736.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12736.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 12736.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 12736.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 12736.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 12736.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2290]
>[ 12736.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2290] width 2880 pitch 11520 (/4 2880)
>[ 12736.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 12736.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 12736.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2290]
>[ 12736.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2290] width 2880 pitch 11520 (/4 2880)
>[ 12736.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12736.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12736.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12736.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12736.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12736.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12736.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12736.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12736.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 12736.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 12736.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953f128]
>[ 12736.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953f128] width 2880 pitch 11520 (/4 2880)
>[ 12742.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cecff0]
>[ 12742.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cecff0] width 2880 pitch 11520 (/4 2880)
>[ 12954.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf910]
>[ 12954.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf910] width 2880 pitch 11520 (/4 2880)
>[ 12955.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b030]
>[ 12955.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b030] width 2880 pitch 11520 (/4 2880)
>[ 12955.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf910]
>[ 12955.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf910] width 2880 pitch 11520 (/4 2880)
>[ 13018.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970b310]
>[ 13018.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970b310] width 2880 pitch 11520 (/4 2880)
>[ 13018.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2d48]
>[ 13018.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2d48] width 2880 pitch 11520 (/4 2880)
>[ 13018.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6a700]
>[ 13018.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6a700] width 2880 pitch 11520 (/4 2880)
>[ 13018.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f2f8]
>[ 13018.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f2f8] width 2880 pitch 11520 (/4 2880)
>[ 13018.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f228]
>[ 13018.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f228] width 2880 pitch 11520 (/4 2880)
>[ 13018.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafa08]
>[ 13018.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafa08] width 2880 pitch 11520 (/4 2880)
>[ 13018.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13018.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13018.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13018.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13018.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f88]
>[ 13018.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f88] width 2880 pitch 11520 (/4 2880)
>[ 13018.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafa08]
>[ 13018.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafa08] width 2880 pitch 11520 (/4 2880)
>[ 13022.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614408]
>[ 13022.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614408] width 2880 pitch 11520 (/4 2880)
>[ 13022.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f88]
>[ 13022.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f88] width 2880 pitch 11520 (/4 2880)
>[ 13022.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f88]
>[ 13022.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f88] width 2880 pitch 11520 (/4 2880)
>[ 13022.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614408]
>[ 13022.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614408] width 2880 pitch 11520 (/4 2880)
>[ 13022.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c590]
>[ 13022.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c590] width 2880 pitch 11520 (/4 2880)
>[ 13022.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c590]
>[ 13022.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c590] width 2880 pitch 11520 (/4 2880)
>[ 13022.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4bd50]
>[ 13022.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4bd50] width 2880 pitch 11520 (/4 2880)
>[ 13022.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c590]
>[ 13022.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c590] width 2880 pitch 11520 (/4 2880)
>[ 13022.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f88]
>[ 13022.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f88] width 2880 pitch 11520 (/4 2880)
>[ 13022.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f88]
>[ 13022.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f88] width 2880 pitch 11520 (/4 2880)
>[ 13022.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4bd50]
>[ 13022.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4bd50] width 2880 pitch 11520 (/4 2880)
>[ 13118.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c590]
>[ 13118.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c590] width 2880 pitch 11520 (/4 2880)
>[ 13118.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd8d0]
>[ 13119.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd8d0] width 2880 pitch 11520 (/4 2880)
>[ 13119.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13119.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13119.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13119.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13119.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13119.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13119.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13119.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13119.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13119.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13119.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13120.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13120.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13120.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13120.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13120.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13120.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13120.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13120.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13120.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13133.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13133.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13133.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13133.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13133.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a980]
>[ 13133.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a980] width 2880 pitch 11520 (/4 2880)
>[ 13133.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13133.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13133.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13133.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13133.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a980]
>[ 13133.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a980] width 2880 pitch 11520 (/4 2880)
>[ 13133.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13133.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13133.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13133.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13133.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13133.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13133.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13133.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13133.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13133.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13133.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13133.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13133.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13133.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13133.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13133.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13133.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13133.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f3d0]
>[ 13133.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f3d0] width 2880 pitch 11520 (/4 2880)
>[ 13133.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13133.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f3d0]
>[ 13133.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f3d0] width 2880 pitch 11520 (/4 2880)
>[ 13133.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13133.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13134.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999f3d0]
>[ 13134.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999f3d0] width 2880 pitch 11520 (/4 2880)
>[ 13134.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13134.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13134.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13134.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13134.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13134.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13134.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13134.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13134.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13134.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13134.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13134.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13134.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13134.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13134.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2fe68]
>[ 13135.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2fe68] width 2880 pitch 11520 (/4 2880)
>[ 13135.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13135.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13135.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13135.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13135.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13135.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13135.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13135.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13135.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13135.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13135.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13135.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13135.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13135.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13135.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13136.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13136.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13136.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13136.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944da70]
>[ 13136.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944da70] width 2880 pitch 11520 (/4 2880)
>[ 13136.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13136.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13136.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8540]
>[ 13136.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8540] width 2880 pitch 11520 (/4 2880)
>[ 13136.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13136.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13136.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 13136.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 13136.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13136.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13136.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 13136.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 13140.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 13140.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 13140.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13140.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13140.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 13141.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 13141.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fa68]
>[ 13141.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fa68] width 2880 pitch 11520 (/4 2880)
>[ 13141.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13141.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13141.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13141.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13142.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13142.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13142.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13142.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13143.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 13143.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 13143.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 13143.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 13144.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 13144.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 13144.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13144.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13148.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13148.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13151.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 13151.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 13164.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 13164.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 13164.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac61a8]
>[ 13165.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac61a8] width 2880 pitch 11520 (/4 2880)
>[ 13165.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba8540]
>[ 13165.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba8540] width 2880 pitch 11520 (/4 2880)
>[ 13165.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 13165.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 13165.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13166.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13166.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[ 13166.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[ 13166.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13166.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13166.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960fa68]
>[ 13166.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960fa68] width 2880 pitch 11520 (/4 2880)
>[ 13251.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13251.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13251.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13251.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13252.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13252.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13252.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 13252.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 13252.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2290]
>[ 13252.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2290] width 2880 pitch 11520 (/4 2880)
>[ 13252.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13252.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13253.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13253.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13253.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13253.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13253.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13253.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13253.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0e060]
>[ 13253.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0e060] width 2880 pitch 11520 (/4 2880)
>[ 13254.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d011e0]
>[ 13254.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d011e0] width 2880 pitch 11520 (/4 2880)
>[ 13254.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb60]
>[ 13254.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb60] width 2880 pitch 11520 (/4 2880)
>[ 13254.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9987990]
>[ 13254.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9987990] width 2880 pitch 11520 (/4 2880)
>[ 13254.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13254.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13272.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13272.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13275.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97edc30]
>[ 13275.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97edc30] width 2880 pitch 11520 (/4 2880)
>[ 13275.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13275.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13275.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13275.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13275.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13275.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13275.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13275.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13275.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d011e0]
>[ 13275.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d011e0] width 2880 pitch 11520 (/4 2880)
>[ 13276.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13276.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13276.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13276.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13276.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13276.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13276.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13276.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13276.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9951320]
>[ 13276.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9951320] width 2880 pitch 11520 (/4 2880)
>[ 13276.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb60]
>[ 13277.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb60] width 2880 pitch 11520 (/4 2880)
>[ 13277.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13277.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13277.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13277.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13277.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13277.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13278.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13278.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13278.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 13278.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 13278.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 13278.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 13278.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13278.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13318.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 13318.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 13318.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3ad8]
>[ 13318.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3ad8] width 2880 pitch 11520 (/4 2880)
>[ 13318.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13318.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13318.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447d70]
>[ 13318.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447d70] width 2880 pitch 11520 (/4 2880)
>[ 13318.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13318.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13318.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13318.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13318.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13318.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13318.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 13318.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 13318.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13318.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13322.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 13322.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 13322.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13322.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13322.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13322.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13322.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13322.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13322.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13322.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13322.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13322.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13322.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13322.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13322.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13322.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13322.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13322.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13322.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 13322.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 13322.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13322.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13322.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13323.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13323.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13323.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13324.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97edc30]
>[ 13324.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97edc30] width 2880 pitch 11520 (/4 2880)
>[ 13324.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13324.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13324.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13324.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13324.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2290]
>[ 13324.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2290] width 2880 pitch 11520 (/4 2880)
>[ 13324.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97edc30]
>[ 13324.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97edc30] width 2880 pitch 11520 (/4 2880)
>[ 13324.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a05110]
>[ 13324.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a05110] width 2880 pitch 11520 (/4 2880)
>[ 13324.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13324.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13324.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13324.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13324.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13324.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13324.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13324.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13324.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13324.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13324.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13324.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13324.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13324.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13378.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6fb18]
>[ 13378.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6fb18] width 2880 pitch 11520 (/4 2880)
>[ 13378.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13378.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13378.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6fb18]
>[ 13378.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6fb18] width 2880 pitch 11520 (/4 2880)
>[ 13378.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13378.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13378.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95435d8]
>[ 13378.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95435d8] width 2880 pitch 11520 (/4 2880)
>[ 13378.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bdb08]
>[ 13378.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bdb08] width 2880 pitch 11520 (/4 2880)
>[ 13378.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13378.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13378.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13378.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13378.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13378.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13378.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13378.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13382.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 13382.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 13382.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13382.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13382.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 13382.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 13382.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13382.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13382.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 13382.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 13382.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13382.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13382.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 13382.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 13382.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13382.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13382.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13382.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13382.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13383.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13383.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 13383.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 13383.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13383.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13383.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13383.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13383.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13383.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13383.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 13383.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 13383.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13383.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13383.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13383.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13383.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13383.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13383.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13383.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13383.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13383.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13383.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13383.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13383.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13383.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13383.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13383.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13383.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e57a8]
>[ 13383.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e57a8] width 2880 pitch 11520 (/4 2880)
>[ 13383.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13383.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13383.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e57a8]
>[ 13383.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e57a8] width 2880 pitch 11520 (/4 2880)
>[ 13384.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 13384.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 13384.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13384.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13384.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9513fb8]
>[ 13384.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9513fb8] width 2880 pitch 11520 (/4 2880)
>[ 13384.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13384.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13384.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13384.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13384.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13384.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13384.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13384.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13384.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13384.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13384.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13384.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13384.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13384.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13384.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13384.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13384.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13384.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13384.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 13384.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 13384.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13384.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13384.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 13384.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 13384.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13384.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13384.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 13384.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 13384.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13384.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13384.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 13384.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 13384.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d658]
>[ 13384.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d658] width 2880 pitch 11520 (/4 2880)
>[ 13384.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 13384.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 13385.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0ba0]
>[ 13385.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0ba0] width 2880 pitch 11520 (/4 2880)
>[ 13385.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13385.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13385.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb60]
>[ 13385.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb60] width 2880 pitch 11520 (/4 2880)
>[ 13385.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13385.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13385.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13385.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13385.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13385.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13385.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975ae8]
>[ 13385.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975ae8] width 2880 pitch 11520 (/4 2880)
>[ 13385.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13385.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13385.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13385.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13385.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0e060]
>[ 13385.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0e060] width 2880 pitch 11520 (/4 2880)
>[ 13385.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13385.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13385.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0e060]
>[ 13385.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0e060] width 2880 pitch 11520 (/4 2880)
>[ 13385.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c651b0]
>[ 13385.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c651b0] width 2880 pitch 11520 (/4 2880)
>[ 13385.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5c78]
>[ 13385.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5c78] width 2880 pitch 11520 (/4 2880)
>[ 13385.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d70848]
>[ 13385.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d70848] width 2880 pitch 11520 (/4 2880)
>[ 13385.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x947f628]
>[ 13385.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x947f628] width 2880 pitch 11520 (/4 2880)
>[ 13386.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97edc30]
>[ 13386.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97edc30] width 2880 pitch 11520 (/4 2880)
>[ 13387.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13387.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13387.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 13387.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 13388.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2d0]
>[ 13388.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2d0] width 2880 pitch 11520 (/4 2880)
>[ 13388.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9951320]
>[ 13388.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9951320] width 2880 pitch 11520 (/4 2880)
>[ 13388.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 13388.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 13388.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9951320]
>[ 13388.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9951320] width 2880 pitch 11520 (/4 2880)
>[ 13439.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3920]
>[ 13439.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3920] width 2880 pitch 11520 (/4 2880)
>[ 13439.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13439.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13439.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13439.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13439.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13439.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13439.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13439.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13439.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6fb18]
>[ 13439.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6fb18] width 2880 pitch 11520 (/4 2880)
>[ 13439.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e7e0]
>[ 13439.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e7e0] width 2880 pitch 11520 (/4 2880)
>[ 13439.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13439.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13439.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13439.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13439.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13439.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13443.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13443.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13443.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d011e0]
>[ 13443.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d011e0] width 2880 pitch 11520 (/4 2880)
>[ 13443.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13443.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13443.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6e80]
>[ 13443.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6e80] width 2880 pitch 11520 (/4 2880)
>[ 13443.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13443.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13443.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13443.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13443.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d011e0]
>[ 13443.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d011e0] width 2880 pitch 11520 (/4 2880)
>[ 13443.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13443.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13443.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6e80]
>[ 13443.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6e80] width 2880 pitch 11520 (/4 2880)
>[ 13444.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13444.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13444.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13444.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13444.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13444.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13444.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 13444.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 13444.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0e060]
>[ 13444.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0e060] width 2880 pitch 11520 (/4 2880)
>[ 13445.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13445.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13445.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13445.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13445.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13788]
>[ 13445.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13788] width 2880 pitch 11520 (/4 2880)
>[ 13445.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13445.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13445.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13445.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13445.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13445.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13445.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13445.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13445.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13445.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13445.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13445.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13445.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42030]
>[ 13445.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42030] width 2880 pitch 11520 (/4 2880)
>[ 13445.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13445.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13445.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13445.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13445.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba81f8]
>[ 13445.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba81f8] width 2880 pitch 11520 (/4 2880)
>[ 13668.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6e80]
>[ 13668.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6e80] width 2880 pitch 11520 (/4 2880)
>[ 13668.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13668.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13668.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9470188]
>[ 13668.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9470188] width 2880 pitch 11520 (/4 2880)
>[ 13668.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13668.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13668.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13668.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13668.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13668.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13668.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13668.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13672.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6e80]
>[ 13672.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6e80] width 2880 pitch 11520 (/4 2880)
>[ 13672.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13673.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13673.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13673.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13673.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0cda0]
>[ 13673.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0cda0] width 2880 pitch 11520 (/4 2880)
>[ 13673.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9470188]
>[ 13673.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9470188] width 2880 pitch 11520 (/4 2880)
>[ 13673.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13673.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13673.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9470188]
>[ 13673.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9470188] width 2880 pitch 11520 (/4 2880)
>[ 13673.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f0f20]
>[ 13673.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f0f20] width 2880 pitch 11520 (/4 2880)
>[ 13702.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676d80]
>[ 13702.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676d80] width 2880 pitch 11520 (/4 2880)
>[ 13702.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c6a0]
>[ 13702.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c6a0] width 2880 pitch 11520 (/4 2880)
>[ 13702.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13702.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13702.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13702.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13702.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6fde0]
>[ 13702.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6fde0] width 2880 pitch 11520 (/4 2880)
>[ 13702.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13702.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13702.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca0068]
>[ 13702.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca0068] width 2880 pitch 11520 (/4 2880)
>[ 13702.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba80f0]
>[ 13702.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba80f0] width 2880 pitch 11520 (/4 2880)
>[ 13702.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6e80]
>[ 13702.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6e80] width 2880 pitch 11520 (/4 2880)
>[ 13702.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13702.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13702.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770170]
>[ 13702.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770170] width 2880 pitch 11520 (/4 2880)
>[ 13702.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13702.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13706.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823f38]
>[ 13706.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823f38] width 2880 pitch 11520 (/4 2880)
>[ 13706.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13706.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13706.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13706.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13706.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13706.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13706.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823f38]
>[ 13706.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823f38] width 2880 pitch 11520 (/4 2880)
>[ 13706.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13706.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13706.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13706.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13706.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13706.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13706.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13706.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13706.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13706.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13706.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13706.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13706.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13706.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13706.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13706.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13720.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13720.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13720.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13720.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13720.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c798e8]
>[ 13720.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c798e8] width 2880 pitch 11520 (/4 2880)
>[ 13720.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13721.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13721.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13721.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13721.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13721.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13721.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13721.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13721.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13721.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13721.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13721.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13721.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13721.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13721.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13721.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13722.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13722.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13722.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13722.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13722.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13722.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13722.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950d090]
>[ 13722.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950d090] width 2880 pitch 11520 (/4 2880)
>[ 13722.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 13722.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 13722.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13722.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13723.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 13723.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 13723.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531038]
>[ 13723.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531038] width 2880 pitch 11520 (/4 2880)
>[ 13723.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13723.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13723.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13723.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13723.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531038]
>[ 13723.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531038] width 2880 pitch 11520 (/4 2880)
>[ 13724.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13724.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13724.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13724.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13724.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13724.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13724.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13725.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13725.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453c38]
>[ 13725.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453c38] width 2880 pitch 11520 (/4 2880)
>[ 13725.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531038]
>[ 13725.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531038] width 2880 pitch 11520 (/4 2880)
>[ 13725.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13725.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13725.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13725.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13725.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13725.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13726.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e37c8]
>[ 13726.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e37c8] width 2880 pitch 11520 (/4 2880)
>[ 13726.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13726.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13726.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13726.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13726.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13726.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13726.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13727.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13727.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13727.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13727.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13727.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13727.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13727.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13727.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13727.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13727.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13727.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13727.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13727.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13728.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13728.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13728.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13728.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13728.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13728.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13728.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13728.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13728.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13728.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13728.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2328]
>[ 13728.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2328] width 2880 pitch 11520 (/4 2880)
>[ 13733.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13733.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13733.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13733.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13733.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13734.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13734.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13734.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13734.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13734.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13734.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13734.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13734.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13734.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13735.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13735.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13735.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13735.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13735.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13735.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13736.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13736.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13736.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61f38]
>[ 13737.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61f38] width 2880 pitch 11520 (/4 2880)
>[ 13737.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61f38]
>[ 13737.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61f38] width 2880 pitch 11520 (/4 2880)
>[ 13737.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13737.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13737.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13737.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13737.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13737.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13738.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13738.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13739.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61f38]
>[ 13739.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61f38] width 2880 pitch 11520 (/4 2880)
>[ 13739.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953e1e8]
>[ 13739.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953e1e8] width 2880 pitch 11520 (/4 2880)
>[ 13739.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c60b8]
>[ 13739.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c60b8] width 2880 pitch 11520 (/4 2880)
>[ 13739.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72ce0]
>[ 13739.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72ce0] width 2880 pitch 11520 (/4 2880)
>[ 13739.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13739.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13739.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13739.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13742.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 13742.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 13743.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 13743.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 13744.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952878]
>[ 13744.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952878] width 2880 pitch 11520 (/4 2880)
>[ 13744.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72ce0]
>[ 13744.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72ce0] width 2880 pitch 11520 (/4 2880)
>[ 13744.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5a68]
>[ 13744.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5a68] width 2880 pitch 11520 (/4 2880)
>[ 13744.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac130]
>[ 13744.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac130] width 2880 pitch 11520 (/4 2880)
>[ 13744.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13744.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13744.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5a68]
>[ 13744.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5a68] width 2880 pitch 11520 (/4 2880)
>[ 13744.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13744.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13744.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 13744.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 13744.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13744.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13744.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13744.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13744.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13744.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13744.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 13744.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 13744.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13744.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13745.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13745.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13745.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 13746.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 13746.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 13746.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 13746.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 13746.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 13746.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 13746.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 13746.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 13746.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 13746.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 13746.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 13746.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13746.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13746.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc0a90]
>[ 13746.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc0a90] width 2880 pitch 11520 (/4 2880)
>[ 13746.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 13746.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 13746.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc0a90]
>[ 13746.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc0a90] width 2880 pitch 11520 (/4 2880)
>[ 13746.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 13746.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 13746.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc0a90]
>[ 13746.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc0a90] width 2880 pitch 11520 (/4 2880)
>[ 13798.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13798.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13798.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13798.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13798.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944daf0]
>[ 13798.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944daf0] width 2880 pitch 11520 (/4 2880)
>[ 13798.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13798.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13798.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13798.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13798.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13798.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13798.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2a98]
>[ 13798.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2a98] width 2880 pitch 11520 (/4 2880)
>[ 13798.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13798.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13798.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13798.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13798.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13798.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13798.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac130]
>[ 13798.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac130] width 2880 pitch 11520 (/4 2880)
>[ 13798.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13798.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13798.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af300]
>[ 13798.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af300] width 2880 pitch 11520 (/4 2880)
>[ 13798.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13799.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13799.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13799.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13799.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13799.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13799.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13799.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13799.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13799.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13799.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13799.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13799.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13799.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13799.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13799.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13800.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13800.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13800.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c168]
>[ 13800.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c168] width 2880 pitch 11520 (/4 2880)
>[ 13800.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd6a8]
>[ 13800.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd6a8] width 2880 pitch 11520 (/4 2880)
>[ 13800.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64260]
>[ 13800.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64260] width 2880 pitch 11520 (/4 2880)
>[ 13800.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13800.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13800.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13800.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13801.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13801.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13801.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13801.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13802.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13802.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13802.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13802.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13802.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c60b8]
>[ 13802.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c60b8] width 2880 pitch 11520 (/4 2880)
>[ 13802.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13802.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13802.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74bc0]
>[ 13802.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74bc0] width 2880 pitch 11520 (/4 2880)
>[ 13806.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13806.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13806.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aef98]
>[ 13806.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aef98] width 2880 pitch 11520 (/4 2880)
>[ 13806.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac130]
>[ 13806.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac130] width 2880 pitch 11520 (/4 2880)
>[ 13806.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b03d0]
>[ 13806.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b03d0] width 2880 pitch 11520 (/4 2880)
>[ 13806.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975de38]
>[ 13806.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975de38] width 2880 pitch 11520 (/4 2880)
>[ 13806.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aef98]
>[ 13806.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aef98] width 2880 pitch 11520 (/4 2880)
>[ 13806.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975de38]
>[ 13806.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975de38] width 2880 pitch 11520 (/4 2880)
>[ 13806.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13806.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13806.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1cf0]
>[ 13806.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1cf0] width 2880 pitch 11520 (/4 2880)
>[ 13806.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975de38]
>[ 13806.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975de38] width 2880 pitch 11520 (/4 2880)
>[ 13806.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1cf0]
>[ 13806.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1cf0] width 2880 pitch 11520 (/4 2880)
>[ 13806.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975de38]
>[ 13806.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975de38] width 2880 pitch 11520 (/4 2880)
>[ 13806.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1cf0]
>[ 13806.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1cf0] width 2880 pitch 11520 (/4 2880)
>[ 13857.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13857.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13857.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13857.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13857.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 13857.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 13857.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13857.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13857.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9452280]
>[ 13857.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9452280] width 2880 pitch 11520 (/4 2880)
>[ 13857.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad1cf0]
>[ 13858.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad1cf0] width 2880 pitch 11520 (/4 2880)
>[ 13858.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba71e8]
>[ 13858.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba71e8] width 2880 pitch 11520 (/4 2880)
>[ 13858.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13858.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13858.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649ba0]
>[ 13858.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649ba0] width 2880 pitch 11520 (/4 2880)
>[ 13858.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96adfa0]
>[ 13858.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96adfa0] width 2880 pitch 11520 (/4 2880)
>[ 13858.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13858.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96adfa0]
>[ 13858.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96adfa0] width 2880 pitch 11520 (/4 2880)
>[ 13858.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13858.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96adfa0]
>[ 13858.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96adfa0] width 2880 pitch 11520 (/4 2880)
>[ 13858.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13858.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13858.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13858.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13858.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13858.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13858.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a136b8]
>[ 13858.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a136b8] width 2880 pitch 11520 (/4 2880)
>[ 13858.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13858.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a136b8]
>[ 13858.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a136b8] width 2880 pitch 11520 (/4 2880)
>[ 13858.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a136b8]
>[ 13858.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a136b8] width 2880 pitch 11520 (/4 2880)
>[ 13858.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a136b8]
>[ 13858.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a136b8] width 2880 pitch 11520 (/4 2880)
>[ 13858.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13858.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13859.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13859.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13859.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13859.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13859.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13859.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13859.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13859.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13859.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13859.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13859.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13859.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13859.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13859.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13859.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13860.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13860.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13860.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13860.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13860.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13860.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13860.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13860.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13860.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13860.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9ef70]
>[ 13860.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9ef70] width 2880 pitch 11520 (/4 2880)
>[ 13860.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13860.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13860.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9ef70]
>[ 13860.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9ef70] width 2880 pitch 11520 (/4 2880)
>[ 13863.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13863.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13863.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13863.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13863.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13863.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13863.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444ad0]
>[ 13863.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444ad0] width 2880 pitch 11520 (/4 2880)
>[ 13863.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13863.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13863.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13863.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13863.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13863.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13863.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13863.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13863.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13863.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13863.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13863.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13863.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13863.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13863.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13863.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13863.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13864.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13864.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13869.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13869.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13870.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13870.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13878.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13878.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13878.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13878.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13880.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13880.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13880.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13880.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13880.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13880.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13880.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444ad0]
>[ 13880.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444ad0] width 2880 pitch 11520 (/4 2880)
>[ 13880.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13880.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13880.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13880.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13880.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13880.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13881.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444ad0]
>[ 13881.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444ad0] width 2880 pitch 11520 (/4 2880)
>[ 13881.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13881.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13881.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13881.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13881.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13881.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13881.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9444ad0]
>[ 13881.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9444ad0] width 2880 pitch 11520 (/4 2880)
>[ 13881.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13881.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13882.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13882.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13882.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13882.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13882.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13882.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13882.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13882.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13882.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13882.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13882.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13882.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13882.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13882.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13894.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13894.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13894.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953fbe8]
>[ 13894.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953fbe8] width 2880 pitch 11520 (/4 2880)
>[ 13894.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 13894.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 13894.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13894.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13894.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13894.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13894.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13894.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13894.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13894.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13894.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9ef40]
>[ 13894.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9ef40] width 2880 pitch 11520 (/4 2880)
>[ 13894.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13895.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13895.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64118]
>[ 13895.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64118] width 2880 pitch 11520 (/4 2880)
>[ 13895.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13895.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13895.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13895.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13895.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9ef40]
>[ 13895.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9ef40] width 2880 pitch 11520 (/4 2880)
>[ 13895.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953fbe8]
>[ 13895.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953fbe8] width 2880 pitch 11520 (/4 2880)
>[ 13899.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953fbe8]
>[ 13899.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953fbe8] width 2880 pitch 11520 (/4 2880)
>[ 13899.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13899.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13900.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953fbe8]
>[ 13900.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953fbe8] width 2880 pitch 11520 (/4 2880)
>[ 13900.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13900.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13900.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13900.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13900.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13900.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13900.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13900.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13900.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13900.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13900.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13900.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13900.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13900.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13900.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13900.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13900.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13900.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13900.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13900.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13900.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13900.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13900.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13900.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13900.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13900.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13900.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13900.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13900.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13900.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13900.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13900.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13905.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13905.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13907.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13907.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13907.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616fa8]
>[ 13907.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616fa8] width 2880 pitch 11520 (/4 2880)
>[ 13907.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13907.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13907.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13907.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13907.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13907.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13907.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13907.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13907.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d6c0]
>[ 13908.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d6c0] width 2880 pitch 11520 (/4 2880)
>[ 13908.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13908.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13908.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66f98]
>[ 13908.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66f98] width 2880 pitch 11520 (/4 2880)
>[ 13908.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e2a8]
>[ 13908.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e2a8] width 2880 pitch 11520 (/4 2880)
>[ 13908.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13908.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13908.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13908.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13909.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13909.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13909.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fbb8]
>[ 13909.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fbb8] width 2880 pitch 11520 (/4 2880)
>[ 13909.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b700]
>[ 13909.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b700] width 2880 pitch 11520 (/4 2880)
>[ 13909.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02880]
>[ 13909.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02880] width 2880 pitch 11520 (/4 2880)
>[ 13924.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02880]
>[ 13924.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02880] width 2880 pitch 11520 (/4 2880)
>[ 13925.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13925.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13925.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 13925.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 13925.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13925.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13925.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 13925.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 13925.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13925.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13925.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13925.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13925.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13925.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13925.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 13925.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 13925.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830988]
>[ 13925.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830988] width 2880 pitch 11520 (/4 2880)
>[ 13925.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13925.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13925.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96adfa0]
>[ 13925.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96adfa0] width 2880 pitch 11520 (/4 2880)
>[ 13925.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13925.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13925.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02880]
>[ 13925.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02880] width 2880 pitch 11520 (/4 2880)
>[ 13925.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 13925.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 13928.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13928.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13929.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 13929.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 13929.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64f50]
>[ 13929.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64f50] width 2880 pitch 11520 (/4 2880)
>[ 13935.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aefa0]
>[ 13935.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aefa0] width 2880 pitch 11520 (/4 2880)
>[ 13935.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9830988]
>[ 13935.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9830988] width 2880 pitch 11520 (/4 2880)
>[ 13935.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13935.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13935.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 13935.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 13935.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7ab78]
>[ 13935.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7ab78] width 2880 pitch 11520 (/4 2880)
>[ 13935.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74bc0]
>[ 13935.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74bc0] width 2880 pitch 11520 (/4 2880)
>[ 13935.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13935.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13936.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13936.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13936.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7ab78]
>[ 13936.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7ab78] width 2880 pitch 11520 (/4 2880)
>[ 13936.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13936.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13937.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13937.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13937.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13937.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13937.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74bc0]
>[ 13937.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74bc0] width 2880 pitch 11520 (/4 2880)
>[ 13937.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13937.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13937.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13937.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13937.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13937.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13937.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13938.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13940.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13940.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13957.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 13957.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 13965.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13965.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13978.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13978.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13978.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13978.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13978.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13978.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13978.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13978.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13978.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 13978.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 13978.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 13978.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 13978.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 13978.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 13978.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13978.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13978.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95549d8]
>[ 13978.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95549d8] width 2880 pitch 11520 (/4 2880)
>[ 13978.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13978.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13982.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74bc0]
>[ 13982.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74bc0] width 2880 pitch 11520 (/4 2880)
>[ 13982.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13982.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13982.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13982.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13982.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13982.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13982.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4d40]
>[ 13982.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4d40] width 2880 pitch 11520 (/4 2880)
>[ 13982.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13982.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13982.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0008]
>[ 13982.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0008] width 2880 pitch 11520 (/4 2880)
>[ 13982.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13982.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13982.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13982.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13982.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13982.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13983.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13983.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13983.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13983.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13983.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b39118]
>[ 13983.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b39118] width 2880 pitch 11520 (/4 2880)
>[ 13983.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13983.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13983.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd158]
>[ 13983.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd158] width 2880 pitch 11520 (/4 2880)
>[ 13984.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13984.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13984.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9510]
>[ 13984.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9510] width 2880 pitch 11520 (/4 2880)
>[ 13984.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13984.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13984.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bfaa0]
>[ 13984.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bfaa0] width 2880 pitch 11520 (/4 2880)
>[ 13984.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b39118]
>[ 13984.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b39118] width 2880 pitch 11520 (/4 2880)
>[ 13984.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9510]
>[ 13984.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9510] width 2880 pitch 11520 (/4 2880)
>[ 13984.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b39118]
>[ 13984.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b39118] width 2880 pitch 11520 (/4 2880)
>[ 13984.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13984.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13984.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13984.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13984.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c73020]
>[ 13984.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c73020] width 2880 pitch 11520 (/4 2880)
>[ 13984.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13984.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13984.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13984.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13984.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e3078]
>[ 13984.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e3078] width 2880 pitch 11520 (/4 2880)
>[ 13984.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94094b8]
>[ 13984.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94094b8] width 2880 pitch 11520 (/4 2880)
>[ 13985.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94703e8]
>[ 13985.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94703e8] width 2880 pitch 11520 (/4 2880)
>[ 13990.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13990.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13991.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13991.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13991.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13991.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13991.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13991.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13991.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13991.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13991.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 13991.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 13991.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 13991.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 13992.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13992.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13992.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b4138]
>[ 13992.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b4138] width 2880 pitch 11520 (/4 2880)
>[ 13992.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13992.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13992.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 13992.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 13992.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13992.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13992.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 13992.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 13992.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 13992.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 13995.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 13995.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 13997.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 13997.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 13998.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 13998.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14001.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14001.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14006.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14006.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14006.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14006.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14006.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14006.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14006.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14006.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14006.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 14006.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 14007.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 14007.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 14007.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14007.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14007.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14007.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14007.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 14007.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14008.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 14008.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 14008.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14008.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14009.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9524488]
>[ 14009.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9524488] width 2880 pitch 11520 (/4 2880)
>[ 14009.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 14009.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 14009.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 14009.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 14010.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 14010.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14010.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14010.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14010.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 14010.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14010.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea5f8]
>[ 14010.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea5f8] width 2880 pitch 11520 (/4 2880)
>[ 14010.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[ 14011.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[ 14011.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea5f8]
>[ 14011.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea5f8] width 2880 pitch 11520 (/4 2880)
>[ 14011.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14011.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14011.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14011.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14011.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 14011.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14011.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[ 14011.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[ 14011.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14011.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14012.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 14012.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 14012.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[ 14012.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[ 14012.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea5f8]
>[ 14012.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea5f8] width 2880 pitch 11520 (/4 2880)
>[ 14012.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14012.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14012.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea5f8]
>[ 14012.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea5f8] width 2880 pitch 11520 (/4 2880)
>[ 14012.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[ 14012.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[ 14012.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5750]
>[ 14012.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5750] width 2880 pitch 11520 (/4 2880)
>[ 14037.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14037.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14037.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 14037.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 14037.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 14037.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 14037.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14037.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14037.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a100]
>[ 14037.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a100] width 2880 pitch 11520 (/4 2880)
>[ 14037.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 14037.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 14037.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 14037.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 14037.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce5f80]
>[ 14037.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce5f80] width 2880 pitch 11520 (/4 2880)
>[ 14037.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce5f80]
>[ 14037.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce5f80] width 2880 pitch 11520 (/4 2880)
>[ 14037.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14037.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14037.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dcb0]
>[ 14037.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dcb0] width 2880 pitch 11520 (/4 2880)
>[ 14037.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14037.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14037.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14037.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14041.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973318]
>[ 14041.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973318] width 2880 pitch 11520 (/4 2880)
>[ 14041.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 14041.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 14041.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 14041.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 14041.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c98200]
>[ 14041.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c98200] width 2880 pitch 11520 (/4 2880)
>[ 14041.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455808]
>[ 14041.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455808] width 2880 pitch 11520 (/4 2880)
>[ 14041.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14041.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14041.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14041.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14041.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14041.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14041.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14041.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14041.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14041.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14041.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14042.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14042.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59960]
>[ 14042.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59960] width 2880 pitch 11520 (/4 2880)
>[ 14042.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14042.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14073.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af110]
>[ 14073.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af110] width 2880 pitch 11520 (/4 2880)
>[ 14073.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14073.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14073.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af110]
>[ 14074.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af110] width 2880 pitch 11520 (/4 2880)
>[ 14074.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14074.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14074.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af110]
>[ 14074.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af110] width 2880 pitch 11520 (/4 2880)
>[ 14074.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 14074.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 14074.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6f60]
>[ 14074.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6f60] width 2880 pitch 11520 (/4 2880)
>[ 14074.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14074.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14074.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98baeb0]
>[ 14074.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98baeb0] width 2880 pitch 11520 (/4 2880)
>[ 14074.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af110]
>[ 14074.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af110] width 2880 pitch 11520 (/4 2880)
>[ 14074.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6f60]
>[ 14074.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6f60] width 2880 pitch 11520 (/4 2880)
>[ 14074.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14074.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14074.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf970]
>[ 14074.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf970] width 2880 pitch 11520 (/4 2880)
>[ 14074.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96af110]
>[ 14074.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96af110] width 2880 pitch 11520 (/4 2880)
>[ 14077.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14077.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14077.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf970]
>[ 14077.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf970] width 2880 pitch 11520 (/4 2880)
>[ 14078.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14078.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14078.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14078.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14078.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addad8]
>[ 14078.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addad8] width 2880 pitch 11520 (/4 2880)
>[ 14079.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14079.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14079.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adde18]
>[ 14079.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adde18] width 2880 pitch 11520 (/4 2880)
>[ 14080.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf970]
>[ 14080.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf970] width 2880 pitch 11520 (/4 2880)
>[ 14080.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14080.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14080.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14080.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14080.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14080.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14080.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf970]
>[ 14080.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf970] width 2880 pitch 11520 (/4 2880)
>[ 14082.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14082.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14084.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf970]
>[ 14084.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf970] width 2880 pitch 11520 (/4 2880)
>[ 14090.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14090.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14090.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8738]
>[ 14090.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8738] width 2880 pitch 11520 (/4 2880)
>[ 14090.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14090.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14090.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8738]
>[ 14090.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8738] width 2880 pitch 11520 (/4 2880)
>[ 14090.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99df330]
>[ 14090.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99df330] width 2880 pitch 11520 (/4 2880)
>[ 14090.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14090.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14090.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14090.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14090.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14090.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14090.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14090.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14090.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 14090.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 14090.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14090.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14090.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14090.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14091.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14091.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14091.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14091.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14091.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14091.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14091.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14091.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14091.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14091.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14091.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14091.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14091.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14091.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14091.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14091.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14091.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14092.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14092.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14092.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14092.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14092.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14092.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14092.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14092.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14094.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d5b8]
>[ 14094.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d5b8] width 2880 pitch 11520 (/4 2880)
>[ 14094.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 14094.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 14094.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14094.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14094.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef4b8]
>[ 14094.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef4b8] width 2880 pitch 11520 (/4 2880)
>[ 14094.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14094.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef4b8]
>[ 14094.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef4b8] width 2880 pitch 11520 (/4 2880)
>[ 14094.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14094.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef4b8]
>[ 14094.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef4b8] width 2880 pitch 11520 (/4 2880)
>[ 14094.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14094.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a7f8]
>[ 14094.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a7f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14094.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14094.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7df0]
>[ 14094.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7df0] width 2880 pitch 11520 (/4 2880)
>[ 14094.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14094.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7df0]
>[ 14094.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7df0] width 2880 pitch 11520 (/4 2880)
>[ 14094.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14094.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14094.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7df0]
>[ 14094.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7df0] width 2880 pitch 11520 (/4 2880)
>[ 14094.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c38618]
>[ 14094.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c38618] width 2880 pitch 11520 (/4 2880)
>[ 14097.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14097.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14100.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14100.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14101.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14101.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14117.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14117.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14119.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14119.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14126.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 14126.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 14131.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a7f8]
>[ 14131.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a7f8] width 2880 pitch 11520 (/4 2880)
>[ 14132.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14132.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14132.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 14132.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 14132.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941a7f8]
>[ 14132.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941a7f8] width 2880 pitch 11520 (/4 2880)
>[ 14132.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14132.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14132.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14132.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14132.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14133.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14133.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14133.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14133.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14133.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14133.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14133.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14133.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14133.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14133.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14133.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14133.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14133.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14142.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8738]
>[ 14142.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8738] width 2880 pitch 11520 (/4 2880)
>[ 14144.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14144.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14145.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14145.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14145.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14145.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14145.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14145.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14145.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14145.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14145.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ee10]
>[ 14145.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ee10] width 2880 pitch 11520 (/4 2880)
>[ 14145.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99eb9c0]
>[ 14145.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99eb9c0] width 2880 pitch 11520 (/4 2880)
>[ 14145.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8738]
>[ 14145.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8738] width 2880 pitch 11520 (/4 2880)
>[ 14145.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14145.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14145.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14145.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14145.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14145.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14145.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8738]
>[ 14145.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8738] width 2880 pitch 11520 (/4 2880)
>[ 14145.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 14145.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 14145.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14145.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14148.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14148.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14149.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14149.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14151.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14151.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14151.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14151.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14151.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14151.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14151.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c60c50]
>[ 14151.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c60c50] width 2880 pitch 11520 (/4 2880)
>[ 14151.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14151.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14151.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14151.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14151.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14151.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14151.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14151.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14151.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14151.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14158.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14158.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14158.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14158.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14158.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14158.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14158.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14158.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14158.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14158.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14158.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2ef78]
>[ 14158.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2ef78] width 2880 pitch 11520 (/4 2880)
>[ 14158.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a250]
>[ 14158.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a250] width 2880 pitch 11520 (/4 2880)
>[ 14158.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14158.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14158.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a250]
>[ 14158.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a250] width 2880 pitch 11520 (/4 2880)
>[ 14160.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14160.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14162.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a250]
>[ 14162.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a250] width 2880 pitch 11520 (/4 2880)
>[ 14162.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0d760]
>[ 14162.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0d760] width 2880 pitch 11520 (/4 2880)
>[ 14162.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14162.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14162.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14162.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14162.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 14162.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 14162.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14162.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14162.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14162.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14162.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56448]
>[ 14162.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56448] width 2880 pitch 11520 (/4 2880)
>[ 14162.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14162.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14162.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14162.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14163.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95434d0]
>[ 14163.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95434d0] width 2880 pitch 11520 (/4 2880)
>[ 14163.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14163.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14163.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56448]
>[ 14163.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56448] width 2880 pitch 11520 (/4 2880)
>[ 14163.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14163.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14163.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14163.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14163.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14163.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14163.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14163.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14163.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14163.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14163.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56448]
>[ 14163.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56448] width 2880 pitch 11520 (/4 2880)
>[ 14164.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14164.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14164.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14164.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14164.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14164.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14164.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14164.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14164.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14164.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14164.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14165.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14165.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14165.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14169.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14169.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14169.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14169.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14169.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14169.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14169.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14169.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14169.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 14169.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 14169.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14169.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14182.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14182.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14185.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14185.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14185.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14185.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14186.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14186.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14186.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14186.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14186.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14186.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14186.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14186.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14186.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14186.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14186.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14186.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14186.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14186.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14187.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14187.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14187.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14187.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14187.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7bb38]
>[ 14187.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7bb38] width 2880 pitch 11520 (/4 2880)
>[ 14187.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c724e8]
>[ 14187.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c724e8] width 2880 pitch 11520 (/4 2880)
>[ 14187.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14187.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14187.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba500]
>[ 14187.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba500] width 2880 pitch 11520 (/4 2880)
>[ 14187.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14187.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14187.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72508]
>[ 14187.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72508] width 2880 pitch 11520 (/4 2880)
>[ 14187.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14187.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14188.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14188.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14188.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72508]
>[ 14188.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72508] width 2880 pitch 11520 (/4 2880)
>[ 14188.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14188.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14188.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14188.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14188.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988088]
>[ 14188.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988088] width 2880 pitch 11520 (/4 2880)
>[ 14189.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a250]
>[ 14189.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a250] width 2880 pitch 11520 (/4 2880)
>[ 14189.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14189.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14189.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940a250]
>[ 14189.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940a250] width 2880 pitch 11520 (/4 2880)
>[ 14189.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2b8c0]
>[ 14189.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2b8c0] width 2880 pitch 11520 (/4 2880)
>[ 14189.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988088]
>[ 14189.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988088] width 2880 pitch 11520 (/4 2880)
>[ 14189.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd9c8]
>[ 14189.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd9c8] width 2880 pitch 11520 (/4 2880)
>[ 14189.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ba258]
>[ 14189.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ba258] width 2880 pitch 11520 (/4 2880)
>[ 14189.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dc20]
>[ 14189.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dc20] width 2880 pitch 11520 (/4 2880)
>[ 14189.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96746a0]
>[ 14189.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96746a0] width 2880 pitch 11520 (/4 2880)
>[ 14195.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14195.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14195.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14195.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14195.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14195.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14195.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14195.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14195.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14195.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14195.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14195.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14196.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14196.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14196.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14196.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14196.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14196.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14196.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b6de0]
>[ 14196.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b6de0] width 2880 pitch 11520 (/4 2880)
>[ 14196.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14196.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14196.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14196.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14196.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14196.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14197.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14197.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14213.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85e80]
>[ 14213.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85e80] width 2880 pitch 11520 (/4 2880)
>[ 14218.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14218.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14218.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14218.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14218.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae9c30]
>[ 14218.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae9c30] width 2880 pitch 11520 (/4 2880)
>[ 14218.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14218.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14218.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14218.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14218.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85e80]
>[ 14218.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85e80] width 2880 pitch 11520 (/4 2880)
>[ 14219.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14219.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14219.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14219.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14219.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14219.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14219.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14219.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14220.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14220.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14220.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14220.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14220.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14220.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14220.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14220.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14220.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14220.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14220.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14220.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14221.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14221.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14241.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14241.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14244.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14244.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14244.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14244.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14244.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14244.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14245.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14245.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14245.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14245.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14245.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85e80]
>[ 14245.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85e80] width 2880 pitch 11520 (/4 2880)
>[ 14245.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14245.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14245.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85e80]
>[ 14245.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85e80] width 2880 pitch 11520 (/4 2880)
>[ 14245.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14245.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14246.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14246.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14246.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14246.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14246.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14246.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14246.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14246.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14246.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14246.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14247.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14247.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14247.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14247.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14247.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14247.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14247.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14247.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14247.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14247.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14248.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14248.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14248.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14248.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14248.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14248.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14248.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14248.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14248.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14249.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14249.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14249.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14249.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14249.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14249.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14249.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14249.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14250.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14250.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d628]
>[ 14250.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d628] width 2880 pitch 11520 (/4 2880)
>[ 14250.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14250.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14250.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14250.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14251.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14251.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14251.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14251.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14251.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14251.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14251.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14251.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14251.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14251.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14252.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14252.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14252.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14252.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14252.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b5d20]
>[ 14252.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b5d20] width 2880 pitch 11520 (/4 2880)
>[ 14252.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14252.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14252.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14252.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14253.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14253.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14253.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14253.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14253.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14253.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14253.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674268]
>[ 14253.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674268] width 2880 pitch 11520 (/4 2880)
>[ 14258.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b5d20]
>[ 14258.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b5d20] width 2880 pitch 11520 (/4 2880)
>[ 14262.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14262.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14278.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14278.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14278.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14278.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14278.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14278.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14278.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14278.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14278.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14278.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14279.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14279.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14279.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2fe8]
>[ 14279.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2fe8] width 2880 pitch 11520 (/4 2880)
>[ 14279.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b5d20]
>[ 14279.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b5d20] width 2880 pitch 11520 (/4 2880)
>[ 14279.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14279.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14279.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14280.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14280.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 14280.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 14280.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 14280.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 14280.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a68d0]
>[ 14280.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a68d0] width 2880 pitch 11520 (/4 2880)
>[ 14280.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c6c50]
>[ 14280.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c6c50] width 2880 pitch 11520 (/4 2880)
>[ 14280.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828498]
>[ 14280.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828498] width 2880 pitch 11520 (/4 2880)
>[ 14280.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e728]
>[ 14280.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e728] width 2880 pitch 11520 (/4 2880)
>[ 14293.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14293.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14294.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14294.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14294.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14294.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14294.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d451b0]
>[ 14294.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d451b0] width 2880 pitch 11520 (/4 2880)
>[ 14294.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14294.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14294.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14294.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14294.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c180]
>[ 14294.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c180] width 2880 pitch 11520 (/4 2880)
>[ 14294.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14295.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14295.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e230]
>[ 14295.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e230] width 2880 pitch 11520 (/4 2880)
>[ 14295.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d01a0]
>[ 14295.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d01a0] width 2880 pitch 11520 (/4 2880)
>[ 14295.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14295.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14295.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14295.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14295.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14295.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14295.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14295.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14295.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e230]
>[ 14295.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e230] width 2880 pitch 11520 (/4 2880)
>[ 14305.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c180]
>[ 14305.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c180] width 2880 pitch 11520 (/4 2880)
>[ 14305.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e230]
>[ 14305.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e230] width 2880 pitch 11520 (/4 2880)
>[ 14306.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14306.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14306.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14306.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14306.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14306.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14306.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea020]
>[ 14306.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea020] width 2880 pitch 11520 (/4 2880)
>[ 14306.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14306.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14306.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14306.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14306.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2e230]
>[ 14306.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2e230] width 2880 pitch 11520 (/4 2880)
>[ 14307.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14307.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14307.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea020]
>[ 14307.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea020] width 2880 pitch 11520 (/4 2880)
>[ 14307.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14307.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14308.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14308.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14308.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d01a0]
>[ 14308.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d01a0] width 2880 pitch 11520 (/4 2880)
>[ 14308.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14308.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14310.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14310.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14311.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14312.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14322.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14322.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14322.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14322.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14322.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93d01a0]
>[ 14322.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93d01a0] width 2880 pitch 11520 (/4 2880)
>[ 14322.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14322.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14322.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 14322.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 14322.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14322.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14323.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14323.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14323.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14323.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14323.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14323.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14324.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 14324.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 14328.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14328.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14332.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14332.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14333.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14333.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14333.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14333.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14333.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14333.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14333.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14333.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14333.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14333.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14337.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14337.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14341.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14341.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14341.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14341.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14342.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea020]
>[ 14342.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea020] width 2880 pitch 11520 (/4 2880)
>[ 14342.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14342.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14343.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14343.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14343.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea020]
>[ 14343.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea020] width 2880 pitch 11520 (/4 2880)
>[ 14343.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14343.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14343.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14343.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14343.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14343.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14344.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14344.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14344.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14344.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14345.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cb18]
>[ 14345.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cb18] width 2880 pitch 11520 (/4 2880)
>[ 14346.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a6bc8]
>[ 14346.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a6bc8] width 2880 pitch 11520 (/4 2880)
>[ 14346.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 14346.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 14346.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d795e8]
>[ 14346.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d795e8] width 2880 pitch 11520 (/4 2880)
>[ 14346.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0dd0]
>[ 14346.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0dd0] width 2880 pitch 11520 (/4 2880)
>[ 14346.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85938]
>[ 14346.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85938] width 2880 pitch 11520 (/4 2880)
>[ 14347.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 14347.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 14359.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9893f18]
>[ 14359.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9893f18] width 2880 pitch 11520 (/4 2880)
>[ 14361.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 14361.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 14371.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ca0a0]
>[ 14371.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ca0a0] width 2880 pitch 11520 (/4 2880)
>[ 14371.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34988]
>[ 14371.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34988] width 2880 pitch 11520 (/4 2880)
>[ 14372.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d795e8]
>[ 14372.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d795e8] width 2880 pitch 11520 (/4 2880)
>[ 14372.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 14372.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 14372.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944dc50]
>[ 14372.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944dc50] width 2880 pitch 11520 (/4 2880)
>[ 14373.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0dd0]
>[ 14373.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0dd0] width 2880 pitch 11520 (/4 2880)
>[ 14373.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85938]
>[ 14373.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85938] width 2880 pitch 11520 (/4 2880)
>[ 14373.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b0dd0]
>[ 14373.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b0dd0] width 2880 pitch 11520 (/4 2880)
>[ 14373.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 14373.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 14373.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14373.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14373.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85938]
>[ 14373.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85938] width 2880 pitch 11520 (/4 2880)
>[ 14373.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423ce0]
>[ 14373.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423ce0] width 2880 pitch 11520 (/4 2880)
>[ 14373.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea298]
>[ 14374.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea298] width 2880 pitch 11520 (/4 2880)
>[ 14374.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14374.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14374.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14374.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14387.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14387.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14396.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14396.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14398.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14398.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14398.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14398.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14398.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 14398.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 14398.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14398.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14398.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 14398.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 14398.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14398.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14398.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14398.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14398.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14398.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14398.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a6bc8]
>[ 14398.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a6bc8] width 2880 pitch 11520 (/4 2880)
>[ 14398.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14398.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14402.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14402.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14402.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14402.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14402.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14402.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14402.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14402.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14402.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14402.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14402.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14402.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14402.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14402.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14402.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14402.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14402.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14402.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14402.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14402.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14402.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14402.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14402.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14402.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14402.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14402.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14402.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14402.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14403.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14403.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14403.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14403.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14403.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14403.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14403.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14403.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14403.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14403.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14404.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14404.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14404.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14404.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14404.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14404.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14404.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14404.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14404.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14404.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14404.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14404.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14404.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14404.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14404.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14404.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14404.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14404.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14404.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14404.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14404.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14404.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14404.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a6bc8]
>[ 14404.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a6bc8] width 2880 pitch 11520 (/4 2880)
>[ 14404.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14404.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14405.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14405.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14405.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14405.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14405.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14405.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14405.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14405.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14405.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14405.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14406.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14406.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14406.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14406.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14406.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14406.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14406.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14406.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14406.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14406.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14406.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14406.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14410.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14410.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14429.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14429.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14430.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14430.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14430.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14430.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14430.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14430.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14430.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14430.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14430.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14430.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14430.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14430.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14430.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14430.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14430.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14430.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14430.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d678]
>[ 14430.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d678] width 2880 pitch 11520 (/4 2880)
>[ 14430.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14430.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14430.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14430.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14430.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14430.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14430.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14430.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14431.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14432.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14432.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14432.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14436.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14436.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14436.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14436.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14436.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64ff0]
>[ 14436.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64ff0] width 2880 pitch 11520 (/4 2880)
>[ 14437.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14437.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14437.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14437.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14437.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9674338]
>[ 14437.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9674338] width 2880 pitch 11520 (/4 2880)
>[ 14437.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e798]
>[ 14437.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e798] width 2880 pitch 11520 (/4 2880)
>[ 14437.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14437.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14437.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14437.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14437.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14437.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14437.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14437.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14437.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14437.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14437.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14437.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14437.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14437.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14437.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14437.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14437.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14437.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14445.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a6bc8]
>[ 14445.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a6bc8] width 2880 pitch 11520 (/4 2880)
>[ 14446.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c790]
>[ 14446.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c790] width 2880 pitch 11520 (/4 2880)
>[ 14463.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14463.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14465.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d678]
>[ 14465.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d678] width 2880 pitch 11520 (/4 2880)
>[ 14479.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14479.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14479.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d678]
>[ 14479.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d678] width 2880 pitch 11520 (/4 2880)
>[ 14500.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14500.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14500.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14500.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14500.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14500.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14500.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14500.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14501.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a6bc8]
>[ 14501.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a6bc8] width 2880 pitch 11520 (/4 2880)
>[ 14501.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14501.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14501.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14501.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14501.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4d678]
>[ 14501.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4d678] width 2880 pitch 11520 (/4 2880)
>[ 14501.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a2920]
>[ 14501.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a2920] width 2880 pitch 11520 (/4 2880)
>[ 14501.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9443c28]
>[ 14502.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9443c28] width 2880 pitch 11520 (/4 2880)
>[ 14502.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8290]
>[ 14502.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8290] width 2880 pitch 11520 (/4 2880)
>[ 14502.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac2450]
>[ 14502.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac2450] width 2880 pitch 11520 (/4 2880)
>[ 14502.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95235d0]
>[ 14502.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95235d0] width 2880 pitch 11520 (/4 2880)
>[ 14502.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85100]
>[ 14502.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85100] width 2880 pitch 11520 (/4 2880)
>[ 14502.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7da28]
>[ 14502.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7da28] width 2880 pitch 11520 (/4 2880)
>[ 14519.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac130]
>[ 14519.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac130] width 2880 pitch 11520 (/4 2880)
>[ 14519.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf5c8]
>[ 14519.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf5c8] width 2880 pitch 11520 (/4 2880)
>[ 14519.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c35880]
>[ 14519.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c35880] width 2880 pitch 11520 (/4 2880)
>[ 14519.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954bed8]
>[ 14520.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954bed8] width 2880 pitch 11520 (/4 2880)
>[ 14520.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac130]
>[ 14520.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac130] width 2880 pitch 11520 (/4 2880)
>[ 14520.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d786b0]
>[ 14520.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d786b0] width 2880 pitch 11520 (/4 2880)
>[ 14520.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c35880]
>[ 14520.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c35880] width 2880 pitch 11520 (/4 2880)
>[ 14520.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56568]
>[ 14520.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56568] width 2880 pitch 11520 (/4 2880)
>[ 14520.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd9c8]
>[ 14520.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd9c8] width 2880 pitch 11520 (/4 2880)
>[ 14522.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd158]
>[ 14522.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd158] width 2880 pitch 11520 (/4 2880)
>[ 14522.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b03d0]
>[ 14522.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b03d0] width 2880 pitch 11520 (/4 2880)
>[ 14522.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce8720]
>[ 14522.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce8720] width 2880 pitch 11520 (/4 2880)
>[ 14522.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a55a0]
>[ 14522.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a55a0] width 2880 pitch 11520 (/4 2880)
>[ 14522.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c180]
>[ 14522.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c180] width 2880 pitch 11520 (/4 2880)
>[ 14522.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c75700]
>[ 14522.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c75700] width 2880 pitch 11520 (/4 2880)
>[ 14522.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c75700]
>[ 14522.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c75700] width 2880 pitch 11520 (/4 2880)
>[ 14522.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b03d0]
>[ 14522.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b03d0] width 2880 pitch 11520 (/4 2880)
>[ 14522.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c180]
>[ 14522.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c180] width 2880 pitch 11520 (/4 2880)
>[ 14529.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3a100]
>[ 14529.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3a100] width 2880 pitch 11520 (/4 2880)
>[ 14541.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac0278]
>[ 14541.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac0278] width 2880 pitch 11520 (/4 2880)
>[ 14542.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 14542.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 14542.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14542.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14542.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 14542.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 14542.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14542.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14542.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 14542.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 14542.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95296d8]
>[ 14542.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95296d8] width 2880 pitch 11520 (/4 2880)
>[ 14542.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 14542.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 14542.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14542.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14542.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8358]
>[ 14542.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8358] width 2880 pitch 11520 (/4 2880)
>[ 14542.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847f70]
>[ 14542.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847f70] width 2880 pitch 11520 (/4 2880)
>[ 14542.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954e758]
>[ 14542.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954e758] width 2880 pitch 11520 (/4 2880)
>[ 14542.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9770918]
>[ 14542.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9770918] width 2880 pitch 11520 (/4 2880)
>[ 14542.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 14542.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 14543.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649818]
>[ 14543.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649818] width 2880 pitch 11520 (/4 2880)
>[ 14543.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 14543.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 14544.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649818]
>[ 14544.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649818] width 2880 pitch 11520 (/4 2880)
>[ 14544.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63370]
>[ 14544.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63370] width 2880 pitch 11520 (/4 2880)
>[ 14544.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbb1c8]
>[ 14544.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbb1c8] width 2880 pitch 11520 (/4 2880)
>[ 14544.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63370]
>[ 14544.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63370] width 2880 pitch 11520 (/4 2880)
>[ 14544.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14544.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14544.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 14544.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 14544.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14544.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14544.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 14544.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 14544.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14544.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14563.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 14563.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 14563.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14563.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14563.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14563.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14563.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14563.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14563.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14563.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14564.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14564.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14564.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14564.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14565.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14565.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14565.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14566.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14566.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14566.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14567.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14567.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14567.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14567.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14567.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14567.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14568.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14568.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14569.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14569.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14569.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14569.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14569.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 14569.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 14569.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 14569.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 14569.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b0008]
>[ 14569.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b0008] width 2880 pitch 11520 (/4 2880)
>[ 14579.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ff728]
>[ 14579.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ff728] width 2880 pitch 11520 (/4 2880)
>[ 14653.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9606a98]
>[ 14653.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9606a98] width 2880 pitch 11520 (/4 2880)
>[ 14771.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 14771.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 14780.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 14780.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 15082.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15082.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15082.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 15082.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 15082.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15082.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15082.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 15082.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 15082.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15082.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15082.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15082.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15082.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 15082.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 15082.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15082.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15082.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 15082.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 15082.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15082.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15083.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1608]
>[ 15083.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1608] width 2880 pitch 11520 (/4 2880)
>[ 15083.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 15083.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 15084.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 15084.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 15084.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1608]
>[ 15084.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1608] width 2880 pitch 11520 (/4 2880)
>[ 15084.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15084.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15084.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 15084.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 15084.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 15084.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 15084.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 15084.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 15084.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c160]
>[ 15084.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c160] width 2880 pitch 11520 (/4 2880)
>[ 15084.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15084.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15084.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 15084.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 15084.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 15084.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 15084.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 15084.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 15084.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b925d0]
>[ 15084.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b925d0] width 2880 pitch 11520 (/4 2880)
>[ 15084.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 15084.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 15084.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b925d0]
>[ 15084.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b925d0] width 2880 pitch 11520 (/4 2880)
>[ 15085.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7cdd8]
>[ 15085.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7cdd8] width 2880 pitch 11520 (/4 2880)
>[ 15089.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15089.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15089.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1238]
>[ 15089.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1238] width 2880 pitch 11520 (/4 2880)
>[ 15089.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15089.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15089.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15089.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15089.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9dc8]
>[ 15089.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9dc8] width 2880 pitch 11520 (/4 2880)
>[ 15089.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15089.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15089.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15089.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15089.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15089.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15089.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15089.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15089.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15089.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15089.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15089.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15089.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15089.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15089.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15089.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15089.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15089.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15098.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb43a0]
>[ 15098.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb43a0] width 2880 pitch 11520 (/4 2880)
>[ 15098.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4370]
>[ 15098.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4370] width 2880 pitch 11520 (/4 2880)
>[ 15098.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4438]
>[ 15098.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4438] width 2880 pitch 11520 (/4 2880)
>[ 15098.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4370]
>[ 15098.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4370] width 2880 pitch 11520 (/4 2880)
>[ 15098.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4510]
>[ 15098.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4510] width 2880 pitch 11520 (/4 2880)
>[ 15098.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15098.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15098.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4438]
>[ 15098.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4438] width 2880 pitch 11520 (/4 2880)
>[ 15098.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4370]
>[ 15098.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4370] width 2880 pitch 11520 (/4 2880)
>[ 15098.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15098.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15098.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15098.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15098.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4438]
>[ 15098.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4438] width 2880 pitch 11520 (/4 2880)
>[ 15098.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb42d0]
>[ 15098.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb42d0] width 2880 pitch 11520 (/4 2880)
>[ 15098.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4438]
>[ 15098.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4438] width 2880 pitch 11520 (/4 2880)
>[ 15098.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e8f0]
>[ 15098.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e8f0] width 2880 pitch 11520 (/4 2880)
>[ 15099.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8e3a0]
>[ 15099.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8e3a0] width 2880 pitch 11520 (/4 2880)
>[ 15099.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8fee0]
>[ 15099.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8fee0] width 2880 pitch 11520 (/4 2880)
>[ 15099.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5c0]
>[ 15099.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5c0] width 2880 pitch 11520 (/4 2880)
>[ 15099.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5c0]
>[ 15099.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5c0] width 2880 pitch 11520 (/4 2880)
>[ 15099.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5c0]
>[ 15099.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5c0] width 2880 pitch 11520 (/4 2880)
>[ 15099.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5c0]
>[ 15099.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5c0] width 2880 pitch 11520 (/4 2880)
>[ 15099.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5c0]
>[ 15099.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5c0] width 2880 pitch 11520 (/4 2880)
>[ 15099.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15099.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15099.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15099.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15099.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15099.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15099.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b310]
>[ 15099.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b310] width 2880 pitch 11520 (/4 2880)
>[ 15099.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15099.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15099.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15099.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15099.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15099.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15099.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15099.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4468]
>[ 15099.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4468] width 2880 pitch 11520 (/4 2880)
>[ 15099.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90e80]
>[ 15099.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90e80] width 2880 pitch 11520 (/4 2880)
>[ 15102.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15102.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15103.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15103.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15103.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf8]
>[ 15103.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf8] width 2880 pitch 11520 (/4 2880)
>[ 15104.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15104.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15104.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15104.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15105.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15105.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15106.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15107.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15107.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15107.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15107.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15107.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15107.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0ce8]
>[ 15107.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0ce8] width 2880 pitch 11520 (/4 2880)
>[ 15107.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15107.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15107.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf8]
>[ 15107.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf8] width 2880 pitch 11520 (/4 2880)
>[ 15107.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f90d8]
>[ 15107.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f90d8] width 2880 pitch 11520 (/4 2880)
>[ 15112.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15112.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15116.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15116.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15129.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ff8]
>[ 15129.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ff8] width 2880 pitch 11520 (/4 2880)
>[ 15130.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0ce8]
>[ 15130.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0ce8] width 2880 pitch 11520 (/4 2880)
>[ 15130.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf8]
>[ 15130.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf8] width 2880 pitch 11520 (/4 2880)
>[ 15130.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15130.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15130.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15130.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15130.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e1b20]
>[ 15130.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e1b20] width 2880 pitch 11520 (/4 2880)
>[ 15130.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15130.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15130.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15130.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15132.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15132.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15134.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d906b8]
>[ 15134.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d906b8] width 2880 pitch 11520 (/4 2880)
>[ 15134.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15134.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15134.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15134.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15135.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7ded0]
>[ 15135.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7ded0] width 2880 pitch 11520 (/4 2880)
>[ 15135.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa2b8]
>[ 15135.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa2b8] width 2880 pitch 11520 (/4 2880)
>[ 15135.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e1b20]
>[ 15135.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e1b20] width 2880 pitch 11520 (/4 2880)
>[ 15136.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf8]
>[ 15136.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf8] width 2880 pitch 11520 (/4 2880)
>[ 15136.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c633f8]
>[ 15136.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c633f8] width 2880 pitch 11520 (/4 2880)
>[ 15136.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15136.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15136.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf8]
>[ 15136.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf8] width 2880 pitch 11520 (/4 2880)
>[ 15136.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15136.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15136.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15136.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15136.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15136.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15136.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15136.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15136.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15136.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15138.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15138.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15140.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15140.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15145.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd6a8]
>[ 15145.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd6a8] width 2880 pitch 11520 (/4 2880)
>[ 15145.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db9f58]
>[ 15145.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db9f58] width 2880 pitch 11520 (/4 2880)
>[ 15146.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15146.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15146.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15146.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15146.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15146.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15146.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15146.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15146.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15146.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15146.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15146.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15146.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15147.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15147.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15147.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15147.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15147.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15148.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15148.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15149.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90648]
>[ 15149.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90648] width 2880 pitch 11520 (/4 2880)
>[ 15149.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92aa8]
>[ 15149.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92aa8] width 2880 pitch 11520 (/4 2880)
>[ 15149.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8d430]
>[ 15149.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8d430] width 2880 pitch 11520 (/4 2880)
>[ 15149.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8d488]
>[ 15149.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8d488] width 2880 pitch 11520 (/4 2880)
>[ 15155.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15155.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15155.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15155.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15155.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15155.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15156.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15156.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15156.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15156.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15156.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15156.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15156.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15156.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15157.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15157.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15157.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15158.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15158.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15158.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15158.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5ac8]
>[ 15158.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5ac8] width 2880 pitch 11520 (/4 2880)
>[ 15158.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15158.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15158.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15158.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15159.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72528]
>[ 15159.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72528] width 2880 pitch 11520 (/4 2880)
>[ 15159.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15159.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15159.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbce98]
>[ 15159.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbce98] width 2880 pitch 11520 (/4 2880)
>[ 15164.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52ba0]
>[ 15164.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52ba0] width 2880 pitch 11520 (/4 2880)
>[ 15165.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15165.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15166.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15166.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15175.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca82f0]
>[ 15175.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca82f0] width 2880 pitch 11520 (/4 2880)
>[ 15176.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15176.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15176.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15176.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15176.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15176.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15176.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca82f0]
>[ 15176.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca82f0] width 2880 pitch 11520 (/4 2880)
>[ 15177.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15177.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15177.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15177.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15177.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15177.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15177.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15177.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15178.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca82f0]
>[ 15178.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca82f0] width 2880 pitch 11520 (/4 2880)
>[ 15179.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15179.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15179.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca82f0]
>[ 15180.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca82f0] width 2880 pitch 11520 (/4 2880)
>[ 15180.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15181.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15181.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15181.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15181.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15181.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15181.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15181.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15183.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15183.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15184.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15184.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15184.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15184.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15184.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15184.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15184.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15184.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15187.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15188.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15188.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15188.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15188.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f90d8]
>[ 15188.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f90d8] width 2880 pitch 11520 (/4 2880)
>[ 15191.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f90d8]
>[ 15191.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f90d8] width 2880 pitch 11520 (/4 2880)
>[ 15191.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15192.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15192.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15192.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15192.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15192.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15192.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15192.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15192.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15192.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15192.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15192.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15192.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15192.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15192.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15192.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15192.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15192.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15192.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15192.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c0e0]
>[ 15192.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c0e0] width 2880 pitch 11520 (/4 2880)
>[ 15193.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15193.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15214.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15214.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15214.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15214.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15215.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15215.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15215.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15215.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15215.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15215.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15215.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15215.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15215.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15215.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15215.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15215.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15216.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15216.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15216.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15216.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15216.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4cac0]
>[ 15216.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4cac0] width 2880 pitch 11520 (/4 2880)
>[ 15217.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15217.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15217.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc14b0]
>[ 15217.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc14b0] width 2880 pitch 11520 (/4 2880)
>[ 15217.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15217.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15217.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d53488]
>[ 15217.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d53488] width 2880 pitch 11520 (/4 2880)
>[ 15217.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc14b0]
>[ 15217.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc14b0] width 2880 pitch 11520 (/4 2880)
>[ 15220.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5448]
>[ 15220.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5448] width 2880 pitch 11520 (/4 2880)
>[ 15224.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15224.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15225.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15225.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15227.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15227.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15232.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15232.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15236.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15236.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15244.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15244.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15244.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15244.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15244.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15244.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15244.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15245.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15245.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15245.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15245.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15245.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15245.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15245.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15245.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15245.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15246.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15246.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15246.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15246.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15247.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15247.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15247.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15247.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15247.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15247.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15247.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76600]
>[ 15247.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76600] width 2880 pitch 11520 (/4 2880)
>[ 15250.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15250.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15250.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15250.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15250.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15250.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15250.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15250.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15250.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15250.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15251.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15251.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15251.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15251.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15251.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15251.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15251.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15251.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15251.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15251.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15253.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15253.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15253.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15253.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15253.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15253.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15254.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90eb0]
>[ 15254.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90eb0] width 2880 pitch 11520 (/4 2880)
>[ 15254.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac38d8]
>[ 15254.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac38d8] width 2880 pitch 11520 (/4 2880)
>[ 15255.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf7d0]
>[ 15255.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf7d0] width 2880 pitch 11520 (/4 2880)
>[ 15255.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf7d0]
>[ 15255.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf7d0] width 2880 pitch 11520 (/4 2880)
>[ 15255.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9dc8]
>[ 15255.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9dc8] width 2880 pitch 11520 (/4 2880)
>[ 15255.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32f20]
>[ 15255.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32f20] width 2880 pitch 11520 (/4 2880)
>[ 15256.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 15256.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 15256.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 15256.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 15256.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf7d0]
>[ 15256.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf7d0] width 2880 pitch 11520 (/4 2880)
>[ 15256.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd0b8]
>[ 15256.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd0b8] width 2880 pitch 11520 (/4 2880)
>[ 15256.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d98798]
>[ 15256.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d98798] width 2880 pitch 11520 (/4 2880)
>[ 15256.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 15256.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 15256.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf7d0]
>[ 15256.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf7d0] width 2880 pitch 11520 (/4 2880)
>[ 15256.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15256.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15256.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd0b8]
>[ 15256.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd0b8] width 2880 pitch 11520 (/4 2880)
>[ 15260.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15260.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15261.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15261.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15264.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 15264.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 15271.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 15271.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 15271.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15271.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15271.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15271.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15272.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15272.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15272.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca84d8]
>[ 15272.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca84d8] width 2880 pitch 11520 (/4 2880)
>[ 15272.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15272.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15273.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 15273.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 15273.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 15273.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 15273.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 15274.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 15274.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 15274.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 15274.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979c160]
>[ 15274.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979c160] width 2880 pitch 11520 (/4 2880)
>[ 15276.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15276.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15277.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65fb0]
>[ 15277.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65fb0] width 2880 pitch 11520 (/4 2880)
>[ 15277.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 15277.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 15277.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 15277.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 15277.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 15277.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 15278.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 15278.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 15298.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 15298.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 15298.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52918]
>[ 15298.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52918] width 2880 pitch 11520 (/4 2880)
>[ 15298.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 15298.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 15298.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15298.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15298.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15298.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15298.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 15298.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 15298.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 15298.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 15298.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 15298.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 15298.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15298.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15298.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 15298.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 15298.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 15298.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 15298.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15298.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15302.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15302.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15302.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 15302.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 15302.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15302.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15302.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 15302.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 15303.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15303.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15303.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15303.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15303.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 15303.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 15303.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15303.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15303.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 15303.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 15303.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15303.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15303.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15303.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15303.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 15303.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 15303.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 15303.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 15304.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15304.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15304.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 15304.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 15304.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 15304.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 15304.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 15304.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 15304.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 15304.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 15304.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 15304.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 15305.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 15305.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 15305.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 15305.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 15305.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 15305.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 15306.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 15306.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 15306.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 15306.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 15306.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e9a0]
>[ 15306.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e9a0] width 2880 pitch 11520 (/4 2880)
>[ 15306.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15307.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15307.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15307.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15307.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15307.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15307.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 15307.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 15307.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15308.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15308.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 15308.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 15308.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 15308.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 15313.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97980e8]
>[ 15313.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97980e8] width 2880 pitch 11520 (/4 2880)
>[ 15318.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15318.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15318.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15318.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15319.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15319.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15319.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15319.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15319.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f8848]
>[ 15319.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f8848] width 2880 pitch 11520 (/4 2880)
>[ 15319.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15319.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15320.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15320.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15320.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15320.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15320.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15320.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15320.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d048]
>[ 15320.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d048] width 2880 pitch 11520 (/4 2880)
>[ 15320.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483f8]
>[ 15320.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483f8] width 2880 pitch 11520 (/4 2880)
>[ 15320.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15320.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15320.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15321.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15321.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15321.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15321.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15321.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15323.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b925d0]
>[ 15323.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b925d0] width 2880 pitch 11520 (/4 2880)
>[ 15323.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15323.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15324.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15324.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15324.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15324.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15324.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15324.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15324.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15324.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15324.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d964d0]
>[ 15325.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d964d0] width 2880 pitch 11520 (/4 2880)
>[ 15325.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15325.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15325.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15325.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15325.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d964d0]
>[ 15325.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d964d0] width 2880 pitch 11520 (/4 2880)
>[ 15325.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15326.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15326.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15326.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15327.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d964d0]
>[ 15327.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d964d0] width 2880 pitch 11520 (/4 2880)
>[ 15328.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d964d0]
>[ 15328.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d964d0] width 2880 pitch 11520 (/4 2880)
>[ 15328.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15328.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15329.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15329.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15330.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15330.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15333.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d964d0]
>[ 15333.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d964d0] width 2880 pitch 11520 (/4 2880)
>[ 15335.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15336.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15336.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15336.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15336.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15336.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15336.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48948]
>[ 15336.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48948] width 2880 pitch 11520 (/4 2880)
>[ 15336.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15337.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15337.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15337.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15337.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15337.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15341.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15341.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15342.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15342.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15360.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15360.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15360.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15360.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15360.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15360.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15360.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15361.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15361.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15361.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15361.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15361.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15361.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15361.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15361.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15361.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15361.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15361.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15362.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15362.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15363.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15363.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15363.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15363.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15364.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15364.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15364.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15364.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15365.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945ca10]
>[ 15365.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945ca10] width 2880 pitch 11520 (/4 2880)
>[ 15365.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15365.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15365.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 15365.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 15365.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 15365.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 15367.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9478]
>[ 15367.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9478] width 2880 pitch 11520 (/4 2880)
>[ 15368.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730ef8]
>[ 15368.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730ef8] width 2880 pitch 11520 (/4 2880)
>[ 15369.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15369.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15369.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1608]
>[ 15369.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1608] width 2880 pitch 11520 (/4 2880)
>[ 15369.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730ef8]
>[ 15369.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730ef8] width 2880 pitch 11520 (/4 2880)
>[ 15369.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15369.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15371.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730ef8]
>[ 15371.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730ef8] width 2880 pitch 11520 (/4 2880)
>[ 15371.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15371.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15378.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d8ad8]
>[ 15379.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d8ad8] width 2880 pitch 11520 (/4 2880)
>[ 15379.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730ef8]
>[ 15379.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730ef8] width 2880 pitch 11520 (/4 2880)
>[ 15379.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655200]
>[ 15379.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655200] width 2880 pitch 11520 (/4 2880)
>[ 15379.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730ef8]
>[ 15379.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730ef8] width 2880 pitch 11520 (/4 2880)
>[ 15379.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952eee8]
>[ 15379.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952eee8] width 2880 pitch 11520 (/4 2880)
>[ 15379.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b089a0]
>[ 15379.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b089a0] width 2880 pitch 11520 (/4 2880)
>[ 15379.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952eee8]
>[ 15379.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952eee8] width 2880 pitch 11520 (/4 2880)
>[ 15386.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c87b8]
>[ 15386.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c87b8] width 2880 pitch 11520 (/4 2880)
>[ 15386.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d5f60]
>[ 15386.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d5f60] width 2880 pitch 11520 (/4 2880)
>[ 15386.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cacef8]
>[ 15386.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cacef8] width 2880 pitch 11520 (/4 2880)
>[ 15386.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c87b8]
>[ 15386.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c87b8] width 2880 pitch 11520 (/4 2880)
>[ 15386.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21208]
>[ 15386.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21208] width 2880 pitch 11520 (/4 2880)
>[ 15386.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 15386.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 15386.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f8e0]
>[ 15387.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f8e0] width 2880 pitch 11520 (/4 2880)
>[ 15387.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d5f60]
>[ 15387.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d5f60] width 2880 pitch 11520 (/4 2880)
>[ 15387.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11d60]
>[ 15387.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11d60] width 2880 pitch 11520 (/4 2880)
>[ 15388.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bc6f0]
>[ 15388.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bc6f0] width 2880 pitch 11520 (/4 2880)
>[ 15389.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1d4a0]
>[ 15389.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1d4a0] width 2880 pitch 11520 (/4 2880)
>[ 15389.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a11d60]
>[ 15389.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a11d60] width 2880 pitch 11520 (/4 2880)
>[ 15389.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1d4a0]
>[ 15389.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1d4a0] width 2880 pitch 11520 (/4 2880)
>[ 15389.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1d4a0]
>[ 15389.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1d4a0] width 2880 pitch 11520 (/4 2880)
>[ 15390.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2490]
>[ 15390.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2490] width 2880 pitch 11520 (/4 2880)
>[ 15390.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1d4a0]
>[ 15390.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1d4a0] width 2880 pitch 11520 (/4 2880)
>[ 15390.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2490]
>[ 15390.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2490] width 2880 pitch 11520 (/4 2880)
>[ 15390.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48480]
>[ 15390.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48480] width 2880 pitch 11520 (/4 2880)
>[ 15390.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15391.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15391.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 15391.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 15391.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba018]
>[ 15391.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba018] width 2880 pitch 11520 (/4 2880)
>[ 15391.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 15391.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 15395.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf2e0]
>[ 15395.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf2e0] width 2880 pitch 11520 (/4 2880)
>[ 15414.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 15414.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 15414.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 15414.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 15414.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 15414.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 15414.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 15414.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 15414.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 15414.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 15415.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 15415.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 15415.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 15415.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 15415.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 15415.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 15415.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 15415.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 15416.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 15416.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 15417.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15417.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15417.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15417.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15417.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aafba0]
>[ 15417.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aafba0] width 2880 pitch 11520 (/4 2880)
>[ 15417.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92dd0]
>[ 15417.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92dd0] width 2880 pitch 11520 (/4 2880)
>[ 15417.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 15417.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 15417.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e8f0]
>[ 15417.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e8f0] width 2880 pitch 11520 (/4 2880)
>[ 15417.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 15417.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 15418.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 15418.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 15418.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e8f0]
>[ 15418.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e8f0] width 2880 pitch 11520 (/4 2880)
>[ 15418.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74900]
>[ 15418.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74900] width 2880 pitch 11520 (/4 2880)
>[ 15418.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e8f0]
>[ 15418.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e8f0] width 2880 pitch 11520 (/4 2880)
>[ 15418.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e8f0]
>[ 15418.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e8f0] width 2880 pitch 11520 (/4 2880)
>[ 15418.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715c40]
>[ 15418.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715c40] width 2880 pitch 11520 (/4 2880)
>[ 15418.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34000]
>[ 15418.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34000] width 2880 pitch 11520 (/4 2880)
>[ 15418.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715c40]
>[ 15418.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715c40] width 2880 pitch 11520 (/4 2880)
>[ 15418.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15419.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15419.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715c40]
>[ 15419.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715c40] width 2880 pitch 11520 (/4 2880)
>[ 15419.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15419.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15419.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15419.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15419.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15419.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15419.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923d20]
>[ 15419.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923d20] width 2880 pitch 11520 (/4 2880)
>[ 15419.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15419.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15422.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15422.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15422.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923d20]
>[ 15422.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923d20] width 2880 pitch 11520 (/4 2880)
>[ 15422.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d8ad8]
>[ 15422.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d8ad8] width 2880 pitch 11520 (/4 2880)
>[ 15422.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 15422.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 15422.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15422.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15422.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 15422.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 15422.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15423.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15423.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15423.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15423.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15423.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15423.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15423.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15423.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15423.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15423.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ddc10]
>[ 15423.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ddc10] width 2880 pitch 11520 (/4 2880)
>[ 15423.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c620]
>[ 15423.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c620] width 2880 pitch 11520 (/4 2880)
>[ 15425.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15425.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15426.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15426.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15434.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15434.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15435.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d8ad8]
>[ 15435.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d8ad8] width 2880 pitch 11520 (/4 2880)
>[ 15438.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15438.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15440.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15440.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15440.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15440.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15442.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15442.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15442.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923d20]
>[ 15442.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923d20] width 2880 pitch 11520 (/4 2880)
>[ 15443.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923d20]
>[ 15443.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923d20] width 2880 pitch 11520 (/4 2880)
>[ 15443.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15443.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15443.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923d20]
>[ 15443.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923d20] width 2880 pitch 11520 (/4 2880)
>[ 15444.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 15444.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 15444.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 15445.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 15445.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 15445.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 15445.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 15445.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 15445.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 15445.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 15445.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 15445.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 15507.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15507.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15509.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798058]
>[ 15509.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798058] width 2880 pitch 11520 (/4 2880)
>[ 15509.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2550]
>[ 15509.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2550] width 2880 pitch 11520 (/4 2880)
>[ 15509.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2550]
>[ 15509.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2550] width 2880 pitch 11520 (/4 2880)
>[ 15509.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15509.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15509.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15509.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15510.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15510.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15510.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2550]
>[ 15510.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2550] width 2880 pitch 11520 (/4 2880)
>[ 15510.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798058]
>[ 15510.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798058] width 2880 pitch 11520 (/4 2880)
>[ 15510.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798058]
>[ 15511.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798058] width 2880 pitch 11520 (/4 2880)
>[ 15511.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15511.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15512.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2550]
>[ 15512.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2550] width 2880 pitch 11520 (/4 2880)
>[ 15512.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2270]
>[ 15512.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2270] width 2880 pitch 11520 (/4 2880)
>[ 15512.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2550]
>[ 15512.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2550] width 2880 pitch 11520 (/4 2880)
>[ 15539.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76350]
>[ 15539.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76350] width 2880 pitch 11520 (/4 2880)
>[ 15539.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7cd8]
>[ 15539.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7cd8] width 2880 pitch 11520 (/4 2880)
>[ 15539.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6d770]
>[ 15539.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6d770] width 2880 pitch 11520 (/4 2880)
>[ 15539.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9f8e8]
>[ 15539.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9f8e8] width 2880 pitch 11520 (/4 2880)
>[ 15539.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4518]
>[ 15539.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4518] width 2880 pitch 11520 (/4 2880)
>[ 15539.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4548]
>[ 15539.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4548] width 2880 pitch 11520 (/4 2880)
>[ 15539.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7cd8]
>[ 15539.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7cd8] width 2880 pitch 11520 (/4 2880)
>[ 15539.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15539.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15539.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6d770]
>[ 15539.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6d770] width 2880 pitch 11520 (/4 2880)
>[ 15539.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d22b0]
>[ 15539.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d22b0] width 2880 pitch 11520 (/4 2880)
>[ 15539.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9f8e8]
>[ 15539.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9f8e8] width 2880 pitch 11520 (/4 2880)
>[ 15539.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c385d8]
>[ 15539.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c385d8] width 2880 pitch 11520 (/4 2880)
>[ 15542.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ace500]
>[ 15542.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ace500] width 2880 pitch 11520 (/4 2880)
>[ 15542.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76350]
>[ 15542.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76350] width 2880 pitch 11520 (/4 2880)
>[ 15542.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7b68]
>[ 15542.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7b68] width 2880 pitch 11520 (/4 2880)
>[ 15542.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b5a8]
>[ 15542.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b5a8] width 2880 pitch 11520 (/4 2880)
>[ 15542.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38800]
>[ 15542.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38800] width 2880 pitch 11520 (/4 2880)
>[ 15542.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7cd8]
>[ 15542.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7cd8] width 2880 pitch 11520 (/4 2880)
>[ 15542.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15542.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15542.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9030]
>[ 15542.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9030] width 2880 pitch 11520 (/4 2880)
>[ 15542.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8f20]
>[ 15542.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8f20] width 2880 pitch 11520 (/4 2880)
>[ 15542.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ace500]
>[ 15542.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ace500] width 2880 pitch 11520 (/4 2880)
>[ 15546.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15546.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15546.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15546.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15546.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15546.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15546.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e01090]
>[ 15546.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e01090] width 2880 pitch 11520 (/4 2880)
>[ 15546.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15546.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15547.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15547.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15547.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15547.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15547.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15547.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15547.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15547.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15548.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15548.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15548.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483a8]
>[ 15548.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483a8] width 2880 pitch 11520 (/4 2880)
>[ 15548.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15548.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15548.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15548.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15552.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15552.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15565.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15565.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15565.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7cd8]
>[ 15565.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7cd8] width 2880 pitch 11520 (/4 2880)
>[ 15565.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15566.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15566.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979bee8]
>[ 15566.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979bee8] width 2880 pitch 11520 (/4 2880)
>[ 15566.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483a8]
>[ 15566.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483a8] width 2880 pitch 11520 (/4 2880)
>[ 15566.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7cd8]
>[ 15566.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7cd8] width 2880 pitch 11520 (/4 2880)
>[ 15566.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15566.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15566.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15566.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15567.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483a8]
>[ 15567.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483a8] width 2880 pitch 11520 (/4 2880)
>[ 15567.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979bee8]
>[ 15567.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979bee8] width 2880 pitch 11520 (/4 2880)
>[ 15567.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15567.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15567.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15568.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15568.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483a8]
>[ 15568.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483a8] width 2880 pitch 11520 (/4 2880)
>[ 15568.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979bee8]
>[ 15568.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979bee8] width 2880 pitch 11520 (/4 2880)
>[ 15568.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15568.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15568.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15568.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15568.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15568.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15571.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e483a8]
>[ 15571.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e483a8] width 2880 pitch 11520 (/4 2880)
>[ 15571.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c66a8]
>[ 15571.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c66a8] width 2880 pitch 11520 (/4 2880)
>[ 15571.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4738]
>[ 15571.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4738] width 2880 pitch 11520 (/4 2880)
>[ 15571.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15571.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15571.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4738]
>[ 15571.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4738] width 2880 pitch 11520 (/4 2880)
>[ 15571.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15572.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15572.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4738]
>[ 15572.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4738] width 2880 pitch 11520 (/4 2880)
>[ 15572.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15572.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15572.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 15572.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 15572.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 15572.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 15572.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15572.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15572.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 15572.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 15572.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca8378]
>[ 15572.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca8378] width 2880 pitch 11520 (/4 2880)
>[ 15578.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac55d8]
>[ 15578.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac55d8] width 2880 pitch 11520 (/4 2880)
>[ 15582.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ca2a0]
>[ 15582.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ca2a0] width 2880 pitch 11520 (/4 2880)
>[ 15599.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b822d8]
>[ 15599.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b822d8] width 2880 pitch 11520 (/4 2880)
>[ 15599.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15599.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15599.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15599.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15599.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c558]
>[ 15599.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c558] width 2880 pitch 11520 (/4 2880)
>[ 15599.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950b2f0]
>[ 15599.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950b2f0] width 2880 pitch 11520 (/4 2880)
>[ 15599.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b822d8]
>[ 15599.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b822d8] width 2880 pitch 11520 (/4 2880)
>[ 15599.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15599.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15599.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951f358]
>[ 15599.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951f358] width 2880 pitch 11520 (/4 2880)
>[ 15599.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15599.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15599.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15599.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15604.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15604.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15604.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15604.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15604.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15604.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15604.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15604.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15604.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15604.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15604.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15604.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15604.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7f98]
>[ 15604.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7f98] width 2880 pitch 11520 (/4 2880)
>[ 15604.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15604.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15604.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15604.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15604.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15604.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15604.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15604.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15604.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7f98]
>[ 15604.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7f98] width 2880 pitch 11520 (/4 2880)
>[ 15604.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15604.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15605.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15605.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15605.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15605.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15605.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7f98]
>[ 15605.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7f98] width 2880 pitch 11520 (/4 2880)
>[ 15605.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15605.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15605.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9745840]
>[ 15605.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9745840] width 2880 pitch 11520 (/4 2880)
>[ 15605.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15605.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15605.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15605.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15605.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15605.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15605.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15605.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15605.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15605.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15605.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15605.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15605.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fb88]
>[ 15606.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fb88] width 2880 pitch 11520 (/4 2880)
>[ 15626.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15626.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15626.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15626.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15626.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c554a8]
>[ 15626.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c554a8] width 2880 pitch 11520 (/4 2880)
>[ 15626.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9427b18]
>[ 15626.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9427b18] width 2880 pitch 11520 (/4 2880)
>[ 15626.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15626.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15626.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997bc18]
>[ 15626.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997bc18] width 2880 pitch 11520 (/4 2880)
>[ 15626.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15626.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15626.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999c8f8]
>[ 15627.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999c8f8] width 2880 pitch 11520 (/4 2880)
>[ 15627.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f940]
>[ 15627.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f940] width 2880 pitch 11520 (/4 2880)
>[ 15627.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15627.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15627.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f940]
>[ 15627.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f940] width 2880 pitch 11520 (/4 2880)
>[ 15627.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15627.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15651.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bac98]
>[ 15651.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bac98] width 2880 pitch 11520 (/4 2880)
>[ 15651.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15651.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15651.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15651.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15652.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9508]
>[ 15652.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9508] width 2880 pitch 11520 (/4 2880)
>[ 15652.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca87d8]
>[ 15652.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca87d8] width 2880 pitch 11520 (/4 2880)
>[ 15652.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15652.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15652.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976f940]
>[ 15652.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976f940] width 2880 pitch 11520 (/4 2880)
>[ 15652.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9508]
>[ 15652.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9508] width 2880 pitch 11520 (/4 2880)
>[ 15652.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca87d8]
>[ 15652.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca87d8] width 2880 pitch 11520 (/4 2880)
>[ 15653.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9508]
>[ 15653.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9508] width 2880 pitch 11520 (/4 2880)
>[ 15653.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e10]
>[ 15653.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e10] width 2880 pitch 11520 (/4 2880)
>[ 15653.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9508]
>[ 15653.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9508] width 2880 pitch 11520 (/4 2880)
>[ 15653.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798058]
>[ 15653.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798058] width 2880 pitch 11520 (/4 2880)
>[ 15653.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798058]
>[ 15654.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798058] width 2880 pitch 11520 (/4 2880)
>[ 15654.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9508]
>[ 15654.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9508] width 2880 pitch 11520 (/4 2880)
>[ 15657.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43258]
>[ 15657.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43258] width 2880 pitch 11520 (/4 2880)
>[ 15657.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98162c8]
>[ 15657.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98162c8] width 2880 pitch 11520 (/4 2880)
>[ 15657.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be660]
>[ 15657.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be660] width 2880 pitch 11520 (/4 2880)
>[ 15657.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d97448]
>[ 15657.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d97448] width 2880 pitch 11520 (/4 2880)
>[ 15657.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2658]
>[ 15657.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2658] width 2880 pitch 11520 (/4 2880)
>[ 15657.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be660]
>[ 15657.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be660] width 2880 pitch 11520 (/4 2880)
>[ 15657.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43258]
>[ 15657.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43258] width 2880 pitch 11520 (/4 2880)
>[ 15657.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e48480]
>[ 15657.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e48480] width 2880 pitch 11520 (/4 2880)
>[ 15657.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf9b0]
>[ 15657.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf9b0] width 2880 pitch 11520 (/4 2880)
>[ 15657.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bc40]
>[ 15657.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bc40] width 2880 pitch 11520 (/4 2880)
>[ 15660.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bc40]
>[ 15660.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bc40] width 2880 pitch 11520 (/4 2880)
>[ 15660.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15660.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15660.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bc40]
>[ 15660.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bc40] width 2880 pitch 11520 (/4 2880)
>[ 15660.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3900]
>[ 15660.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3900] width 2880 pitch 11520 (/4 2880)
>[ 15660.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf9b0]
>[ 15660.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf9b0] width 2880 pitch 11520 (/4 2880)
>[ 15660.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c3900]
>[ 15660.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c3900] width 2880 pitch 11520 (/4 2880)
>[ 15660.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15660.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15660.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21208]
>[ 15660.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21208] width 2880 pitch 11520 (/4 2880)
>[ 15660.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15660.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15660.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9634768]
>[ 15660.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9634768] width 2880 pitch 11520 (/4 2880)
>[ 15662.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9973430]
>[ 15662.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9973430] width 2880 pitch 11520 (/4 2880)
>[ 15662.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ddd8]
>[ 15662.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ddd8] width 2880 pitch 11520 (/4 2880)
>[ 15662.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9703fa8]
>[ 15662.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9703fa8] width 2880 pitch 11520 (/4 2880)
>[ 15662.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad2658]
>[ 15662.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad2658] width 2880 pitch 11520 (/4 2880)
>[ 15663.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a588]
>[ 15663.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a588] width 2880 pitch 11520 (/4 2880)
>[ 15663.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc2488]
>[ 15663.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc2488] width 2880 pitch 11520 (/4 2880)
>[ 15663.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21208]
>[ 15663.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21208] width 2880 pitch 11520 (/4 2880)
>[ 15663.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99af860]
>[ 15663.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99af860] width 2880 pitch 11520 (/4 2880)
>[ 15664.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9634768]
>[ 15664.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9634768] width 2880 pitch 11520 (/4 2880)
>[ 15664.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43258]
>[ 15664.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43258] width 2880 pitch 11520 (/4 2880)
>[ 15664.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9621868]
>[ 15665.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9621868] width 2880 pitch 11520 (/4 2880)
>[ 15666.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 15666.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 15667.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9703fa8]
>[ 15667.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9703fa8] width 2880 pitch 11520 (/4 2880)
>[ 15667.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd6280]
>[ 15667.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd6280] width 2880 pitch 11520 (/4 2880)
>[ 15667.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9431410]
>[ 15667.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9431410] width 2880 pitch 11520 (/4 2880)
>[ 15667.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2980]
>[ 15667.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2980] width 2880 pitch 11520 (/4 2880)
>[ 15667.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd6280]
>[ 15667.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd6280] width 2880 pitch 11520 (/4 2880)
>[ 15667.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b2810]
>[ 15667.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b2810] width 2880 pitch 11520 (/4 2880)
>[ 15689.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c720e8]
>[ 15689.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c720e8] width 2880 pitch 11520 (/4 2880)
>[ 15689.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95260c0]
>[ 15689.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95260c0] width 2880 pitch 11520 (/4 2880)
>[ 15689.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c720e8]
>[ 15689.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c720e8] width 2880 pitch 11520 (/4 2880)
>[ 15689.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8408]
>[ 15689.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8408] width 2880 pitch 11520 (/4 2880)
>[ 15689.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c720e8]
>[ 15689.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c720e8] width 2880 pitch 11520 (/4 2880)
>[ 15689.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8408]
>[ 15689.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8408] width 2880 pitch 11520 (/4 2880)
>[ 15689.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c720e8]
>[ 15689.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c720e8] width 2880 pitch 11520 (/4 2880)
>[ 15689.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8408]
>[ 15689.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8408] width 2880 pitch 11520 (/4 2880)
>[ 15690.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c720e8]
>[ 15690.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c720e8] width 2880 pitch 11520 (/4 2880)
>[ 15695.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf3c8]
>[ 15695.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf3c8] width 2880 pitch 11520 (/4 2880)
>[ 15695.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf3f8]
>[ 15695.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf3f8] width 2880 pitch 11520 (/4 2880)
>[ 15695.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf3c8]
>[ 15695.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf3c8] width 2880 pitch 11520 (/4 2880)
>[ 15695.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf3f8]
>[ 15695.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf3f8] width 2880 pitch 11520 (/4 2880)
>[ 15695.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf3c8]
>[ 15695.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf3c8] width 2880 pitch 11520 (/4 2880)
>[ 15695.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc2488]
>[ 15695.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc2488] width 2880 pitch 11520 (/4 2880)
>[ 15695.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 15695.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 15695.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95260c0]
>[ 15695.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95260c0] width 2880 pitch 11520 (/4 2880)
>[ 15695.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952aad8]
>[ 15695.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952aad8] width 2880 pitch 11520 (/4 2880)
>[ 15695.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a2030]
>[ 15695.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a2030] width 2880 pitch 11520 (/4 2880)
>[ 15695.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95260c0]
>[ 15695.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95260c0] width 2880 pitch 11520 (/4 2880)
>[ 15695.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4ec28]
>[ 15695.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4ec28] width 2880 pitch 11520 (/4 2880)
>[ 15751.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519488]
>[ 15751.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519488] width 2880 pitch 11520 (/4 2880)
>[ 15751.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b5a8]
>[ 15751.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b5a8] width 2880 pitch 11520 (/4 2880)
>[ 15751.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13a48]
>[ 15751.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13a48] width 2880 pitch 11520 (/4 2880)
>[ 15751.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943d4b8]
>[ 15751.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943d4b8] width 2880 pitch 11520 (/4 2880)
>[ 15752.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519378]
>[ 15752.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519378] width 2880 pitch 11520 (/4 2880)
>[ 15752.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943d4b8]
>[ 15752.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943d4b8] width 2880 pitch 11520 (/4 2880)
>[ 15752.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943d4b8]
>[ 15752.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943d4b8] width 2880 pitch 11520 (/4 2880)
>[ 15752.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943d4b8]
>[ 15752.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943d4b8] width 2880 pitch 11520 (/4 2880)
>[ 15752.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952f18]
>[ 15752.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952f18] width 2880 pitch 11520 (/4 2880)
>[ 15752.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a76d8]
>[ 15752.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a76d8] width 2880 pitch 11520 (/4 2880)
>[ 15832.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15833.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b030]
>[ 15833.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b030] width 2880 pitch 11520 (/4 2880)
>[ 15833.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15833.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b030]
>[ 15833.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b030] width 2880 pitch 11520 (/4 2880)
>[ 15833.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15833.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15833.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952ed8]
>[ 15833.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952ed8] width 2880 pitch 11520 (/4 2880)
>[ 15833.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15833.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15833.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15833.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15833.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15833.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15833.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15833.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15833.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15833.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15833.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15833.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15833.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15833.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15833.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15833.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15833.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15833.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15833.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15833.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15833.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15833.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62fa8]
>[ 15833.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62fa8] width 2880 pitch 11520 (/4 2880)
>[ 15833.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15833.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15833.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62fa8]
>[ 15833.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62fa8] width 2880 pitch 11520 (/4 2880)
>[ 15833.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15833.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15834.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15834.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15834.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15834.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15834.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15834.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15834.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15834.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15834.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15834.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b200]
>[ 15834.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b200] width 2880 pitch 11520 (/4 2880)
>[ 15834.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15834.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b200]
>[ 15834.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b200] width 2880 pitch 11520 (/4 2880)
>[ 15834.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15834.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15834.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15834.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15834.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15834.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15834.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15834.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15834.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15834.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15834.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15834.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac88]
>[ 15834.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac88] width 2880 pitch 11520 (/4 2880)
>[ 15834.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15834.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15834.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15834.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15834.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15834.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15834.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15834.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15834.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15834.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15834.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0a330]
>[ 15834.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0a330] width 2880 pitch 11520 (/4 2880)
>[ 15835.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15835.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15835.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15835.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15835.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15835.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15835.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15835.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15835.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15835.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15835.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc09d0]
>[ 15835.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc09d0] width 2880 pitch 11520 (/4 2880)
>[ 15836.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837458]
>[ 15836.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837458] width 2880 pitch 11520 (/4 2880)
>[ 15836.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1e68]
>[ 15836.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1e68] width 2880 pitch 11520 (/4 2880)
>[ 15836.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15836.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15836.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8ac00]
>[ 15836.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8ac00] width 2880 pitch 11520 (/4 2880)
>[ 15836.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952f60]
>[ 15836.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952f60] width 2880 pitch 11520 (/4 2880)
>[ 15836.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15836.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15836.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9952f60]
>[ 15836.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9952f60] width 2880 pitch 11520 (/4 2880)
>[ 15841.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf050]
>[ 15841.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf050] width 2880 pitch 11520 (/4 2880)
>[ 15853.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15853.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15854.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 15854.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 15857.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 15857.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 15867.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 15867.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 15879.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15879.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15880.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4ad48]
>[ 15880.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4ad48] width 2880 pitch 11520 (/4 2880)
>[ 15883.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 15883.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 15891.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adb5d0]
>[ 15891.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adb5d0] width 2880 pitch 11520 (/4 2880)
>[ 15891.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43ab0]
>[ 15891.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43ab0] width 2880 pitch 11520 (/4 2880)
>[ 15891.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15891.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15891.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43ab0]
>[ 15891.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43ab0] width 2880 pitch 11520 (/4 2880)
>[ 15891.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15891.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15891.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15891.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15891.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15891.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15891.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15891.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15891.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 15891.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 15891.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15891.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15891.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43ab0]
>[ 15892.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43ab0] width 2880 pitch 11520 (/4 2880)
>[ 15892.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adb5d0]
>[ 15892.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adb5d0] width 2880 pitch 11520 (/4 2880)
>[ 15892.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15892.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15892.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15892.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15893.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15893.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15893.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43a80]
>[ 15893.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43a80] width 2880 pitch 11520 (/4 2880)
>[ 15894.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15894.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15894.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15894.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c5f0]
>[ 15896.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c5f0] width 2880 pitch 11520 (/4 2880)
>[ 15896.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15896.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15896.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15896.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15896.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15896.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15896.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15896.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15896.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15896.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15896.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15896.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15896.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15896.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15896.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15896.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15896.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adb5d0]
>[ 15896.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adb5d0] width 2880 pitch 11520 (/4 2880)
>[ 15896.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15896.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15896.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c5f0]
>[ 15896.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c5f0] width 2880 pitch 11520 (/4 2880)
>[ 15896.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15896.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15898.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15898.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15898.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15898.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15898.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15898.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15898.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15898.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15898.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adb5d0]
>[ 15898.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adb5d0] width 2880 pitch 11520 (/4 2880)
>[ 15898.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15898.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15898.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15898.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15898.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15898.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15898.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15898.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15902.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15902.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15902.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15902.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15902.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c5f0]
>[ 15902.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c5f0] width 2880 pitch 11520 (/4 2880)
>[ 15902.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15902.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15902.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15902.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15902.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15902.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15902.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15902.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15902.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15902.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15902.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15902.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15902.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15902.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15902.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15902.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15902.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15902.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15902.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15902.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15906.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15906.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15906.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15906.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15906.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15906.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15906.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15906.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15906.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15906.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15906.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15906.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15906.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7ded0]
>[ 15906.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7ded0] width 2880 pitch 11520 (/4 2880)
>[ 15906.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c5f0]
>[ 15906.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c5f0] width 2880 pitch 11520 (/4 2880)
>[ 15906.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7ded0]
>[ 15906.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7ded0] width 2880 pitch 11520 (/4 2880)
>[ 15906.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15906.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15906.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b0c8]
>[ 15906.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b0c8] width 2880 pitch 11520 (/4 2880)
>[ 15906.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 15906.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 15906.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15906.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15919.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7ded0]
>[ 15919.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7ded0] width 2880 pitch 11520 (/4 2880)
>[ 15922.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7ded0]
>[ 15922.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7ded0] width 2880 pitch 11520 (/4 2880)
>[ 15922.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 15922.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 15927.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b718]
>[ 15927.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b718] width 2880 pitch 11520 (/4 2880)
>[ 15963.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aef70]
>[ 15963.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aef70] width 2880 pitch 11520 (/4 2880)
>[ 15965.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15965.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15978.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 15978.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 15985.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97785e8]
>[ 15985.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97785e8] width 2880 pitch 11520 (/4 2880)
>[ 15995.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15995.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15995.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15995.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15995.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d048]
>[ 15995.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d048] width 2880 pitch 11520 (/4 2880)
>[ 15995.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15995.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15995.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15995.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15995.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15995.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15995.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15995.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15996.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15996.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15996.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e77b8]
>[ 15996.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e77b8] width 2880 pitch 11520 (/4 2880)
>[ 15996.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15996.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15996.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15996.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15997.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15997.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15997.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15997.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15997.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aef70]
>[ 15997.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aef70] width 2880 pitch 11520 (/4 2880)
>[ 15997.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8cd58]
>[ 15997.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8cd58] width 2880 pitch 11520 (/4 2880)
>[ 15997.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aef70]
>[ 15997.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aef70] width 2880 pitch 11520 (/4 2880)
>[ 16002.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0df0]
>[ 16002.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0df0] width 2880 pitch 11520 (/4 2880)
>[ 16002.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d56b8]
>[ 16002.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d56b8] width 2880 pitch 11520 (/4 2880)
>[ 16003.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43960]
>[ 16003.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43960] width 2880 pitch 11520 (/4 2880)
>[ 16004.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43960]
>[ 16004.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43960] width 2880 pitch 11520 (/4 2880)
>[ 16004.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43960]
>[ 16004.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43960] width 2880 pitch 11520 (/4 2880)
>[ 16004.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523a20]
>[ 16004.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523a20] width 2880 pitch 11520 (/4 2880)
>[ 16004.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d56b8]
>[ 16004.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d56b8] width 2880 pitch 11520 (/4 2880)
>[ 16004.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43960]
>[ 16005.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43960] width 2880 pitch 11520 (/4 2880)
>[ 16005.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523a20]
>[ 16005.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523a20] width 2880 pitch 11520 (/4 2880)
>[ 16005.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523a20]
>[ 16005.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523a20] width 2880 pitch 11520 (/4 2880)
>[ 16005.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9523a20]
>[ 16005.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9523a20] width 2880 pitch 11520 (/4 2880)
>[ 16005.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9891f80]
>[ 16005.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9891f80] width 2880 pitch 11520 (/4 2880)
>[ 16012.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16012.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16016.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16016.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16016.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16016.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16016.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 16016.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 16016.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16016.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16016.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 16016.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 16016.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16016.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16016.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d55d8]
>[ 16017.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d55d8] width 2880 pitch 11520 (/4 2880)
>[ 16017.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16017.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16017.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 16017.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 16017.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16017.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16017.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a11d0]
>[ 16017.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a11d0] width 2880 pitch 11520 (/4 2880)
>[ 16017.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16017.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16017.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2af40]
>[ 16017.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2af40] width 2880 pitch 11520 (/4 2880)
>[ 16017.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b822d8]
>[ 16017.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b822d8] width 2880 pitch 11520 (/4 2880)
>[ 16017.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16017.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16020.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16020.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16020.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1ebc0]
>[ 16020.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1ebc0] width 2880 pitch 11520 (/4 2880)
>[ 16021.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1ebc0]
>[ 16021.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1ebc0] width 2880 pitch 11520 (/4 2880)
>[ 16021.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2ed28]
>[ 16021.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2ed28] width 2880 pitch 11520 (/4 2880)
>[ 16021.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16021.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16021.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16021.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16021.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16021.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16021.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16021.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16021.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16021.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16021.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d16820]
>[ 16021.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d16820] width 2880 pitch 11520 (/4 2880)
>[ 16025.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16025.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16025.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16026.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16040.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16040.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16044.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16044.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16044.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16044.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16044.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16044.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16044.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16044.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16044.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16044.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16044.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16044.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16045.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16045.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16045.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16045.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16045.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16045.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16046.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16046.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16046.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16047.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16047.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16047.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16049.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16049.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16049.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16049.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16050.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16050.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16050.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16050.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16050.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16051.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16051.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16051.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16052.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16052.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16054.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16054.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16055.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16055.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16055.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16055.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16055.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99feb30]
>[ 16055.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99feb30] width 2880 pitch 11520 (/4 2880)
>[ 16055.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9702b70]
>[ 16055.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9702b70] width 2880 pitch 11520 (/4 2880)
>[ 16062.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9470938]
>[ 16062.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9470938] width 2880 pitch 11520 (/4 2880)
>[ 16062.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac1960]
>[ 16062.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac1960] width 2880 pitch 11520 (/4 2880)
>[ 16062.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16062.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16062.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc5e40]
>[ 16062.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc5e40] width 2880 pitch 11520 (/4 2880)
>[ 16062.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16062.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16062.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc5e40]
>[ 16062.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc5e40] width 2880 pitch 11520 (/4 2880)
>[ 16062.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec618]
>[ 16062.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec618] width 2880 pitch 11520 (/4 2880)
>[ 16062.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec5e8]
>[ 16062.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec5e8] width 2880 pitch 11520 (/4 2880)
>[ 16062.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16062.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16062.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9605a00]
>[ 16062.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9605a00] width 2880 pitch 11520 (/4 2880)
>[ 16062.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc5e40]
>[ 16062.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc5e40] width 2880 pitch 11520 (/4 2880)
>[ 16062.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec618]
>[ 16062.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec618] width 2880 pitch 11520 (/4 2880)
>[ 16062.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec5e8]
>[ 16062.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec5e8] width 2880 pitch 11520 (/4 2880)
>[ 16062.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8b5e0]
>[ 16062.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8b5e0] width 2880 pitch 11520 (/4 2880)
>[ 16063.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16063.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16063.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97db508]
>[ 16063.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97db508] width 2880 pitch 11520 (/4 2880)
>[ 16065.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96f18]
>[ 16065.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96f18] width 2880 pitch 11520 (/4 2880)
>[ 16065.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16065.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16065.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16065.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16065.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc5e70]
>[ 16065.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc5e70] width 2880 pitch 11520 (/4 2880)
>[ 16068.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973ecc8]
>[ 16068.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973ecc8] width 2880 pitch 11520 (/4 2880)
>[ 16069.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7360]
>[ 16069.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7360] width 2880 pitch 11520 (/4 2880)
>[ 16071.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b3c0]
>[ 16071.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b3c0] width 2880 pitch 11520 (/4 2880)
>[ 16093.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16093.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16093.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16093.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16093.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16094.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16094.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16094.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16094.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16094.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16094.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16094.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16094.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16094.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16095.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16095.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16095.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16095.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16097.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16097.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16098.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16098.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16098.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16098.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16098.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16098.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16098.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16098.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16098.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16098.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16098.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23ce0]
>[ 16098.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23ce0] width 2880 pitch 11520 (/4 2880)
>[ 16101.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94026b0]
>[ 16101.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94026b0] width 2880 pitch 11520 (/4 2880)
>[ 16101.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a43e0]
>[ 16101.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a43e0] width 2880 pitch 11520 (/4 2880)
>[ 16101.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16101.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16101.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e6b8]
>[ 16101.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e6b8] width 2880 pitch 11520 (/4 2880)
>[ 16101.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16101.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16101.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16101.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16101.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4ad48]
>[ 16101.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4ad48] width 2880 pitch 11520 (/4 2880)
>[ 16102.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16102.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16102.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2c290]
>[ 16102.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2c290] width 2880 pitch 11520 (/4 2880)
>[ 16102.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16102.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16102.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e6b8]
>[ 16102.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e6b8] width 2880 pitch 11520 (/4 2880)
>[ 16102.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c138c0]
>[ 16102.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c138c0] width 2880 pitch 11520 (/4 2880)
>[ 16104.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72830]
>[ 16104.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72830] width 2880 pitch 11520 (/4 2880)
>[ 16104.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16104.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16105.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16105.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16105.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16105.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16105.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d90218]
>[ 16105.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d90218] width 2880 pitch 11520 (/4 2880)
>[ 16105.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16105.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16105.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9628e28]
>[ 16105.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9628e28] width 2880 pitch 11520 (/4 2880)
>[ 16109.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9616be8]
>[ 16109.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9616be8] width 2880 pitch 11520 (/4 2880)
>[ 16109.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16109.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16110.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 16110.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 16110.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16110.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16110.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16110.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16110.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16110.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16110.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72830]
>[ 16110.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72830] width 2880 pitch 11520 (/4 2880)
>[ 16110.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16110.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16110.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16110.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16111.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16111.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16111.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16111.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16111.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9923ca8]
>[ 16112.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9923ca8] width 2880 pitch 11520 (/4 2880)
>[ 16112.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676b50]
>[ 16112.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676b50] width 2880 pitch 11520 (/4 2880)
>[ 16112.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2ed28]
>[ 16112.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2ed28] width 2880 pitch 11520 (/4 2880)
>[ 16112.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5a358]
>[ 16112.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5a358] width 2880 pitch 11520 (/4 2880)
>[ 16112.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2ed28]
>[ 16112.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2ed28] width 2880 pitch 11520 (/4 2880)
>[ 16122.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953cc18]
>[ 16122.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953cc18] width 2880 pitch 11520 (/4 2880)
>[ 16123.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16123.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16140.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1270]
>[ 16140.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1270] width 2880 pitch 11520 (/4 2880)
>[ 16146.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d5e30]
>[ 16146.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d5e30] width 2880 pitch 11520 (/4 2880)
>[ 16146.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16146.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16146.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da2328]
>[ 16146.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da2328] width 2880 pitch 11520 (/4 2880)
>[ 16146.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16146.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16146.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16147.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16147.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16147.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16147.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16147.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16147.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d5e30]
>[ 16147.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d5e30] width 2880 pitch 11520 (/4 2880)
>[ 16147.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16147.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16147.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16147.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16148.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16148.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16148.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16148.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16150.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16150.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16151.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16151.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16151.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16151.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16151.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16151.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16151.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16151.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16151.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16151.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16153.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16154.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16155.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16155.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16158.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16158.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16160.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16160.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16169.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16169.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16169.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16169.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16169.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16169.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16169.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16169.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16169.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16169.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16169.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16169.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16169.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16169.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16170.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16170.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16170.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16170.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16170.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16170.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16170.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16170.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16171.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16171.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16171.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16171.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16171.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9860]
>[ 16171.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9860] width 2880 pitch 11520 (/4 2880)
>[ 16171.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16171.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16177.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16177.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16202.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16202.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16202.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16202.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16202.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16202.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16202.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16202.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16202.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16202.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16202.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16202.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16202.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16202.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16203.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16203.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16203.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16203.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16203.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16203.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16203.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16203.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16204.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16204.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16204.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16204.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16205.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16205.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16206.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16206.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16207.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16207.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16208.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16208.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16212.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16212.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16217.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16217.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16220.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16220.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16221.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16221.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16221.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16221.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16221.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16221.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16222.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16222.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16222.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16222.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16223.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16223.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16223.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16223.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16223.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16224.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16224.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16224.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16224.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16224.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16224.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16224.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16225.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16225.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16226.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16226.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16226.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac87b0]
>[ 16226.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac87b0] width 2880 pitch 11520 (/4 2880)
>[ 16226.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16226.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16226.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16226.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16226.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16226.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16227.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16227.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16236.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16236.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16236.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16236.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16236.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16236.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16242.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16242.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16242.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16242.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16242.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16242.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16243.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16243.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16243.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16243.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16243.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8a060]
>[ 16243.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8a060] width 2880 pitch 11520 (/4 2880)
>[ 16243.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975c998]
>[ 16243.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975c998] width 2880 pitch 11520 (/4 2880)
>[ 16243.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 16243.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 16258.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16258.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16258.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16258.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16258.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 16258.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 16258.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16258.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16258.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 16258.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 16258.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16258.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16259.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16259.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16259.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16259.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16259.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16259.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16259.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 16259.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 16262.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16262.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16262.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccaa48]
>[ 16262.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccaa48] width 2880 pitch 11520 (/4 2880)
>[ 16263.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16263.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16279.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16279.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16280.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16280.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16280.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16280.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16281.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16281.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16281.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16282.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16282.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16282.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16282.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16282.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16282.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a13d0]
>[ 16282.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a13d0] width 2880 pitch 11520 (/4 2880)
>[ 16282.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16282.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16291.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16291.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16298.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16298.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16299.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16299.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16299.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16299.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16299.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16299.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16299.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16299.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16299.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16299.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16300.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16300.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16300.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16300.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16300.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16300.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16300.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16300.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16301.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16301.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16302.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16302.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16302.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16302.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16303.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16303.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16303.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16303.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16304.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16304.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16304.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16304.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16305.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16305.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16306.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16306.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16307.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16307.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16307.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16307.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16307.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16307.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16307.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16308.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16308.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16308.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16308.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16308.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16308.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16308.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16308.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16308.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16308.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16308.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16308.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16308.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16309.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16309.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16309.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16309.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16309.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16309.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16309.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16309.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16310.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16310.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16310.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16310.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16310.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16310.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16311.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16311.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16311.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6b70]
>[ 16311.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6b70] width 2880 pitch 11520 (/4 2880)
>[ 16311.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92a10]
>[ 16311.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92a10] width 2880 pitch 11520 (/4 2880)
>[ 16311.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08370]
>[ 16311.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08370] width 2880 pitch 11520 (/4 2880)
>[ 16311.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16311.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16319.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99212b8]
>[ 16319.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99212b8] width 2880 pitch 11520 (/4 2880)
>[ 16319.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16319.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16319.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d78b10]
>[ 16319.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d78b10] width 2880 pitch 11520 (/4 2880)
>[ 16319.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16319.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16319.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c0d0]
>[ 16319.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c0d0] width 2880 pitch 11520 (/4 2880)
>[ 16319.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16319.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16319.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d78b10]
>[ 16319.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d78b10] width 2880 pitch 11520 (/4 2880)
>[ 16320.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16320.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16320.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d78b10]
>[ 16320.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d78b10] width 2880 pitch 11520 (/4 2880)
>[ 16320.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5b8]
>[ 16320.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5b8] width 2880 pitch 11520 (/4 2880)
>[ 16320.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97218c0]
>[ 16320.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97218c0] width 2880 pitch 11520 (/4 2880)
>[ 16320.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16320.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16320.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c0e8]
>[ 16320.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c0e8] width 2880 pitch 11520 (/4 2880)
>[ 16320.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16320.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16320.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c0e8]
>[ 16320.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c0e8] width 2880 pitch 11520 (/4 2880)
>[ 16320.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4e3a0]
>[ 16320.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4e3a0] width 2880 pitch 11520 (/4 2880)
>[ 16321.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d5508]
>[ 16321.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d5508] width 2880 pitch 11520 (/4 2880)
>[ 16321.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d78b10]
>[ 16321.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d78b10] width 2880 pitch 11520 (/4 2880)
>[ 16321.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16321.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16329.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f90d8]
>[ 16329.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f90d8] width 2880 pitch 11520 (/4 2880)
>[ 16330.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1238]
>[ 16330.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1238] width 2880 pitch 11520 (/4 2880)
>[ 16330.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6d770]
>[ 16330.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6d770] width 2880 pitch 11520 (/4 2880)
>[ 16330.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16330.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16330.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5b8]
>[ 16330.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5b8] width 2880 pitch 11520 (/4 2880)
>[ 16330.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdf5f8]
>[ 16330.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdf5f8] width 2880 pitch 11520 (/4 2880)
>[ 16330.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97218c0]
>[ 16330.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97218c0] width 2880 pitch 11520 (/4 2880)
>[ 16332.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16333.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16334.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80b50]
>[ 16335.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80b50] width 2880 pitch 11520 (/4 2880)
>[ 16336.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97218c0]
>[ 16336.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97218c0] width 2880 pitch 11520 (/4 2880)
>[ 16342.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16342.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16342.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16342.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16342.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16342.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16343.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16343.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16343.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16343.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16343.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bbb10]
>[ 16343.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bbb10] width 2880 pitch 11520 (/4 2880)
>[ 16343.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x946e948]
>[ 16344.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x946e948] width 2880 pitch 11520 (/4 2880)
>[ 16344.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98533b0]
>[ 16344.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98533b0] width 2880 pitch 11520 (/4 2880)
>[ 16345.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb46e8]
>[ 16345.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb46e8] width 2880 pitch 11520 (/4 2880)
>[ 16345.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb46e8]
>[ 16345.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb46e8] width 2880 pitch 11520 (/4 2880)
>[ 16345.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16345.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16345.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e00cb0]
>[ 16345.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e00cb0] width 2880 pitch 11520 (/4 2880)
>[ 16345.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac96c0]
>[ 16345.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac96c0] width 2880 pitch 11520 (/4 2880)
>[ 16345.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac96c0]
>[ 16345.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac96c0] width 2880 pitch 11520 (/4 2880)
>[ 16361.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16361.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16362.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16362.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16362.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16362.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16362.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16362.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16362.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16362.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16362.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16362.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16362.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16362.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16362.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e048]
>[ 16362.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e048] width 2880 pitch 11520 (/4 2880)
>[ 16362.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16362.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16362.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16362.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16362.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16362.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16362.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16362.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16362.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e048]
>[ 16362.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e048] width 2880 pitch 11520 (/4 2880)
>[ 16362.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16362.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16362.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94023e0]
>[ 16362.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94023e0] width 2880 pitch 11520 (/4 2880)
>[ 16364.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16364.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16365.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16365.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16365.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16365.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16365.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfc20]
>[ 16365.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfc20] width 2880 pitch 11520 (/4 2880)
>[ 16365.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16365.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16365.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16365.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16365.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16365.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16365.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16365.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16365.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16365.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16365.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16365.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16366.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16366.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16366.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16366.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16366.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16366.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16366.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16367.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16367.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16367.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16367.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16367.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16367.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16367.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16367.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16367.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16367.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16367.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16367.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16367.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16367.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16367.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16367.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16367.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16367.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16367.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16367.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16367.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16367.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16367.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16367.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16367.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16367.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16367.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16367.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16367.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954b320]
>[ 16367.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954b320] width 2880 pitch 11520 (/4 2880)
>[ 16367.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16367.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16367.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16367.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16368.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed480]
>[ 16368.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed480] width 2880 pitch 11520 (/4 2880)
>[ 16368.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16368.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16368.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16368.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16368.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d20b20]
>[ 16368.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d20b20] width 2880 pitch 11520 (/4 2880)
>[ 16368.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16368.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16368.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16368.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16369.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6480]
>[ 16369.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6480] width 2880 pitch 11520 (/4 2880)
>[ 16369.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16369.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16369.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16369.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16369.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16369.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16369.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16369.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16373.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16373.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16376.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16376.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16376.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16376.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16413.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16413.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16482.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16482.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16482.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16482.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16482.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16482.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16482.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16482.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16483.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16483.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16483.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16483.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16483.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16483.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16484.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16484.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16484.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16484.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16484.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fca0]
>[ 16484.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fca0] width 2880 pitch 11520 (/4 2880)
>[ 16484.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16484.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16484.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fca0]
>[ 16484.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fca0] width 2880 pitch 11520 (/4 2880)
>[ 16606.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16606.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16607.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fca0]
>[ 16607.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fca0] width 2880 pitch 11520 (/4 2880)
>[ 16607.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16607.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16607.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fca0]
>[ 16607.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fca0] width 2880 pitch 11520 (/4 2880)
>[ 16607.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16607.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16607.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fca0]
>[ 16607.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fca0] width 2880 pitch 11520 (/4 2880)
>[ 16607.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16607.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16607.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ef090]
>[ 16607.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ef090] width 2880 pitch 11520 (/4 2880)
>[ 16607.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16607.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16607.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16607.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16607.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94023f0]
>[ 16607.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94023f0] width 2880 pitch 11520 (/4 2880)
>[ 16607.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16607.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16607.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ef090]
>[ 16607.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ef090] width 2880 pitch 11520 (/4 2880)
>[ 16607.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16607.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16608.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 16608.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 16608.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16608.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16608.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16608.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16609.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16609.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16609.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16609.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16609.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16609.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16609.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16609.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16609.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16609.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16609.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16609.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16609.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16609.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16609.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16609.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16609.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16609.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16614.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94023f0]
>[ 16614.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94023f0] width 2880 pitch 11520 (/4 2880)
>[ 16616.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16616.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16617.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16617.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16628.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16628.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16628.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16628.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16635.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16635.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16635.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16635.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16646.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16647.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16647.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16647.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16647.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16647.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16647.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16647.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16647.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca80b8]
>[ 16647.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca80b8] width 2880 pitch 11520 (/4 2880)
>[ 16647.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16647.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16647.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca80b8]
>[ 16647.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca80b8] width 2880 pitch 11520 (/4 2880)
>[ 16648.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16648.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16648.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16648.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16648.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16648.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16648.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16648.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16648.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca80b8]
>[ 16648.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca80b8] width 2880 pitch 11520 (/4 2880)
>[ 16649.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16649.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16649.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca80b8]
>[ 16649.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca80b8] width 2880 pitch 11520 (/4 2880)
>[ 16650.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16650.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16650.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 16650.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 16650.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16650.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16650.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 16650.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 16650.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16650.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16655.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 16655.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 16655.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 16655.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 16656.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 16656.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 16656.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 16656.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 16657.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 16657.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 16657.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 16657.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 16658.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 16658.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 16658.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16658.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16658.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 16658.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 16659.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 16659.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 16661.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 16661.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 16661.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 16661.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 16662.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 16662.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 16662.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 16662.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 16662.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 16662.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 16662.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 16662.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 16674.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 16674.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 16675.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 16675.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 16675.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 16675.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 16675.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 16675.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 16675.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 16675.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 16675.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 16675.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 16675.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16675.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16675.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16675.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16675.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 16675.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 16675.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 16675.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 16675.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 16675.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 16675.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16675.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16679.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 16679.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 16679.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16679.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16680.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 16680.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 16680.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 16680.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 16680.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 16680.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 16680.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 16680.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 16680.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 16680.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 16680.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 16680.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 16680.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 16681.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 16681.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16681.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16681.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 16681.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 16681.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16681.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16682.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16682.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16683.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 16683.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 16692.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 16692.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 16697.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93938]
>[ 16697.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93938] width 2880 pitch 11520 (/4 2880)
>[ 16714.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 16714.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 16714.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e9a0]
>[ 16714.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e9a0] width 2880 pitch 11520 (/4 2880)
>[ 16727.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 16727.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 16727.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 16727.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 16743.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16743.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16743.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 16743.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 16768.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 16768.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 16769.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e527c8]
>[ 16769.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e527c8] width 2880 pitch 11520 (/4 2880)
>[ 16772.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 16772.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 16787.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db9f68]
>[ 16787.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db9f68] width 2880 pitch 11520 (/4 2880)
>[ 16788.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16788.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16790.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 16790.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 16792.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 16792.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 16799.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 16799.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 16799.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fede0]
>[ 16799.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fede0] width 2880 pitch 11520 (/4 2880)
>[ 16806.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 16806.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 16808.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 16808.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 16808.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16808.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16837.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 16837.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 16845.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 16845.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 16853.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e93938]
>[ 16853.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e93938] width 2880 pitch 11520 (/4 2880)
>[ 16854.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16854.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16866.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16866.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16868.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 16868.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 16870.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d468]
>[ 16870.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d468] width 2880 pitch 11520 (/4 2880)
>[ 16876.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 16876.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 16877.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 16877.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 16879.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 16879.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 16891.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 16891.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 16891.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 16891.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 16891.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 16891.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 16891.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db9f68]
>[ 16891.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db9f68] width 2880 pitch 11520 (/4 2880)
>[ 16891.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 16891.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 16891.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 16891.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 16891.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 16892.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 16892.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 16892.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 16892.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 16892.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 16892.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16892.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16892.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 16892.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 16902.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740400]
>[ 16902.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740400] width 2880 pitch 11520 (/4 2880)
>[ 16906.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 16906.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 16906.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2528]
>[ 16906.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2528] width 2880 pitch 11520 (/4 2880)
>[ 16906.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 16906.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 16906.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 16907.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 16907.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 16907.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 16907.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 16907.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 16907.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 16907.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 16907.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 16907.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 16907.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 16907.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 16907.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 16908.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 16908.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 16908.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 16908.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 16908.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 16908.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 16908.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 16909.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16909.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16909.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 16909.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 16918.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 16918.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 16918.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 16918.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 16918.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 16918.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 16920.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 16920.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 16921.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 16922.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 16922.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 16922.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 16929.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 16929.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 16939.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16939.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16942.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 16942.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 16944.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 16944.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 16961.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 16961.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 16984.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 16984.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 16985.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 16985.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 16985.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 16985.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 16985.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 16985.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 16985.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 16985.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 16985.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 16985.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 16985.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 16985.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 16985.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 16985.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 16985.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 16985.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 16985.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 16985.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 16985.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 16985.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 16985.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 16985.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 16985.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 16985.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 16985.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db9f68]
>[ 16985.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db9f68] width 2880 pitch 11520 (/4 2880)
>[ 16987.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 16987.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 16990.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 16990.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 16990.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16990.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16990.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 16990.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 16990.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 16990.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 16990.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 16990.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 16990.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16990.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16990.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 16990.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 16990.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 16990.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 16990.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16990.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16990.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 16990.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 16990.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16990.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16990.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 16990.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 16990.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 16990.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 16993.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 16993.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 16998.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 16998.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 16999.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 16999.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17019.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17019.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17026.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17026.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17026.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 17026.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 17035.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 17035.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 17056.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 17056.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 17062.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17062.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17062.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17062.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17062.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17062.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17062.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17062.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17062.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17062.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17063.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17063.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17063.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17063.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17063.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 17063.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 17063.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 17063.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 17063.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 17063.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 17064.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17064.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17064.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17064.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17064.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17064.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17064.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17064.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17064.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17064.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17064.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17064.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17070.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17070.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17070.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17070.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17070.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17070.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17070.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17070.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17070.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17070.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17070.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17070.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17070.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17070.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17070.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17070.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17070.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17070.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17070.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17070.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17070.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17070.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17070.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e5cb8]
>[ 17070.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e5cb8] width 2880 pitch 11520 (/4 2880)
>[ 17070.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17070.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17070.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17070.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17080.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17080.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17080.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17080.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17081.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17081.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17097.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17097.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17099.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17099.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17099.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17099.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17099.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17099.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17099.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4bc18]
>[ 17099.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4bc18] width 2880 pitch 11520 (/4 2880)
>[ 17099.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17100.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17100.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17100.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17100.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 17100.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 17100.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 17100.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 17100.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17100.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17100.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17100.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17100.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 17100.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 17101.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17101.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17101.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 17101.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 17101.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17101.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17101.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17101.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17101.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 17102.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 17102.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17102.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17137.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17137.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17145.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17145.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17148.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17148.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17148.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 17148.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 17148.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17148.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17148.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17148.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17148.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17148.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17148.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 17148.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 17148.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17148.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17148.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17148.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17148.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 17148.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 17149.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 17149.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 17149.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17149.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17149.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 17149.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 17149.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17149.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17149.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d228]
>[ 17149.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d228] width 2880 pitch 11520 (/4 2880)
>[ 17149.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17149.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17149.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17149.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17151.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17152.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17152.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d468]
>[ 17152.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d468] width 2880 pitch 11520 (/4 2880)
>[ 17153.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17153.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17154.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 17154.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 17154.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17154.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17154.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17154.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17154.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c668]
>[ 17154.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c668] width 2880 pitch 11520 (/4 2880)
>[ 17154.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17154.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17154.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17154.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17154.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17154.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17154.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17154.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17154.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17154.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17154.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17154.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17154.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17154.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17154.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975170]
>[ 17154.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975170] width 2880 pitch 11520 (/4 2880)
>[ 17154.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17154.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17161.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17161.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17165.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17165.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17165.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17165.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17166.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 17166.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 17166.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94022e0]
>[ 17166.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94022e0] width 2880 pitch 11520 (/4 2880)
>[ 17166.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 17167.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 17167.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17167.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17167.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17167.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17167.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17167.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17167.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17167.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17167.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17167.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17168.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da8558]
>[ 17168.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da8558] width 2880 pitch 11520 (/4 2880)
>[ 17168.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17168.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17168.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17168.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17168.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17168.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17169.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17169.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17169.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17169.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17169.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17169.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17172.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db0030]
>[ 17172.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db0030] width 2880 pitch 11520 (/4 2880)
>[ 17176.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c72ce0]
>[ 17176.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c72ce0] width 2880 pitch 11520 (/4 2880)
>[ 17189.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17189.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17190.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 17190.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 17190.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bd938]
>[ 17190.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bd938] width 2880 pitch 11520 (/4 2880)
>[ 17190.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17190.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17191.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17191.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17191.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17191.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17191.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17191.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17191.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17192.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17192.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17192.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17192.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17192.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17192.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17192.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17192.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17192.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17192.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17192.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17192.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce1970]
>[ 17192.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce1970] width 2880 pitch 11520 (/4 2880)
>[ 17193.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17193.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17193.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17193.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17193.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17193.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17220.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17220.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17223.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17223.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17241.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68de0]
>[ 17241.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68de0] width 2880 pitch 11520 (/4 2880)
>[ 17241.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17241.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17241.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17241.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17241.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94022e0]
>[ 17241.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94022e0] width 2880 pitch 11520 (/4 2880)
>[ 17242.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17242.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17242.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17242.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17242.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17242.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17242.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17243.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17243.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17243.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17243.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17243.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17243.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17243.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17250.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17250.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17251.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 17251.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 17251.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944d040]
>[ 17251.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944d040] width 2880 pitch 11520 (/4 2880)
>[ 17251.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17251.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17251.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d468]
>[ 17251.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d468] width 2880 pitch 11520 (/4 2880)
>[ 17251.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17251.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17251.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17251.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17251.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17251.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17251.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d468]
>[ 17251.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d468] width 2880 pitch 11520 (/4 2880)
>[ 17251.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17251.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17251.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17251.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17251.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17251.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17251.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17251.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17252.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17252.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17252.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 17252.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 17254.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 17254.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 17254.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 17254.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 17254.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eec8]
>[ 17255.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eec8] width 2880 pitch 11520 (/4 2880)
>[ 17255.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17255.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17255.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 17255.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 17255.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 17255.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 17255.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17255.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17255.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17255.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17255.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17255.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17255.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17255.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17255.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17255.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17258.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5bb80]
>[ 17258.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5bb80] width 2880 pitch 11520 (/4 2880)
>[ 17261.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17261.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17270.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17270.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17284.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eec8]
>[ 17284.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eec8] width 2880 pitch 11520 (/4 2880)
>[ 17284.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 17284.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 17284.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 17284.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 17284.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17284.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17285.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17285.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17285.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17285.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17285.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17285.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17285.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17285.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17285.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17285.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17285.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17285.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17285.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17285.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17285.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17285.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17285.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17285.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17285.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17285.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17285.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17285.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17285.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17285.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17285.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17285.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17285.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17285.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17287.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17287.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17287.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbeec0]
>[ 17287.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbeec0] width 2880 pitch 11520 (/4 2880)
>[ 17287.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 17287.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 17287.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17287.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17288.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17288.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17289.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17289.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17289.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17289.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17289.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eec8]
>[ 17290.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eec8] width 2880 pitch 11520 (/4 2880)
>[ 17290.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17290.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17290.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17290.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17290.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17290.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17290.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17290.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17290.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17290.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17290.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17290.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17290.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 17290.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 17291.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17291.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17291.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17291.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17291.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17291.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17291.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17291.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17292.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 17292.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 17292.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17292.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17292.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17292.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17293.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cded30]
>[ 17293.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cded30] width 2880 pitch 11520 (/4 2880)
>[ 17294.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17294.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17294.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17294.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17294.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17294.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17294.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17294.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17294.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17294.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17296.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8e210]
>[ 17296.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8e210] width 2880 pitch 11520 (/4 2880)
>[ 17296.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48808]
>[ 17296.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48808] width 2880 pitch 11520 (/4 2880)
>[ 17296.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17296.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17296.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17296.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17305.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17305.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17305.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17305.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17305.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 17306.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 17306.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17306.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17306.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c831f8]
>[ 17306.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c831f8] width 2880 pitch 11520 (/4 2880)
>[ 17306.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9713650]
>[ 17306.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9713650] width 2880 pitch 11520 (/4 2880)
>[ 17310.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17310.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17314.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17314.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17314.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17314.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17315.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97216a8]
>[ 17315.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97216a8] width 2880 pitch 11520 (/4 2880)
>[ 17315.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17315.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17316.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0fa30]
>[ 17316.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0fa30] width 2880 pitch 11520 (/4 2880)
>[ 17316.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17316.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17316.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17316.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17316.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8e210]
>[ 17316.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8e210] width 2880 pitch 11520 (/4 2880)
>[ 17317.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9731198]
>[ 17317.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9731198] width 2880 pitch 11520 (/4 2880)
>[ 17318.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 17318.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 17318.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeca8]
>[ 17318.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeca8] width 2880 pitch 11520 (/4 2880)
>[ 17319.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979dce0]
>[ 17319.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979dce0] width 2880 pitch 11520 (/4 2880)
>[ 17319.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17319.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17319.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a79b8]
>[ 17319.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a79b8] width 2880 pitch 11520 (/4 2880)
>[ 17319.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca62a0]
>[ 17319.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca62a0] width 2880 pitch 11520 (/4 2880)
>[ 17320.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 17320.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 17320.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17320.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17320.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17320.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17320.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17320.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17320.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17320.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17320.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a687a8]
>[ 17320.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a687a8] width 2880 pitch 11520 (/4 2880)
>[ 17320.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc1af8]
>[ 17320.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc1af8] width 2880 pitch 11520 (/4 2880)
>[ 17320.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9924148]
>[ 17320.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9924148] width 2880 pitch 11520 (/4 2880)
>[ 17321.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c0c8]
>[ 17321.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c0c8] width 2880 pitch 11520 (/4 2880)
>[ 17321.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a25500]
>[ 17321.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a25500] width 2880 pitch 11520 (/4 2880)
>[ 17321.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17321.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17321.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17321.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17321.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2a538]
>[ 17321.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2a538] width 2880 pitch 11520 (/4 2880)
>[ 17321.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17321.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17321.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2a538]
>[ 17321.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2a538] width 2880 pitch 11520 (/4 2880)
>[ 17321.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17321.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17321.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2a538]
>[ 17321.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2a538] width 2880 pitch 11520 (/4 2880)
>[ 17321.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17321.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17321.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17321.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17321.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17321.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17321.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17321.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17321.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17321.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d58580]
>[ 17321.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d58580] width 2880 pitch 11520 (/4 2880)
>[ 17321.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17321.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17324.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52d30]
>[ 17324.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52d30] width 2880 pitch 11520 (/4 2880)
>[ 17324.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17324.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17324.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52d30]
>[ 17324.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52d30] width 2880 pitch 11520 (/4 2880)
>[ 17324.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17324.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17324.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 17324.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 17324.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97218c0]
>[ 17324.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97218c0] width 2880 pitch 11520 (/4 2880)
>[ 17324.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52d30]
>[ 17324.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52d30] width 2880 pitch 11520 (/4 2880)
>[ 17324.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d58580]
>[ 17324.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d58580] width 2880 pitch 11520 (/4 2880)
>[ 17324.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17324.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17324.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 17324.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 17324.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97218c0]
>[ 17324.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97218c0] width 2880 pitch 11520 (/4 2880)
>[ 17324.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17324.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17328.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979f98]
>[ 17328.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979f98] width 2880 pitch 11520 (/4 2880)
>[ 17328.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17328.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17328.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17328.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17329.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd158]
>[ 17329.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd158] width 2880 pitch 11520 (/4 2880)
>[ 17329.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17329.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17329.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979f98]
>[ 17329.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979f98] width 2880 pitch 11520 (/4 2880)
>[ 17329.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17329.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17329.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979f98]
>[ 17329.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979f98] width 2880 pitch 11520 (/4 2880)
>[ 17329.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17329.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17329.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979f98]
>[ 17329.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979f98] width 2880 pitch 11520 (/4 2880)
>[ 17329.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17329.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17329.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979f98]
>[ 17329.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979f98] width 2880 pitch 11520 (/4 2880)
>[ 17329.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17329.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17340.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e768]
>[ 17340.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e768] width 2880 pitch 11520 (/4 2880)
>[ 17343.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17343.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17343.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17343.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17344.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17344.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17344.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e768]
>[ 17344.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e768] width 2880 pitch 11520 (/4 2880)
>[ 17344.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17344.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17344.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a648]
>[ 17344.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a648] width 2880 pitch 11520 (/4 2880)
>[ 17345.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17346.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17346.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d95568]
>[ 17346.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d95568] width 2880 pitch 11520 (/4 2880)
>[ 17348.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9903050]
>[ 17348.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9903050] width 2880 pitch 11520 (/4 2880)
>[ 17348.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 17348.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 17348.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a648]
>[ 17348.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a648] width 2880 pitch 11520 (/4 2880)
>[ 17348.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 17348.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 17348.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 17348.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 17348.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 17348.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 17348.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c808]
>[ 17348.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c808] width 2880 pitch 11520 (/4 2880)
>[ 17348.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c808]
>[ 17348.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c808] width 2880 pitch 11520 (/4 2880)
>[ 17348.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17349.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17349.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 17349.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 17349.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9903050]
>[ 17349.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9903050] width 2880 pitch 11520 (/4 2880)
>[ 17349.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961eda8]
>[ 17349.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961eda8] width 2880 pitch 11520 (/4 2880)
>[ 17349.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff868]
>[ 17349.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff868] width 2880 pitch 11520 (/4 2880)
>[ 17350.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff868]
>[ 17350.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff868] width 2880 pitch 11520 (/4 2880)
>[ 17350.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9907a28]
>[ 17350.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9907a28] width 2880 pitch 11520 (/4 2880)
>[ 17388.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb628]
>[ 17388.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb628] width 2880 pitch 11520 (/4 2880)
>[ 17402.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9561898]
>[ 17402.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9561898] width 2880 pitch 11520 (/4 2880)
>[ 17403.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b28400]
>[ 17403.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b28400] width 2880 pitch 11520 (/4 2880)
>[ 17410.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb5090]
>[ 17410.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb5090] width 2880 pitch 11520 (/4 2880)
>[ 17411.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96c20]
>[ 17411.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96c20] width 2880 pitch 11520 (/4 2880)
>[ 17411.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a62718]
>[ 17411.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a62718] width 2880 pitch 11520 (/4 2880)
>[ 17411.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9989640]
>[ 17411.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9989640] width 2880 pitch 11520 (/4 2880)
>[ 17430.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0270]
>[ 17430.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0270] width 2880 pitch 11520 (/4 2880)
>[ 17430.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddb710]
>[ 17430.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddb710] width 2880 pitch 11520 (/4 2880)
>[ 17430.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0270]
>[ 17430.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0270] width 2880 pitch 11520 (/4 2880)
>[ 17430.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df8058]
>[ 17430.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df8058] width 2880 pitch 11520 (/4 2880)
>[ 17430.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0270]
>[ 17430.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0270] width 2880 pitch 11520 (/4 2880)
>[ 17430.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96a30]
>[ 17430.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96a30] width 2880 pitch 11520 (/4 2880)
>[ 17431.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deac00]
>[ 17431.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deac00] width 2880 pitch 11520 (/4 2880)
>[ 17431.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96a30]
>[ 17431.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96a30] width 2880 pitch 11520 (/4 2880)
>[ 17431.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96a30]
>[ 17431.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96a30] width 2880 pitch 11520 (/4 2880)
>[ 17431.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df8058]
>[ 17431.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df8058] width 2880 pitch 11520 (/4 2880)
>[ 17431.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96a30]
>[ 17431.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96a30] width 2880 pitch 11520 (/4 2880)
>[ 17431.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a629c8]
>[ 17431.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a629c8] width 2880 pitch 11520 (/4 2880)
>[ 17431.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0270]
>[ 17431.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0270] width 2880 pitch 11520 (/4 2880)
>[ 17431.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0270]
>[ 17431.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0270] width 2880 pitch 11520 (/4 2880)
>[ 17438.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b37f80]
>[ 17438.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b37f80] width 2880 pitch 11520 (/4 2880)
>[ 17443.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de9738]
>[ 17443.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de9738] width 2880 pitch 11520 (/4 2880)
>[ 17443.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e88a78]
>[ 17443.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e88a78] width 2880 pitch 11520 (/4 2880)
>[ 17444.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e904b0]
>[ 17444.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e904b0] width 2880 pitch 11520 (/4 2880)
>[ 17444.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e904b0]
>[ 17444.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e904b0] width 2880 pitch 11520 (/4 2880)
>[ 17444.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e904b0]
>[ 17444.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e904b0] width 2880 pitch 11520 (/4 2880)
>[ 17444.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e904b0]
>[ 17444.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e904b0] width 2880 pitch 11520 (/4 2880)
>[ 17444.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17444.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17444.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da5718]
>[ 17444.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da5718] width 2880 pitch 11520 (/4 2880)
>[ 17445.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17445.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17445.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95615b8]
>[ 17445.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95615b8] width 2880 pitch 11520 (/4 2880)
>[ 17445.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95615b8]
>[ 17445.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95615b8] width 2880 pitch 11520 (/4 2880)
>[ 17445.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e9a0]
>[ 17445.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e9a0] width 2880 pitch 11520 (/4 2880)
>[ 17445.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97db508]
>[ 17445.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97db508] width 2880 pitch 11520 (/4 2880)
>[ 17445.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17445.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17445.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e9a0]
>[ 17445.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e9a0] width 2880 pitch 11520 (/4 2880)
>[ 17446.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dd9c8]
>[ 17446.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dd9c8] width 2880 pitch 11520 (/4 2880)
>[ 17470.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17470.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17473.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17473.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17505.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17505.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17505.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19b00]
>[ 17505.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19b00] width 2880 pitch 11520 (/4 2880)
>[ 17505.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19b00]
>[ 17505.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19b00] width 2880 pitch 11520 (/4 2880)
>[ 17506.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17506.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17506.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17506.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17506.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c758]
>[ 17506.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c758] width 2880 pitch 11520 (/4 2880)
>[ 17506.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c758]
>[ 17506.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c758] width 2880 pitch 11520 (/4 2880)
>[ 17507.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17507.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17507.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17507.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17508.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17508.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17508.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17508.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17508.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8d60]
>[ 17508.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8d60] width 2880 pitch 11520 (/4 2880)
>[ 17508.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8d60]
>[ 17509.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8d60] width 2880 pitch 11520 (/4 2880)
>[ 17509.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17509.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17509.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8d60]
>[ 17509.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8d60] width 2880 pitch 11520 (/4 2880)
>[ 17509.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17509.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17515.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7f778]
>[ 17515.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7f778] width 2880 pitch 11520 (/4 2880)
>[ 17515.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d44670]
>[ 17515.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d44670] width 2880 pitch 11520 (/4 2880)
>[ 17516.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977e708]
>[ 17516.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977e708] width 2880 pitch 11520 (/4 2880)
>[ 17516.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d44670]
>[ 17516.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d44670] width 2880 pitch 11520 (/4 2880)
>[ 17516.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1ff8]
>[ 17516.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1ff8] width 2880 pitch 11520 (/4 2880)
>[ 17516.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1ff8]
>[ 17516.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1ff8] width 2880 pitch 11520 (/4 2880)
>[ 17517.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1ff8]
>[ 17517.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1ff8] width 2880 pitch 11520 (/4 2880)
>[ 17517.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1ff8]
>[ 17517.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1ff8] width 2880 pitch 11520 (/4 2880)
>[ 17518.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99febd0]
>[ 17518.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99febd0] width 2880 pitch 11520 (/4 2880)
>[ 17519.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99febd0]
>[ 17519.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99febd0] width 2880 pitch 11520 (/4 2880)
>[ 17519.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d44670]
>[ 17519.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d44670] width 2880 pitch 11520 (/4 2880)
>[ 17520.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80b18]
>[ 17520.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80b18] width 2880 pitch 11520 (/4 2880)
>[ 17521.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80b18]
>[ 17521.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80b18] width 2880 pitch 11520 (/4 2880)
>[ 17521.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6ae0]
>[ 17521.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6ae0] width 2880 pitch 11520 (/4 2880)
>[ 17521.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deba80]
>[ 17521.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deba80] width 2880 pitch 11520 (/4 2880)
>[ 17523.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17523.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17526.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17526.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17526.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17526.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17526.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17526.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17526.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17526.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17526.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 17526.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 17526.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17526.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17527.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef180]
>[ 17527.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef180] width 2880 pitch 11520 (/4 2880)
>[ 17527.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17527.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17527.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17527.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17527.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17527.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17527.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd38e0]
>[ 17527.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd38e0] width 2880 pitch 11520 (/4 2880)
>[ 17528.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17528.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17528.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17528.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17528.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17528.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17528.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17528.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17531.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17531.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17532.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e929b0]
>[ 17532.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e929b0] width 2880 pitch 11520 (/4 2880)
>[ 17532.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e929b0]
>[ 17532.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e929b0] width 2880 pitch 11520 (/4 2880)
>[ 17532.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17532.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17578.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17578.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17578.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17578.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17579.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3d38]
>[ 17579.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3d38] width 2880 pitch 11520 (/4 2880)
>[ 17579.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17579.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17583.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3d38]
>[ 17583.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3d38] width 2880 pitch 11520 (/4 2880)
>[ 17583.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d4af8]
>[ 17583.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d4af8] width 2880 pitch 11520 (/4 2880)
>[ 17583.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17583.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17583.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d49f8]
>[ 17583.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d49f8] width 2880 pitch 11520 (/4 2880)
>[ 17623.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3d38]
>[ 17623.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3d38] width 2880 pitch 11520 (/4 2880)
>[ 17623.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d4af8]
>[ 17623.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d4af8] width 2880 pitch 11520 (/4 2880)
>[ 17623.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e929b0]
>[ 17623.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e929b0] width 2880 pitch 11520 (/4 2880)
>[ 17623.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17623.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17623.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17624.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17624.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17624.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17624.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17624.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17624.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee100]
>[ 17624.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee100] width 2880 pitch 11520 (/4 2880)
>[ 17624.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae03e0]
>[ 17624.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae03e0] width 2880 pitch 11520 (/4 2880)
>[ 17624.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d82568]
>[ 17624.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d82568] width 2880 pitch 11520 (/4 2880)
>[ 17625.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17625.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17625.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a52920]
>[ 17625.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a52920] width 2880 pitch 11520 (/4 2880)
>[ 17625.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17626.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17626.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19f58]
>[ 17626.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19f58] width 2880 pitch 11520 (/4 2880)
>[ 17626.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969c2c0]
>[ 17626.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969c2c0] width 2880 pitch 11520 (/4 2880)
>[ 17628.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee100]
>[ 17628.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee100] width 2880 pitch 11520 (/4 2880)
>[ 17628.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969c2c0]
>[ 17628.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969c2c0] width 2880 pitch 11520 (/4 2880)
>[ 17629.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17629.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17629.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19b00]
>[ 17629.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19b00] width 2880 pitch 11520 (/4 2880)
>[ 17629.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 17629.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 17633.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613b60]
>[ 17633.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613b60] width 2880 pitch 11520 (/4 2880)
>[ 17633.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de7e20]
>[ 17633.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de7e20] width 2880 pitch 11520 (/4 2880)
>[ 17634.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17634.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17634.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17634.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17634.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df8638]
>[ 17634.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df8638] width 2880 pitch 11520 (/4 2880)
>[ 17634.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647ac8]
>[ 17634.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647ac8] width 2880 pitch 11520 (/4 2880)
>[ 17634.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f19b00]
>[ 17634.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f19b00] width 2880 pitch 11520 (/4 2880)
>[ 17634.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df8638]
>[ 17635.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df8638] width 2880 pitch 11520 (/4 2880)
>[ 17635.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3d38]
>[ 17635.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3d38] width 2880 pitch 11520 (/4 2880)
>[ 17640.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95617d8]
>[ 17640.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95617d8] width 2880 pitch 11520 (/4 2880)
>[ 17641.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98d3d38]
>[ 17641.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98d3d38] width 2880 pitch 11520 (/4 2880)
>[ 17641.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa7e8]
>[ 17641.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa7e8] width 2880 pitch 11520 (/4 2880)
>[ 17641.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95617d8]
>[ 17641.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95617d8] width 2880 pitch 11520 (/4 2880)
>[ 17641.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc02d0]
>[ 17641.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc02d0] width 2880 pitch 11520 (/4 2880)
>[ 17646.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d82568]
>[ 17646.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d82568] width 2880 pitch 11520 (/4 2880)
>[ 17695.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08150]
>[ 17695.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08150] width 2880 pitch 11520 (/4 2880)
>[ 17696.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6f00]
>[ 17696.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6f00] width 2880 pitch 11520 (/4 2880)
>[ 17696.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63f50]
>[ 17696.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63f50] width 2880 pitch 11520 (/4 2880)
>[ 17696.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a9708]
>[ 17696.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a9708] width 2880 pitch 11520 (/4 2880)
>[ 17696.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e51b60]
>[ 17696.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e51b60] width 2880 pitch 11520 (/4 2880)
>[ 17697.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c81830]
>[ 17697.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c81830] width 2880 pitch 11520 (/4 2880)
>[ 17697.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a280]
>[ 17697.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a280] width 2880 pitch 11520 (/4 2880)
>[ 17697.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d2ae8]
>[ 17698.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d2ae8] width 2880 pitch 11520 (/4 2880)
>[ 17698.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64010]
>[ 17698.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64010] width 2880 pitch 11520 (/4 2880)
>[ 17698.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d49f8]
>[ 17698.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d49f8] width 2880 pitch 11520 (/4 2880)
>[ 17699.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53aa8]
>[ 17699.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53aa8] width 2880 pitch 11520 (/4 2880)
>[ 17706.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64010]
>[ 17706.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64010] width 2880 pitch 11520 (/4 2880)
>[ 17712.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986bc48]
>[ 17712.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986bc48] width 2880 pitch 11520 (/4 2880)
>[ 17712.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d45cb0]
>[ 17712.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d45cb0] width 2880 pitch 11520 (/4 2880)
>[ 17714.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17714.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17714.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17714.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17716.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17716.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17758.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d45cb0]
>[ 17759.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d45cb0] width 2880 pitch 11520 (/4 2880)
>[ 17759.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17759.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17759.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17759.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17759.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96c10]
>[ 17759.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96c10] width 2880 pitch 11520 (/4 2880)
>[ 17759.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9561380]
>[ 17759.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9561380] width 2880 pitch 11520 (/4 2880)
>[ 17759.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d45cb0]
>[ 17759.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d45cb0] width 2880 pitch 11520 (/4 2880)
>[ 17759.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d45cb0]
>[ 17759.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d45cb0] width 2880 pitch 11520 (/4 2880)
>[ 17760.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e874b0]
>[ 17760.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e874b0] width 2880 pitch 11520 (/4 2880)
>[ 17761.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e874b0]
>[ 17761.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e874b0] width 2880 pitch 11520 (/4 2880)
>[ 17761.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dce678]
>[ 17761.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dce678] width 2880 pitch 11520 (/4 2880)
>[ 17761.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944a0b8]
>[ 17762.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944a0b8] width 2880 pitch 11520 (/4 2880)
>[ 17762.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17762.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17762.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6cb80]
>[ 17762.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6cb80] width 2880 pitch 11520 (/4 2880)
>[ 17771.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935bfb0]
>[ 17771.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935bfb0] width 2880 pitch 11520 (/4 2880)
>[ 17794.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17794.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17794.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943f0b0]
>[ 17794.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943f0b0] width 2880 pitch 11520 (/4 2880)
>[ 17795.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935bfb0]
>[ 17795.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935bfb0] width 2880 pitch 11520 (/4 2880)
>[ 17795.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95226b0]
>[ 17795.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95226b0] width 2880 pitch 11520 (/4 2880)
>[ 17795.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935bfb0]
>[ 17795.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935bfb0] width 2880 pitch 11520 (/4 2880)
>[ 17795.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95226b0]
>[ 17795.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95226b0] width 2880 pitch 11520 (/4 2880)
>[ 17796.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bbbf0]
>[ 17796.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bbbf0] width 2880 pitch 11520 (/4 2880)
>[ 17796.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bbbf0]
>[ 17797.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bbbf0] width 2880 pitch 11520 (/4 2880)
>[ 17797.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95226b0]
>[ 17797.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95226b0] width 2880 pitch 11520 (/4 2880)
>[ 17797.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17797.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17797.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53aa8]
>[ 17797.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53aa8] width 2880 pitch 11520 (/4 2880)
>[ 17805.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17805.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17807.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[ 17807.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[ 17808.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401578]
>[ 17808.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401578] width 2880 pitch 11520 (/4 2880)
>[ 17809.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9401578]
>[ 17809.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9401578] width 2880 pitch 11520 (/4 2880)
>[ 17819.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423920]
>[ 17819.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423920] width 2880 pitch 11520 (/4 2880)
>[ 17819.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17819.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17834.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53aa8]
>[ 17834.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53aa8] width 2880 pitch 11520 (/4 2880)
>[ 17845.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17845.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17845.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9894048]
>[ 17845.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9894048] width 2880 pitch 11520 (/4 2880)
>[ 17845.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfe9f8]
>[ 17845.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfe9f8] width 2880 pitch 11520 (/4 2880)
>[ 17845.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17845.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17845.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[ 17845.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[ 17846.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53aa8]
>[ 17846.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53aa8] width 2880 pitch 11520 (/4 2880)
>[ 17846.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624688]
>[ 17846.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624688] width 2880 pitch 11520 (/4 2880)
>[ 17847.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17847.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17847.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[ 17847.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[ 17847.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[ 17847.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[ 17847.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17847.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17848.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfe9f8]
>[ 17848.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfe9f8] width 2880 pitch 11520 (/4 2880)
>[ 17849.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943f0b0]
>[ 17849.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943f0b0] width 2880 pitch 11520 (/4 2880)
>[ 17849.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17849.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17850.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17850.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17850.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943f0b0]
>[ 17850.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943f0b0] width 2880 pitch 11520 (/4 2880)
>[ 17851.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17851.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17851.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e65900]
>[ 17851.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e65900] width 2880 pitch 11520 (/4 2880)
>[ 17851.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17851.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17852.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e69318]
>[ 17852.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e69318] width 2880 pitch 11520 (/4 2880)
>[ 17852.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bbbf0]
>[ 17852.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bbbf0] width 2880 pitch 11520 (/4 2880)
>[ 17852.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9894048]
>[ 17852.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9894048] width 2880 pitch 11520 (/4 2880)
>[ 17853.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17853.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17853.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17853.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17853.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17853.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17853.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17854.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17904.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17904.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17904.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17904.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17905.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 17905.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 17905.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17905.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17905.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17905.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17905.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17905.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17905.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607150]
>[ 17905.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607150] width 2880 pitch 11520 (/4 2880)
>[ 17905.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17905.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17906.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17906.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17906.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624688]
>[ 17906.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624688] width 2880 pitch 11520 (/4 2880)
>[ 17906.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17906.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17906.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17906.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17906.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17906.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17906.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d468]
>[ 17906.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d468] width 2880 pitch 11520 (/4 2880)
>[ 17909.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e68f28]
>[ 17909.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e68f28] width 2880 pitch 11520 (/4 2880)
>[ 17909.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9894048]
>[ 17909.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9894048] width 2880 pitch 11520 (/4 2880)
>[ 17910.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17910.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17910.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17910.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17910.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e6750]
>[ 17910.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e6750] width 2880 pitch 11520 (/4 2880)
>[ 17910.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe7d0]
>[ 17910.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe7d0] width 2880 pitch 11520 (/4 2880)
>[ 17910.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e68f28]
>[ 17910.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e68f28] width 2880 pitch 11520 (/4 2880)
>[ 17911.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624688]
>[ 17911.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624688] width 2880 pitch 11520 (/4 2880)
>[ 17911.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17911.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17911.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c0a0]
>[ 17911.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c0a0] width 2880 pitch 11520 (/4 2880)
>[ 17911.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17911.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17914.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33758]
>[ 17914.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33758] width 2880 pitch 11520 (/4 2880)
>[ 17914.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17914.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17914.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93f9950]
>[ 17914.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93f9950] width 2880 pitch 11520 (/4 2880)
>[ 17914.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17914.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17914.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e68f28]
>[ 17914.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e68f28] width 2880 pitch 11520 (/4 2880)
>[ 17918.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb248]
>[ 17918.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb248] width 2880 pitch 11520 (/4 2880)
>[ 17919.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95226b0]
>[ 17919.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95226b0] width 2880 pitch 11520 (/4 2880)
>[ 17919.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9795860]
>[ 17919.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9795860] width 2880 pitch 11520 (/4 2880)
>[ 17919.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17920.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17920.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b2428]
>[ 17920.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b2428] width 2880 pitch 11520 (/4 2880)
>[ 17920.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfe9f8]
>[ 17920.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfe9f8] width 2880 pitch 11520 (/4 2880)
>[ 17926.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17926.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17929.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997caf0]
>[ 17929.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997caf0] width 2880 pitch 11520 (/4 2880)
>[ 17929.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02190]
>[ 17930.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02190] width 2880 pitch 11520 (/4 2880)
>[ 17930.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93bbbf0]
>[ 17930.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93bbbf0] width 2880 pitch 11520 (/4 2880)
>[ 17932.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfe9f8]
>[ 17932.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfe9f8] width 2880 pitch 11520 (/4 2880)
>[ 17934.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17934.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17935.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17935.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17935.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f290]
>[ 17935.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f290] width 2880 pitch 11520 (/4 2880)
>[ 17935.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95226b0]
>[ 17935.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95226b0] width 2880 pitch 11520 (/4 2880)
>[ 17935.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa3c0]
>[ 17935.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa3c0] width 2880 pitch 11520 (/4 2880)
>[ 17935.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e68f28]
>[ 17935.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e68f28] width 2880 pitch 11520 (/4 2880)
>[ 17946.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423920]
>[ 17946.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423920] width 2880 pitch 11520 (/4 2880)
>[ 17946.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb4e20]
>[ 17946.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb4e20] width 2880 pitch 11520 (/4 2880)
>[ 17946.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cf310]
>[ 17946.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cf310] width 2880 pitch 11520 (/4 2880)
>[ 17947.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943f0b0]
>[ 17947.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943f0b0] width 2880 pitch 11520 (/4 2880)
>[ 17947.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21fe0]
>[ 17947.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21fe0] width 2880 pitch 11520 (/4 2880)
>[ 17947.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563118]
>[ 17947.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563118] width 2880 pitch 11520 (/4 2880)
>[ 17947.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978958]
>[ 17948.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978958] width 2880 pitch 11520 (/4 2880)
>[ 17948.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944d040]
>[ 17948.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944d040] width 2880 pitch 11520 (/4 2880)
>[ 17948.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9624688]
>[ 17948.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9624688] width 2880 pitch 11520 (/4 2880)
>[ 17948.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e53aa8]
>[ 17948.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e53aa8] width 2880 pitch 11520 (/4 2880)
>[ 17982.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e70ef0]
>[ 17982.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e70ef0] width 2880 pitch 11520 (/4 2880)
>[ 17995.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6ded8]
>[ 17995.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6ded8] width 2880 pitch 11520 (/4 2880)
>[ 17995.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6eae0]
>[ 17995.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6eae0] width 2880 pitch 11520 (/4 2880)
>[ 17995.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85ba0]
>[ 17995.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85ba0] width 2880 pitch 11520 (/4 2880)
>[ 17995.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6ded8]
>[ 17996.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6ded8] width 2880 pitch 11520 (/4 2880)
>[ 17996.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17996.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17996.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6eae0]
>[ 17996.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6eae0] width 2880 pitch 11520 (/4 2880)
>[ 17996.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17996.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17997.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6eae0]
>[ 17997.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6eae0] width 2880 pitch 11520 (/4 2880)
>[ 17997.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6ded8]
>[ 17997.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6ded8] width 2880 pitch 11520 (/4 2880)
>[ 17997.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 17997.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 17997.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979bce8]
>[ 17997.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979bce8] width 2880 pitch 11520 (/4 2880)
>[ 17997.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e707d0]
>[ 17997.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e707d0] width 2880 pitch 11520 (/4 2880)
>[ 18005.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6ded8]
>[ 18005.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6ded8] width 2880 pitch 11520 (/4 2880)
>[ 18030.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1caa0]
>[ 18030.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1caa0] width 2880 pitch 11520 (/4 2880)
>[ 18038.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e96c10]
>[ 18038.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e96c10] width 2880 pitch 11520 (/4 2880)
>[ 18038.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5ae80]
>[ 18038.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5ae80] width 2880 pitch 11520 (/4 2880)
>[ 18038.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33b08]
>[ 18039.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33b08] width 2880 pitch 11520 (/4 2880)
>[ 18039.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18039.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18039.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e6e80]
>[ 18039.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e6e80] width 2880 pitch 11520 (/4 2880)
>[ 18039.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18039.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18039.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b0c3a8]
>[ 18039.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b0c3a8] width 2880 pitch 11520 (/4 2880)
>[ 18039.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e992d0]
>[ 18039.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e992d0] width 2880 pitch 11520 (/4 2880)
>[ 18040.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18040.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18040.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ada918]
>[ 18040.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ada918] width 2880 pitch 11520 (/4 2880)
>[ 18041.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18041.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18041.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5b8b8]
>[ 18041.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5b8b8] width 2880 pitch 11520 (/4 2880)
>[ 18042.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18042.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18042.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18042.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18051.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f720]
>[ 18051.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f720] width 2880 pitch 11520 (/4 2880)
>[ 18051.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb980]
>[ 18051.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb980] width 2880 pitch 11520 (/4 2880)
>[ 18051.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1caa0]
>[ 18051.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1caa0] width 2880 pitch 11520 (/4 2880)
>[ 18051.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99febd0]
>[ 18051.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99febd0] width 2880 pitch 11520 (/4 2880)
>[ 18051.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ada918]
>[ 18051.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ada918] width 2880 pitch 11520 (/4 2880)
>[ 18074.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5d998]
>[ 18074.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5d998] width 2880 pitch 11520 (/4 2880)
>[ 18074.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e76910]
>[ 18074.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e76910] width 2880 pitch 11520 (/4 2880)
>[ 18074.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97778d0]
>[ 18074.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97778d0] width 2880 pitch 11520 (/4 2880)
>[ 18074.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33b08]
>[ 18074.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33b08] width 2880 pitch 11520 (/4 2880)
>[ 18074.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff578]
>[ 18074.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff578] width 2880 pitch 11520 (/4 2880)
>[ 18075.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fe558]
>[ 18075.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fe558] width 2880 pitch 11520 (/4 2880)
>[ 18075.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9919738]
>[ 18075.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9919738] width 2880 pitch 11520 (/4 2880)
>[ 18075.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33b08]
>[ 18075.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33b08] width 2880 pitch 11520 (/4 2880)
>[ 18075.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95672b8]
>[ 18075.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95672b8] width 2880 pitch 11520 (/4 2880)
>[ 18076.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95674f0]
>[ 18076.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95674f0] width 2880 pitch 11520 (/4 2880)
>[ 18076.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d490]
>[ 18076.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d490] width 2880 pitch 11520 (/4 2880)
>[ 18076.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e76910]
>[ 18076.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e76910] width 2880 pitch 11520 (/4 2880)
>[ 18104.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95674f0]
>[ 18104.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95674f0] width 2880 pitch 11520 (/4 2880)
>[ 18123.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de7758]
>[ 18123.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de7758] width 2880 pitch 11520 (/4 2880)
>[ 18153.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18153.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18250.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18250.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18253.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18253.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18273.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18273.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18274.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18274.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18275.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18275.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18281.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18281.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18282.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18282.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18282.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18282.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18282.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18282.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18282.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18282.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18282.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e85ce0]
>[ 18282.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e85ce0] width 2880 pitch 11520 (/4 2880)
>[ 18283.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18283.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18284.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18284.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18284.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18284.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18285.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18285.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18285.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18285.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18285.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18285.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18285.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18285.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18286.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18286.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18287.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6a4b8]
>[ 18287.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6a4b8] width 2880 pitch 11520 (/4 2880)
>[ 18287.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18287.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18287.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18287.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18287.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e76910]
>[ 18287.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e76910] width 2880 pitch 11520 (/4 2880)
>[ 18287.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18287.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18287.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18287.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18287.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18287.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18287.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e76910]
>[ 18287.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e76910] width 2880 pitch 11520 (/4 2880)
>[ 18287.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18287.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18287.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18287.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18287.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18287.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18287.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71600]
>[ 18287.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71600] width 2880 pitch 11520 (/4 2880)
>[ 18287.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18287.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18292.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18292.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18292.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18292.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18292.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18292.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18292.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18292.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18292.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71600]
>[ 18292.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71600] width 2880 pitch 11520 (/4 2880)
>[ 18292.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18292.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18292.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18292.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18292.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18292.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18292.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18292.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18292.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18292.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18292.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18292.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18292.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18292.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18292.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18292.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18292.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18292.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18304.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18304.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18309.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18309.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18309.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18309.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18309.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18309.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18309.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18309.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18309.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18309.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18309.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18309.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18309.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18309.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18309.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18309.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18309.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18309.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18309.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18309.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18309.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18309.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18309.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e76910]
>[ 18309.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e76910] width 2880 pitch 11520 (/4 2880)
>[ 18309.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18309.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18311.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61a78]
>[ 18311.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61a78] width 2880 pitch 11520 (/4 2880)
>[ 18311.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 18311.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 18314.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eacca8]
>[ 18314.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eacca8] width 2880 pitch 11520 (/4 2880)
>[ 18314.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deaf58]
>[ 18314.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deaf58] width 2880 pitch 11520 (/4 2880)
>[ 18314.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61a78]
>[ 18314.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61a78] width 2880 pitch 11520 (/4 2880)
>[ 18314.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18314.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18314.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18314.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18314.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18314.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18314.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18314.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18314.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61a78]
>[ 18314.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61a78] width 2880 pitch 11520 (/4 2880)
>[ 18314.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18314.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18314.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9ddb0]
>[ 18314.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9ddb0] width 2880 pitch 11520 (/4 2880)
>[ 18314.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18314.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18314.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 18314.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 18314.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18314.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18318.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18318.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18322.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deaf58]
>[ 18322.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deaf58] width 2880 pitch 11520 (/4 2880)
>[ 18329.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18329.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18329.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7f740]
>[ 18329.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7f740] width 2880 pitch 11520 (/4 2880)
>[ 18337.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18337.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18337.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18337.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18344.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18344.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18344.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18344.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18344.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61a78]
>[ 18344.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61a78] width 2880 pitch 11520 (/4 2880)
>[ 18344.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18344.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18344.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6a4b8]
>[ 18344.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6a4b8] width 2880 pitch 11520 (/4 2880)
>[ 18345.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18345.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18345.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18345.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18345.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18345.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18346.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 18346.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 18346.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18346.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18347.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18347.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18351.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18351.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18352.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deaf58]
>[ 18352.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deaf58] width 2880 pitch 11520 (/4 2880)
>[ 18364.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18364.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18365.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18365.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18366.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6a4b8]
>[ 18366.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6a4b8] width 2880 pitch 11520 (/4 2880)
>[ 18366.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18366.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18366.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7f860]
>[ 18366.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7f860] width 2880 pitch 11520 (/4 2880)
>[ 18366.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7f740]
>[ 18366.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7f740] width 2880 pitch 11520 (/4 2880)
>[ 18367.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6348]
>[ 18367.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6348] width 2880 pitch 11520 (/4 2880)
>[ 18367.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6348]
>[ 18367.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6348] width 2880 pitch 11520 (/4 2880)
>[ 18367.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 18367.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 18368.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deaf58]
>[ 18368.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deaf58] width 2880 pitch 11520 (/4 2880)
>[ 18368.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 18368.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 18368.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 18368.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 18368.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18368.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18368.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18368.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18368.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac1c8]
>[ 18368.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac1c8] width 2880 pitch 11520 (/4 2880)
>[ 18368.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18368.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18368.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf8e0]
>[ 18368.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf8e0] width 2880 pitch 11520 (/4 2880)
>[ 18373.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18373.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18373.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18373.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18374.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18374.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18374.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18374.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18374.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18374.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18374.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c2c0]
>[ 18374.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c2c0] width 2880 pitch 11520 (/4 2880)
>[ 18374.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18374.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18374.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18374.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18375.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18375.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18375.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 18375.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 18376.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18376.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18378.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18378.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18378.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 18378.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 18378.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71600]
>[ 18378.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71600] width 2880 pitch 11520 (/4 2880)
>[ 18378.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18378.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18378.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18378.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18378.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18378.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18390.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18390.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18390.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18390.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18390.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18390.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18391.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18391.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18391.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 18391.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 18391.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 18391.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 18391.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18391.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18391.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 18391.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 18392.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18392.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18392.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6a4b8]
>[ 18392.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6a4b8] width 2880 pitch 11520 (/4 2880)
>[ 18392.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7f740]
>[ 18392.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7f740] width 2880 pitch 11520 (/4 2880)
>[ 18393.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18393.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18393.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7f860]
>[ 18393.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7f860] width 2880 pitch 11520 (/4 2880)
>[ 18393.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71600]
>[ 18393.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71600] width 2880 pitch 11520 (/4 2880)
>[ 18393.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62b40]
>[ 18393.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62b40] width 2880 pitch 11520 (/4 2880)
>[ 18394.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 18394.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 18394.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18394.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18394.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 18395.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 18395.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18395.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18395.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae018]
>[ 18395.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae018] width 2880 pitch 11520 (/4 2880)
>[ 18395.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 18395.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 18395.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18395.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18395.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18395.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18395.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18395.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18395.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 18396.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 18396.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 18396.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 18396.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d898f0]
>[ 18396.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d898f0] width 2880 pitch 11520 (/4 2880)
>[ 18396.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 18396.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 18396.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 18396.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 18397.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18397.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18397.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deaf58]
>[ 18397.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deaf58] width 2880 pitch 11520 (/4 2880)
>[ 18397.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18397.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18397.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 18397.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 18397.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18397.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18408.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3be38]
>[ 18408.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3be38] width 2880 pitch 11520 (/4 2880)
>[ 18414.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28ad8]
>[ 18414.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28ad8] width 2880 pitch 11520 (/4 2880)
>[ 18414.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa7198]
>[ 18414.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa7198] width 2880 pitch 11520 (/4 2880)
>[ 18414.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779db0]
>[ 18414.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779db0] width 2880 pitch 11520 (/4 2880)
>[ 18414.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e64be0]
>[ 18414.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e64be0] width 2880 pitch 11520 (/4 2880)
>[ 18414.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9ae28]
>[ 18414.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9ae28] width 2880 pitch 11520 (/4 2880)
>[ 18414.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18414.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18414.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb46e8]
>[ 18414.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb46e8] width 2880 pitch 11520 (/4 2880)
>[ 18414.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18414.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18415.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2308]
>[ 18415.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2308] width 2880 pitch 11520 (/4 2880)
>[ 18415.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5fe08]
>[ 18415.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5fe08] width 2880 pitch 11520 (/4 2880)
>[ 18415.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18415.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18415.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb46e8]
>[ 18415.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb46e8] width 2880 pitch 11520 (/4 2880)
>[ 18415.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18415.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18415.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c2308]
>[ 18415.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c2308] width 2880 pitch 11520 (/4 2880)
>[ 18418.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3be38]
>[ 18418.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3be38] width 2880 pitch 11520 (/4 2880)
>[ 18418.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4ef10]
>[ 18418.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4ef10] width 2880 pitch 11520 (/4 2880)
>[ 18418.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c7568]
>[ 18418.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c7568] width 2880 pitch 11520 (/4 2880)
>[ 18418.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18418.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18418.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18418.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18418.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18418.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18418.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18418.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18418.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18419.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18419.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18419.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18419.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d020c0]
>[ 18419.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d020c0] width 2880 pitch 11520 (/4 2880)
>[ 18419.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e77200]
>[ 18419.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e77200] width 2880 pitch 11520 (/4 2880)
>[ 18419.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565248]
>[ 18420.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565248] width 2880 pitch 11520 (/4 2880)
>[ 18420.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 18420.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 18420.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18420.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18420.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71600]
>[ 18420.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71600] width 2880 pitch 11520 (/4 2880)
>[ 18420.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18420.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18420.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18420.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18420.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18420.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18420.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18420.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18420.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4fcc0]
>[ 18420.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4fcc0] width 2880 pitch 11520 (/4 2880)
>[ 18420.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18420.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18420.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18420.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18420.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18420.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18420.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18420.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18420.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4c60]
>[ 18420.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4c60] width 2880 pitch 11520 (/4 2880)
>[ 18420.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18420.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18420.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 18420.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 18420.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608cc8]
>[ 18420.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608cc8] width 2880 pitch 11520 (/4 2880)
>[ 18420.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 18420.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 18440.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 18440.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 18443.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6e960]
>[ 18443.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6e960] width 2880 pitch 11520 (/4 2880)
>[ 18443.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18443.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18444.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fdc90]
>[ 18444.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fdc90] width 2880 pitch 11520 (/4 2880)
>[ 18444.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18444.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18446.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18446.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18446.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6348]
>[ 18446.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6348] width 2880 pitch 11520 (/4 2880)
>[ 18446.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18446.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18446.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18446.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18446.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18447.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18447.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18447.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18447.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18447.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18447.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c6348]
>[ 18447.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c6348] width 2880 pitch 11520 (/4 2880)
>[ 18447.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18447.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18447.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18448.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18448.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18448.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18448.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18448.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18448.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18448.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18448.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18448.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18448.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18448.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18448.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18448.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18457.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18457.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18458.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18458.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18471.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18471.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18471.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18471.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18471.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18471.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18471.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18471.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18471.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18471.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18472.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18472.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18472.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18472.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18472.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18472.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18472.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18472.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18472.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18472.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18473.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18473.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18473.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18473.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18473.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18473.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18473.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18473.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18485.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18485.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18485.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18485.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18485.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18485.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18485.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf620]
>[ 18485.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf620] width 2880 pitch 11520 (/4 2880)
>[ 18486.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18486.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18486.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18486.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18486.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf620]
>[ 18486.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf620] width 2880 pitch 11520 (/4 2880)
>[ 18487.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18487.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18488.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18488.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18490.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18490.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18490.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fdc90]
>[ 18490.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fdc90] width 2880 pitch 11520 (/4 2880)
>[ 18491.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18491.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18491.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf620]
>[ 18491.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf620] width 2880 pitch 11520 (/4 2880)
>[ 18491.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18491.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18491.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18491.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18493.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18493.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18493.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18493.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18493.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18493.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18493.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18494.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18494.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18494.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18494.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18494.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18494.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18494.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18495.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18495.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18495.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18495.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18496.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18496.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18496.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18496.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18496.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18496.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18496.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18496.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18496.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fdc90]
>[ 18496.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fdc90] width 2880 pitch 11520 (/4 2880)
>[ 18498.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18498.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18498.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18498.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18506.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18506.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18507.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18507.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18508.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d268]
>[ 18508.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d268] width 2880 pitch 11520 (/4 2880)
>[ 18508.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d590]
>[ 18508.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d590] width 2880 pitch 11520 (/4 2880)
>[ 18511.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18511.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18512.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f3c8]
>[ 18512.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f3c8] width 2880 pitch 11520 (/4 2880)
>[ 18512.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18512.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18513.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18513.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18515.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 18515.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 18515.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18516.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18516.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18516.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18516.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18516.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18516.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa908]
>[ 18516.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa908] width 2880 pitch 11520 (/4 2880)
>[ 18516.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18516.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18516.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18516.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18516.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18516.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18519.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecde0]
>[ 18519.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecde0] width 2880 pitch 11520 (/4 2880)
>[ 18519.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9464760]
>[ 18519.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9464760] width 2880 pitch 11520 (/4 2880)
>[ 18520.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9c950]
>[ 18520.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9c950] width 2880 pitch 11520 (/4 2880)
>[ 18520.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18520.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18520.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4fb48]
>[ 18520.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4fb48] width 2880 pitch 11520 (/4 2880)
>[ 18520.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d600]
>[ 18520.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d600] width 2880 pitch 11520 (/4 2880)
>[ 18520.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671660]
>[ 18520.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671660] width 2880 pitch 11520 (/4 2880)
>[ 18520.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9411178]
>[ 18520.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9411178] width 2880 pitch 11520 (/4 2880)
>[ 18520.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671660]
>[ 18520.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671660] width 2880 pitch 11520 (/4 2880)
>[ 18520.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18520.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18520.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671660]
>[ 18520.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671660] width 2880 pitch 11520 (/4 2880)
>[ 18520.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18520.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18520.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671660]
>[ 18520.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671660] width 2880 pitch 11520 (/4 2880)
>[ 18522.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3600]
>[ 18522.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3600] width 2880 pitch 11520 (/4 2880)
>[ 18522.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f21cd0]
>[ 18522.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f21cd0] width 2880 pitch 11520 (/4 2880)
>[ 18523.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f21e80]
>[ 18523.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f21e80] width 2880 pitch 11520 (/4 2880)
>[ 18523.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[ 18523.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[ 18523.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18523.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18524.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecde0]
>[ 18524.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecde0] width 2880 pitch 11520 (/4 2880)
>[ 18524.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18524.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18524.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457850]
>[ 18524.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457850] width 2880 pitch 11520 (/4 2880)
>[ 18524.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea67b0]
>[ 18524.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea67b0] width 2880 pitch 11520 (/4 2880)
>[ 18524.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e13b0]
>[ 18524.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e13b0] width 2880 pitch 11520 (/4 2880)
>[ 18524.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18524.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18524.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18524.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18524.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa908]
>[ 18524.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa908] width 2880 pitch 11520 (/4 2880)
>[ 18524.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18524.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18524.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18524.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18524.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d590]
>[ 18524.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d590] width 2880 pitch 11520 (/4 2880)
>[ 18525.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18525.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18525.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf620]
>[ 18525.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf620] width 2880 pitch 11520 (/4 2880)
>[ 18525.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18525.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18527.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea4250]
>[ 18527.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea4250] width 2880 pitch 11520 (/4 2880)
>[ 18527.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18527.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18530.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa908]
>[ 18530.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa908] width 2880 pitch 11520 (/4 2880)
>[ 18531.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4ac0]
>[ 18531.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4ac0] width 2880 pitch 11520 (/4 2880)
>[ 18532.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9eb0]
>[ 18532.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9eb0] width 2880 pitch 11520 (/4 2880)
>[ 18533.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecde0]
>[ 18533.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecde0] width 2880 pitch 11520 (/4 2880)
>[ 18542.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fdc90]
>[ 18542.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fdc90] width 2880 pitch 11520 (/4 2880)
>[ 18542.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18542.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18542.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18542.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18543.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18543.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18543.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e59278]
>[ 18543.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e59278] width 2880 pitch 11520 (/4 2880)
>[ 18543.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18543.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18543.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5c590]
>[ 18543.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5c590] width 2880 pitch 11520 (/4 2880)
>[ 18543.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18543.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18543.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18543.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18543.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 18543.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 18543.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18543.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18543.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccf7b8]
>[ 18543.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccf7b8] width 2880 pitch 11520 (/4 2880)
>[ 18543.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23170]
>[ 18543.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23170] width 2880 pitch 11520 (/4 2880)
>[ 18543.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d01e00]
>[ 18543.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d01e00] width 2880 pitch 11520 (/4 2880)
>[ 18543.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e94f08]
>[ 18543.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e94f08] width 2880 pitch 11520 (/4 2880)
>[ 18543.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18543.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18543.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18544.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18544.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e54ad8]
>[ 18544.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e54ad8] width 2880 pitch 11520 (/4 2880)
>[ 18544.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18544.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18544.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d83f18]
>[ 18544.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d83f18] width 2880 pitch 11520 (/4 2880)
>[ 18544.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9f908]
>[ 18544.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9f908] width 2880 pitch 11520 (/4 2880)
>[ 18545.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0ed8]
>[ 18545.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 18545.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18545.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18545.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9add938]
>[ 18545.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9add938] width 2880 pitch 11520 (/4 2880)
>[ 18545.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adba20]
>[ 18545.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adba20] width 2880 pitch 11520 (/4 2880)
>[ 18545.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb0ed8]
>[ 18545.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 18545.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18545.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18545.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9f908]
>[ 18545.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9f908] width 2880 pitch 11520 (/4 2880)
>[ 18545.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18545.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18545.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9f908]
>[ 18545.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9f908] width 2880 pitch 11520 (/4 2880)
>[ 18545.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18545.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18545.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9f908]
>[ 18545.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9f908] width 2880 pitch 11520 (/4 2880)
>[ 18545.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 18545.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 18549.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b390]
>[ 18549.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b390] width 2880 pitch 11520 (/4 2880)
>[ 18555.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[ 18555.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[ 18555.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18555.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18556.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18556.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18556.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 18556.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 18556.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 18556.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 18556.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d10d8]
>[ 18556.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d10d8] width 2880 pitch 11520 (/4 2880)
>[ 18556.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9b260]
>[ 18556.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9b260] width 2880 pitch 11520 (/4 2880)
>[ 18557.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 18557.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 18557.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 18557.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 18558.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 18558.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 18558.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 18558.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 18560.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcb678]
>[ 18560.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcb678] width 2880 pitch 11520 (/4 2880)
>[ 18562.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956a8b8]
>[ 18562.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956a8b8] width 2880 pitch 11520 (/4 2880)
>[ 18566.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d10d8]
>[ 18566.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d10d8] width 2880 pitch 11520 (/4 2880)
>[ 18566.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956a760]
>[ 18566.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956a760] width 2880 pitch 11520 (/4 2880)
>[ 18566.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6c10]
>[ 18566.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6c10] width 2880 pitch 11520 (/4 2880)
>[ 18566.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e941f8]
>[ 18566.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e941f8] width 2880 pitch 11520 (/4 2880)
>[ 18566.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cddb78]
>[ 18566.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cddb78] width 2880 pitch 11520 (/4 2880)
>[ 18567.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb3948]
>[ 18567.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb3948] width 2880 pitch 11520 (/4 2880)
>[ 18567.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1ffc8]
>[ 18567.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1ffc8] width 2880 pitch 11520 (/4 2880)
>[ 18567.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9eeb8]
>[ 18567.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9eeb8] width 2880 pitch 11520 (/4 2880)
>[ 18568.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a18e0]
>[ 18568.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a18e0] width 2880 pitch 11520 (/4 2880)
>[ 18574.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86f68]
>[ 18574.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86f68] width 2880 pitch 11520 (/4 2880)
>[ 18575.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac47a8]
>[ 18575.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac47a8] width 2880 pitch 11520 (/4 2880)
>[ 18575.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 18575.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 18575.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 18575.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 18576.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1810]
>[ 18576.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1810] width 2880 pitch 11520 (/4 2880)
>[ 18576.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2700]
>[ 18576.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2700] width 2880 pitch 11520 (/4 2880)
>[ 18587.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84a90]
>[ 18587.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84a90] width 2880 pitch 11520 (/4 2880)
>[ 18590.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb3948]
>[ 18590.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb3948] width 2880 pitch 11520 (/4 2880)
>[ 18590.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f638]
>[ 18590.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f638] width 2880 pitch 11520 (/4 2880)
>[ 18590.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed25a0]
>[ 18590.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed25a0] width 2880 pitch 11520 (/4 2880)
>[ 18590.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c14d80]
>[ 18590.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c14d80] width 2880 pitch 11520 (/4 2880)
>[ 18591.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957a5c0]
>[ 18591.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957a5c0] width 2880 pitch 11520 (/4 2880)
>[ 18592.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cbe8]
>[ 18592.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cbe8] width 2880 pitch 11520 (/4 2880)
>[ 18592.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b6e8]
>[ 18592.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b6e8] width 2880 pitch 11520 (/4 2880)
>[ 18593.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d925c8]
>[ 18593.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d925c8] width 2880 pitch 11520 (/4 2880)
>[ 18593.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec9be0]
>[ 18593.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec9be0] width 2880 pitch 11520 (/4 2880)
>[ 18593.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cc38]
>[ 18593.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cc38] width 2880 pitch 11520 (/4 2880)
>[ 18593.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cbf8]
>[ 18593.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cbf8] width 2880 pitch 11520 (/4 2880)
>[ 18593.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d925c8]
>[ 18594.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d925c8] width 2880 pitch 11520 (/4 2880)
>[ 18594.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea208]
>[ 18594.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea208] width 2880 pitch 11520 (/4 2880)
>[ 18594.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[ 18594.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[ 18594.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea208]
>[ 18594.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea208] width 2880 pitch 11520 (/4 2880)
>[ 18595.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d925c8]
>[ 18595.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d925c8] width 2880 pitch 11520 (/4 2880)
>[ 18595.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aea208]
>[ 18595.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aea208] width 2880 pitch 11520 (/4 2880)
>[ 18595.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed23a0]
>[ 18596.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed23a0] width 2880 pitch 11520 (/4 2880)
>[ 18596.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e98370]
>[ 18596.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e98370] width 2880 pitch 11520 (/4 2880)
>[ 18596.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72ac0]
>[ 18596.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72ac0] width 2880 pitch 11520 (/4 2880)
>[ 18596.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72ac0]
>[ 18596.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72ac0] width 2880 pitch 11520 (/4 2880)
>[ 18596.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d925c8]
>[ 18596.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d925c8] width 2880 pitch 11520 (/4 2880)
>[ 18597.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d925c8]
>[ 18597.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d925c8] width 2880 pitch 11520 (/4 2880)
>[ 18597.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed40e8]
>[ 18597.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed40e8] width 2880 pitch 11520 (/4 2880)
>[ 18597.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed40e8]
>[ 18597.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed40e8] width 2880 pitch 11520 (/4 2880)
>[ 18598.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d884d8]
>[ 18598.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d884d8] width 2880 pitch 11520 (/4 2880)
>[ 18604.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[ 18604.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[ 18609.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95199f0]
>[ 18609.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95199f0] width 2880 pitch 11520 (/4 2880)
>[ 18619.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18619.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18626.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[ 18626.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[ 18654.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18654.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18654.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18654.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18654.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18654.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18654.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 18654.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 18654.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18654.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18654.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18654.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18654.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18654.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18654.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18654.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18654.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[ 18654.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[ 18654.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18654.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18654.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[ 18655.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[ 18658.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18658.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18658.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18658.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18661.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 18661.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 18661.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18661.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18661.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18661.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18661.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[ 18661.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[ 18661.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18661.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18661.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 18661.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 18661.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18661.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18661.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d3b0]
>[ 18661.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d3b0] width 2880 pitch 11520 (/4 2880)
>[ 18661.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[ 18661.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[ 18661.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8548]
>[ 18661.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8548] width 2880 pitch 11520 (/4 2880)
>[ 18661.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdc10]
>[ 18661.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdc10] width 2880 pitch 11520 (/4 2880)
>[ 18661.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8548]
>[ 18661.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8548] width 2880 pitch 11520 (/4 2880)
>[ 18661.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18661.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18661.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9576510]
>[ 18661.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9576510] width 2880 pitch 11520 (/4 2880)
>[ 18661.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2df58]
>[ 18661.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2df58] width 2880 pitch 11520 (/4 2880)
>[ 18676.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18676.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18676.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f638]
>[ 18676.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f638] width 2880 pitch 11520 (/4 2880)
>[ 18676.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18676.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18677.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18677.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18677.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 18677.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 18677.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8548]
>[ 18677.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8548] width 2880 pitch 11520 (/4 2880)
>[ 18677.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[ 18677.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[ 18678.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad8338]
>[ 18678.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad8338] width 2880 pitch 11520 (/4 2880)
>[ 18678.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18678.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18679.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[ 18679.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[ 18679.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[ 18679.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[ 18679.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18679.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18679.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfa38]
>[ 18679.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfa38] width 2880 pitch 11520 (/4 2880)
>[ 18679.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18679.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18719.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec5f70]
>[ 18719.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec5f70] width 2880 pitch 11520 (/4 2880)
>[ 18720.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 18720.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 18720.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 18720.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 18720.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18720.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18720.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18720.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18720.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18720.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18720.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c26bc0]
>[ 18720.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c26bc0] width 2880 pitch 11520 (/4 2880)
>[ 18720.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18720.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18720.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec5f70]
>[ 18720.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec5f70] width 2880 pitch 11520 (/4 2880)
>[ 18720.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 18720.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 18720.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18720.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18720.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cac308]
>[ 18720.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cac308] width 2880 pitch 11520 (/4 2880)
>[ 18724.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18724.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18724.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 18724.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 18724.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71bc8]
>[ 18724.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71bc8] width 2880 pitch 11520 (/4 2880)
>[ 18724.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec5f70]
>[ 18724.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec5f70] width 2880 pitch 11520 (/4 2880)
>[ 18724.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c26bc0]
>[ 18724.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c26bc0] width 2880 pitch 11520 (/4 2880)
>[ 18724.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2df58]
>[ 18724.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2df58] width 2880 pitch 11520 (/4 2880)
>[ 18724.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b21910]
>[ 18724.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b21910] width 2880 pitch 11520 (/4 2880)
>[ 18724.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2df58]
>[ 18724.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2df58] width 2880 pitch 11520 (/4 2880)
>[ 18724.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b21910]
>[ 18724.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b21910] width 2880 pitch 11520 (/4 2880)
>[ 18724.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecf58]
>[ 18724.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecf58] width 2880 pitch 11520 (/4 2880)
>[ 18724.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b21910]
>[ 18724.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b21910] width 2880 pitch 11520 (/4 2880)
>[ 18724.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecf58]
>[ 18724.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecf58] width 2880 pitch 11520 (/4 2880)
>[ 18724.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18724.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18745.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 18745.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 18745.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 18745.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 18745.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18745.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18745.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 18745.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 18745.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee078]
>[ 18745.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee078] width 2880 pitch 11520 (/4 2880)
>[ 18745.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed36e0]
>[ 18745.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed36e0] width 2880 pitch 11520 (/4 2880)
>[ 18745.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18745.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18745.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18746.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18746.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8548]
>[ 18746.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8548] width 2880 pitch 11520 (/4 2880)
>[ 18746.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18746.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18746.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed36e0]
>[ 18746.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed36e0] width 2880 pitch 11520 (/4 2880)
>[ 18746.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18746.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18746.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2e38]
>[ 18746.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2e38] width 2880 pitch 11520 (/4 2880)
>[ 18751.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 18751.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 18751.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964aae0]
>[ 18751.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964aae0] width 2880 pitch 11520 (/4 2880)
>[ 18751.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed36e0]
>[ 18751.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed36e0] width 2880 pitch 11520 (/4 2880)
>[ 18751.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 18751.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 18751.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18751.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18751.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b21910]
>[ 18751.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b21910] width 2880 pitch 11520 (/4 2880)
>[ 18751.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dfa38]
>[ 18751.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dfa38] width 2880 pitch 11520 (/4 2880)
>[ 18751.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18751.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18751.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71bc8]
>[ 18751.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71bc8] width 2880 pitch 11520 (/4 2880)
>[ 18751.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18751.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18751.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71bc8]
>[ 18751.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71bc8] width 2880 pitch 11520 (/4 2880)
>[ 18751.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18751.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18751.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71bc8]
>[ 18751.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71bc8] width 2880 pitch 11520 (/4 2880)
>[ 18811.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18811.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18811.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff0a60]
>[ 18811.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff0a60] width 2880 pitch 11520 (/4 2880)
>[ 18824.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18824.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18824.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecf58]
>[ 18824.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecf58] width 2880 pitch 11520 (/4 2880)
>[ 18824.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff0a60]
>[ 18824.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff0a60] width 2880 pitch 11520 (/4 2880)
>[ 18824.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ecf58]
>[ 18824.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ecf58] width 2880 pitch 11520 (/4 2880)
>[ 18824.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 18824.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 18825.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18825.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18825.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 18825.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 18825.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18825.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18826.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18826.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18826.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d3b0]
>[ 18826.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d3b0] width 2880 pitch 11520 (/4 2880)
>[ 18826.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2df58]
>[ 18826.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2df58] width 2880 pitch 11520 (/4 2880)
>[ 18826.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8548]
>[ 18826.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8548] width 2880 pitch 11520 (/4 2880)
>[ 18826.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18826.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18826.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18826.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18829.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[ 18829.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[ 18834.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c26bc0]
>[ 18834.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c26bc0] width 2880 pitch 11520 (/4 2880)
>[ 18848.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd3308]
>[ 18848.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd3308] width 2880 pitch 11520 (/4 2880)
>[ 18848.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d88d38]
>[ 18848.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d88d38] width 2880 pitch 11520 (/4 2880)
>[ 18849.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18849.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18852.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2df58]
>[ 18852.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2df58] width 2880 pitch 11520 (/4 2880)
>[ 18862.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49ea0]
>[ 18862.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49ea0] width 2880 pitch 11520 (/4 2880)
>[ 18862.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18862.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18862.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff0398]
>[ 18863.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff0398] width 2880 pitch 11520 (/4 2880)
>[ 18863.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18863.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18863.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18863.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18863.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18863.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18863.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e664c8]
>[ 18863.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e664c8] width 2880 pitch 11520 (/4 2880)
>[ 18863.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18863.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18863.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee078]
>[ 18863.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee078] width 2880 pitch 11520 (/4 2880)
>[ 18863.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18863.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18863.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee078]
>[ 18863.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee078] width 2880 pitch 11520 (/4 2880)
>[ 18863.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 18863.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 18864.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad8338]
>[ 18864.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad8338] width 2880 pitch 11520 (/4 2880)
>[ 18864.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18864.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18864.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ec28]
>[ 18864.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ec28] width 2880 pitch 11520 (/4 2880)
>[ 18865.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18865.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18865.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed1740]
>[ 18865.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed1740] width 2880 pitch 11520 (/4 2880)
>[ 18865.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18865.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18865.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 18865.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 18866.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18866.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18866.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff0a60]
>[ 18866.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff0a60] width 2880 pitch 11520 (/4 2880)
>[ 18867.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18867.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18867.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c93e8]
>[ 18867.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c93e8] width 2880 pitch 11520 (/4 2880)
>[ 18867.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec99c8]
>[ 18867.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec99c8] width 2880 pitch 11520 (/4 2880)
>[ 18867.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18867.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18882.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18882.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18882.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ec28]
>[ 18882.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ec28] width 2880 pitch 11520 (/4 2880)
>[ 18882.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 18882.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 18883.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ec28]
>[ 18883.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ec28] width 2880 pitch 11520 (/4 2880)
>[ 18883.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18883.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18883.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad0898]
>[ 18883.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad0898] width 2880 pitch 11520 (/4 2880)
>[ 18883.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18883.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18883.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 18884.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 18884.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18884.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18884.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18884.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18884.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9af40]
>[ 18884.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9af40] width 2880 pitch 11520 (/4 2880)
>[ 18884.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18884.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18884.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18884.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18893.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18893.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18899.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eaa220]
>[ 18899.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eaa220] width 2880 pitch 11520 (/4 2880)
>[ 18899.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18899.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18899.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18899.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18899.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18899.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18899.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18899.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18899.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18899.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18899.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea9300]
>[ 18899.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea9300] width 2880 pitch 11520 (/4 2880)
>[ 18899.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18899.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18899.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18899.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18899.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49d70]
>[ 18899.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49d70] width 2880 pitch 11520 (/4 2880)
>[ 18899.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18899.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18899.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9587730]
>[ 18899.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9587730] width 2880 pitch 11520 (/4 2880)
>[ 18901.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9587a38]
>[ 18901.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9587a38] width 2880 pitch 11520 (/4 2880)
>[ 18901.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18901.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18901.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18901.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18901.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18901.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18901.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 18901.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 18902.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9587a38]
>[ 18902.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9587a38] width 2880 pitch 11520 (/4 2880)
>[ 18902.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18902.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18902.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 18902.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 18902.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49d70]
>[ 18902.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49d70] width 2880 pitch 11520 (/4 2880)
>[ 18903.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49d70]
>[ 18903.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49d70] width 2880 pitch 11520 (/4 2880)
>[ 18903.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18903.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18903.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18903.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18903.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18903.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18903.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18903.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18904.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 18904.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 18904.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18904.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18904.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33890]
>[ 18904.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33890] width 2880 pitch 11520 (/4 2880)
>[ 18904.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18904.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18904.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd2d68]
>[ 18904.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd2d68] width 2880 pitch 11520 (/4 2880)
>[ 18904.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 18904.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 18904.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18904.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18904.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed36e0]
>[ 18904.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed36e0] width 2880 pitch 11520 (/4 2880)
>[ 18904.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18904.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18904.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18904.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18904.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18904.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18904.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 18904.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 18904.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18904.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18905.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18905.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18905.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18905.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18905.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f5ece0]
>[ 18905.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f5ece0] width 2880 pitch 11520 (/4 2880)
>[ 18905.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 18905.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 18905.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18905.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18905.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18905.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18905.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 18905.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 18905.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18905.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18905.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9af40]
>[ 18905.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9af40] width 2880 pitch 11520 (/4 2880)
>[ 18905.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18905.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18905.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18905.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18905.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18905.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18905.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18905.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18905.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebda50]
>[ 18905.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebda50] width 2880 pitch 11520 (/4 2880)
>[ 18909.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49d70]
>[ 18909.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49d70] width 2880 pitch 11520 (/4 2880)
>[ 18928.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 18928.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 18944.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26c20]
>[ 18944.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26c20] width 2880 pitch 11520 (/4 2880)
>[ 18944.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18944.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18944.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18944.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18944.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff0398]
>[ 18944.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff0398] width 2880 pitch 11520 (/4 2880)
>[ 18944.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26c20]
>[ 18944.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26c20] width 2880 pitch 11520 (/4 2880)
>[ 18945.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956dcc8]
>[ 18945.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956dcc8] width 2880 pitch 11520 (/4 2880)
>[ 18945.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18945.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18945.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b802f0]
>[ 18945.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b802f0] width 2880 pitch 11520 (/4 2880)
>[ 18945.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 18945.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 18946.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd2d68]
>[ 18946.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd2d68] width 2880 pitch 11520 (/4 2880)
>[ 18946.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed36e0]
>[ 18946.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed36e0] width 2880 pitch 11520 (/4 2880)
>[ 18946.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e642b8]
>[ 18946.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e642b8] width 2880 pitch 11520 (/4 2880)
>[ 18946.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975730]
>[ 18946.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975730] width 2880 pitch 11520 (/4 2880)
>[ 18958.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9af40]
>[ 18958.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9af40] width 2880 pitch 11520 (/4 2880)
>[ 18958.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18958.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18958.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d8a8]
>[ 18958.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d8a8] width 2880 pitch 11520 (/4 2880)
>[ 18958.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723280]
>[ 18958.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723280] width 2880 pitch 11520 (/4 2880)
>[ 18958.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9af40]
>[ 18958.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9af40] width 2880 pitch 11520 (/4 2880)
>[ 18958.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 18958.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 18958.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d8a8]
>[ 18958.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d8a8] width 2880 pitch 11520 (/4 2880)
>[ 18958.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9568d80]
>[ 18958.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9568d80] width 2880 pitch 11520 (/4 2880)
>[ 18958.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e642b8]
>[ 18958.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e642b8] width 2880 pitch 11520 (/4 2880)
>[ 18959.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 18959.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 18960.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26c20]
>[ 18960.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26c20] width 2880 pitch 11520 (/4 2880)
>[ 18960.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fedc68]
>[ 18960.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fedc68] width 2880 pitch 11520 (/4 2880)
>[ 18960.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b802f0]
>[ 18960.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b802f0] width 2880 pitch 11520 (/4 2880)
>[ 18960.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd2d68]
>[ 18960.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd2d68] width 2880 pitch 11520 (/4 2880)
>[ 18960.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fedc68]
>[ 18960.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fedc68] width 2880 pitch 11520 (/4 2880)
>[ 18967.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54628]
>[ 18967.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54628] width 2880 pitch 11520 (/4 2880)
>[ 18999.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f21c40]
>[ 18999.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f21c40] width 2880 pitch 11520 (/4 2880)
>[ 19005.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 19005.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 19021.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19021.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19021.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc6458]
>[ 19021.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc6458] width 2880 pitch 11520 (/4 2880)
>[ 19021.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9568d80]
>[ 19021.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9568d80] width 2880 pitch 11520 (/4 2880)
>[ 19022.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 19022.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 19022.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 19022.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 19022.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc5b18]
>[ 19022.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc5b18] width 2880 pitch 11520 (/4 2880)
>[ 19024.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 19024.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 19026.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26c20]
>[ 19026.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26c20] width 2880 pitch 11520 (/4 2880)
>[ 19026.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ec28]
>[ 19026.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ec28] width 2880 pitch 11520 (/4 2880)
>[ 19026.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19026.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19026.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584af8]
>[ 19026.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584af8] width 2880 pitch 11520 (/4 2880)
>[ 19032.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba570]
>[ 19032.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba570] width 2880 pitch 11520 (/4 2880)
>[ 19032.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b802f0]
>[ 19032.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b802f0] width 2880 pitch 11520 (/4 2880)
>[ 19032.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19032.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19033.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 19033.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 19033.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eaa220]
>[ 19033.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eaa220] width 2880 pitch 11520 (/4 2880)
>[ 19033.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d8c890]
>[ 19033.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d8c890] width 2880 pitch 11520 (/4 2880)
>[ 19033.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19033.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19033.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33890]
>[ 19033.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33890] width 2880 pitch 11520 (/4 2880)
>[ 19033.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 19034.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 19034.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d8a8]
>[ 19034.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d8a8] width 2880 pitch 11520 (/4 2880)
>[ 19034.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 19034.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 19035.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584af8]
>[ 19035.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584af8] width 2880 pitch 11520 (/4 2880)
>[ 19035.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d11b0]
>[ 19035.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d11b0] width 2880 pitch 11520 (/4 2880)
>[ 19035.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba570]
>[ 19035.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba570] width 2880 pitch 11520 (/4 2880)
>[ 19035.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33890]
>[ 19035.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33890] width 2880 pitch 11520 (/4 2880)
>[ 19035.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 19035.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 19036.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 19036.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 19036.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc6458]
>[ 19036.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc6458] width 2880 pitch 11520 (/4 2880)
>[ 19043.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19043.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19043.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579718]
>[ 19043.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579718] width 2880 pitch 11520 (/4 2880)
>[ 19043.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 19044.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 19044.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eaa220]
>[ 19044.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eaa220] width 2880 pitch 11520 (/4 2880)
>[ 19044.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e642b8]
>[ 19044.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e642b8] width 2880 pitch 11520 (/4 2880)
>[ 19044.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba570]
>[ 19044.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba570] width 2880 pitch 11520 (/4 2880)
>[ 19044.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 19044.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 19044.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 19044.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 19044.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9af40]
>[ 19044.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9af40] width 2880 pitch 11520 (/4 2880)
>[ 19044.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d7c8]
>[ 19044.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d7c8] width 2880 pitch 11520 (/4 2880)
>[ 19045.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e49ea0]
>[ 19045.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e49ea0] width 2880 pitch 11520 (/4 2880)
>[ 19045.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[ 19045.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[ 19045.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 19045.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 19045.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 19045.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 19048.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579718]
>[ 19048.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579718] width 2880 pitch 11520 (/4 2880)
>[ 19048.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc5b18]
>[ 19048.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc5b18] width 2880 pitch 11520 (/4 2880)
>[ 19048.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a0a08]
>[ 19048.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a0a08] width 2880 pitch 11520 (/4 2880)
>[ 19049.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3148]
>[ 19049.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3148] width 2880 pitch 11520 (/4 2880)
>[ 19049.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 19049.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 19049.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9568d80]
>[ 19049.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9568d80] width 2880 pitch 11520 (/4 2880)
>[ 19049.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc5b18]
>[ 19049.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc5b18] width 2880 pitch 11520 (/4 2880)
>[ 19050.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 19050.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 19050.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 19050.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 19050.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83938]
>[ 19050.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83938] width 2880 pitch 11520 (/4 2880)
>[ 19050.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19050.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19077.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 19077.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 19077.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e642b8]
>[ 19077.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e642b8] width 2880 pitch 11520 (/4 2880)
>[ 19078.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 19078.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 19078.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19078.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19078.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4d418]
>[ 19078.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4d418] width 2880 pitch 11520 (/4 2880)
>[ 19078.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33890]
>[ 19078.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33890] width 2880 pitch 11520 (/4 2880)
>[ 19078.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 19078.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 19079.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d440c8]
>[ 19079.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d440c8] width 2880 pitch 11520 (/4 2880)
>[ 19079.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19079.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19079.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19079.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19080.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1228]
>[ 19080.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1228] width 2880 pitch 11520 (/4 2880)
>[ 19109.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 19109.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 19208.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579138]
>[ 19208.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579138] width 2880 pitch 11520 (/4 2880)
>[ 19208.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d92188]
>[ 19208.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d92188] width 2880 pitch 11520 (/4 2880)
>[ 19209.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba570]
>[ 19209.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba570] width 2880 pitch 11520 (/4 2880)
>[ 19311.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebedc8]
>[ 19311.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebedc8] width 2880 pitch 11520 (/4 2880)
>[ 19312.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebedc8]
>[ 19312.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebedc8] width 2880 pitch 11520 (/4 2880)
>[ 19312.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d49f8]
>[ 19312.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d49f8] width 2880 pitch 11520 (/4 2880)
>[ 19312.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 19312.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 19312.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db56c0]
>[ 19312.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db56c0] width 2880 pitch 11520 (/4 2880)
>[ 19312.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 19313.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 19313.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e69590]
>[ 19313.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e69590] width 2880 pitch 11520 (/4 2880)
>[ 19313.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19313.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19313.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958f788]
>[ 19313.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958f788] width 2880 pitch 11520 (/4 2880)
>[ 19313.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19313.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19314.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a3cb8]
>[ 19314.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a3cb8] width 2880 pitch 11520 (/4 2880)
>[ 19314.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d440c8]
>[ 19314.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d440c8] width 2880 pitch 11520 (/4 2880)
>[ 19314.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db6e48]
>[ 19314.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db6e48] width 2880 pitch 11520 (/4 2880)
>[ 19314.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71e28]
>[ 19314.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71e28] width 2880 pitch 11520 (/4 2880)
>[ 19314.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957caa8]
>[ 19314.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957caa8] width 2880 pitch 11520 (/4 2880)
>[ 19320.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9e4b8]
>[ 19320.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9e4b8] width 2880 pitch 11520 (/4 2880)
>[ 19322.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96218a8]
>[ 19322.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96218a8] width 2880 pitch 11520 (/4 2880)
>[ 19351.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedf50]
>[ 19351.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedf50] width 2880 pitch 11520 (/4 2880)
>[ 19351.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19351.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19351.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedf50]
>[ 19351.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedf50] width 2880 pitch 11520 (/4 2880)
>[ 19351.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19351.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19351.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedf50]
>[ 19351.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedf50] width 2880 pitch 11520 (/4 2880)
>[ 19351.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc458]
>[ 19351.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc458] width 2880 pitch 11520 (/4 2880)
>[ 19351.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957d900]
>[ 19351.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957d900] width 2880 pitch 11520 (/4 2880)
>[ 19351.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19351.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19351.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec47f8]
>[ 19351.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec47f8] width 2880 pitch 11520 (/4 2880)
>[ 19351.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedf50]
>[ 19351.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedf50] width 2880 pitch 11520 (/4 2880)
>[ 19351.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc458]
>[ 19351.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc458] width 2880 pitch 11520 (/4 2880)
>[ 19351.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957d900]
>[ 19351.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957d900] width 2880 pitch 11520 (/4 2880)
>[ 19351.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19351.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19355.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb540]
>[ 19355.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb540] width 2880 pitch 11520 (/4 2880)
>[ 19355.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc698]
>[ 19355.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc698] width 2880 pitch 11520 (/4 2880)
>[ 19355.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dede20]
>[ 19355.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dede20] width 2880 pitch 11520 (/4 2880)
>[ 19355.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2c180]
>[ 19355.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2c180] width 2880 pitch 11520 (/4 2880)
>[ 19355.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579508]
>[ 19355.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579508] width 2880 pitch 11520 (/4 2880)
>[ 19355.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958f788]
>[ 19355.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958f788] width 2880 pitch 11520 (/4 2880)
>[ 19355.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff7298]
>[ 19355.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff7298] width 2880 pitch 11520 (/4 2880)
>[ 19355.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e61408]
>[ 19355.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e61408] width 2880 pitch 11520 (/4 2880)
>[ 19355.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2c180]
>[ 19355.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2c180] width 2880 pitch 11520 (/4 2880)
>[ 19355.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579508]
>[ 19355.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579508] width 2880 pitch 11520 (/4 2880)
>[ 19355.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1b88]
>[ 19355.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1b88] width 2880 pitch 11520 (/4 2880)
>[ 19355.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e586e0]
>[ 19355.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e586e0] width 2880 pitch 11520 (/4 2880)
>[ 19355.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7aad8]
>[ 19355.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7aad8] width 2880 pitch 11520 (/4 2880)
>[ 19359.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db7640]
>[ 19359.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db7640] width 2880 pitch 11520 (/4 2880)
>[ 19359.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1b88]
>[ 19359.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1b88] width 2880 pitch 11520 (/4 2880)
>[ 19359.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e586e0]
>[ 19359.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e586e0] width 2880 pitch 11520 (/4 2880)
>[ 19359.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba570]
>[ 19359.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba570] width 2880 pitch 11520 (/4 2880)
>[ 19359.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db7640]
>[ 19359.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db7640] width 2880 pitch 11520 (/4 2880)
>[ 19359.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db56c0]
>[ 19359.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db56c0] width 2880 pitch 11520 (/4 2880)
>[ 19359.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957ba60]
>[ 19359.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957ba60] width 2880 pitch 11520 (/4 2880)
>[ 19359.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db56c0]
>[ 19359.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db56c0] width 2880 pitch 11520 (/4 2880)
>[ 19359.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedf50]
>[ 19359.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedf50] width 2880 pitch 11520 (/4 2880)
>[ 19359.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585760]
>[ 19359.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585760] width 2880 pitch 11520 (/4 2880)
>[ 19359.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d828]
>[ 19359.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d828] width 2880 pitch 11520 (/4 2880)
>[ 19359.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957d330]
>[ 19359.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957d330] width 2880 pitch 11520 (/4 2880)
>[ 19359.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9e4b8]
>[ 19360.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9e4b8] width 2880 pitch 11520 (/4 2880)
>[ 19719.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec14c0]
>[ 19719.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec14c0] width 2880 pitch 11520 (/4 2880)
>[ 19719.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec14c0]
>[ 19719.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec14c0] width 2880 pitch 11520 (/4 2880)
>[ 19719.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e64be0]
>[ 19719.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e64be0] width 2880 pitch 11520 (/4 2880)
>[ 19719.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957c8d0]
>[ 19719.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957c8d0] width 2880 pitch 11520 (/4 2880)
>[ 19719.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a4390]
>[ 19719.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a4390] width 2880 pitch 11520 (/4 2880)
>[ 19719.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957c8d0]
>[ 19720.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957c8d0] width 2880 pitch 11520 (/4 2880)
>[ 19720.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e64be0]
>[ 19720.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e64be0] width 2880 pitch 11520 (/4 2880)
>[ 19720.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec91c0]
>[ 19720.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec91c0] width 2880 pitch 11520 (/4 2880)
>[ 19720.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcd8f8]
>[ 19720.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcd8f8] width 2880 pitch 11520 (/4 2880)
>[ 19720.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e64be0]
>[ 19720.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e64be0] width 2880 pitch 11520 (/4 2880)
>[ 19720.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec14c0]
>[ 19720.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec14c0] width 2880 pitch 11520 (/4 2880)
>[ 19724.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec14c0]
>[ 19724.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec14c0] width 2880 pitch 11520 (/4 2880)
>[ 19724.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941fd70]
>[ 19724.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941fd70] width 2880 pitch 11520 (/4 2880)
>[ 19724.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9a378]
>[ 19724.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9a378] width 2880 pitch 11520 (/4 2880)
>[ 19724.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d85240]
>[ 19724.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d85240] width 2880 pitch 11520 (/4 2880)
>[ 19724.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e983c0]
>[ 19724.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e983c0] width 2880 pitch 11520 (/4 2880)
>[ 19724.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcd8f8]
>[ 19724.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcd8f8] width 2880 pitch 11520 (/4 2880)
>[ 19724.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941fd70]
>[ 19724.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941fd70] width 2880 pitch 11520 (/4 2880)
>[ 19724.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9a378]
>[ 19724.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9a378] width 2880 pitch 11520 (/4 2880)
>[ 19724.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d85240]
>[ 19724.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d85240] width 2880 pitch 11520 (/4 2880)
>[ 19724.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e983c0]
>[ 19724.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e983c0] width 2880 pitch 11520 (/4 2880)
>[ 19724.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcd8f8]
>[ 19724.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcd8f8] width 2880 pitch 11520 (/4 2880)
>[ 19725.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2a880]
>[ 19725.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2a880] width 2880 pitch 11520 (/4 2880)
>[ 19725.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebb630]
>[ 19725.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebb630] width 2880 pitch 11520 (/4 2880)
>[ 19725.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e983c0]
>[ 19725.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e983c0] width 2880 pitch 11520 (/4 2880)
>[ 19725.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9a378]
>[ 19725.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9a378] width 2880 pitch 11520 (/4 2880)
>[ 19725.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2a880]
>[ 19725.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2a880] width 2880 pitch 11520 (/4 2880)
>[ 19725.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd6808]
>[ 19725.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd6808] width 2880 pitch 11520 (/4 2880)
>[ 19725.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebb630]
>[ 19725.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebb630] width 2880 pitch 11520 (/4 2880)
>[ 19725.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd6808]
>[ 19725.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd6808] width 2880 pitch 11520 (/4 2880)
>[ 19725.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebb630]
>[ 19725.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebb630] width 2880 pitch 11520 (/4 2880)
>[ 19725.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd6808]
>[ 19725.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd6808] width 2880 pitch 11520 (/4 2880)
>[ 19725.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebb630]
>[ 19725.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebb630] width 2880 pitch 11520 (/4 2880)
>[ 19725.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd6808]
>[ 19725.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd6808] width 2880 pitch 11520 (/4 2880)
>[ 19725.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e983c0]
>[ 19725.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e983c0] width 2880 pitch 11520 (/4 2880)
>[ 19790.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1140]
>[ 19790.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1140] width 2880 pitch 11520 (/4 2880)
>[ 19794.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957c8d0]
>[ 19794.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957c8d0] width 2880 pitch 11520 (/4 2880)
>[ 19794.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cb70]
>[ 19794.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cb70] width 2880 pitch 11520 (/4 2880)
>[ 19795.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f21cd0]
>[ 19795.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f21cd0] width 2880 pitch 11520 (/4 2880)
>[ 19795.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x957c8d0]
>[ 19795.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x957c8d0] width 2880 pitch 11520 (/4 2880)
>[ 19795.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cb70]
>[ 19795.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cb70] width 2880 pitch 11520 (/4 2880)
>[ 19796.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7bdb8]
>[ 19796.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7bdb8] width 2880 pitch 11520 (/4 2880)
>[ 19796.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3a78]
>[ 19796.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3a78] width 2880 pitch 11520 (/4 2880)
>[ 19797.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7cb70]
>[ 19797.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7cb70] width 2880 pitch 11520 (/4 2880)
>[ 19816.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 19816.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 19816.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 19816.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 19817.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dead70]
>[ 19817.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dead70] width 2880 pitch 11520 (/4 2880)
>[ 19817.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 19817.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 19817.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8dd00]
>[ 19817.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8dd00] width 2880 pitch 11520 (/4 2880)
>[ 19817.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8dd00]
>[ 19817.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8dd00] width 2880 pitch 11520 (/4 2880)
>[ 19818.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 19818.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 19818.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2cc50]
>[ 19818.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2cc50] width 2880 pitch 11520 (/4 2880)
>[ 19825.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2cc50]
>[ 19825.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2cc50] width 2880 pitch 11520 (/4 2880)
>[ 19825.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 19825.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 19825.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 19825.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 19826.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2cc50]
>[ 19826.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2cc50] width 2880 pitch 11520 (/4 2880)
>[ 19826.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 19826.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 19826.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2cc50]
>[ 19826.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2cc50] width 2880 pitch 11520 (/4 2880)
>[ 19827.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb8368]
>[ 19827.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb8368] width 2880 pitch 11520 (/4 2880)
>[ 19827.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2cc50]
>[ 19827.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2cc50] width 2880 pitch 11520 (/4 2880)
>[ 19827.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dead70]
>[ 19827.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dead70] width 2880 pitch 11520 (/4 2880)
>[ 19827.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddd1c0]
>[ 19827.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddd1c0] width 2880 pitch 11520 (/4 2880)
>[ 19889.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c85068]
>[ 19889.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c85068] width 2880 pitch 11520 (/4 2880)
>[ 19889.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19889.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19889.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dea730]
>[ 19889.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dea730] width 2880 pitch 11520 (/4 2880)
>[ 19890.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9609658]
>[ 19890.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9609658] width 2880 pitch 11520 (/4 2880)
>[ 19890.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19890.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19890.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19890.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19890.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0ed88]
>[ 19890.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0ed88] width 2880 pitch 11520 (/4 2880)
>[ 19891.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0ed88]
>[ 19891.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0ed88] width 2880 pitch 11520 (/4 2880)
>[ 19891.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19891.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19891.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19891.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19893.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19893.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19894.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e75160]
>[ 19894.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e75160] width 2880 pitch 11520 (/4 2880)
>[ 19894.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0ed88]
>[ 19894.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0ed88] width 2880 pitch 11520 (/4 2880)
>[ 19894.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f3d98]
>[ 19894.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f3d98] width 2880 pitch 11520 (/4 2880)
>[ 19943.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608cc8]
>[ 19943.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608cc8] width 2880 pitch 11520 (/4 2880)
>[ 19944.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 19944.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 19979.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 19979.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 19979.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac1c8]
>[ 19979.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac1c8] width 2880 pitch 11520 (/4 2880)
>[ 19979.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991c808]
>[ 19979.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991c808] width 2880 pitch 11520 (/4 2880)
>[ 19979.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de4d00]
>[ 19979.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de4d00] width 2880 pitch 11520 (/4 2880)
>[ 19980.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6c158]
>[ 19980.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6c158] width 2880 pitch 11520 (/4 2880)
>[ 19980.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d690]
>[ 19980.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d690] width 2880 pitch 11520 (/4 2880)
>[ 19980.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592040]
>[ 19980.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592040] width 2880 pitch 11520 (/4 2880)
>[ 19980.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 19980.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 19980.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c6050]
>[ 19980.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c6050] width 2880 pitch 11520 (/4 2880)
>[ 19981.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5cc0]
>[ 19981.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5cc0] width 2880 pitch 11520 (/4 2880)
>[ 19981.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac1c8]
>[ 19981.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac1c8] width 2880 pitch 11520 (/4 2880)
>[ 19981.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c82eb8]
>[ 19981.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c82eb8] width 2880 pitch 11520 (/4 2880)
>[ 19981.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa5b58]
>[ 19981.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa5b58] width 2880 pitch 11520 (/4 2880)
>[ 19981.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa5fa0]
>[ 19981.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa5fa0] width 2880 pitch 11520 (/4 2880)
>[ 20104.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20104.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20104.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b2f0]
>[ 20104.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b2f0] width 2880 pitch 11520 (/4 2880)
>[ 20104.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20104.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20105.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20105.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20105.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20105.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20105.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9609658]
>[ 20105.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9609658] width 2880 pitch 11520 (/4 2880)
>[ 20105.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20105.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20106.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9609658]
>[ 20106.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9609658] width 2880 pitch 11520 (/4 2880)
>[ 20106.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 20106.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 20106.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20106.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20106.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20106.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20106.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 20106.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 20106.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20106.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20107.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20107.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20107.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20107.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20107.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20107.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20107.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20107.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20108.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 20108.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 20108.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20108.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20108.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20108.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20108.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20108.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20108.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 20108.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 20108.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20108.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20108.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd1748]
>[ 20109.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd1748] width 2880 pitch 11520 (/4 2880)
>[ 20109.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d1900]
>[ 20109.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d1900] width 2880 pitch 11520 (/4 2880)
>[ 20109.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9609658]
>[ 20109.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9609658] width 2880 pitch 11520 (/4 2880)
>[ 20109.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 20109.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 20109.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea5700]
>[ 20109.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea5700] width 2880 pitch 11520 (/4 2880)
>[ 20109.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8010]
>[ 20109.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8010] width 2880 pitch 11520 (/4 2880)
>[ 20109.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d898f0]
>[ 20109.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d898f0] width 2880 pitch 11520 (/4 2880)
>[ 20128.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20128.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20143.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55b50]
>[ 20143.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55b50] width 2880 pitch 11520 (/4 2880)
>[ 20143.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 20143.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 20143.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd148]
>[ 20143.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd148] width 2880 pitch 11520 (/4 2880)
>[ 20143.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55b50]
>[ 20143.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55b50] width 2880 pitch 11520 (/4 2880)
>[ 20152.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55b50]
>[ 20152.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55b50] width 2880 pitch 11520 (/4 2880)
>[ 20152.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956f0d0]
>[ 20152.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956f0d0] width 2880 pitch 11520 (/4 2880)
>[ 20152.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eeb48]
>[ 20152.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eeb48] width 2880 pitch 11520 (/4 2880)
>[ 20152.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eed98]
>[ 20152.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eed98] width 2880 pitch 11520 (/4 2880)
>[ 20152.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8010]
>[ 20152.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8010] width 2880 pitch 11520 (/4 2880)
>[ 20152.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97effb8]
>[ 20152.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97effb8] width 2880 pitch 11520 (/4 2880)
>[ 20152.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 20152.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 20152.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9625670]
>[ 20153.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9625670] width 2880 pitch 11520 (/4 2880)
>[ 20153.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8010]
>[ 20153.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8010] width 2880 pitch 11520 (/4 2880)
>[ 20153.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9625670]
>[ 20153.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9625670] width 2880 pitch 11520 (/4 2880)
>[ 20153.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8010]
>[ 20153.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8010] width 2880 pitch 11520 (/4 2880)
>[ 20153.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8f118]
>[ 20153.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8f118] width 2880 pitch 11520 (/4 2880)
>[ 20153.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8f118]
>[ 20153.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8f118] width 2880 pitch 11520 (/4 2880)
>[ 20192.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97effb8]
>[ 20192.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97effb8] width 2880 pitch 11520 (/4 2880)
>[ 20193.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e789c8]
>[ 20193.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e789c8] width 2880 pitch 11520 (/4 2880)
>[ 20195.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd148]
>[ 20195.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd148] width 2880 pitch 11520 (/4 2880)
>[ 20198.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab9a20]
>[ 20198.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab9a20] width 2880 pitch 11520 (/4 2880)
>[ 20205.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd148]
>[ 20205.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd148] width 2880 pitch 11520 (/4 2880)
>[ 20210.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55b50]
>[ 20210.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55b50] width 2880 pitch 11520 (/4 2880)
>[ 20248.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfab0]
>[ 20248.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfab0] width 2880 pitch 11520 (/4 2880)
>[ 20249.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfab0]
>[ 20249.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfab0] width 2880 pitch 11520 (/4 2880)
>[ 20249.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20249.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20249.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20249.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20249.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20249.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20250.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20250.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20250.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20250.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20250.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20250.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20250.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfab0]
>[ 20250.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfab0] width 2880 pitch 11520 (/4 2880)
>[ 20250.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20250.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20251.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebe0a0]
>[ 20251.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebe0a0] width 2880 pitch 11520 (/4 2880)
>[ 20251.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eed98]
>[ 20251.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eed98] width 2880 pitch 11520 (/4 2880)
>[ 20251.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebe0a0]
>[ 20251.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebe0a0] width 2880 pitch 11520 (/4 2880)
>[ 20251.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef370]
>[ 20251.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef370] width 2880 pitch 11520 (/4 2880)
>[ 20251.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a32b50]
>[ 20251.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a32b50] width 2880 pitch 11520 (/4 2880)
>[ 20257.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51fd8]
>[ 20257.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51fd8] width 2880 pitch 11520 (/4 2880)
>[ 20257.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9609658]
>[ 20257.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9609658] width 2880 pitch 11520 (/4 2880)
>[ 20257.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8ec70]
>[ 20257.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8ec70] width 2880 pitch 11520 (/4 2880)
>[ 20257.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20257.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20258.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e86128]
>[ 20258.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e86128] width 2880 pitch 11520 (/4 2880)
>[ 20258.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51288]
>[ 20258.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51288] width 2880 pitch 11520 (/4 2880)
>[ 20258.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f068]
>[ 20258.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f068] width 2880 pitch 11520 (/4 2880)
>[ 20258.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9525fc8]
>[ 20258.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9525fc8] width 2880 pitch 11520 (/4 2880)
>[ 20259.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d66ba0]
>[ 20259.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d66ba0] width 2880 pitch 11520 (/4 2880)
>[ 20260.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20260.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20261.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51288]
>[ 20261.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51288] width 2880 pitch 11520 (/4 2880)
>[ 20264.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9f068]
>[ 20264.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9f068] width 2880 pitch 11520 (/4 2880)
>[ 20264.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9525fc8]
>[ 20264.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9525fc8] width 2880 pitch 11520 (/4 2880)
>[ 20266.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d46918]
>[ 20266.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d46918] width 2880 pitch 11520 (/4 2880)
>[ 20266.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e86128]
>[ 20266.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e86128] width 2880 pitch 11520 (/4 2880)
>[ 20266.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20266.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20266.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51288]
>[ 20266.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51288] width 2880 pitch 11520 (/4 2880)
>[ 20267.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20267.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20267.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20267.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20267.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62550]
>[ 20267.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62550] width 2880 pitch 11520 (/4 2880)
>[ 20267.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e62550]
>[ 20267.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e62550] width 2880 pitch 11520 (/4 2880)
>[ 20267.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b20e0]
>[ 20267.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b20e0] width 2880 pitch 11520 (/4 2880)
>[ 20390.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1988]
>[ 20390.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1988] width 2880 pitch 11520 (/4 2880)
>[ 20390.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1988]
>[ 20391.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1988] width 2880 pitch 11520 (/4 2880)
>[ 20391.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20391.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20391.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1988]
>[ 20391.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1988] width 2880 pitch 11520 (/4 2880)
>[ 20391.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20391.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20391.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1988]
>[ 20391.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1988] width 2880 pitch 11520 (/4 2880)
>[ 20392.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20392.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20392.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a1988]
>[ 20392.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a1988] width 2880 pitch 11520 (/4 2880)
>[ 20392.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f40b10]
>[ 20392.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f40b10] width 2880 pitch 11520 (/4 2880)
>[ 20419.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e982b8]
>[ 20419.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e982b8] width 2880 pitch 11520 (/4 2880)
>[ 20419.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bae8]
>[ 20419.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bae8] width 2880 pitch 11520 (/4 2880)
>[ 20419.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e982b8]
>[ 20419.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e982b8] width 2880 pitch 11520 (/4 2880)
>[ 20419.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd5980]
>[ 20419.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd5980] width 2880 pitch 11520 (/4 2880)
>[ 20419.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bae8]
>[ 20419.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bae8] width 2880 pitch 11520 (/4 2880)
>[ 20419.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd5980]
>[ 20420.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd5980] width 2880 pitch 11520 (/4 2880)
>[ 20420.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bae8]
>[ 20420.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bae8] width 2880 pitch 11520 (/4 2880)
>[ 20420.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e982b8]
>[ 20420.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e982b8] width 2880 pitch 11520 (/4 2880)
>[ 20525.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9597c28]
>[ 20525.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9597c28] width 2880 pitch 11520 (/4 2880)
>[ 20525.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33dd8]
>[ 20526.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33dd8] width 2880 pitch 11520 (/4 2880)
>[ 20526.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcfae0]
>[ 20526.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcfae0] width 2880 pitch 11520 (/4 2880)
>[ 20526.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43f78]
>[ 20526.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43f78] width 2880 pitch 11520 (/4 2880)
>[ 20526.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9597c28]
>[ 20526.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9597c28] width 2880 pitch 11520 (/4 2880)
>[ 20526.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8d2a8]
>[ 20526.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8d2a8] width 2880 pitch 11520 (/4 2880)
>[ 20526.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e310]
>[ 20526.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e310] width 2880 pitch 11520 (/4 2880)
>[ 20526.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9597c28]
>[ 20526.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9597c28] width 2880 pitch 11520 (/4 2880)
>[ 20526.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f339b8]
>[ 20526.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f339b8] width 2880 pitch 11520 (/4 2880)
>[ 20527.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9597c28]
>[ 20527.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9597c28] width 2880 pitch 11520 (/4 2880)
>[ 20579.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec6c0]
>[ 20579.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec6c0] width 2880 pitch 11520 (/4 2880)
>[ 20579.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7d888]
>[ 20579.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7d888] width 2880 pitch 11520 (/4 2880)
>[ 20579.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec6c0]
>[ 20579.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec6c0] width 2880 pitch 11520 (/4 2880)
>[ 20579.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecd768]
>[ 20579.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecd768] width 2880 pitch 11520 (/4 2880)
>[ 20579.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec718]
>[ 20579.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec718] width 2880 pitch 11520 (/4 2880)
>[ 20579.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cbf8]
>[ 20579.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cbf8] width 2880 pitch 11520 (/4 2880)
>[ 20579.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e310]
>[ 20579.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e310] width 2880 pitch 11520 (/4 2880)
>[ 20579.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599410]
>[ 20579.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599410] width 2880 pitch 11520 (/4 2880)
>[ 20579.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95995c8]
>[ 20579.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95995c8] width 2880 pitch 11520 (/4 2880)
>[ 20579.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b830]
>[ 20579.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b830] width 2880 pitch 11520 (/4 2880)
>[ 20579.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecd760]
>[ 20579.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecd760] width 2880 pitch 11520 (/4 2880)
>[ 20579.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993adf0]
>[ 20579.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993adf0] width 2880 pitch 11520 (/4 2880)
>[ 20579.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e708]
>[ 20579.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e708] width 2880 pitch 11520 (/4 2880)
>[ 20583.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f339b8]
>[ 20583.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f339b8] width 2880 pitch 11520 (/4 2880)
>[ 20583.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 20583.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 20583.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ef0a8]
>[ 20583.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ef0a8] width 2880 pitch 11520 (/4 2880)
>[ 20583.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33dd8]
>[ 20583.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33dd8] width 2880 pitch 11520 (/4 2880)
>[ 20583.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e708]
>[ 20583.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e708] width 2880 pitch 11520 (/4 2880)
>[ 20583.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99adcf8]
>[ 20583.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99adcf8] width 2880 pitch 11520 (/4 2880)
>[ 20583.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 20583.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 20583.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cbf8]
>[ 20583.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cbf8] width 2880 pitch 11520 (/4 2880)
>[ 20583.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b2240]
>[ 20583.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b2240] width 2880 pitch 11520 (/4 2880)
>[ 20583.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ef0a8]
>[ 20583.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ef0a8] width 2880 pitch 11520 (/4 2880)
>[ 20583.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e708]
>[ 20583.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e708] width 2880 pitch 11520 (/4 2880)
>[ 20583.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 20583.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 20583.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebdf28]
>[ 20583.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebdf28] width 2880 pitch 11520 (/4 2880)
>[ 20583.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0dd68]
>[ 20583.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0dd68] width 2880 pitch 11520 (/4 2880)
>[ 20584.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc9128]
>[ 20584.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc9128] width 2880 pitch 11520 (/4 2880)
>[ 20584.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 20584.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 20584.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e708]
>[ 20584.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e708] width 2880 pitch 11520 (/4 2880)
>[ 20584.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33dd8]
>[ 20585.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33dd8] width 2880 pitch 11520 (/4 2880)
>[ 20585.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93ef0a8]
>[ 20585.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93ef0a8] width 2880 pitch 11520 (/4 2880)
>[ 20585.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 20585.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 20585.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 20585.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 20585.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 20585.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 20585.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc9128]
>[ 20585.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc9128] width 2880 pitch 11520 (/4 2880)
>[ 20585.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33dd8]
>[ 20585.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33dd8] width 2880 pitch 11520 (/4 2880)
>[ 20585.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 20585.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 20585.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de20d0]
>[ 20585.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de20d0] width 2880 pitch 11520 (/4 2880)
>[ 20585.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 20585.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 20643.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 20643.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 20643.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20643.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20643.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33c88]
>[ 20643.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33c88] width 2880 pitch 11520 (/4 2880)
>[ 20643.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b2240]
>[ 20643.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b2240] width 2880 pitch 11520 (/4 2880)
>[ 20643.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20643.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20643.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e708]
>[ 20643.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e708] width 2880 pitch 11520 (/4 2880)
>[ 20643.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20643.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20643.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 20643.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 20643.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cbf8]
>[ 20643.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cbf8] width 2880 pitch 11520 (/4 2880)
>[ 20643.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f339b8]
>[ 20643.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f339b8] width 2880 pitch 11520 (/4 2880)
>[ 20643.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20643.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20643.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f33dd8]
>[ 20643.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f33dd8] width 2880 pitch 11520 (/4 2880)
>[ 20643.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599068]
>[ 20643.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599068] width 2880 pitch 11520 (/4 2880)
>[ 20647.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7d888]
>[ 20647.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7d888] width 2880 pitch 11520 (/4 2880)
>[ 20647.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20647.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20647.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2b50]
>[ 20648.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2b50] width 2880 pitch 11520 (/4 2880)
>[ 20648.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def2a8]
>[ 20648.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def2a8] width 2880 pitch 11520 (/4 2880)
>[ 20648.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7d888]
>[ 20648.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7d888] width 2880 pitch 11520 (/4 2880)
>[ 20648.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ad68]
>[ 20648.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ad68] width 2880 pitch 11520 (/4 2880)
>[ 20648.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20648.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20648.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def430]
>[ 20648.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def430] width 2880 pitch 11520 (/4 2880)
>[ 20648.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def430]
>[ 20648.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def430] width 2880 pitch 11520 (/4 2880)
>[ 20648.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7d888]
>[ 20648.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7d888] width 2880 pitch 11520 (/4 2880)
>[ 20648.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20648.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20648.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a2b50]
>[ 20648.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a2b50] width 2880 pitch 11520 (/4 2880)
>[ 20648.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def5c0]
>[ 20648.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def5c0] width 2880 pitch 11520 (/4 2880)
>[ 20697.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599610]
>[ 20697.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599610] width 2880 pitch 11520 (/4 2880)
>[ 20698.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd66f0]
>[ 20698.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd66f0] width 2880 pitch 11520 (/4 2880)
>[ 20698.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db41d8]
>[ 20698.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db41d8] width 2880 pitch 11520 (/4 2880)
>[ 20698.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def430]
>[ 20698.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def430] width 2880 pitch 11520 (/4 2880)
>[ 20698.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 20698.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 20698.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9578708]
>[ 20698.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9578708] width 2880 pitch 11520 (/4 2880)
>[ 20698.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 20698.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 20698.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20698.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20698.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def4d8]
>[ 20698.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def4d8] width 2880 pitch 11520 (/4 2880)
>[ 20698.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43f78]
>[ 20698.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43f78] width 2880 pitch 11520 (/4 2880)
>[ 20698.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e310]
>[ 20699.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e310] width 2880 pitch 11520 (/4 2880)
>[ 20699.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43f78]
>[ 20699.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43f78] width 2880 pitch 11520 (/4 2880)
>[ 20699.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993adf0]
>[ 20699.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993adf0] width 2880 pitch 11520 (/4 2880)
>[ 20699.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20699.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20703.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20703.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20703.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ce58]
>[ 20703.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ce58] width 2880 pitch 11520 (/4 2880)
>[ 20703.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd66f0]
>[ 20703.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd66f0] width 2880 pitch 11520 (/4 2880)
>[ 20703.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599068]
>[ 20703.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599068] width 2880 pitch 11520 (/4 2880)
>[ 20703.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20703.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20703.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51178]
>[ 20703.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51178] width 2880 pitch 11520 (/4 2880)
>[ 20703.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e568]
>[ 20703.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e568] width 2880 pitch 11520 (/4 2880)
>[ 20703.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51178]
>[ 20703.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51178] width 2880 pitch 11520 (/4 2880)
>[ 20703.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20703.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20703.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deef88]
>[ 20703.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deef88] width 2880 pitch 11520 (/4 2880)
>[ 20703.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51178]
>[ 20703.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51178] width 2880 pitch 11520 (/4 2880)
>[ 20703.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b2240]
>[ 20703.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b2240] width 2880 pitch 11520 (/4 2880)
>[ 20703.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51178]
>[ 20703.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51178] width 2880 pitch 11520 (/4 2880)
>[ 20708.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db4948]
>[ 20708.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db4948] width 2880 pitch 11520 (/4 2880)
>[ 20715.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3168]
>[ 20715.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3168] width 2880 pitch 11520 (/4 2880)
>[ 20715.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47280]
>[ 20715.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47280] width 2880 pitch 11520 (/4 2880)
>[ 20716.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96090b8]
>[ 20716.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96090b8] width 2880 pitch 11520 (/4 2880)
>[ 20716.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599068]
>[ 20716.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599068] width 2880 pitch 11520 (/4 2880)
>[ 20716.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47280]
>[ 20716.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47280] width 2880 pitch 11520 (/4 2880)
>[ 20716.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd66f0]
>[ 20716.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd66f0] width 2880 pitch 11520 (/4 2880)
>[ 20716.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20716.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20716.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20716.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20717.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20717.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20717.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3168]
>[ 20717.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3168] width 2880 pitch 11520 (/4 2880)
>[ 20717.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3168]
>[ 20717.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3168] width 2880 pitch 11520 (/4 2880)
>[ 20718.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd66f0]
>[ 20718.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd66f0] width 2880 pitch 11520 (/4 2880)
>[ 20718.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 20718.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 20718.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20718.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20718.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9599068]
>[ 20718.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9599068] width 2880 pitch 11520 (/4 2880)
>[ 20728.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd40]
>[ 20728.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd40] width 2880 pitch 11520 (/4 2880)
>[ 20861.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20861.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20861.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20861.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20861.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20861.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20861.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20861.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20861.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3e858]
>[ 20861.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3e858] width 2880 pitch 11520 (/4 2880)
>[ 20863.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c426c0]
>[ 20863.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c426c0] width 2880 pitch 11520 (/4 2880)
>[ 20863.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20863.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20863.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20863.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20864.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c426c0]
>[ 20864.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c426c0] width 2880 pitch 11520 (/4 2880)
>[ 20866.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20867.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20867.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20867.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20868.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20868.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20870.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20870.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20870.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3a78]
>[ 20870.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3a78] width 2880 pitch 11520 (/4 2880)
>[ 20870.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20870.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20870.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3e858]
>[ 20870.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3e858] width 2880 pitch 11520 (/4 2880)
>[ 20870.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20870.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20872.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c426c0]
>[ 20872.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c426c0] width 2880 pitch 11520 (/4 2880)
>[ 20876.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9589048]
>[ 20876.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9589048] width 2880 pitch 11520 (/4 2880)
>[ 20878.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b55100]
>[ 20878.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b55100] width 2880 pitch 11520 (/4 2880)
>[ 20879.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57c68]
>[ 20879.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57c68] width 2880 pitch 11520 (/4 2880)
>[ 20882.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95938e0]
>[ 20882.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95938e0] width 2880 pitch 11520 (/4 2880)
>[ 20883.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57c68]
>[ 20883.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57c68] width 2880 pitch 11520 (/4 2880)
>[ 20883.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95938e0]
>[ 20883.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95938e0] width 2880 pitch 11520 (/4 2880)
>[ 20883.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9577518]
>[ 20883.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9577518] width 2880 pitch 11520 (/4 2880)
>[ 20889.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf760]
>[ 20889.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf760] width 2880 pitch 11520 (/4 2880)
>[ 20890.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf760]
>[ 20890.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf760] width 2880 pitch 11520 (/4 2880)
>[ 20890.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20890.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20890.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20890.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20893.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20893.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20893.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9798]
>[ 20893.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9798] width 2880 pitch 11520 (/4 2880)
>[ 20893.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20893.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20893.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20893.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20899.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3a78]
>[ 20899.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3a78] width 2880 pitch 11520 (/4 2880)
>[ 20899.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9798]
>[ 20899.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9798] width 2880 pitch 11520 (/4 2880)
>[ 20900.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20900.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20901.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40510]
>[ 20901.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40510] width 2880 pitch 11520 (/4 2880)
>[ 20901.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20901.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20901.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20901.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20901.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20901.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20902.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20902.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20903.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20903.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20903.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20903.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20903.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3a78]
>[ 20903.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3a78] width 2880 pitch 11520 (/4 2880)
>[ 20903.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40510]
>[ 20903.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40510] width 2880 pitch 11520 (/4 2880)
>[ 20903.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20903.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20903.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20903.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20914.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20914.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20914.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20914.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20915.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20915.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20915.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1db8]
>[ 20915.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1db8] width 2880 pitch 11520 (/4 2880)
>[ 20915.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20915.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20915.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20915.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20915.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20915.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20915.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20915.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20916.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3a78]
>[ 20916.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3a78] width 2880 pitch 11520 (/4 2880)
>[ 20916.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20916.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20916.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7a18]
>[ 20916.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7a18] width 2880 pitch 11520 (/4 2880)
>[ 20916.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1db8]
>[ 20916.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1db8] width 2880 pitch 11520 (/4 2880)
>[ 20916.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20917.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20917.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9798]
>[ 20917.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9798] width 2880 pitch 11520 (/4 2880)
>[ 20917.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20917.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20917.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20917.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20917.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20917.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20917.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40510]
>[ 20917.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40510] width 2880 pitch 11520 (/4 2880)
>[ 20919.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20919.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20919.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1db8]
>[ 20919.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1db8] width 2880 pitch 11520 (/4 2880)
>[ 20921.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20922.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20922.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1db8]
>[ 20922.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1db8] width 2880 pitch 11520 (/4 2880)
>[ 20922.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20922.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20922.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20922.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20922.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20922.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20923.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1db8]
>[ 20923.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1db8] width 2880 pitch 11520 (/4 2880)
>[ 20923.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7a18]
>[ 20923.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7a18] width 2880 pitch 11520 (/4 2880)
>[ 20924.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20924.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20925.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20925.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20925.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20925.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20925.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9593860]
>[ 20925.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9593860] width 2880 pitch 11520 (/4 2880)
>[ 20925.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20925.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20925.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 20926.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 20926.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40510]
>[ 20926.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40510] width 2880 pitch 11520 (/4 2880)
>[ 20926.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57680]
>[ 20926.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57680] width 2880 pitch 11520 (/4 2880)
>[ 20932.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20932.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20932.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20932.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20933.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7a18]
>[ 20933.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7a18] width 2880 pitch 11520 (/4 2880)
>[ 20933.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20933.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20933.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20933.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20933.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c424e0]
>[ 20933.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c424e0] width 2880 pitch 11520 (/4 2880)
>[ 20933.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7a18]
>[ 20934.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7a18] width 2880 pitch 11520 (/4 2880)
>[ 20934.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20934.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20934.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20934.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20934.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3f4d0]
>[ 20934.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3f4d0] width 2880 pitch 11520 (/4 2880)
>[ 20934.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40510]
>[ 20934.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40510] width 2880 pitch 11520 (/4 2880)
>[ 20934.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9decc38]
>[ 20934.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9decc38] width 2880 pitch 11520 (/4 2880)
>[ 20944.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7a18]
>[ 20944.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7a18] width 2880 pitch 11520 (/4 2880)
>[ 20944.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 20944.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 20944.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20944.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20945.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20945.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20945.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84770]
>[ 20945.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84770] width 2880 pitch 11520 (/4 2880)
>[ 20945.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebe778]
>[ 20945.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebe778] width 2880 pitch 11520 (/4 2880)
>[ 20945.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20945.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20947.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20947.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20947.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26810]
>[ 20947.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26810] width 2880 pitch 11520 (/4 2880)
>[ 20947.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3250]
>[ 20947.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3250] width 2880 pitch 11520 (/4 2880)
>[ 20947.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99be400]
>[ 20947.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99be400] width 2880 pitch 11520 (/4 2880)
>[ 20947.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3250]
>[ 20947.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3250] width 2880 pitch 11520 (/4 2880)
>[ 20947.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96090c8]
>[ 20947.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96090c8] width 2880 pitch 11520 (/4 2880)
>[ 20954.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb1550]
>[ 20954.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb1550] width 2880 pitch 11520 (/4 2880)
>[ 20954.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22248]
>[ 20954.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22248] width 2880 pitch 11520 (/4 2880)
>[ 20954.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20954.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20954.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9896398]
>[ 20954.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9896398] width 2880 pitch 11520 (/4 2880)
>[ 20955.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22248]
>[ 20955.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22248] width 2880 pitch 11520 (/4 2880)
>[ 20955.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96090c8]
>[ 20955.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96090c8] width 2880 pitch 11520 (/4 2880)
>[ 20955.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9896398]
>[ 20955.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9896398] width 2880 pitch 11520 (/4 2880)
>[ 20955.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9896398]
>[ 20955.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9896398] width 2880 pitch 11520 (/4 2880)
>[ 20955.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96090c8]
>[ 20955.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96090c8] width 2880 pitch 11520 (/4 2880)
>[ 20955.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 20955.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 20956.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22248]
>[ 20956.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22248] width 2880 pitch 11520 (/4 2880)
>[ 20956.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22248]
>[ 20956.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22248] width 2880 pitch 11520 (/4 2880)
>[ 20956.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26830]
>[ 20956.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26830] width 2880 pitch 11520 (/4 2880)
>[ 20956.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9896398]
>[ 20956.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9896398] width 2880 pitch 11520 (/4 2880)
>[ 20956.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26830]
>[ 20956.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26830] width 2880 pitch 11520 (/4 2880)
>[ 20998.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9584010]
>[ 20998.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9584010] width 2880 pitch 11520 (/4 2880)
>[ 21001.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 21001.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 21004.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce75c8]
>[ 21004.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce75c8] width 2880 pitch 11520 (/4 2880)
>[ 21152.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21152.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21152.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21153.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21153.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1818]
>[ 21153.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1818] width 2880 pitch 11520 (/4 2880)
>[ 21153.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21153.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21153.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 21153.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 21153.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21153.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21153.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c478c8]
>[ 21153.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c478c8] width 2880 pitch 11520 (/4 2880)
>[ 21154.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 21154.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 21155.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 21155.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 21155.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e902d8]
>[ 21155.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e902d8] width 2880 pitch 11520 (/4 2880)
>[ 21155.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 21155.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 21155.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 21155.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 21156.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c478c8]
>[ 21156.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c478c8] width 2880 pitch 11520 (/4 2880)
>[ 21156.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97778d0]
>[ 21156.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97778d0] width 2880 pitch 11520 (/4 2880)
>[ 21156.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960e600]
>[ 21156.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960e600] width 2880 pitch 11520 (/4 2880)
>[ 21156.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec800]
>[ 21156.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec800] width 2880 pitch 11520 (/4 2880)
>[ 21156.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9402830]
>[ 21156.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9402830] width 2880 pitch 11520 (/4 2880)
>[ 21172.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c44e48]
>[ 21172.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c44e48] width 2880 pitch 11520 (/4 2880)
>[ 21286.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae36e8]
>[ 21286.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae36e8] width 2880 pitch 11520 (/4 2880)
>[ 21286.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21286.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21286.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9090]
>[ 21286.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9090] width 2880 pitch 11520 (/4 2880)
>[ 21286.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ad2d8]
>[ 21286.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ad2d8] width 2880 pitch 11520 (/4 2880)
>[ 21287.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21287.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21287.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21288.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21288.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21288.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21288.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9090]
>[ 21288.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9090] width 2880 pitch 11520 (/4 2880)
>[ 21288.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9090]
>[ 21289.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9090] width 2880 pitch 11520 (/4 2880)
>[ 21289.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21289.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21289.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21289.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21291.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3af8]
>[ 21291.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3af8] width 2880 pitch 11520 (/4 2880)
>[ 21292.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3af8]
>[ 21292.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3af8] width 2880 pitch 11520 (/4 2880)
>[ 21304.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f698]
>[ 21304.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f698] width 2880 pitch 11520 (/4 2880)
>[ 21305.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3af8]
>[ 21305.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3af8] width 2880 pitch 11520 (/4 2880)
>[ 21305.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21305.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21305.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3af8]
>[ 21305.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3af8] width 2880 pitch 11520 (/4 2880)
>[ 21305.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca3c8]
>[ 21305.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca3c8] width 2880 pitch 11520 (/4 2880)
>[ 21305.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca3c8]
>[ 21305.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca3c8] width 2880 pitch 11520 (/4 2880)
>[ 21306.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c803a0]
>[ 21306.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c803a0] width 2880 pitch 11520 (/4 2880)
>[ 21307.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6cfb0]
>[ 21307.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6cfb0] width 2880 pitch 11520 (/4 2880)
>[ 21307.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86c80]
>[ 21307.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86c80] width 2880 pitch 11520 (/4 2880)
>[ 21307.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21307.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21307.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86c80]
>[ 21307.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86c80] width 2880 pitch 11520 (/4 2880)
>[ 21339.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ad2d8]
>[ 21339.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ad2d8] width 2880 pitch 11520 (/4 2880)
>[ 21339.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db3e48]
>[ 21339.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db3e48] width 2880 pitch 11520 (/4 2880)
>[ 21339.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f788]
>[ 21339.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f788] width 2880 pitch 11520 (/4 2880)
>[ 21340.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a3af8]
>[ 21340.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a3af8] width 2880 pitch 11520 (/4 2880)
>[ 21340.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41f60]
>[ 21340.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41f60] width 2880 pitch 11520 (/4 2880)
>[ 21340.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99ad2d8]
>[ 21340.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99ad2d8] width 2880 pitch 11520 (/4 2880)
>[ 21341.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f788]
>[ 21341.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f788] width 2880 pitch 11520 (/4 2880)
>[ 21341.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3e938]
>[ 21341.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3e938] width 2880 pitch 11520 (/4 2880)
>[ 21342.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f698]
>[ 21342.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f698] width 2880 pitch 11520 (/4 2880)
>[ 21342.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21342.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21342.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b050]
>[ 21342.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b050] width 2880 pitch 11520 (/4 2880)
>[ 21342.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21342.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21342.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b050]
>[ 21343.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b050] width 2880 pitch 11520 (/4 2880)
>[ 21343.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b47120]
>[ 21343.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b47120] width 2880 pitch 11520 (/4 2880)
>[ 21343.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f698]
>[ 21343.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f698] width 2880 pitch 11520 (/4 2880)
>[ 21468.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ca3c8]
>[ 21468.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ca3c8] width 2880 pitch 11520 (/4 2880)
>[ 21468.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21468.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21468.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecb5f0]
>[ 21468.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecb5f0] width 2880 pitch 11520 (/4 2880)
>[ 21468.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ae78]
>[ 21468.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ae78] width 2880 pitch 11520 (/4 2880)
>[ 21469.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecb5f0]
>[ 21469.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecb5f0] width 2880 pitch 11520 (/4 2880)
>[ 21469.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ae78]
>[ 21469.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ae78] width 2880 pitch 11520 (/4 2880)
>[ 21469.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21469.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21469.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21469.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21470.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21470.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21470.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eb1618]
>[ 21470.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eb1618] width 2880 pitch 11520 (/4 2880)
>[ 21470.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48058]
>[ 21470.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48058] width 2880 pitch 11520 (/4 2880)
>[ 21470.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21470.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21470.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21471.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21471.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21471.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21471.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21471.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21471.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57c68]
>[ 21471.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57c68] width 2880 pitch 11520 (/4 2880)
>[ 21472.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ae78]
>[ 21472.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ae78] width 2880 pitch 11520 (/4 2880)
>[ 21472.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57c68]
>[ 21472.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57c68] width 2880 pitch 11520 (/4 2880)
>[ 21472.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21473.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21473.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48058]
>[ 21473.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48058] width 2880 pitch 11520 (/4 2880)
>[ 21473.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21473.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21473.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d150]
>[ 21473.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d150] width 2880 pitch 11520 (/4 2880)
>[ 21473.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21473.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21473.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e831b8]
>[ 21473.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e831b8] width 2880 pitch 11520 (/4 2880)
>[ 21473.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21473.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21474.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c45f00]
>[ 21474.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c45f00] width 2880 pitch 11520 (/4 2880)
>[ 21474.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ae78]
>[ 21474.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ae78] width 2880 pitch 11520 (/4 2880)
>[ 21474.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9778138]
>[ 21474.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9778138] width 2880 pitch 11520 (/4 2880)
>[ 21474.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2db18]
>[ 21474.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2db18] width 2880 pitch 11520 (/4 2880)
>[ 21474.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2db18]
>[ 21474.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2db18] width 2880 pitch 11520 (/4 2880)
>[ 21474.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e00]
>[ 21474.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e00] width 2880 pitch 11520 (/4 2880)
>[ 21474.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2db18]
>[ 21474.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2db18] width 2880 pitch 11520 (/4 2880)
>[ 21474.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e00]
>[ 21474.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e00] width 2880 pitch 11520 (/4 2880)
>[ 21474.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2db18]
>[ 21474.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2db18] width 2880 pitch 11520 (/4 2880)
>[ 21475.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9676e00]
>[ 21475.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9676e00] width 2880 pitch 11520 (/4 2880)
>[ 21499.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c45910]
>[ 21499.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c45910] width 2880 pitch 11520 (/4 2880)
>[ 21525.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f262b0]
>[ 21525.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f262b0] width 2880 pitch 11520 (/4 2880)
>[ 21543.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1aa30]
>[ 21543.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1aa30] width 2880 pitch 11520 (/4 2880)
>[ 21594.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0429f8]
>[ 21594.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0429f8] width 2880 pitch 11520 (/4 2880)
>[ 21595.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b2c0]
>[ 21595.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b2c0] width 2880 pitch 11520 (/4 2880)
>[ 21600.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67f30]
>[ 21600.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67f30] width 2880 pitch 11520 (/4 2880)
>[ 21601.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958af80]
>[ 21601.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958af80] width 2880 pitch 11520 (/4 2880)
>[ 21601.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d95c10]
>[ 21601.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d95c10] width 2880 pitch 11520 (/4 2880)
>[ 21601.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958af80]
>[ 21601.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958af80] width 2880 pitch 11520 (/4 2880)
>[ 21601.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d5a0]
>[ 21601.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d5a0] width 2880 pitch 11520 (/4 2880)
>[ 21645.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21645.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21645.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21645.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21645.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21645.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21645.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9596580]
>[ 21646.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9596580] width 2880 pitch 11520 (/4 2880)
>[ 21646.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21646.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21646.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21646.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21646.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63420]
>[ 21646.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63420] width 2880 pitch 11520 (/4 2880)
>[ 21646.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21646.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21646.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4d378]
>[ 21646.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4d378] width 2880 pitch 11520 (/4 2880)
>[ 21646.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21646.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21646.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4d378]
>[ 21647.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4d378] width 2880 pitch 11520 (/4 2880)
>[ 21647.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21647.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21647.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4d378]
>[ 21647.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4d378] width 2880 pitch 11520 (/4 2880)
>[ 21647.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21647.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21647.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4d378]
>[ 21647.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4d378] width 2880 pitch 11520 (/4 2880)
>[ 21647.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66fd8]
>[ 21647.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66fd8] width 2880 pitch 11520 (/4 2880)
>[ 21647.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4d378]
>[ 21647.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4d378] width 2880 pitch 11520 (/4 2880)
>[ 21647.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595438]
>[ 21647.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595438] width 2880 pitch 11520 (/4 2880)
>[ 21647.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b2c0]
>[ 21647.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b2c0] width 2880 pitch 11520 (/4 2880)
>[ 21647.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595438]
>[ 21647.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595438] width 2880 pitch 11520 (/4 2880)
>[ 21647.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b2c0]
>[ 21647.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b2c0] width 2880 pitch 11520 (/4 2880)
>[ 21647.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595438]
>[ 21647.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595438] width 2880 pitch 11520 (/4 2880)
>[ 21647.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b2c0]
>[ 21647.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b2c0] width 2880 pitch 11520 (/4 2880)
>[ 21708.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4a378]
>[ 21708.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4a378] width 2880 pitch 11520 (/4 2880)
>[ 21718.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80100]
>[ 21718.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80100] width 2880 pitch 11520 (/4 2880)
>[ 21738.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993f368]
>[ 21738.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993f368] width 2880 pitch 11520 (/4 2880)
>[ 21738.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d5a0]
>[ 21738.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d5a0] width 2880 pitch 11520 (/4 2880)
>[ 21738.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c980b8]
>[ 21738.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c980b8] width 2880 pitch 11520 (/4 2880)
>[ 21738.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 21738.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 21782.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5cc48]
>[ 21782.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5cc48] width 2880 pitch 11520 (/4 2880)
>[ 21782.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7c1e8]
>[ 21782.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7c1e8] width 2880 pitch 11520 (/4 2880)
>[ 21782.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e5cc48]
>[ 21782.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e5cc48] width 2880 pitch 11520 (/4 2880)
>[ 21782.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7c1e8]
>[ 21782.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7c1e8] width 2880 pitch 11520 (/4 2880)
>[ 21788.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 21788.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 21792.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c980b8]
>[ 21792.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c980b8] width 2880 pitch 11520 (/4 2880)
>[ 21813.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47eb8]
>[ 21813.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47eb8] width 2880 pitch 11520 (/4 2880)
>[ 21841.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a5d0]
>[ 21841.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a5d0] width 2880 pitch 11520 (/4 2880)
>[ 21853.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a240]
>[ 21853.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a240] width 2880 pitch 11520 (/4 2880)
>[ 21856.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04a528]
>[ 21856.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04a528] width 2880 pitch 11520 (/4 2880)
>[ 21857.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a738]
>[ 21857.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a738] width 2880 pitch 11520 (/4 2880)
>[ 21857.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d640]
>[ 21857.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d640] width 2880 pitch 11520 (/4 2880)
>[ 21857.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04a988]
>[ 21857.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04a988] width 2880 pitch 11520 (/4 2880)
>[ 21857.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 21857.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 21857.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 21857.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 21857.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 21857.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 21858.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 21858.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 21858.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 21858.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 21858.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 21858.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 21858.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 21858.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 21858.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a738]
>[ 21859.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a738] width 2880 pitch 11520 (/4 2880)
>[ 21859.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 21859.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 21860.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d640]
>[ 21860.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d640] width 2880 pitch 11520 (/4 2880)
>[ 21861.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d978]
>[ 21861.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d978] width 2880 pitch 11520 (/4 2880)
>[ 21861.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 21861.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 21861.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a738]
>[ 21861.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a738] width 2880 pitch 11520 (/4 2880)
>[ 21861.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 21861.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 21881.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a738]
>[ 21881.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a738] width 2880 pitch 11520 (/4 2880)
>[ 21883.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 21883.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 21887.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa044020]
>[ 21887.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa044020] width 2880 pitch 11520 (/4 2880)
>[ 21903.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d5a8]
>[ 21903.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d5a8] width 2880 pitch 11520 (/4 2880)
>[ 21908.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21908.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21909.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98314b0]
>[ 21909.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98314b0] width 2880 pitch 11520 (/4 2880)
>[ 21909.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21909.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21909.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98314b0]
>[ 21909.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98314b0] width 2880 pitch 11520 (/4 2880)
>[ 21909.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21909.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21909.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98314b0]
>[ 21909.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98314b0] width 2880 pitch 11520 (/4 2880)
>[ 21909.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21909.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21909.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a2a0]
>[ 21909.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a2a0] width 2880 pitch 11520 (/4 2880)
>[ 21909.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21909.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21909.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98314b0]
>[ 21909.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98314b0] width 2880 pitch 11520 (/4 2880)
>[ 21909.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21909.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21909.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a2a0]
>[ 21909.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a2a0] width 2880 pitch 11520 (/4 2880)
>[ 21909.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21909.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21913.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21913.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a2a0]
>[ 21913.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a2a0] width 2880 pitch 11520 (/4 2880)
>[ 21913.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98314b0]
>[ 21913.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98314b0] width 2880 pitch 11520 (/4 2880)
>[ 21913.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21913.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21913.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21913.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21913.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21913.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21913.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21913.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b52780]
>[ 21913.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b52780] width 2880 pitch 11520 (/4 2880)
>[ 21913.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958b170]
>[ 21913.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958b170] width 2880 pitch 11520 (/4 2880)
>[ 21941.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 21941.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 22029.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d348]
>[ 22029.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d348] width 2880 pitch 11520 (/4 2880)
>[ 22044.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41e30]
>[ 22044.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41e30] width 2880 pitch 11520 (/4 2880)
>[ 22050.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd4bd8]
>[ 22050.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd4bd8] width 2880 pitch 11520 (/4 2880)
>[ 22053.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22053.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22069.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b547e0]
>[ 22069.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b547e0] width 2880 pitch 11520 (/4 2880)
>[ 22092.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b6ba0]
>[ 22092.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b6ba0] width 2880 pitch 11520 (/4 2880)
>[ 22093.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958ad60]
>[ 22093.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958ad60] width 2880 pitch 11520 (/4 2880)
>[ 22110.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47640]
>[ 22110.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47640] width 2880 pitch 11520 (/4 2880)
>[ 22127.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b51d48]
>[ 22127.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b51d48] width 2880 pitch 11520 (/4 2880)
>[ 22136.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f430d0]
>[ 22136.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f430d0] width 2880 pitch 11520 (/4 2880)
>[ 22180.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95950f8]
>[ 22180.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95950f8] width 2880 pitch 11520 (/4 2880)
>[ 22187.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f430d0]
>[ 22187.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f430d0] width 2880 pitch 11520 (/4 2880)
>[ 22198.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22198.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22198.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f430d0]
>[ 22198.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f430d0] width 2880 pitch 11520 (/4 2880)
>[ 22198.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 22198.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 22198.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f430d0]
>[ 22198.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f430d0] width 2880 pitch 11520 (/4 2880)
>[ 22198.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22198.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22198.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95950f8]
>[ 22199.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95950f8] width 2880 pitch 11520 (/4 2880)
>[ 22199.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 22199.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 22199.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 22199.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 22199.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22199.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22199.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22199.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22199.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f430d0]
>[ 22199.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f430d0] width 2880 pitch 11520 (/4 2880)
>[ 22204.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 22204.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 22204.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22204.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22204.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22204.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22204.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04afc8]
>[ 22204.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04afc8] width 2880 pitch 11520 (/4 2880)
>[ 22204.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958e3f0]
>[ 22204.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958e3f0] width 2880 pitch 11520 (/4 2880)
>[ 22204.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22204.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22204.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 22204.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 22204.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22204.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22204.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22204.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22204.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958e3f0]
>[ 22204.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958e3f0] width 2880 pitch 11520 (/4 2880)
>[ 22204.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22204.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22204.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 22204.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 22204.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95950f8]
>[ 22204.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95950f8] width 2880 pitch 11520 (/4 2880)
>[ 22204.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22204.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22206.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22206.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22206.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22206.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22206.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22206.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22206.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04afc8]
>[ 22206.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04afc8] width 2880 pitch 11520 (/4 2880)
>[ 22206.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 22206.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 22206.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04afc8]
>[ 22206.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04afc8] width 2880 pitch 11520 (/4 2880)
>[ 22206.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcf980]
>[ 22206.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcf980] width 2880 pitch 11520 (/4 2880)
>[ 22206.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95950f8]
>[ 22206.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95950f8] width 2880 pitch 11520 (/4 2880)
>[ 22206.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22206.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22206.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e653f8]
>[ 22206.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e653f8] width 2880 pitch 11520 (/4 2880)
>[ 22206.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04afc8]
>[ 22206.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04afc8] width 2880 pitch 11520 (/4 2880)
>[ 22206.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95950f8]
>[ 22206.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95950f8] width 2880 pitch 11520 (/4 2880)
>[ 22206.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22206.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22206.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22206.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22237.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595760]
>[ 22237.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595760] width 2880 pitch 11520 (/4 2880)
>[ 22243.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b625c0]
>[ 22243.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b625c0] width 2880 pitch 11520 (/4 2880)
>[ 22298.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b59558]
>[ 22298.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b59558] width 2880 pitch 11520 (/4 2880)
>[ 22320.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54840]
>[ 22320.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54840] width 2880 pitch 11520 (/4 2880)
>[ 22320.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22320.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22320.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54840]
>[ 22320.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54840] width 2880 pitch 11520 (/4 2880)
>[ 22320.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 22320.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 22323.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0569f0]
>[ 22323.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0569f0] width 2880 pitch 11520 (/4 2880)
>[ 22323.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0442a8]
>[ 22323.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0442a8] width 2880 pitch 11520 (/4 2880)
>[ 22323.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d518]
>[ 22323.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d518] width 2880 pitch 11520 (/4 2880)
>[ 22323.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b488e8]
>[ 22323.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b488e8] width 2880 pitch 11520 (/4 2880)
>[ 22351.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b6ba0]
>[ 22351.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b6ba0] width 2880 pitch 11520 (/4 2880)
>[ 22364.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b640]
>[ 22364.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b640] width 2880 pitch 11520 (/4 2880)
>[ 22371.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b621f8]
>[ 22371.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b621f8] width 2880 pitch 11520 (/4 2880)
>[ 22398.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4c3c0]
>[ 22398.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4c3c0] width 2880 pitch 11520 (/4 2880)
>[ 22409.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67908]
>[ 22409.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67908] width 2880 pitch 11520 (/4 2880)
>[ 22409.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 22409.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 22409.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22409.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22409.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 22409.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 22409.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22409.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22409.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22409.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22409.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa044060]
>[ 22409.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa044060] width 2880 pitch 11520 (/4 2880)
>[ 22409.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 22409.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 22409.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22409.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22409.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220e0]
>[ 22409.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220e0] width 2880 pitch 11520 (/4 2880)
>[ 22409.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22410.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22410.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0445a8]
>[ 22410.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0445a8] width 2880 pitch 11520 (/4 2880)
>[ 22410.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 22410.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 22410.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22410.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22414.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220e0]
>[ 22414.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220e0] width 2880 pitch 11520 (/4 2880)
>[ 22414.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22414.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22414.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0445a8]
>[ 22414.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0445a8] width 2880 pitch 11520 (/4 2880)
>[ 22414.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcfae0]
>[ 22414.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcfae0] width 2880 pitch 11520 (/4 2880)
>[ 22414.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22414.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22414.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22414.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22414.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22414.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22414.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22414.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22414.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22414.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22414.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22414.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22414.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22414.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22414.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220b0]
>[ 22414.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220b0] width 2880 pitch 11520 (/4 2880)
>[ 22414.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[ 22414.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[ 22431.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54840]
>[ 22431.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54840] width 2880 pitch 11520 (/4 2880)
>[ 22474.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b566c8]
>[ 22474.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b566c8] width 2880 pitch 11520 (/4 2880)
>[ 22474.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b566c8]
>[ 22475.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b566c8] width 2880 pitch 11520 (/4 2880)
>[ 22475.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b566c8]
>[ 22475.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b566c8] width 2880 pitch 11520 (/4 2880)
>[ 22475.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a788]
>[ 22475.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a788] width 2880 pitch 11520 (/4 2880)
>[ 22475.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b566c8]
>[ 22475.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b566c8] width 2880 pitch 11520 (/4 2880)
>[ 22475.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958e3c0]
>[ 22475.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958e3c0] width 2880 pitch 11520 (/4 2880)
>[ 22475.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b566c8]
>[ 22475.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b566c8] width 2880 pitch 11520 (/4 2880)
>[ 22476.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x958e3c0]
>[ 22476.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x958e3c0] width 2880 pitch 11520 (/4 2880)
>[ 22476.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4c400]
>[ 22476.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4c400] width 2880 pitch 11520 (/4 2880)
>[ 22476.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 22476.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 22476.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4dab8]
>[ 22477.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4dab8] width 2880 pitch 11520 (/4 2880)
>[ 22477.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f788]
>[ 22477.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f788] width 2880 pitch 11520 (/4 2880)
>[ 22477.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a050]
>[ 22477.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a050] width 2880 pitch 11520 (/4 2880)
>[ 22477.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3f788]
>[ 22477.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3f788] width 2880 pitch 11520 (/4 2880)
>[ 22721.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0803d0]
>[ 22721.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0803d0] width 2880 pitch 11520 (/4 2880)
>[ 22722.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034828]
>[ 22722.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034828] width 2880 pitch 11520 (/4 2880)
>[ 22722.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d59d0]
>[ 22722.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d59d0] width 2880 pitch 11520 (/4 2880)
>[ 22723.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f798]
>[ 22723.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f798] width 2880 pitch 11520 (/4 2880)
>[ 22724.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1cb50]
>[ 22724.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1cb50] width 2880 pitch 11520 (/4 2880)
>[ 22724.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c870]
>[ 22725.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c870] width 2880 pitch 11520 (/4 2880)
>[ 22725.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0813b8]
>[ 22725.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0813b8] width 2880 pitch 11520 (/4 2880)
>[ 22726.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822b68]
>[ 22726.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822b68] width 2880 pitch 11520 (/4 2880)
>[ 22726.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1375f0]
>[ 22726.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1375f0] width 2880 pitch 11520 (/4 2880)
>[ 22726.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138c18]
>[ 22726.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138c18] width 2880 pitch 11520 (/4 2880)
>[ 22727.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa278]
>[ 22727.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa278] width 2880 pitch 11520 (/4 2880)
>[ 22727.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8d628]
>[ 22727.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8d628] width 2880 pitch 11520 (/4 2880)
>[ 22729.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08eda8]
>[ 22729.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08eda8] width 2880 pitch 11520 (/4 2880)
>[ 22729.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aca20]
>[ 22729.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aca20] width 2880 pitch 11520 (/4 2880)
>[ 22730.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799800]
>[ 22730.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799800] width 2880 pitch 11520 (/4 2880)
>[ 22730.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[ 22730.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[ 22730.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[ 22730.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[ 22730.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a22e0]
>[ 22730.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a22e0] width 2880 pitch 11520 (/4 2880)
>[ 22730.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03db00]
>[ 22731.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03db00] width 2880 pitch 11520 (/4 2880)
>[ 22731.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a518]
>[ 22731.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a518] width 2880 pitch 11520 (/4 2880)
>[ 22731.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03af58]
>[ 22731.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03af58] width 2880 pitch 11520 (/4 2880)
>[ 22731.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cfe8]
>[ 22731.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cfe8] width 2880 pitch 11520 (/4 2880)
>[ 22731.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03af58]
>[ 22731.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03af58] width 2880 pitch 11520 (/4 2880)
>[ 22731.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cfe8]
>[ 22731.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cfe8] width 2880 pitch 11520 (/4 2880)
>[ 22737.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7fcf8]
>[ 22737.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7fcf8] width 2880 pitch 11520 (/4 2880)
>[ 22867.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7b458]
>[ 22867.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7b458] width 2880 pitch 11520 (/4 2880)
>[ 22867.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26280]
>[ 22867.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26280] width 2880 pitch 11520 (/4 2880)
>[ 22868.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa075308]
>[ 22868.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa075308] width 2880 pitch 11520 (/4 2880)
>[ 22868.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979a508]
>[ 22868.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979a508] width 2880 pitch 11520 (/4 2880)
>[ 22868.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a900]
>[ 22868.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a900] width 2880 pitch 11520 (/4 2880)
>[ 22868.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae36e8]
>[ 22869.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae36e8] width 2880 pitch 11520 (/4 2880)
>[ 22869.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7fcf8]
>[ 22869.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7fcf8] width 2880 pitch 11520 (/4 2880)
>[ 22869.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7fcf8]
>[ 22869.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7fcf8] width 2880 pitch 11520 (/4 2880)
>[ 22869.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 22869.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 22869.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b70510]
>[ 22869.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b70510] width 2880 pitch 11520 (/4 2880)
>[ 22869.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 22869.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 22869.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b70510]
>[ 22869.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b70510] width 2880 pitch 11520 (/4 2880)
>[ 22870.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43140]
>[ 22870.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43140] width 2880 pitch 11520 (/4 2880)
>[ 22870.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97916b0]
>[ 22870.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97916b0] width 2880 pitch 11520 (/4 2880)
>[ 22870.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7238]
>[ 22870.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7238] width 2880 pitch 11520 (/4 2880)
>[ 22870.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 22870.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 22870.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f798]
>[ 22870.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f798] width 2880 pitch 11520 (/4 2880)
>[ 22871.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138c18]
>[ 22871.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138c18] width 2880 pitch 11520 (/4 2880)
>[ 22873.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92010]
>[ 22873.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92010] width 2880 pitch 11520 (/4 2880)
>[ 22873.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa182a28]
>[ 22873.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa182a28] width 2880 pitch 11520 (/4 2880)
>[ 22873.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4dab8]
>[ 22873.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4dab8] width 2880 pitch 11520 (/4 2880)
>[ 22873.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a4f80]
>[ 22873.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a4f80] width 2880 pitch 11520 (/4 2880)
>[ 22873.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03d6e8]
>[ 22874.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03d6e8] width 2880 pitch 11520 (/4 2880)
>[ 22874.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c68bb0]
>[ 22874.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c68bb0] width 2880 pitch 11520 (/4 2880)
>[ 22875.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8fed0]
>[ 22875.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8fed0] width 2880 pitch 11520 (/4 2880)
>[ 22875.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e9e4b8]
>[ 22875.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e9e4b8] width 2880 pitch 11520 (/4 2880)
>[ 22875.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090318]
>[ 22875.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090318] width 2880 pitch 11520 (/4 2880)
>[ 22875.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de2af0]
>[ 22875.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de2af0] width 2880 pitch 11520 (/4 2880)
>[ 22875.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090318]
>[ 22875.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090318] width 2880 pitch 11520 (/4 2880)
>[ 22877.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b03c8]
>[ 22877.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b03c8] width 2880 pitch 11520 (/4 2880)
>[ 22878.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cfe8]
>[ 22878.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cfe8] width 2880 pitch 11520 (/4 2880)
>[ 22878.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb43e8]
>[ 22878.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb43e8] width 2880 pitch 11520 (/4 2880)
>[ 22878.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9942fc0]
>[ 22878.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9942fc0] width 2880 pitch 11520 (/4 2880)
>[ 22878.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac518]
>[ 22878.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac518] width 2880 pitch 11520 (/4 2880)
>[ 22878.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090318]
>[ 22878.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090318] width 2880 pitch 11520 (/4 2880)
>[ 22878.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[ 22878.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[ 22878.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03db00]
>[ 22878.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03db00] width 2880 pitch 11520 (/4 2880)
>[ 22878.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03db00]
>[ 22878.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03db00] width 2880 pitch 11520 (/4 2880)
>[ 22880.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 22880.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 22880.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 22880.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 22880.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74528]
>[ 22880.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74528] width 2880 pitch 11520 (/4 2880)
>[ 22880.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a830]
>[ 22880.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a830] width 2880 pitch 11520 (/4 2880)
>[ 22880.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c68bb0]
>[ 22880.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c68bb0] width 2880 pitch 11520 (/4 2880)
>[ 22880.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25cf8]
>[ 22880.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25cf8] width 2880 pitch 11520 (/4 2880)
>[ 22880.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97847b0]
>[ 22880.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97847b0] width 2880 pitch 11520 (/4 2880)
>[ 22880.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97847b0]
>[ 22880.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97847b0] width 2880 pitch 11520 (/4 2880)
>[ 22901.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 22901.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 22960.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f58c70]
>[ 22960.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f58c70] width 2880 pitch 11520 (/4 2880)
>[ 22961.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65b98]
>[ 22961.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65b98] width 2880 pitch 11520 (/4 2880)
>[ 22961.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579258]
>[ 22961.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579258] width 2880 pitch 11520 (/4 2880)
>[ 22961.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77ec8]
>[ 22961.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77ec8] width 2880 pitch 11520 (/4 2880)
>[ 22961.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6168]
>[ 22961.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6168] width 2880 pitch 11520 (/4 2880)
>[ 22962.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05a9b0]
>[ 22962.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05a9b0] width 2880 pitch 11520 (/4 2880)
>[ 22962.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6168]
>[ 22962.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6168] width 2880 pitch 11520 (/4 2880)
>[ 22962.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8c98]
>[ 22962.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8c98] width 2880 pitch 11520 (/4 2880)
>[ 22963.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b2f8]
>[ 22963.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b2f8] width 2880 pitch 11520 (/4 2880)
>[ 22963.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12cad0]
>[ 22963.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12cad0] width 2880 pitch 11520 (/4 2880)
>[ 22964.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094fa0]
>[ 22964.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094fa0] width 2880 pitch 11520 (/4 2880)
>[ 22964.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cef990]
>[ 22964.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cef990] width 2880 pitch 11520 (/4 2880)
>[ 22964.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fc38]
>[ 22964.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fc38] width 2880 pitch 11520 (/4 2880)
>[ 22964.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1e420]
>[ 22964.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1e420] width 2880 pitch 11520 (/4 2880)
>[ 22964.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9ba70]
>[ 22964.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9ba70] width 2880 pitch 11520 (/4 2880)
>[ 22972.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ca1c0]
>[ 22972.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ca1c0] width 2880 pitch 11520 (/4 2880)
>[ 22987.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa052bc0]
>[ 22987.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa052bc0] width 2880 pitch 11520 (/4 2880)
>[ 22988.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c599e8]
>[ 22988.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c599e8] width 2880 pitch 11520 (/4 2880)
>[ 22988.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa58]
>[ 22988.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa58] width 2880 pitch 11520 (/4 2880)
>[ 22988.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1433f8]
>[ 22988.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1433f8] width 2880 pitch 11520 (/4 2880)
>[ 22988.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa278]
>[ 22988.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa278] width 2880 pitch 11520 (/4 2880)
>[ 22988.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1433f8]
>[ 22988.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1433f8] width 2880 pitch 11520 (/4 2880)
>[ 22992.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956bf58]
>[ 22992.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956bf58] width 2880 pitch 11520 (/4 2880)
>[ 22995.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa089c38]
>[ 22995.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa089c38] width 2880 pitch 11520 (/4 2880)
>[ 23013.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19f4c0]
>[ 23013.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19f4c0] width 2880 pitch 11520 (/4 2880)
>[ 23040.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98610b8]
>[ 23040.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98610b8] width 2880 pitch 11520 (/4 2880)
>[ 23040.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9861130]
>[ 23040.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9861130] width 2880 pitch 11520 (/4 2880)
>[ 23040.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15c070]
>[ 23040.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15c070] width 2880 pitch 11520 (/4 2880)
>[ 23040.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9861130]
>[ 23040.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9861130] width 2880 pitch 11520 (/4 2880)
>[ 23040.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a40d8]
>[ 23040.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a40d8] width 2880 pitch 11520 (/4 2880)
>[ 23040.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19da48]
>[ 23040.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19da48] width 2880 pitch 11520 (/4 2880)
>[ 23040.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9861130]
>[ 23040.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9861130] width 2880 pitch 11520 (/4 2880)
>[ 23040.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19da48]
>[ 23040.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19da48] width 2880 pitch 11520 (/4 2880)
>[ 23040.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22a9e8]
>[ 23040.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22a9e8] width 2880 pitch 11520 (/4 2880)
>[ 23040.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22aa18]
>[ 23040.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22aa18] width 2880 pitch 11520 (/4 2880)
>[ 23040.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22a9e8]
>[ 23040.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22a9e8] width 2880 pitch 11520 (/4 2880)
>[ 23040.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22aa18]
>[ 23040.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22aa18] width 2880 pitch 11520 (/4 2880)
>[ 23040.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e550]
>[ 23040.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e550] width 2880 pitch 11520 (/4 2880)
>[ 23040.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22aa18]
>[ 23040.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22aa18] width 2880 pitch 11520 (/4 2880)
>[ 23042.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b582b8]
>[ 23042.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b582b8] width 2880 pitch 11520 (/4 2880)
>[ 23042.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8230]
>[ 23042.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8230] width 2880 pitch 11520 (/4 2880)
>[ 23042.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa125ab0]
>[ 23042.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa125ab0] width 2880 pitch 11520 (/4 2880)
>[ 23042.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193720]
>[ 23042.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193720] width 2880 pitch 11520 (/4 2880)
>[ 23042.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193720]
>[ 23042.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193720] width 2880 pitch 11520 (/4 2880)
>[ 23042.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8230]
>[ 23042.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8230] width 2880 pitch 11520 (/4 2880)
>[ 23042.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193720]
>[ 23042.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193720] width 2880 pitch 11520 (/4 2880)
>[ 23042.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8230]
>[ 23042.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8230] width 2880 pitch 11520 (/4 2880)
>[ 23042.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193720]
>[ 23042.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193720] width 2880 pitch 11520 (/4 2880)
>[ 23042.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167980]
>[ 23042.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167980] width 2880 pitch 11520 (/4 2880)
>[ 23042.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa125ab0]
>[ 23042.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa125ab0] width 2880 pitch 11520 (/4 2880)
>[ 23042.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167980]
>[ 23042.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167980] width 2880 pitch 11520 (/4 2880)
>[ 23042.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa125ab0]
>[ 23042.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa125ab0] width 2880 pitch 11520 (/4 2880)
>[ 23042.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167980]
>[ 23042.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167980] width 2880 pitch 11520 (/4 2880)
>[ 23042.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa125ab0]
>[ 23042.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa125ab0] width 2880 pitch 11520 (/4 2880)
>[ 23042.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22ae88]
>[ 23042.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22ae88] width 2880 pitch 11520 (/4 2880)
>[ 23042.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8230]
>[ 23042.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8230] width 2880 pitch 11520 (/4 2880)
>[ 23065.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e8f0]
>[ 23065.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e8f0] width 2880 pitch 11520 (/4 2880)
>[ 23077.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa226fe0]
>[ 23077.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa226fe0] width 2880 pitch 11520 (/4 2880)
>[ 23077.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa233220]
>[ 23077.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa233220] width 2880 pitch 11520 (/4 2880)
>[ 23077.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2328b8]
>[ 23077.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2328b8] width 2880 pitch 11520 (/4 2880)
>[ 23077.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa233220]
>[ 23077.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa233220] width 2880 pitch 11520 (/4 2880)
>[ 23077.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2328b8]
>[ 23077.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2328b8] width 2880 pitch 11520 (/4 2880)
>[ 23077.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa230640]
>[ 23077.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa230640] width 2880 pitch 11520 (/4 2880)
>[ 23077.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07d170]
>[ 23077.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07d170] width 2880 pitch 11520 (/4 2880)
>[ 23077.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa233220]
>[ 23077.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa233220] width 2880 pitch 11520 (/4 2880)
>[ 23077.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07d170]
>[ 23077.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07d170] width 2880 pitch 11520 (/4 2880)
>[ 23077.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa233220]
>[ 23077.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa233220] width 2880 pitch 11520 (/4 2880)
>[ 23079.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22a278]
>[ 23079.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22a278] width 2880 pitch 11520 (/4 2880)
>[ 23079.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15c038]
>[ 23079.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15c038] width 2880 pitch 11520 (/4 2880)
>[ 23079.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22a278]
>[ 23079.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22a278] width 2880 pitch 11520 (/4 2880)
>[ 23079.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc68]
>[ 23079.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc68] width 2880 pitch 11520 (/4 2880)
>[ 23079.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc68]
>[ 23079.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc68] width 2880 pitch 11520 (/4 2880)
>[ 23079.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc68]
>[ 23079.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc68] width 2880 pitch 11520 (/4 2880)
>[ 23079.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b100]
>[ 23079.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b100] width 2880 pitch 11520 (/4 2880)
>[ 23079.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b100]
>[ 23079.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b100] width 2880 pitch 11520 (/4 2880)
>[ 23079.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b100]
>[ 23079.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b100] width 2880 pitch 11520 (/4 2880)
>[ 23079.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f227e0]
>[ 23079.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f227e0] width 2880 pitch 11520 (/4 2880)
>[ 23079.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b100]
>[ 23079.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b100] width 2880 pitch 11520 (/4 2880)
>[ 23087.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b6e8]
>[ 23087.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b6e8] width 2880 pitch 11520 (/4 2880)
>[ 23088.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa110c30]
>[ 23088.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa110c30] width 2880 pitch 11520 (/4 2880)
>[ 23088.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92e58]
>[ 23089.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92e58] width 2880 pitch 11520 (/4 2880)
>[ 23089.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0479e0]
>[ 23089.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0479e0] width 2880 pitch 11520 (/4 2880)
>[ 23089.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92e58]
>[ 23089.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92e58] width 2880 pitch 11520 (/4 2880)
>[ 23089.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0479e0]
>[ 23089.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0479e0] width 2880 pitch 11520 (/4 2880)
>[ 23089.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92e58]
>[ 23089.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92e58] width 2880 pitch 11520 (/4 2880)
>[ 23089.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0479e0]
>[ 23089.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0479e0] width 2880 pitch 11520 (/4 2880)
>[ 23089.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23089.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23089.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a518]
>[ 23089.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a518] width 2880 pitch 11520 (/4 2880)
>[ 23089.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23089.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23089.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a518]
>[ 23089.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a518] width 2880 pitch 11520 (/4 2880)
>[ 23089.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23089.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23089.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a518]
>[ 23089.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a518] width 2880 pitch 11520 (/4 2880)
>[ 23090.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a7a8]
>[ 23090.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a7a8] width 2880 pitch 11520 (/4 2880)
>[ 23090.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23090.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23090.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a7a8]
>[ 23090.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a7a8] width 2880 pitch 11520 (/4 2880)
>[ 23090.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23090.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23090.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a7a8]
>[ 23090.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a7a8] width 2880 pitch 11520 (/4 2880)
>[ 23090.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0546f0]
>[ 23090.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0546f0] width 2880 pitch 11520 (/4 2880)
>[ 23090.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a7a8]
>[ 23090.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a7a8] width 2880 pitch 11520 (/4 2880)
>[ 23090.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0546f0]
>[ 23090.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0546f0] width 2880 pitch 11520 (/4 2880)
>[ 23090.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa230528]
>[ 23090.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa230528] width 2880 pitch 11520 (/4 2880)
>[ 23090.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19da88]
>[ 23090.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19da88] width 2880 pitch 11520 (/4 2880)
>[ 23090.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa131920]
>[ 23091.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa131920] width 2880 pitch 11520 (/4 2880)
>[ 23091.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07de00]
>[ 23091.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07de00] width 2880 pitch 11520 (/4 2880)
>[ 23091.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa192f60]
>[ 23091.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa192f60] width 2880 pitch 11520 (/4 2880)
>[ 23091.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddc0]
>[ 23091.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddc0] width 2880 pitch 11520 (/4 2880)
>[ 23091.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07de00]
>[ 23091.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07de00] width 2880 pitch 11520 (/4 2880)
>[ 23091.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddc0]
>[ 23091.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddc0] width 2880 pitch 11520 (/4 2880)
>[ 23096.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c8c0]
>[ 23096.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c8c0] width 2880 pitch 11520 (/4 2880)
>[ 23099.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2092b0]
>[ 23099.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2092b0] width 2880 pitch 11520 (/4 2880)
>[ 23120.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0472b0]
>[ 23121.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0472b0] width 2880 pitch 11520 (/4 2880)
>[ 23121.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0472b0]
>[ 23121.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0472b0] width 2880 pitch 11520 (/4 2880)
>[ 23121.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0472b0]
>[ 23121.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0472b0] width 2880 pitch 11520 (/4 2880)
>[ 23121.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3c78]
>[ 23121.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3c78] width 2880 pitch 11520 (/4 2880)
>[ 23138.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b583a8]
>[ 23138.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b583a8] width 2880 pitch 11520 (/4 2880)
>[ 23155.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03db00]
>[ 23155.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03db00] width 2880 pitch 11520 (/4 2880)
>[ 23155.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c709f0]
>[ 23155.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c709f0] width 2880 pitch 11520 (/4 2880)
>[ 23155.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa278]
>[ 23155.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa278] width 2880 pitch 11520 (/4 2880)
>[ 23155.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac518]
>[ 23155.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac518] width 2880 pitch 11520 (/4 2880)
>[ 23156.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03af58]
>[ 23156.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03af58] width 2880 pitch 11520 (/4 2880)
>[ 23156.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15c038]
>[ 23156.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15c038] width 2880 pitch 11520 (/4 2880)
>[ 23156.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0acf50]
>[ 23156.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0acf50] width 2880 pitch 11520 (/4 2880)
>[ 23156.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[ 23156.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[ 23157.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa182558]
>[ 23157.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa182558] width 2880 pitch 11520 (/4 2880)
>[ 23158.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c68bb0]
>[ 23158.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c68bb0] width 2880 pitch 11520 (/4 2880)
>[ 23158.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7b458]
>[ 23158.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7b458] width 2880 pitch 11520 (/4 2880)
>[ 23158.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8c98]
>[ 23158.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8c98] width 2880 pitch 11520 (/4 2880)
>[ 23158.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05aac0]
>[ 23159.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05aac0] width 2880 pitch 11520 (/4 2880)
>[ 23159.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8c98]
>[ 23159.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8c98] width 2880 pitch 11520 (/4 2880)
>[ 23159.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6fcf0]
>[ 23159.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6fcf0] width 2880 pitch 11520 (/4 2880)
>[ 23159.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46120]
>[ 23159.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46120] width 2880 pitch 11520 (/4 2880)
>[ 23162.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9add588]
>[ 23162.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9add588] width 2880 pitch 11520 (/4 2880)
>[ 23162.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 23162.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 23162.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1e420]
>[ 23162.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1e420] width 2880 pitch 11520 (/4 2880)
>[ 23162.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 23162.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 23162.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1e420]
>[ 23162.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1e420] width 2880 pitch 11520 (/4 2880)
>[ 23162.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9add588]
>[ 23162.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9add588] width 2880 pitch 11520 (/4 2880)
>[ 23162.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1433f8]
>[ 23162.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1433f8] width 2880 pitch 11520 (/4 2880)
>[ 23162.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 23162.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 23162.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19d9b8]
>[ 23162.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19d9b8] width 2880 pitch 11520 (/4 2880)
>[ 23162.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 23162.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 23162.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9add588]
>[ 23162.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9add588] width 2880 pitch 11520 (/4 2880)
>[ 23162.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa089568]
>[ 23162.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa089568] width 2880 pitch 11520 (/4 2880)
>[ 23162.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1e420]
>[ 23162.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1e420] width 2880 pitch 11520 (/4 2880)
>[ 23163.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1e420]
>[ 23163.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1e420] width 2880 pitch 11520 (/4 2880)
>[ 23163.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc38]
>[ 23163.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc38] width 2880 pitch 11520 (/4 2880)
>[ 23163.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070ed8]
>[ 23163.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070ed8] width 2880 pitch 11520 (/4 2880)
>[ 23163.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc88]
>[ 23163.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc88] width 2880 pitch 11520 (/4 2880)
>[ 23163.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070ed8]
>[ 23163.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070ed8] width 2880 pitch 11520 (/4 2880)
>[ 23163.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc88]
>[ 23163.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc88] width 2880 pitch 11520 (/4 2880)
>[ 23163.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070ed8]
>[ 23163.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070ed8] width 2880 pitch 11520 (/4 2880)
>[ 23163.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15bc88]
>[ 23163.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15bc88] width 2880 pitch 11520 (/4 2880)
>[ 23163.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070ed8]
>[ 23163.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070ed8] width 2880 pitch 11520 (/4 2880)
>[ 23165.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa072480]
>[ 23165.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa072480] width 2880 pitch 11520 (/4 2880)
>[ 23165.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585190]
>[ 23165.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585190] width 2880 pitch 11520 (/4 2880)
>[ 23165.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddb8]
>[ 23165.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddb8] width 2880 pitch 11520 (/4 2880)
>[ 23165.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddb8]
>[ 23165.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddb8] width 2880 pitch 11520 (/4 2880)
>[ 23165.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585190]
>[ 23165.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585190] width 2880 pitch 11520 (/4 2880)
>[ 23165.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585190]
>[ 23165.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585190] width 2880 pitch 11520 (/4 2880)
>[ 23165.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585190]
>[ 23165.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585190] width 2880 pitch 11520 (/4 2880)
>[ 23165.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9585190]
>[ 23165.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9585190] width 2880 pitch 11520 (/4 2880)
>[ 23165.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddb8]
>[ 23165.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddb8] width 2880 pitch 11520 (/4 2880)
>[ 23165.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23165.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07ddb8]
>[ 23165.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07ddb8] width 2880 pitch 11520 (/4 2880)
>[ 23165.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95851c0]
>[ 23165.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95851c0] width 2880 pitch 11520 (/4 2880)
>[ 23166.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23166.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23166.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189aa0]
>[ 23166.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189aa0] width 2880 pitch 11520 (/4 2880)
>[ 23181.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa209548]
>[ 23181.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa209548] width 2880 pitch 11520 (/4 2880)
>[ 23182.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23182.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23186.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf86b8]
>[ 23186.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf86b8] width 2880 pitch 11520 (/4 2880)
>[ 23187.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23187.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23187.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95736e8]
>[ 23187.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95736e8] width 2880 pitch 11520 (/4 2880)
>[ 23188.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23188.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23188.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288e0]
>[ 23188.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288e0] width 2880 pitch 11520 (/4 2880)
>[ 23188.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23188.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23188.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23188.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23188.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23188.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23188.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23189.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23193.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23193.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23198.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23198.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23198.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288e0]
>[ 23198.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288e0] width 2880 pitch 11520 (/4 2880)
>[ 23198.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23198.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23199.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23199.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23199.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23199.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23199.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288e0]
>[ 23199.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288e0] width 2880 pitch 11520 (/4 2880)
>[ 23199.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23199.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23202.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23202.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23203.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288e0]
>[ 23203.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288e0] width 2880 pitch 11520 (/4 2880)
>[ 23203.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288e0]
>[ 23203.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288e0] width 2880 pitch 11520 (/4 2880)
>[ 23203.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa63d0]
>[ 23203.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa63d0] width 2880 pitch 11520 (/4 2880)
>[ 23203.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23203.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23203.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121aa0]
>[ 23204.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121aa0] width 2880 pitch 11520 (/4 2880)
>[ 23204.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23204.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23204.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23204.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23204.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23204.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23204.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121b80]
>[ 23204.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121b80] width 2880 pitch 11520 (/4 2880)
>[ 23204.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193138]
>[ 23204.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193138] width 2880 pitch 11520 (/4 2880)
>[ 23204.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0904b8]
>[ 23204.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0904b8] width 2880 pitch 11520 (/4 2880)
>[ 23206.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 23206.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 23207.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3918]
>[ 23207.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3918] width 2880 pitch 11520 (/4 2880)
>[ 23221.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50a48]
>[ 23221.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50a48] width 2880 pitch 11520 (/4 2880)
>[ 23222.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9645dd0]
>[ 23222.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9645dd0] width 2880 pitch 11520 (/4 2880)
>[ 23226.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2252d0]
>[ 23226.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2252d0] width 2880 pitch 11520 (/4 2880)
>[ 23293.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50310]
>[ 23293.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50310] width 2880 pitch 11520 (/4 2880)
>[ 23293.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50928]
>[ 23293.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50928] width 2880 pitch 11520 (/4 2880)
>[ 23293.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3818]
>[ 23293.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3818] width 2880 pitch 11520 (/4 2880)
>[ 23293.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50928]
>[ 23293.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50928] width 2880 pitch 11520 (/4 2880)
>[ 23293.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3818]
>[ 23293.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3818] width 2880 pitch 11520 (/4 2880)
>[ 23294.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3818]
>[ 23294.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3818] width 2880 pitch 11520 (/4 2880)
>[ 23294.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50928]
>[ 23294.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50928] width 2880 pitch 11520 (/4 2880)
>[ 23294.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3818]
>[ 23294.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3818] width 2880 pitch 11520 (/4 2880)
>[ 23294.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50928]
>[ 23294.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50928] width 2880 pitch 11520 (/4 2880)
>[ 23294.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1dc8]
>[ 23294.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1dc8] width 2880 pitch 11520 (/4 2880)
>[ 23297.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15fc98]
>[ 23297.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15fc98] width 2880 pitch 11520 (/4 2880)
>[ 23388.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee990]
>[ 23388.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee990] width 2880 pitch 11520 (/4 2880)
>[ 23388.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174fd8]
>[ 23388.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174fd8] width 2880 pitch 11520 (/4 2880)
>[ 23388.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 23388.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 23388.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174fd8]
>[ 23388.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174fd8] width 2880 pitch 11520 (/4 2880)
>[ 23388.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee990]
>[ 23388.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee990] width 2880 pitch 11520 (/4 2880)
>[ 23389.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee990]
>[ 23389.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee990] width 2880 pitch 11520 (/4 2880)
>[ 23389.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174fd8]
>[ 23389.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174fd8] width 2880 pitch 11520 (/4 2880)
>[ 23389.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1759f0]
>[ 23389.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1759f0] width 2880 pitch 11520 (/4 2880)
>[ 23389.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cdd78]
>[ 23389.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cdd78] width 2880 pitch 11520 (/4 2880)
>[ 23389.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174fd8]
>[ 23390.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174fd8] width 2880 pitch 11520 (/4 2880)
>[ 23390.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f69e0]
>[ 23390.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f69e0] width 2880 pitch 11520 (/4 2880)
>[ 23390.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174fd8]
>[ 23390.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174fd8] width 2880 pitch 11520 (/4 2880)
>[ 23390.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 23390.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 23390.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1759f0]
>[ 23390.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1759f0] width 2880 pitch 11520 (/4 2880)
>[ 23410.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b43d90]
>[ 23410.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b43d90] width 2880 pitch 11520 (/4 2880)
>[ 23416.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a1b8]
>[ 23416.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a1b8] width 2880 pitch 11520 (/4 2880)
>[ 23417.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 23417.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 23420.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595b68]
>[ 23420.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595b68] width 2880 pitch 11520 (/4 2880)
>[ 23422.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a37c0]
>[ 23422.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a37c0] width 2880 pitch 11520 (/4 2880)
>[ 23422.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4f248]
>[ 23422.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4f248] width 2880 pitch 11520 (/4 2880)
>[ 23422.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a37c0]
>[ 23422.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a37c0] width 2880 pitch 11520 (/4 2880)
>[ 23422.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4f248]
>[ 23422.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4f248] width 2880 pitch 11520 (/4 2880)
>[ 23422.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a37c0]
>[ 23422.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a37c0] width 2880 pitch 11520 (/4 2880)
>[ 23541.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 23541.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 23542.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 23542.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 23542.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ff0]
>[ 23542.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ff0] width 2880 pitch 11520 (/4 2880)
>[ 23542.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 23542.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 23544.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1fe08]
>[ 23544.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1fe08] width 2880 pitch 11520 (/4 2880)
>[ 23544.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1fe08]
>[ 23544.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1fe08] width 2880 pitch 11520 (/4 2880)
>[ 23544.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 23544.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 23544.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3ea70]
>[ 23544.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3ea70] width 2880 pitch 11520 (/4 2880)
>[ 23545.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9949028]
>[ 23546.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9949028] width 2880 pitch 11520 (/4 2880)
>[ 23601.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23601.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 23602.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173638]
>[ 23602.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173638] width 2880 pitch 11520 (/4 2880)
>[ 23606.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23606.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 23608.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 23608.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 23616.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 23616.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 23619.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa026e10]
>[ 23619.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa026e10] width 2880 pitch 11520 (/4 2880)
>[ 23622.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090488]
>[ 23622.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090488] width 2880 pitch 11520 (/4 2880)
>[ 23626.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a2c8]
>[ 23626.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a2c8] width 2880 pitch 11520 (/4 2880)
>[ 23656.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090488]
>[ 23656.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090488] width 2880 pitch 11520 (/4 2880)
>[ 23671.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71540]
>[ 23671.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71540] width 2880 pitch 11520 (/4 2880)
>[ 23693.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71540]
>[ 23693.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71540] width 2880 pitch 11520 (/4 2880)
>[ 23694.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa182640]
>[ 23694.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa182640] width 2880 pitch 11520 (/4 2880)
>[ 23700.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4a2c8]
>[ 23700.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4a2c8] width 2880 pitch 11520 (/4 2880)
>[ 23736.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceabc0]
>[ 23736.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceabc0] width 2880 pitch 11520 (/4 2880)
>[ 23741.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8648]
>[ 23741.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8648] width 2880 pitch 11520 (/4 2880)
>[ 23753.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af02e8]
>[ 23753.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af02e8] width 2880 pitch 11520 (/4 2880)
>[ 23772.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1753c0]
>[ 23772.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1753c0] width 2880 pitch 11520 (/4 2880)
>[ 23773.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23773.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23773.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23773.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23773.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23773.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23773.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23773.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23773.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23773.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23774.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23774.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23774.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23774.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23774.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23774.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23774.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23774.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23774.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23774.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23774.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23774.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23774.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23774.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23774.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23774.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23774.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23774.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23774.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23775.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23775.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23775.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23775.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23775.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23775.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23775.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23775.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23775.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23775.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71438]
>[ 23775.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71438] width 2880 pitch 11520 (/4 2880)
>[ 23775.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23775.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71438]
>[ 23775.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71438] width 2880 pitch 11520 (/4 2880)
>[ 23775.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23775.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23776.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23776.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23776.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23776.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23776.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a678]
>[ 23776.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a678] width 2880 pitch 11520 (/4 2880)
>[ 23776.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec6bd0]
>[ 23776.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec6bd0] width 2880 pitch 11520 (/4 2880)
>[ 23777.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23777.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23777.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23777.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 23777.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b57828]
>[ 23777.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b57828] width 2880 pitch 11520 (/4 2880)
>[ 23777.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae380]
>[ 23777.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae380] width 2880 pitch 11520 (/4 2880)
>[ 23777.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23777.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23777.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23777.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23777.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23777.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23777.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23777.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23777.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23777.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23777.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23777.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23777.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23779.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23780.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23787.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23787.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23787.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23787.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23787.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 23787.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 23787.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23787.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23787.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26fc8]
>[ 23787.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26fc8] width 2880 pitch 11520 (/4 2880)
>[ 23788.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23788.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23788.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23788.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23791.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23791.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23792.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23792.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23792.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23792.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23792.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23792.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23792.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23792.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23792.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23792.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23793.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23793.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23793.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23793.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23793.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23793.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23793.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23793.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23807.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23807.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23808.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23808.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23808.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23808.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23808.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23808.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23808.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23808.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23808.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23808.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23808.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23808.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23808.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23809.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23809.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23809.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23809.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23809.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23809.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23809.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23809.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23810.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23810.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23810.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23810.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23810.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23811.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23811.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23811.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa38a8]
>[ 23811.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa38a8] width 2880 pitch 11520 (/4 2880)
>[ 23811.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23811.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23812.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23812.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23812.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23812.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23813.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750b8]
>[ 23813.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750b8] width 2880 pitch 11520 (/4 2880)
>[ 23813.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25b28]
>[ 23813.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25b28] width 2880 pitch 11520 (/4 2880)
>[ 23813.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec6bd0]
>[ 23813.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec6bd0] width 2880 pitch 11520 (/4 2880)
>[ 23813.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71438]
>[ 23813.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71438] width 2880 pitch 11520 (/4 2880)
>[ 23813.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f20fb8]
>[ 23813.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f20fb8] width 2880 pitch 11520 (/4 2880)
>[ 23819.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25b28]
>[ 23819.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25b28] width 2880 pitch 11520 (/4 2880)
>[ 23820.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a1438]
>[ 23820.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a1438] width 2880 pitch 11520 (/4 2880)
>[ 23820.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a1438]
>[ 23821.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a1438] width 2880 pitch 11520 (/4 2880)
>[ 23821.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25b28]
>[ 23821.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25b28] width 2880 pitch 11520 (/4 2880)
>[ 23821.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71438]
>[ 23821.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71438] width 2880 pitch 11520 (/4 2880)
>[ 23821.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25b28]
>[ 23821.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25b28] width 2880 pitch 11520 (/4 2880)
>[ 23821.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a23eb8]
>[ 23822.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a23eb8] width 2880 pitch 11520 (/4 2880)
>[ 23822.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71438]
>[ 23822.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71438] width 2880 pitch 11520 (/4 2880)
>[ 23822.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a788]
>[ 23822.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a788] width 2880 pitch 11520 (/4 2880)
>[ 23822.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25b28]
>[ 23822.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25b28] width 2880 pitch 11520 (/4 2880)
>[ 23822.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2a788]
>[ 23822.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2a788] width 2880 pitch 11520 (/4 2880)
>[ 23965.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 23965.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 23965.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 23965.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 23965.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04c0b0]
>[ 23965.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04c0b0] width 2880 pitch 11520 (/4 2880)
>[ 23965.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 23965.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 23965.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04c0b0]
>[ 23965.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04c0b0] width 2880 pitch 11520 (/4 2880)
>[ 23966.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa226010]
>[ 23966.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa226010] width 2880 pitch 11520 (/4 2880)
>[ 23967.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec6e70]
>[ 23967.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec6e70] width 2880 pitch 11520 (/4 2880)
>[ 23968.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04c0b0]
>[ 23968.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04c0b0] width 2880 pitch 11520 (/4 2880)
>[ 23968.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41d60]
>[ 23968.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41d60] width 2880 pitch 11520 (/4 2880)
>[ 23969.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[ 23970.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[ 23970.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23970.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23970.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23970.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23970.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 23970.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 23970.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23970.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23976.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23976.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 23976.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22940]
>[ 23976.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22940] width 2880 pitch 11520 (/4 2880)
>[ 23976.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1e70]
>[ 23976.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1e70] width 2880 pitch 11520 (/4 2880)
>[ 23977.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 23977.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 23997.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23997.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23997.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34550]
>[ 23997.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34550] width 2880 pitch 11520 (/4 2880)
>[ 23997.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23997.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23997.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b34550]
>[ 23997.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b34550] width 2880 pitch 11520 (/4 2880)
>[ 23997.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c259b8]
>[ 23997.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c259b8] width 2880 pitch 11520 (/4 2880)
>[ 23997.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 23997.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 23997.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebc1c8]
>[ 23997.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebc1c8] width 2880 pitch 11520 (/4 2880)
>[ 23998.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23998.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 23998.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1e70]
>[ 23998.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1e70] width 2880 pitch 11520 (/4 2880)
>[ 23998.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a7ac0]
>[ 23998.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a7ac0] width 2880 pitch 11520 (/4 2880)
>[ 23998.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04c0b0]
>[ 23998.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04c0b0] width 2880 pitch 11520 (/4 2880)
>[ 23999.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa046468]
>[ 23999.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa046468] width 2880 pitch 11520 (/4 2880)
>[ 24000.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 24000.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 24000.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22940]
>[ 24000.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22940] width 2880 pitch 11520 (/4 2880)
>[ 24000.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 24000.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 24000.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b22940]
>[ 24000.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b22940] width 2880 pitch 11520 (/4 2880)
>[ 24000.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113470]
>[ 24000.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113470] width 2880 pitch 11520 (/4 2880)
>[ 24002.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973f320]
>[ 24002.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973f320] width 2880 pitch 11520 (/4 2880)
>[ 24002.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973f320]
>[ 24002.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973f320] width 2880 pitch 11520 (/4 2880)
>[ 24002.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5618]
>[ 24002.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5618] width 2880 pitch 11520 (/4 2880)
>[ 24002.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ce58]
>[ 24002.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ce58] width 2880 pitch 11520 (/4 2880)
>[ 24002.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24002.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24002.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7ce58]
>[ 24002.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7ce58] width 2880 pitch 11520 (/4 2880)
>[ 24002.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a28bc0]
>[ 24002.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a28bc0] width 2880 pitch 11520 (/4 2880)
>[ 24006.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb140]
>[ 24006.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb140] width 2880 pitch 11520 (/4 2880)
>[ 24006.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24006.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24006.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb140]
>[ 24006.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb140] width 2880 pitch 11520 (/4 2880)
>[ 24006.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24006.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24006.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb140]
>[ 24006.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb140] width 2880 pitch 11520 (/4 2880)
>[ 24006.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24006.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24006.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb140]
>[ 24006.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb140] width 2880 pitch 11520 (/4 2880)
>[ 24006.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24006.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24006.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb140]
>[ 24006.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb140] width 2880 pitch 11520 (/4 2880)
>[ 24006.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959ac90]
>[ 24006.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959ac90] width 2880 pitch 11520 (/4 2880)
>[ 24018.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afb720]
>[ 24018.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afb720] width 2880 pitch 11520 (/4 2880)
>[ 24019.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796378]
>[ 24019.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796378] width 2880 pitch 11520 (/4 2880)
>[ 24019.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba1d8]
>[ 24019.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba1d8] width 2880 pitch 11520 (/4 2880)
>[ 24019.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952db68]
>[ 24019.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952db68] width 2880 pitch 11520 (/4 2880)
>[ 24019.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dba1d8]
>[ 24019.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dba1d8] width 2880 pitch 11520 (/4 2880)
>[ 24019.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952db68]
>[ 24019.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952db68] width 2880 pitch 11520 (/4 2880)
>[ 24019.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4da08]
>[ 24019.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4da08] width 2880 pitch 11520 (/4 2880)
>[ 24019.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952db68]
>[ 24019.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952db68] width 2880 pitch 11520 (/4 2880)
>[ 24019.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4da08]
>[ 24019.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4da08] width 2880 pitch 11520 (/4 2880)
>[ 24019.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952db68]
>[ 24019.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952db68] width 2880 pitch 11520 (/4 2880)
>[ 24019.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4da08]
>[ 24019.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4da08] width 2880 pitch 11520 (/4 2880)
>[ 24019.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9796378]
>[ 24019.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9796378] width 2880 pitch 11520 (/4 2880)
>[ 24020.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0931d0]
>[ 24020.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0931d0] width 2880 pitch 11520 (/4 2880)
>[ 24020.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7fb40]
>[ 24020.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7fb40] width 2880 pitch 11520 (/4 2880)
>[ 24020.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84688]
>[ 24020.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84688] width 2880 pitch 11520 (/4 2880)
>[ 24020.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84688]
>[ 24020.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84688] width 2880 pitch 11520 (/4 2880)
>[ 24020.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7fb40]
>[ 24020.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7fb40] width 2880 pitch 11520 (/4 2880)
>[ 24020.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84688]
>[ 24020.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84688] width 2880 pitch 11520 (/4 2880)
>[ 24020.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7fb40]
>[ 24020.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7fb40] width 2880 pitch 11520 (/4 2880)
>[ 24020.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84688]
>[ 24020.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84688] width 2880 pitch 11520 (/4 2880)
>[ 24020.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1d328]
>[ 24020.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1d328] width 2880 pitch 11520 (/4 2880)
>[ 24020.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84688]
>[ 24020.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84688] width 2880 pitch 11520 (/4 2880)
>[ 24021.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85150]
>[ 24021.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85150] width 2880 pitch 11520 (/4 2880)
>[ 24021.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cee290]
>[ 24021.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cee290] width 2880 pitch 11520 (/4 2880)
>[ 24021.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85150]
>[ 24021.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85150] width 2880 pitch 11520 (/4 2880)
>[ 24021.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4c550]
>[ 24021.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4c550] width 2880 pitch 11520 (/4 2880)
>[ 24021.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85150]
>[ 24021.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85150] width 2880 pitch 11520 (/4 2880)
>[ 24021.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4c550]
>[ 24021.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4c550] width 2880 pitch 11520 (/4 2880)
>[ 24021.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85150]
>[ 24021.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85150] width 2880 pitch 11520 (/4 2880)
>[ 24021.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4c550]
>[ 24021.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4c550] width 2880 pitch 11520 (/4 2880)
>[ 24022.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b85150]
>[ 24022.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b85150] width 2880 pitch 11520 (/4 2880)
>[ 24039.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9937f38]
>[ 24039.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9937f38] width 2880 pitch 11520 (/4 2880)
>[ 24039.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9937f38]
>[ 24039.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9937f38] width 2880 pitch 11520 (/4 2880)
>[ 24039.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa71a0]
>[ 24039.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa71a0] width 2880 pitch 11520 (/4 2880)
>[ 24039.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7a908]
>[ 24039.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7a908] width 2880 pitch 11520 (/4 2880)
>[ 24039.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c80f8]
>[ 24039.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c80f8] width 2880 pitch 11520 (/4 2880)
>[ 24039.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c148a0]
>[ 24039.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c148a0] width 2880 pitch 11520 (/4 2880)
>[ 24073.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c148a0]
>[ 24073.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c148a0] width 2880 pitch 11520 (/4 2880)
>[ 24074.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b55f0]
>[ 24074.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b55f0] width 2880 pitch 11520 (/4 2880)
>[ 24160.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd1f8]
>[ 24160.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd1f8] width 2880 pitch 11520 (/4 2880)
>[ 24162.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954d4a8]
>[ 24162.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954d4a8] width 2880 pitch 11520 (/4 2880)
>[ 24195.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a0488]
>[ 24195.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a0488] width 2880 pitch 11520 (/4 2880)
>[ 24195.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9953318]
>[ 24195.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9953318] width 2880 pitch 11520 (/4 2880)
>[ 24196.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc8c18]
>[ 24196.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc8c18] width 2880 pitch 11520 (/4 2880)
>[ 24226.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11af48]
>[ 24226.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11af48] width 2880 pitch 11520 (/4 2880)
>[ 24299.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d139b8]
>[ 24299.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d139b8] width 2880 pitch 11520 (/4 2880)
>[ 24299.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deca8]
>[ 24299.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deca8] width 2880 pitch 11520 (/4 2880)
>[ 24299.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7e6d8]
>[ 24299.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7e6d8] width 2880 pitch 11520 (/4 2880)
>[ 24299.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f08]
>[ 24300.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f08] width 2880 pitch 11520 (/4 2880)
>[ 24300.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24300.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24300.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f08]
>[ 24300.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f08] width 2880 pitch 11520 (/4 2880)
>[ 24300.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24300.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24300.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f08]
>[ 24300.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f08] width 2880 pitch 11520 (/4 2880)
>[ 24301.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24301.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24302.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cf8f8]
>[ 24302.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cf8f8] width 2880 pitch 11520 (/4 2880)
>[ 24302.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24302.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24302.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f08]
>[ 24302.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f08] width 2880 pitch 11520 (/4 2880)
>[ 24303.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24303.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24303.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cf8f8]
>[ 24303.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cf8f8] width 2880 pitch 11520 (/4 2880)
>[ 24303.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9555f08]
>[ 24303.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9555f08] width 2880 pitch 11520 (/4 2880)
>[ 24304.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24304.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24304.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cf8f8]
>[ 24304.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cf8f8] width 2880 pitch 11520 (/4 2880)
>[ 24304.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbd78]
>[ 24304.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbd78] width 2880 pitch 11520 (/4 2880)
>[ 24304.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af02e8]
>[ 24305.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af02e8] width 2880 pitch 11520 (/4 2880)
>[ 24305.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966d460]
>[ 24305.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966d460] width 2880 pitch 11520 (/4 2880)
>[ 24305.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176b88]
>[ 24305.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176b88] width 2880 pitch 11520 (/4 2880)
>[ 24311.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d45d68]
>[ 24311.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d45d68] width 2880 pitch 11520 (/4 2880)
>[ 24365.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa228e68]
>[ 24365.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa228e68] width 2880 pitch 11520 (/4 2880)
>[ 24365.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 24365.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 24365.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65ff8]
>[ 24365.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65ff8] width 2880 pitch 11520 (/4 2880)
>[ 24365.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24365.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24365.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15d210]
>[ 24366.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15d210] width 2880 pitch 11520 (/4 2880)
>[ 24366.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138d20]
>[ 24366.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138d20] width 2880 pitch 11520 (/4 2880)
>[ 24366.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24367.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24367.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24367.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24367.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24367.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24367.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24367.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24367.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24367.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24370.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24370.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24370.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24370.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24370.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24370.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24370.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24370.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24370.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24370.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24370.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24371.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24371.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24371.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24372.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24372.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24372.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24373.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24373.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24373.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24373.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24373.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24374.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 24374.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 24384.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24384.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24385.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3cae0]
>[ 24385.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3cae0] width 2880 pitch 11520 (/4 2880)
>[ 24385.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24385.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24385.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1aa30]
>[ 24385.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1aa30] width 2880 pitch 11520 (/4 2880)
>[ 24385.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 24385.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 24385.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1aa30]
>[ 24385.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1aa30] width 2880 pitch 11520 (/4 2880)
>[ 24399.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722580]
>[ 24399.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722580] width 2880 pitch 11520 (/4 2880)
>[ 24421.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204af8]
>[ 24421.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204af8] width 2880 pitch 11520 (/4 2880)
>[ 24422.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aedf50]
>[ 24422.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aedf50] width 2880 pitch 11520 (/4 2880)
>[ 24422.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9606a98]
>[ 24422.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9606a98] width 2880 pitch 11520 (/4 2880)
>[ 24422.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8648]
>[ 24422.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8648] width 2880 pitch 11520 (/4 2880)
>[ 24422.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f368]
>[ 24422.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f368] width 2880 pitch 11520 (/4 2880)
>[ 24423.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9606a98]
>[ 24423.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9606a98] width 2880 pitch 11520 (/4 2880)
>[ 24423.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc1c8]
>[ 24423.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc1c8] width 2880 pitch 11520 (/4 2880)
>[ 24423.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138d20]
>[ 24423.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138d20] width 2880 pitch 11520 (/4 2880)
>[ 24423.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2e00]
>[ 24424.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2e00] width 2880 pitch 11520 (/4 2880)
>[ 24424.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1acf0]
>[ 24424.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1acf0] width 2880 pitch 11520 (/4 2880)
>[ 24424.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798df8]
>[ 24424.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798df8] width 2880 pitch 11520 (/4 2880)
>[ 24424.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1acf0]
>[ 24424.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1acf0] width 2880 pitch 11520 (/4 2880)
>[ 24424.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9463ea0]
>[ 24424.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9463ea0] width 2880 pitch 11520 (/4 2880)
>[ 24430.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ce0]
>[ 24430.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ce0] width 2880 pitch 11520 (/4 2880)
>[ 24430.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd008]
>[ 24430.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd008] width 2880 pitch 11520 (/4 2880)
>[ 24430.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08e440]
>[ 24430.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08e440] width 2880 pitch 11520 (/4 2880)
>[ 24430.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d22f38]
>[ 24430.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d22f38] width 2880 pitch 11520 (/4 2880)
>[ 24430.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ce0]
>[ 24430.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ce0] width 2880 pitch 11520 (/4 2880)
>[ 24430.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f48]
>[ 24430.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f48] width 2880 pitch 11520 (/4 2880)
>[ 24431.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ce0]
>[ 24431.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ce0] width 2880 pitch 11520 (/4 2880)
>[ 24431.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f48]
>[ 24431.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f48] width 2880 pitch 11520 (/4 2880)
>[ 24431.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15b198]
>[ 24431.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15b198] width 2880 pitch 11520 (/4 2880)
>[ 24431.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d22f38]
>[ 24431.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d22f38] width 2880 pitch 11520 (/4 2880)
>[ 24431.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f48]
>[ 24431.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f48] width 2880 pitch 11520 (/4 2880)
>[ 24431.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d22f38]
>[ 24431.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d22f38] width 2880 pitch 11520 (/4 2880)
>[ 24431.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f48]
>[ 24431.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f48] width 2880 pitch 11520 (/4 2880)
>[ 24431.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d23a48]
>[ 24431.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d23a48] width 2880 pitch 11520 (/4 2880)
>[ 24439.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ca98]
>[ 24439.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ca98] width 2880 pitch 11520 (/4 2880)
>[ 24439.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993ca98]
>[ 24439.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993ca98] width 2880 pitch 11520 (/4 2880)
>[ 24440.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23228]
>[ 24440.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23228] width 2880 pitch 11520 (/4 2880)
>[ 24440.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d6ce0]
>[ 24440.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d6ce0] width 2880 pitch 11520 (/4 2880)
>[ 24440.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ed118]
>[ 24440.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ed118] width 2880 pitch 11520 (/4 2880)
>[ 24441.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08d390]
>[ 24441.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08d390] width 2880 pitch 11520 (/4 2880)
>[ 24441.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1815e8]
>[ 24441.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1815e8] width 2880 pitch 11520 (/4 2880)
>[ 24442.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f34da0]
>[ 24442.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f34da0] width 2880 pitch 11520 (/4 2880)
>[ 24442.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725f48]
>[ 24443.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725f48] width 2880 pitch 11520 (/4 2880)
>[ 24443.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d23a48]
>[ 24443.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d23a48] width 2880 pitch 11520 (/4 2880)
>[ 24443.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a508]
>[ 24443.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a508] width 2880 pitch 11520 (/4 2880)
>[ 24443.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba7ad8]
>[ 24443.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba7ad8] width 2880 pitch 11520 (/4 2880)
>[ 24443.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba7ad8]
>[ 24443.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba7ad8] width 2880 pitch 11520 (/4 2880)
>[ 24443.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d23a48]
>[ 24443.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d23a48] width 2880 pitch 11520 (/4 2880)
>[ 24444.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d23a48]
>[ 24444.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d23a48] width 2880 pitch 11520 (/4 2880)
>[ 24444.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba7ad8]
>[ 24444.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba7ad8] width 2880 pitch 11520 (/4 2880)
>[ 24445.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa106ba0]
>[ 24445.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa106ba0] width 2880 pitch 11520 (/4 2880)
>[ 24445.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ee470]
>[ 24445.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ee470] width 2880 pitch 11520 (/4 2880)
>[ 24445.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba7ad8]
>[ 24445.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba7ad8] width 2880 pitch 11520 (/4 2880)
>[ 24447.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25c48]
>[ 24447.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25c48] width 2880 pitch 11520 (/4 2880)
>[ 24448.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0953c0]
>[ 24448.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0953c0] width 2880 pitch 11520 (/4 2880)
>[ 24451.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa106ba0]
>[ 24451.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa106ba0] width 2880 pitch 11520 (/4 2880)
>[ 24451.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9576550]
>[ 24451.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9576550] width 2880 pitch 11520 (/4 2880)
>[ 24451.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9576550]
>[ 24451.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9576550] width 2880 pitch 11520 (/4 2880)
>[ 24457.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab49d8]
>[ 24457.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab49d8] width 2880 pitch 11520 (/4 2880)
>[ 24457.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d57650]
>[ 24457.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d57650] width 2880 pitch 11520 (/4 2880)
>[ 24461.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa106ba0]
>[ 24461.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa106ba0] width 2880 pitch 11520 (/4 2880)
>[ 24461.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92530]
>[ 24461.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92530] width 2880 pitch 11520 (/4 2880)
>[ 24462.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab49d8]
>[ 24462.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab49d8] width 2880 pitch 11520 (/4 2880)
>[ 24463.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92530]
>[ 24463.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92530] width 2880 pitch 11520 (/4 2880)
>[ 24471.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ec38]
>[ 24471.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ec38] width 2880 pitch 11520 (/4 2880)
>[ 24471.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc718]
>[ 24471.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc718] width 2880 pitch 11520 (/4 2880)
>[ 24471.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ec38]
>[ 24471.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ec38] width 2880 pitch 11520 (/4 2880)
>[ 24471.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b92530]
>[ 24471.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b92530] width 2880 pitch 11520 (/4 2880)
>[ 24472.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfebe0]
>[ 24472.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfebe0] width 2880 pitch 11520 (/4 2880)
>[ 24472.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfebe0]
>[ 24472.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfebe0] width 2880 pitch 11520 (/4 2880)
>[ 24473.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25c48]
>[ 24473.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25c48] width 2880 pitch 11520 (/4 2880)
>[ 24473.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac608]
>[ 24473.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac608] width 2880 pitch 11520 (/4 2880)
>[ 24473.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25c48]
>[ 24473.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25c48] width 2880 pitch 11520 (/4 2880)
>[ 24473.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfebe0]
>[ 24473.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfebe0] width 2880 pitch 11520 (/4 2880)
>[ 24473.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18ba60]
>[ 24473.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18ba60] width 2880 pitch 11520 (/4 2880)
>[ 24474.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15d088]
>[ 24474.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15d088] width 2880 pitch 11520 (/4 2880)
>[ 24474.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0ab8]
>[ 24474.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0ab8] width 2880 pitch 11520 (/4 2880)
>[ 24474.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d43f48]
>[ 24474.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d43f48] width 2880 pitch 11520 (/4 2880)
>[ 24474.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18ba60]
>[ 24474.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18ba60] width 2880 pitch 11520 (/4 2880)
>[ 24474.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4c190]
>[ 24474.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4c190] width 2880 pitch 11520 (/4 2880)
>[ 24474.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ccd8]
>[ 24475.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ccd8] width 2880 pitch 11520 (/4 2880)
>[ 24475.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4c190]
>[ 24475.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4c190] width 2880 pitch 11520 (/4 2880)
>[ 24475.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15d088]
>[ 24475.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15d088] width 2880 pitch 11520 (/4 2880)
>[ 24476.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15d088]
>[ 24477.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15d088] width 2880 pitch 11520 (/4 2880)
>[ 24477.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1815e8]
>[ 24477.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1815e8] width 2880 pitch 11520 (/4 2880)
>[ 24477.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1815e8]
>[ 24477.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1815e8] width 2880 pitch 11520 (/4 2880)
>[ 24477.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b990]
>[ 24477.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b990] width 2880 pitch 11520 (/4 2880)
>[ 24477.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3e910]
>[ 24477.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3e910] width 2880 pitch 11520 (/4 2880)
>[ 24477.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7b990]
>[ 24477.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7b990] width 2880 pitch 11520 (/4 2880)
>[ 24489.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60280]
>[ 24489.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60280] width 2880 pitch 11520 (/4 2880)
>[ 24489.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68790]
>[ 24489.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68790] width 2880 pitch 11520 (/4 2880)
>[ 24489.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b878]
>[ 24489.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b878] width 2880 pitch 11520 (/4 2880)
>[ 24489.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 24489.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 24489.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa047ff8]
>[ 24489.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa047ff8] width 2880 pitch 11520 (/4 2880)
>[ 24490.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9e80]
>[ 24490.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9e80] width 2880 pitch 11520 (/4 2880)
>[ 24490.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 24490.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 24490.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1aaf0]
>[ 24490.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1aaf0] width 2880 pitch 11520 (/4 2880)
>[ 24490.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288a0]
>[ 24490.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288a0] width 2880 pitch 11520 (/4 2880)
>[ 24491.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2638]
>[ 24491.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2638] width 2880 pitch 11520 (/4 2880)
>[ 24491.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f7c88]
>[ 24491.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f7c88] width 2880 pitch 11520 (/4 2880)
>[ 24491.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac038]
>[ 24491.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac038] width 2880 pitch 11520 (/4 2880)
>[ 24491.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f7c88]
>[ 24491.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f7c88] width 2880 pitch 11520 (/4 2880)
>[ 24491.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 24491.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 24491.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d143b0]
>[ 24491.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d143b0] width 2880 pitch 11520 (/4 2880)
>[ 24497.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d50688]
>[ 24497.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d50688] width 2880 pitch 11520 (/4 2880)
>[ 24499.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 24499.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 24500.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd1f8]
>[ 24501.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd1f8] width 2880 pitch 11520 (/4 2880)
>[ 24506.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1431e8]
>[ 24506.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1431e8] width 2880 pitch 11520 (/4 2880)
>[ 24506.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a198]
>[ 24506.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a198] width 2880 pitch 11520 (/4 2880)
>[ 24506.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1aaf0]
>[ 24506.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1aaf0] width 2880 pitch 11520 (/4 2880)
>[ 24506.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96268]
>[ 24506.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96268] width 2880 pitch 11520 (/4 2880)
>[ 24506.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97994e8]
>[ 24506.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97994e8] width 2880 pitch 11520 (/4 2880)
>[ 24508.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b878]
>[ 24508.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b878] width 2880 pitch 11520 (/4 2880)
>[ 24508.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aedf50]
>[ 24508.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aedf50] width 2880 pitch 11520 (/4 2880)
>[ 24509.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d143b0]
>[ 24509.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d143b0] width 2880 pitch 11520 (/4 2880)
>[ 24509.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24509.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24509.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24509.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24509.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9e80]
>[ 24509.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9e80] width 2880 pitch 11520 (/4 2880)
>[ 24509.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24509.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24509.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9e80]
>[ 24509.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9e80] width 2880 pitch 11520 (/4 2880)
>[ 24532.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d91b28]
>[ 24532.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d91b28] width 2880 pitch 11520 (/4 2880)
>[ 24532.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1196e0]
>[ 24533.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1196e0] width 2880 pitch 11520 (/4 2880)
>[ 24533.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176088]
>[ 24533.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176088] width 2880 pitch 11520 (/4 2880)
>[ 24533.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d7e0]
>[ 24533.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d7e0] width 2880 pitch 11520 (/4 2880)
>[ 24533.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1196e0]
>[ 24533.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1196e0] width 2880 pitch 11520 (/4 2880)
>[ 24533.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9e80]
>[ 24533.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9e80] width 2880 pitch 11520 (/4 2880)
>[ 24534.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09b660]
>[ 24534.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09b660] width 2880 pitch 11520 (/4 2880)
>[ 24534.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d81700]
>[ 24534.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d81700] width 2880 pitch 11520 (/4 2880)
>[ 24534.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24534.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24534.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a63670]
>[ 24534.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a63670] width 2880 pitch 11520 (/4 2880)
>[ 24551.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e850]
>[ 24551.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e850] width 2880 pitch 11520 (/4 2880)
>[ 24551.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984afa8]
>[ 24551.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984afa8] width 2880 pitch 11520 (/4 2880)
>[ 24551.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d7e0]
>[ 24551.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d7e0] width 2880 pitch 11520 (/4 2880)
>[ 24552.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24552.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24552.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24552.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24552.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d7e0]
>[ 24552.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d7e0] width 2880 pitch 11520 (/4 2880)
>[ 24552.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e850]
>[ 24552.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e850] width 2880 pitch 11520 (/4 2880)
>[ 24553.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d81700]
>[ 24553.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d81700] width 2880 pitch 11520 (/4 2880)
>[ 24554.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24554.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24554.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a63670]
>[ 24554.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a63670] width 2880 pitch 11520 (/4 2880)
>[ 24554.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24554.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24554.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac9e80]
>[ 24554.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac9e80] width 2880 pitch 11520 (/4 2880)
>[ 24554.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98010]
>[ 24554.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98010] width 2880 pitch 11520 (/4 2880)
>[ 24800.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24800.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24801.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2608]
>[ 24801.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2608] width 2880 pitch 11520 (/4 2880)
>[ 24801.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62540]
>[ 24801.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62540] width 2880 pitch 11520 (/4 2880)
>[ 24801.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9798a88]
>[ 24801.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9798a88] width 2880 pitch 11520 (/4 2880)
>[ 24802.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62540]
>[ 24802.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62540] width 2880 pitch 11520 (/4 2880)
>[ 24802.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb9cf0]
>[ 24802.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb9cf0] width 2880 pitch 11520 (/4 2880)
>[ 24802.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 24802.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 24803.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa095358]
>[ 24803.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa095358] width 2880 pitch 11520 (/4 2880)
>[ 24803.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62540]
>[ 24803.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62540] width 2880 pitch 11520 (/4 2880)
>[ 24803.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac3890]
>[ 24803.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac3890] width 2880 pitch 11520 (/4 2880)
>[ 24803.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb9cf0]
>[ 24803.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb9cf0] width 2880 pitch 11520 (/4 2880)
>[ 24803.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176088]
>[ 24803.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176088] width 2880 pitch 11520 (/4 2880)
>[ 24848.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24848.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24848.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 24848.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 24848.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0a0]
>[ 24848.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0a0] width 2880 pitch 11520 (/4 2880)
>[ 24848.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24848.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24848.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aacc10]
>[ 24848.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aacc10] width 2880 pitch 11520 (/4 2880)
>[ 24849.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2608]
>[ 24849.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2608] width 2880 pitch 11520 (/4 2880)
>[ 24849.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a817e0]
>[ 24849.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a817e0] width 2880 pitch 11520 (/4 2880)
>[ 24849.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac3890]
>[ 24849.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac3890] width 2880 pitch 11520 (/4 2880)
>[ 24849.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2608]
>[ 24849.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2608] width 2880 pitch 11520 (/4 2880)
>[ 24849.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 24849.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 24849.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac3890]
>[ 24849.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac3890] width 2880 pitch 11520 (/4 2880)
>[ 24864.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d40cd8]
>[ 24864.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d40cd8] width 2880 pitch 11520 (/4 2880)
>[ 24865.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 24865.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 24865.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 24865.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 24865.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 24865.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 24865.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24865.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24865.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 24866.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 24866.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24866.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24866.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 24866.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 24866.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0a0]
>[ 24866.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0a0] width 2880 pitch 11520 (/4 2880)
>[ 24867.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 24867.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 24867.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 24867.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 24867.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0a0]
>[ 24867.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0a0] width 2880 pitch 11520 (/4 2880)
>[ 24867.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 24867.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 24867.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 24867.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 24867.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 24867.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 24875.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a198]
>[ 24875.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a198] width 2880 pitch 11520 (/4 2880)
>[ 24878.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09b660]
>[ 24878.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09b660] width 2880 pitch 11520 (/4 2880)
>[ 24890.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a751e0]
>[ 24890.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a751e0] width 2880 pitch 11520 (/4 2880)
>[ 24897.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 24897.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 24897.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadc30]
>[ 24897.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadc30] width 2880 pitch 11520 (/4 2880)
>[ 24898.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fd1f8]
>[ 24898.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fd1f8] width 2880 pitch 11520 (/4 2880)
>[ 24898.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2638]
>[ 24898.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2638] width 2880 pitch 11520 (/4 2880)
>[ 24898.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d654c0]
>[ 24898.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d654c0] width 2880 pitch 11520 (/4 2880)
>[ 24898.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288a0]
>[ 24898.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288a0] width 2880 pitch 11520 (/4 2880)
>[ 24899.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96178]
>[ 24899.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96178] width 2880 pitch 11520 (/4 2880)
>[ 24899.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a198]
>[ 24899.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a198] width 2880 pitch 11520 (/4 2880)
>[ 24899.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24899.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24899.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 24899.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 24899.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a828]
>[ 24899.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a828] width 2880 pitch 11520 (/4 2880)
>[ 24899.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176088]
>[ 24899.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176088] width 2880 pitch 11520 (/4 2880)
>[ 24899.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80848]
>[ 24899.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80848] width 2880 pitch 11520 (/4 2880)
>[ 24902.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4f368]
>[ 24902.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4f368] width 2880 pitch 11520 (/4 2880)
>[ 24909.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a198]
>[ 24909.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a198] width 2880 pitch 11520 (/4 2880)
>[ 24939.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 24939.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 24946.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ab488]
>[ 24946.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ab488] width 2880 pitch 11520 (/4 2880)
>[ 24953.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1382f8]
>[ 24953.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1382f8] width 2880 pitch 11520 (/4 2880)
>[ 24954.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60280]
>[ 24954.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60280] width 2880 pitch 11520 (/4 2880)
>[ 24954.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8148]
>[ 24954.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8148] width 2880 pitch 11520 (/4 2880)
>[ 24954.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 24954.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 24954.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96268]
>[ 24954.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96268] width 2880 pitch 11520 (/4 2880)
>[ 24955.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[ 24955.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[ 24958.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60280]
>[ 24958.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60280] width 2880 pitch 11520 (/4 2880)
>[ 24958.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17ec58]
>[ 24958.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17ec58] width 2880 pitch 11520 (/4 2880)
>[ 24958.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d35430]
>[ 24959.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d35430] width 2880 pitch 11520 (/4 2880)
>[ 24959.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722580]
>[ 24959.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722580] width 2880 pitch 11520 (/4 2880)
>[ 24959.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 24959.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 24959.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 24959.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 25001.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2288a0]
>[ 25001.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2288a0] width 2880 pitch 11520 (/4 2880)
>[ 25016.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2638]
>[ 25016.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2638] width 2880 pitch 11520 (/4 2880)
>[ 25016.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2e00]
>[ 25016.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2e00] width 2880 pitch 11520 (/4 2880)
>[ 25016.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa047ff8]
>[ 25016.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa047ff8] width 2880 pitch 11520 (/4 2880)
>[ 25017.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 25017.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 25017.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d40cd8]
>[ 25017.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d40cd8] width 2880 pitch 11520 (/4 2880)
>[ 25017.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5c28]
>[ 25017.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5c28] width 2880 pitch 11520 (/4 2880)
>[ 25018.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08fee0]
>[ 25018.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08fee0] width 2880 pitch 11520 (/4 2880)
>[ 25019.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76ce0]
>[ 25019.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76ce0] width 2880 pitch 11520 (/4 2880)
>[ 25020.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138d20]
>[ 25021.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138d20] width 2880 pitch 11520 (/4 2880)
>[ 25021.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17ec58]
>[ 25021.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17ec58] width 2880 pitch 11520 (/4 2880)
>[ 25021.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 25021.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 25021.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25021.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25021.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25021.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25021.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25021.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25022.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25022.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25022.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 25022.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 25024.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25024.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25024.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25024.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25024.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25024.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25024.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25024.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25024.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25024.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25024.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25025.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25025.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 25025.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 25025.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 25025.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 25025.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25025.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25026.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 25026.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 25026.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25027.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25027.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 25027.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 25027.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25027.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25027.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25027.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25027.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25027.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25027.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25028.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25028.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25028.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25028.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec07a8]
>[ 25028.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec07a8] width 2880 pitch 11520 (/4 2880)
>[ 25043.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22c00]
>[ 25043.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22c00] width 2880 pitch 11520 (/4 2880)
>[ 25078.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4d9c8]
>[ 25078.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4d9c8] width 2880 pitch 11520 (/4 2880)
>[ 25135.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4d9c8]
>[ 25135.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4d9c8] width 2880 pitch 11520 (/4 2880)
>[ 25136.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25136.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25136.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25136.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25136.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25136.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25136.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25136.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25136.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25136.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25136.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3ea70]
>[ 25136.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3ea70] width 2880 pitch 11520 (/4 2880)
>[ 25136.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25136.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25137.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4d9c8]
>[ 25137.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4d9c8] width 2880 pitch 11520 (/4 2880)
>[ 25137.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25137.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25137.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4d9c8]
>[ 25137.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4d9c8] width 2880 pitch 11520 (/4 2880)
>[ 25137.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25137.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25137.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a85b8]
>[ 25137.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a85b8] width 2880 pitch 11520 (/4 2880)
>[ 25138.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2aa28]
>[ 25138.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2aa28] width 2880 pitch 11520 (/4 2880)
>[ 25138.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a85b8]
>[ 25138.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a85b8] width 2880 pitch 11520 (/4 2880)
>[ 25138.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2aa28]
>[ 25138.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2aa28] width 2880 pitch 11520 (/4 2880)
>[ 25138.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25138.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25142.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a85b8]
>[ 25142.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a85b8] width 2880 pitch 11520 (/4 2880)
>[ 25166.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25166.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25166.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25166.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25166.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25166.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25167.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25167.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25168.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25168.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25168.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25168.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25168.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25168.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25168.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25168.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25168.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25168.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25169.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25169.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25169.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25170.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25170.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25170.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25170.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25170.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25170.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25170.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25170.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e028]
>[ 25170.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e028] width 2880 pitch 11520 (/4 2880)
>[ 25173.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25173.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25176.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3ea70]
>[ 25176.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3ea70] width 2880 pitch 11520 (/4 2880)
>[ 25176.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25176.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25176.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3ea70]
>[ 25176.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3ea70] width 2880 pitch 11520 (/4 2880)
>[ 25176.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a168]
>[ 25176.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a168] width 2880 pitch 11520 (/4 2880)
>[ 25176.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0068]
>[ 25176.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0068] width 2880 pitch 11520 (/4 2880)
>[ 25176.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 25176.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 25176.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0068]
>[ 25176.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0068] width 2880 pitch 11520 (/4 2880)
>[ 25177.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25177.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25177.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a168]
>[ 25177.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a168] width 2880 pitch 11520 (/4 2880)
>[ 25177.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25177.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25178.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 25178.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 25178.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25178.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25178.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25178.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25178.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25178.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25178.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fee9f8]
>[ 25178.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fee9f8] width 2880 pitch 11520 (/4 2880)
>[ 25178.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 25179.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 25179.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 25179.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 25179.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 25179.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 25179.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 25179.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 25179.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d882f0]
>[ 25179.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d882f0] width 2880 pitch 11520 (/4 2880)
>[ 25189.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d458]
>[ 25189.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d458] width 2880 pitch 11520 (/4 2880)
>[ 25193.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 25193.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 25193.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80848]
>[ 25193.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80848] width 2880 pitch 11520 (/4 2880)
>[ 25193.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70568]
>[ 25193.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70568] width 2880 pitch 11520 (/4 2880)
>[ 25194.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[ 25194.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[ 25194.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fd718]
>[ 25194.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fd718] width 2880 pitch 11520 (/4 2880)
>[ 25195.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96178]
>[ 25195.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96178] width 2880 pitch 11520 (/4 2880)
>[ 25195.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176088]
>[ 25195.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176088] width 2880 pitch 11520 (/4 2880)
>[ 25195.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70568]
>[ 25195.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70568] width 2880 pitch 11520 (/4 2880)
>[ 25195.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[ 25195.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[ 25195.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2b2b8]
>[ 25195.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2b2b8] width 2880 pitch 11520 (/4 2880)
>[ 25197.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96178]
>[ 25197.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96178] width 2880 pitch 11520 (/4 2880)
>[ 25197.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25197.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25197.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073a08]
>[ 25198.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073a08] width 2880 pitch 11520 (/4 2880)
>[ 25198.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25198.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25198.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073a08]
>[ 25198.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073a08] width 2880 pitch 11520 (/4 2880)
>[ 25198.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25198.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25216.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25216.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25216.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25216.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25216.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51b78]
>[ 25216.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51b78] width 2880 pitch 11520 (/4 2880)
>[ 25216.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25216.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25216.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51b78]
>[ 25216.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51b78] width 2880 pitch 11520 (/4 2880)
>[ 25216.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 25216.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 25216.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25216.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25217.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25217.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25217.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25217.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25217.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 25217.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 25217.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25217.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25217.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073a08]
>[ 25217.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073a08] width 2880 pitch 11520 (/4 2880)
>[ 25218.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9620698]
>[ 25218.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9620698] width 2880 pitch 11520 (/4 2880)
>[ 25218.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25218.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25218.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33e10]
>[ 25218.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33e10] width 2880 pitch 11520 (/4 2880)
>[ 25218.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25219.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25219.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 25219.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 25219.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25219.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25219.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25219.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25262.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25262.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25262.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a168]
>[ 25262.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a168] width 2880 pitch 11520 (/4 2880)
>[ 25262.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25262.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25262.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 25262.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 25262.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25262.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25263.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25263.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25263.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 25263.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 25263.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 25263.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 25263.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 25263.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 25264.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa122bf0]
>[ 25264.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa122bf0] width 2880 pitch 11520 (/4 2880)
>[ 25264.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 25264.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 25268.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 25268.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 25268.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa122bf0]
>[ 25268.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa122bf0] width 2880 pitch 11520 (/4 2880)
>[ 25268.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 25268.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 25269.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a198]
>[ 25269.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a198] width 2880 pitch 11520 (/4 2880)
>[ 25270.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25270.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25270.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25270.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25271.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25271.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25271.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25271.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25271.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25271.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25342.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25342.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25342.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25342.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25342.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25342.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25342.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25342.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25342.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25342.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25342.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595e98]
>[ 25342.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595e98] width 2880 pitch 11520 (/4 2880)
>[ 25342.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4c388]
>[ 25342.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4c388] width 2880 pitch 11520 (/4 2880)
>[ 25342.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22f088]
>[ 25342.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22f088] width 2880 pitch 11520 (/4 2880)
>[ 25342.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25342.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25342.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d4c248]
>[ 25342.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d4c248] width 2880 pitch 11520 (/4 2880)
>[ 25342.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25342.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25342.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595e98]
>[ 25342.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595e98] width 2880 pitch 11520 (/4 2880)
>[ 25342.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a2f0]
>[ 25342.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a2f0] width 2880 pitch 11520 (/4 2880)
>[ 25342.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a7228]
>[ 25342.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a7228] width 2880 pitch 11520 (/4 2880)
>[ 25342.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea38f0]
>[ 25342.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea38f0] width 2880 pitch 11520 (/4 2880)
>[ 25343.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a7228]
>[ 25343.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a7228] width 2880 pitch 11520 (/4 2880)
>[ 25343.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2f0e0]
>[ 25343.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2f0e0] width 2880 pitch 11520 (/4 2880)
>[ 25343.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25343.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25343.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25343.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25343.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25343.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25343.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25343.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25344.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25344.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25344.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25344.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25344.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25344.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25344.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a2f0]
>[ 25344.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a2f0] width 2880 pitch 11520 (/4 2880)
>[ 25344.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2f0e0]
>[ 25344.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2f0e0] width 2880 pitch 11520 (/4 2880)
>[ 25344.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595e98]
>[ 25344.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595e98] width 2880 pitch 11520 (/4 2880)
>[ 25344.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4c388]
>[ 25344.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4c388] width 2880 pitch 11520 (/4 2880)
>[ 25345.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2f0e0]
>[ 25345.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2f0e0] width 2880 pitch 11520 (/4 2880)
>[ 25345.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2f0e0]
>[ 25345.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2f0e0] width 2880 pitch 11520 (/4 2880)
>[ 25345.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f27230]
>[ 25345.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f27230] width 2880 pitch 11520 (/4 2880)
>[ 25345.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25345.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25345.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9847690]
>[ 25345.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9847690] width 2880 pitch 11520 (/4 2880)
>[ 25388.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9895f70]
>[ 25388.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9895f70] width 2880 pitch 11520 (/4 2880)
>[ 25392.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c46820]
>[ 25392.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c46820] width 2880 pitch 11520 (/4 2880)
>[ 25392.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25392.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25392.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25392.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25392.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25392.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25392.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25393.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25393.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25393.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25393.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25393.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25394.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7788]
>[ 25394.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7788] width 2880 pitch 11520 (/4 2880)
>[ 25394.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 25394.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 25394.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 25394.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 25394.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a168]
>[ 25394.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a168] width 2880 pitch 11520 (/4 2880)
>[ 25394.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 25394.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 25731.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f8148]
>[ 25731.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f8148] width 2880 pitch 11520 (/4 2880)
>[ 25810.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd8688]
>[ 25810.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd8688] width 2880 pitch 11520 (/4 2880)
>[ 25810.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa8740]
>[ 25810.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa8740] width 2880 pitch 11520 (/4 2880)
>[ 25810.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd8688]
>[ 25811.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd8688] width 2880 pitch 11520 (/4 2880)
>[ 25811.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa8740]
>[ 25811.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa8740] width 2880 pitch 11520 (/4 2880)
>[ 25811.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd8688]
>[ 25811.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd8688] width 2880 pitch 11520 (/4 2880)
>[ 25811.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57110]
>[ 25811.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57110] width 2880 pitch 11520 (/4 2880)
>[ 25811.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25811.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25812.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25812.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25812.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25812.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25812.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25812.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25812.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25812.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25812.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25812.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25812.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f8118]
>[ 25812.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f8118] width 2880 pitch 11520 (/4 2880)
>[ 25952.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9639020]
>[ 25952.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9639020] width 2880 pitch 11520 (/4 2880)
>[ 25952.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25952.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25952.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25952.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25952.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25952.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25952.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25952.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25952.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25952.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25952.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25953.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25953.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25953.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25953.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25953.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25953.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98961c8]
>[ 25953.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98961c8] width 2880 pitch 11520 (/4 2880)
>[ 25953.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071d10]
>[ 25953.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071d10] width 2880 pitch 11520 (/4 2880)
>[ 25953.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952d6f0]
>[ 25953.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952d6f0] width 2880 pitch 11520 (/4 2880)
>[ 25953.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa83c0]
>[ 25953.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa83c0] width 2880 pitch 11520 (/4 2880)
>[ 25954.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a07fd8]
>[ 25954.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a07fd8] width 2880 pitch 11520 (/4 2880)
>[ 25966.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9566b10]
>[ 25966.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9566b10] width 2880 pitch 11520 (/4 2880)
>[ 25985.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e80d8]
>[ 25985.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e80d8] width 2880 pitch 11520 (/4 2880)
>[ 26027.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaa9d8]
>[ 26027.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaa9d8] width 2880 pitch 11520 (/4 2880)
>[ 26201.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38028]
>[ 26201.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38028] width 2880 pitch 11520 (/4 2880)
>[ 26271.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2bde8]
>[ 26271.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2bde8] width 2880 pitch 11520 (/4 2880)
>[ 26271.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d629e0]
>[ 26271.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d629e0] width 2880 pitch 11520 (/4 2880)
>[ 26273.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa124e68]
>[ 26273.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa124e68] width 2880 pitch 11520 (/4 2880)
>[ 26280.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad06e0]
>[ 26280.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad06e0] width 2880 pitch 11520 (/4 2880)
>[ 26280.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad06e0]
>[ 26280.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad06e0] width 2880 pitch 11520 (/4 2880)
>[ 26282.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979998]
>[ 26282.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979998] width 2880 pitch 11520 (/4 2880)
>[ 26577.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26577.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26577.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 26577.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 26577.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 26577.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 26578.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecf360]
>[ 26578.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecf360] width 2880 pitch 11520 (/4 2880)
>[ 26578.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa100650]
>[ 26578.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa100650] width 2880 pitch 11520 (/4 2880)
>[ 26578.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecf360]
>[ 26578.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecf360] width 2880 pitch 11520 (/4 2880)
>[ 26578.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa100650]
>[ 26578.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa100650] width 2880 pitch 11520 (/4 2880)
>[ 26578.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138038]
>[ 26578.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138038] width 2880 pitch 11520 (/4 2880)
>[ 26578.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa100650]
>[ 26578.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa100650] width 2880 pitch 11520 (/4 2880)
>[ 26578.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26578.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26579.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138038]
>[ 26579.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138038] width 2880 pitch 11520 (/4 2880)
>[ 26579.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26579.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26579.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138038]
>[ 26579.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138038] width 2880 pitch 11520 (/4 2880)
>[ 26579.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 26579.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 26579.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138038]
>[ 26579.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138038] width 2880 pitch 11520 (/4 2880)
>[ 26579.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 26579.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 26579.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 26579.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 26579.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 26579.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 26579.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c3e0]
>[ 26579.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c3e0] width 2880 pitch 11520 (/4 2880)
>[ 26777.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 26777.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 26777.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26777.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26777.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 26777.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 26777.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26777.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26777.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07e8d0]
>[ 26777.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07e8d0] width 2880 pitch 11520 (/4 2880)
>[ 26777.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c3e0]
>[ 26777.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c3e0] width 2880 pitch 11520 (/4 2880)
>[ 26777.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 26777.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 26777.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26777.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26777.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 26777.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 26777.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26777.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26777.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 26777.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 26777.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26777.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26777.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 26777.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 26777.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26777.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26777.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b688d0]
>[ 26777.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b688d0] width 2880 pitch 11520 (/4 2880)
>[ 26778.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26778.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26778.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 26778.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 26779.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26779.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26779.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 26779.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 26779.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26779.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26779.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980fa10]
>[ 26779.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980fa10] width 2880 pitch 11520 (/4 2880)
>[ 26779.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0068]
>[ 26780.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0068] width 2880 pitch 11520 (/4 2880)
>[ 26780.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26780.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26780.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0068]
>[ 26780.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0068] width 2880 pitch 11520 (/4 2880)
>[ 26780.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26780.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26780.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa175210]
>[ 26781.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa175210] width 2880 pitch 11520 (/4 2880)
>[ 26781.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 26781.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 26781.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0725d8]
>[ 26781.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0725d8] width 2880 pitch 11520 (/4 2880)
>[ 26781.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72bf8]
>[ 26781.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72bf8] width 2880 pitch 11520 (/4 2880)
>[ 26781.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 26781.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 26781.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0472c8]
>[ 26781.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0472c8] width 2880 pitch 11520 (/4 2880)
>[ 26789.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26789.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26794.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26794.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26794.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26794.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26794.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26794.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26794.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ce920]
>[ 26794.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ce920] width 2880 pitch 11520 (/4 2880)
>[ 26809.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4ebd0]
>[ 26809.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4ebd0] width 2880 pitch 11520 (/4 2880)
>[ 26809.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193138]
>[ 26809.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193138] width 2880 pitch 11520 (/4 2880)
>[ 26809.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0895f0]
>[ 26809.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0895f0] width 2880 pitch 11520 (/4 2880)
>[ 26809.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa193138]
>[ 26809.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa193138] width 2880 pitch 11520 (/4 2880)
>[ 26810.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e751c0]
>[ 26810.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e751c0] width 2880 pitch 11520 (/4 2880)
>[ 26810.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 26810.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 26811.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977990]
>[ 26811.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977990] width 2880 pitch 11520 (/4 2880)
>[ 26811.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 26811.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 26811.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12e800]
>[ 26811.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12e800] width 2880 pitch 11520 (/4 2880)
>[ 26811.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fde8]
>[ 26811.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fde8] width 2880 pitch 11520 (/4 2880)
>[ 26811.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12e800]
>[ 26811.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12e800] width 2880 pitch 11520 (/4 2880)
>[ 26811.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fde8]
>[ 26811.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fde8] width 2880 pitch 11520 (/4 2880)
>[ 26811.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12e800]
>[ 26811.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12e800] width 2880 pitch 11520 (/4 2880)
>[ 26811.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fde8]
>[ 26811.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fde8] width 2880 pitch 11520 (/4 2880)
>[ 26822.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f8178]
>[ 26822.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f8178] width 2880 pitch 11520 (/4 2880)
>[ 26822.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1c6c8]
>[ 26822.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1c6c8] width 2880 pitch 11520 (/4 2880)
>[ 26822.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12f048]
>[ 26822.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12f048] width 2880 pitch 11520 (/4 2880)
>[ 26822.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12e800]
>[ 26822.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12e800] width 2880 pitch 11520 (/4 2880)
>[ 26823.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12f048]
>[ 26823.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12f048] width 2880 pitch 11520 (/4 2880)
>[ 26824.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b57c70]
>[ 26824.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b57c70] width 2880 pitch 11520 (/4 2880)
>[ 26824.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b43d90]
>[ 26824.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b43d90] width 2880 pitch 11520 (/4 2880)
>[ 26824.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b57c70]
>[ 26824.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b57c70] width 2880 pitch 11520 (/4 2880)
>[ 26824.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b43d90]
>[ 26824.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b43d90] width 2880 pitch 11520 (/4 2880)
>[ 26824.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b57c70]
>[ 26824.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b57c70] width 2880 pitch 11520 (/4 2880)
>[ 26824.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e751c0]
>[ 26824.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e751c0] width 2880 pitch 11520 (/4 2880)
>[ 26887.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c868]
>[ 26887.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c868] width 2880 pitch 11520 (/4 2880)
>[ 26895.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd4bd8]
>[ 26895.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd4bd8] width 2880 pitch 11520 (/4 2880)
>[ 26901.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d118b8]
>[ 26901.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d118b8] width 2880 pitch 11520 (/4 2880)
>[ 26903.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aad7e0]
>[ 26903.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aad7e0] width 2880 pitch 11520 (/4 2880)
>[ 26995.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03e0b0]
>[ 26995.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03e0b0] width 2880 pitch 11520 (/4 2880)
>[ 27113.732] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 27113.732] (II) RADEON(0): Using hsync ranges from config file
>[ 27113.732] (II) RADEON(0): Using vrefresh ranges from config file
>[ 27113.732] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27113.732] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 27113.732] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 27113.732] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 27113.733] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 27802.738] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27802.750] (II) RADEON(0): RADEONSaveScreen(0)
>[ 35841.611] (II) RADEON(0): RADEONSaveScreen(1)
>[ 36531.699] (II) RADEON(0): RADEONSaveScreen(2)
>[ 36531.699] (II) RADEON(0): RADEONSaveScreen(0)
>[ 44907.696] (II) RADEON(0): RADEONSaveScreen(1)
>[ 45907.695] (II) RADEON(0): RADEONSaveScreen(2)
>[ 45907.695] (II) RADEON(0): RADEONSaveScreen(0)
>[ 62825.588] (II) RADEON(0): RADEONSaveScreen(1)
>[ 62922.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9bb78]
>[ 62922.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9bb78] width 2880 pitch 11520 (/4 2880)
>[ 63515.683] (II) RADEON(0): RADEONSaveScreen(2)
>[ 63515.683] (II) RADEON(0): RADEONSaveScreen(0)
>[ 68253.293] (II) RADEON(0): RADEONSaveScreen(1)
>[ 68943.692] (II) RADEON(0): RADEONSaveScreen(2)
>[ 68943.692] (II) RADEON(0): RADEONSaveScreen(0)
>[ 74573.802] (II) RADEON(0): RADEONSaveScreen(1)
>[ 74593.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fec08]
>[ 74593.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fec08] width 2880 pitch 11520 (/4 2880)
>[ 74594.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b408]
>[ 74594.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b408] width 2880 pitch 11520 (/4 2880)
>[ 74595.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92310]
>[ 74595.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92310] width 2880 pitch 11520 (/4 2880)
>[ 74595.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723038]
>[ 74595.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723038] width 2880 pitch 11520 (/4 2880)
>[ 74595.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76af0]
>[ 74595.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76af0] width 2880 pitch 11520 (/4 2880)
>[ 74596.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950e808]
>[ 74596.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950e808] width 2880 pitch 11520 (/4 2880)
>[ 74596.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950e808]
>[ 74596.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950e808] width 2880 pitch 11520 (/4 2880)
>[ 74596.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74596.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74596.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74596.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74596.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74596.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74597.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950e808]
>[ 74597.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950e808] width 2880 pitch 11520 (/4 2880)
>[ 74598.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041110]
>[ 74598.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041110] width 2880 pitch 11520 (/4 2880)
>[ 74598.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b8c0]
>[ 74598.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b8c0] width 2880 pitch 11520 (/4 2880)
>[ 74598.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76af0]
>[ 74598.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76af0] width 2880 pitch 11520 (/4 2880)
>[ 74598.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7000]
>[ 74598.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7000] width 2880 pitch 11520 (/4 2880)
>[ 74598.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fec08]
>[ 74598.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fec08] width 2880 pitch 11520 (/4 2880)
>[ 74598.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2238]
>[ 74598.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2238] width 2880 pitch 11520 (/4 2880)
>[ 74598.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723038]
>[ 74598.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723038] width 2880 pitch 11520 (/4 2880)
>[ 74598.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1511b8]
>[ 74598.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1511b8] width 2880 pitch 11520 (/4 2880)
>[ 74598.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df99e0]
>[ 74598.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df99e0] width 2880 pitch 11520 (/4 2880)
>[ 74598.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613510]
>[ 74598.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613510] width 2880 pitch 11520 (/4 2880)
>[ 74598.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa151040]
>[ 74598.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa151040] width 2880 pitch 11520 (/4 2880)
>[ 74598.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3b408]
>[ 74598.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3b408] width 2880 pitch 11520 (/4 2880)
>[ 74598.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56748]
>[ 74598.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56748] width 2880 pitch 11520 (/4 2880)
>[ 74598.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92310]
>[ 74598.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92310] width 2880 pitch 11520 (/4 2880)
>[ 74598.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74598.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74598.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74598.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74598.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74599.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74599.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74599.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74599.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74599.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74599.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cef08]
>[ 74599.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cef08] width 2880 pitch 11520 (/4 2880)
>[ 74599.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5fd8]
>[ 74599.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5fd8] width 2880 pitch 11520 (/4 2880)
>[ 74640.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725e78]
>[ 74641.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725e78] width 2880 pitch 11520 (/4 2880)
>[ 74641.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76af0]
>[ 74641.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76af0] width 2880 pitch 11520 (/4 2880)
>[ 74641.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704a10]
>[ 74641.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704a10] width 2880 pitch 11520 (/4 2880)
>[ 74641.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa151040]
>[ 74641.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa151040] width 2880 pitch 11520 (/4 2880)
>[ 74641.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a4be48]
>[ 74641.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a4be48] width 2880 pitch 11520 (/4 2880)
>[ 74641.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7000]
>[ 74641.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7000] width 2880 pitch 11520 (/4 2880)
>[ 74641.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950e808]
>[ 74641.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950e808] width 2880 pitch 11520 (/4 2880)
>[ 74645.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d422d8]
>[ 74645.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d422d8] width 2880 pitch 11520 (/4 2880)
>[ 74645.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56798]
>[ 74645.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56798] width 2880 pitch 11520 (/4 2880)
>[ 74645.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7ab78]
>[ 74645.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7ab78] width 2880 pitch 11520 (/4 2880)
>[ 74645.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92578]
>[ 74645.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92578] width 2880 pitch 11520 (/4 2880)
>[ 74645.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d422d8]
>[ 74645.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d422d8] width 2880 pitch 11520 (/4 2880)
>[ 74645.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76af0]
>[ 74645.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76af0] width 2880 pitch 11520 (/4 2880)
>[ 74645.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d290]
>[ 74645.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d290] width 2880 pitch 11520 (/4 2880)
>[ 74645.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725e78]
>[ 74645.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725e78] width 2880 pitch 11520 (/4 2880)
>[ 74645.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7000]
>[ 74645.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7000] width 2880 pitch 11520 (/4 2880)
>[ 74645.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92578]
>[ 74645.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92578] width 2880 pitch 11520 (/4 2880)
>[ 74645.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d290]
>[ 74645.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d290] width 2880 pitch 11520 (/4 2880)
>[ 74645.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76af0]
>[ 74645.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76af0] width 2880 pitch 11520 (/4 2880)
>[ 74645.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d422d8]
>[ 74645.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d422d8] width 2880 pitch 11520 (/4 2880)
>[ 74646.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0570]
>[ 74646.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0570] width 2880 pitch 11520 (/4 2880)
>[ 74646.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd7c60]
>[ 74646.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd7c60] width 2880 pitch 11520 (/4 2880)
>[ 74646.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d290]
>[ 74646.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d290] width 2880 pitch 11520 (/4 2880)
>[ 74646.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab86b8]
>[ 74646.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab86b8] width 2880 pitch 11520 (/4 2880)
>[ 74646.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7000]
>[ 74646.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7000] width 2880 pitch 11520 (/4 2880)
>[ 74646.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56798]
>[ 74646.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56798] width 2880 pitch 11520 (/4 2880)
>[ 74646.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d290]
>[ 74646.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d290] width 2880 pitch 11520 (/4 2880)
>[ 74647.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d35568]
>[ 74647.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d35568] width 2880 pitch 11520 (/4 2880)
>[ 74655.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e818]
>[ 74655.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e818] width 2880 pitch 11520 (/4 2880)
>[ 74655.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 74655.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 74655.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80848]
>[ 74655.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80848] width 2880 pitch 11520 (/4 2880)
>[ 74655.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96178]
>[ 74655.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96178] width 2880 pitch 11520 (/4 2880)
>[ 74655.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fd718]
>[ 74655.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fd718] width 2880 pitch 11520 (/4 2880)
>[ 74655.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 74655.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 74655.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74655.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74655.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6bb0]
>[ 74655.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6bb0] width 2880 pitch 11520 (/4 2880)
>[ 74655.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1826c8]
>[ 74655.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1826c8] width 2880 pitch 11520 (/4 2880)
>[ 74655.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 74655.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 74655.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74655.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74655.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6bb0]
>[ 74655.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6bb0] width 2880 pitch 11520 (/4 2880)
>[ 74655.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74655.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74655.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6bb0]
>[ 74655.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6bb0] width 2880 pitch 11520 (/4 2880)
>[ 74655.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74655.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74655.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6bb0]
>[ 74655.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6bb0] width 2880 pitch 11520 (/4 2880)
>[ 74655.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a635e0]
>[ 74655.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a635e0] width 2880 pitch 11520 (/4 2880)
>[ 74655.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5c60]
>[ 74655.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5c60] width 2880 pitch 11520 (/4 2880)
>[ 74655.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[ 74655.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[ 74675.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74675.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74687.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74687.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74687.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fd718]
>[ 74688.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fd718] width 2880 pitch 11520 (/4 2880)
>[ 74688.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d35568]
>[ 74688.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d35568] width 2880 pitch 11520 (/4 2880)
>[ 74688.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96178]
>[ 74689.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96178] width 2880 pitch 11520 (/4 2880)
>[ 74689.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d35568]
>[ 74689.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d35568] width 2880 pitch 11520 (/4 2880)
>[ 74689.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74689.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74689.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80848]
>[ 74689.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80848] width 2880 pitch 11520 (/4 2880)
>[ 74689.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944cea8]
>[ 74689.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944cea8] width 2880 pitch 11520 (/4 2880)
>[ 74689.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80848]
>[ 74690.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80848] width 2880 pitch 11520 (/4 2880)
>[ 74690.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70568]
>[ 74690.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70568] width 2880 pitch 11520 (/4 2880)
>[ 74691.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2d0a0]
>[ 74691.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2d0a0] width 2880 pitch 11520 (/4 2880)
>[ 74691.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70568]
>[ 74691.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70568] width 2880 pitch 11520 (/4 2880)
>[ 74691.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1826c8]
>[ 74691.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1826c8] width 2880 pitch 11520 (/4 2880)
>[ 74691.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70568]
>[ 74691.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70568] width 2880 pitch 11520 (/4 2880)
>[ 74691.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8860]
>[ 74691.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8860] width 2880 pitch 11520 (/4 2880)
>[ 74692.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa226160]
>[ 74692.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa226160] width 2880 pitch 11520 (/4 2880)
>[ 74692.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 74692.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 74692.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa194e18]
>[ 74692.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa194e18] width 2880 pitch 11520 (/4 2880)
>[ 74692.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035290]
>[ 74692.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035290] width 2880 pitch 11520 (/4 2880)
>[ 74692.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 74692.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 74700.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 74700.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 74700.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3c100]
>[ 74700.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3c100] width 2880 pitch 11520 (/4 2880)
>[ 74700.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a1ca0]
>[ 74700.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a1ca0] width 2880 pitch 11520 (/4 2880)
>[ 74700.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035290]
>[ 74700.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035290] width 2880 pitch 11520 (/4 2880)
>[ 74700.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04ae98]
>[ 74700.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04ae98] width 2880 pitch 11520 (/4 2880)
>[ 74700.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1753c0]
>[ 74700.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1753c0] width 2880 pitch 11520 (/4 2880)
>[ 74700.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2840]
>[ 74700.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2840] width 2880 pitch 11520 (/4 2880)
>[ 74703.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74703.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74703.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a678]
>[ 74703.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a678] width 2880 pitch 11520 (/4 2880)
>[ 74703.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c879d8]
>[ 74703.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c879d8] width 2880 pitch 11520 (/4 2880)
>[ 74703.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 74703.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 74703.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74703.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74703.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 74703.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 74703.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74703.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74703.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 74703.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 74703.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74703.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74703.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0b70]
>[ 74703.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0b70] width 2880 pitch 11520 (/4 2880)
>[ 74703.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6180]
>[ 74703.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6180] width 2880 pitch 11520 (/4 2880)
>[ 74726.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c3350]
>[ 74726.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c3350] width 2880 pitch 11520 (/4 2880)
>[ 74729.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba3e28]
>[ 74729.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba3e28] width 2880 pitch 11520 (/4 2880)
>[ 74730.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32bf0]
>[ 74730.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32bf0] width 2880 pitch 11520 (/4 2880)
>[ 74731.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caa318]
>[ 74731.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caa318] width 2880 pitch 11520 (/4 2880)
>[ 74745.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45f40]
>[ 74745.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45f40] width 2880 pitch 11520 (/4 2880)
>[ 74748.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74748.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74748.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[ 74748.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[ 74748.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74748.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74748.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[ 74748.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[ 74748.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74748.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74748.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74748.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74748.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74748.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74748.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[ 74748.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[ 74748.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74748.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74748.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d33210]
>[ 74749.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d33210] width 2880 pitch 11520 (/4 2880)
>[ 74749.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74749.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74749.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74749.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74749.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74750.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[ 74750.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[ 74750.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae960]
>[ 74750.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae960] width 2880 pitch 11520 (/4 2880)
>[ 74750.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74750.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df97e8]
>[ 74750.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df97e8] width 2880 pitch 11520 (/4 2880)
>[ 74750.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714d40]
>[ 74750.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714d40] width 2880 pitch 11520 (/4 2880)
>[ 74752.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f53d0]
>[ 74752.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f53d0] width 2880 pitch 11520 (/4 2880)
>[ 74752.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0ee60]
>[ 74752.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0ee60] width 2880 pitch 11520 (/4 2880)
>[ 74752.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef7a8]
>[ 74752.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef7a8] width 2880 pitch 11520 (/4 2880)
>[ 74752.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0ee60]
>[ 74752.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0ee60] width 2880 pitch 11520 (/4 2880)
>[ 74752.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9ba0]
>[ 74752.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9ba0] width 2880 pitch 11520 (/4 2880)
>[ 74752.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 74752.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 74752.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef7a8]
>[ 74752.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef7a8] width 2880 pitch 11520 (/4 2880)
>[ 74752.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0ee60]
>[ 74752.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0ee60] width 2880 pitch 11520 (/4 2880)
>[ 74752.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba54b8]
>[ 74752.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba54b8] width 2880 pitch 11520 (/4 2880)
>[ 74752.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9ba0]
>[ 74752.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9ba0] width 2880 pitch 11520 (/4 2880)
>[ 74752.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 74752.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 74752.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ef7a8]
>[ 74752.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ef7a8] width 2880 pitch 11520 (/4 2880)
>[ 74752.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0ee60]
>[ 74752.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0ee60] width 2880 pitch 11520 (/4 2880)
>[ 74753.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9732d68]
>[ 74753.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9732d68] width 2880 pitch 11520 (/4 2880)
>[ 74754.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45f70]
>[ 74754.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45f70] width 2880 pitch 11520 (/4 2880)
>[ 74754.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02e650]
>[ 74754.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02e650] width 2880 pitch 11520 (/4 2880)
>[ 74754.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975d908]
>[ 74754.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975d908] width 2880 pitch 11520 (/4 2880)
>[ 74754.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae170]
>[ 74754.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae170] width 2880 pitch 11520 (/4 2880)
>[ 74754.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536280]
>[ 74754.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536280] width 2880 pitch 11520 (/4 2880)
>[ 74754.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6c70]
>[ 74754.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6c70] width 2880 pitch 11520 (/4 2880)
>[ 74754.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58c50]
>[ 74755.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58c50] width 2880 pitch 11520 (/4 2880)
>[ 74755.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c398]
>[ 74755.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c398] width 2880 pitch 11520 (/4 2880)
>[ 74755.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536280]
>[ 74755.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536280] width 2880 pitch 11520 (/4 2880)
>[ 74755.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c578]
>[ 74755.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c578] width 2880 pitch 11520 (/4 2880)
>[ 74756.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74756.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a027b8]
>[ 74756.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a027b8] width 2880 pitch 11520 (/4 2880)
>[ 74756.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56660]
>[ 74756.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56660] width 2880 pitch 11520 (/4 2880)
>[ 74756.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74756.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74756.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74756.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74756.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 74756.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 74756.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 74756.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 74764.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fe20]
>[ 74764.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fe20] width 2880 pitch 11520 (/4 2880)
>[ 74764.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 74764.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 74764.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 74764.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 74768.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74768.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74769.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74769.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74769.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74769.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74770.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74770.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74770.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74770.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74770.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74770.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74770.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997aa98]
>[ 74770.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997aa98] width 2880 pitch 11520 (/4 2880)
>[ 74770.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74770.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74770.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997aa98]
>[ 74770.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997aa98] width 2880 pitch 11520 (/4 2880)
>[ 74770.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcff88]
>[ 74770.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcff88] width 2880 pitch 11520 (/4 2880)
>[ 74777.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997aa98]
>[ 74777.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997aa98] width 2880 pitch 11520 (/4 2880)
>[ 74785.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a7298]
>[ 74785.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a7298] width 2880 pitch 11520 (/4 2880)
>[ 74785.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd9630]
>[ 74785.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd9630] width 2880 pitch 11520 (/4 2880)
>[ 74785.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74785.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74785.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a4e8]
>[ 74785.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a4e8] width 2880 pitch 11520 (/4 2880)
>[ 74785.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74785.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74786.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a4e8]
>[ 74786.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a4e8] width 2880 pitch 11520 (/4 2880)
>[ 74786.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af73d8]
>[ 74786.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af73d8] width 2880 pitch 11520 (/4 2880)
>[ 74786.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979fbe0]
>[ 74786.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979fbe0] width 2880 pitch 11520 (/4 2880)
>[ 74786.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af73d8]
>[ 74786.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af73d8] width 2880 pitch 11520 (/4 2880)
>[ 74786.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979fbe0]
>[ 74786.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979fbe0] width 2880 pitch 11520 (/4 2880)
>[ 74786.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984378]
>[ 74786.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984378] width 2880 pitch 11520 (/4 2880)
>[ 74938.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20c8c0]
>[ 74938.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20c8c0] width 2880 pitch 11520 (/4 2880)
>[ 74938.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d79b8]
>[ 74938.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d79b8] width 2880 pitch 11520 (/4 2880)
>[ 74938.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20c8c0]
>[ 74938.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20c8c0] width 2880 pitch 11520 (/4 2880)
>[ 74938.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d79b8]
>[ 74938.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d79b8] width 2880 pitch 11520 (/4 2880)
>[ 74938.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20c8c0]
>[ 74938.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20c8c0] width 2880 pitch 11520 (/4 2880)
>[ 74939.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e90150]
>[ 74939.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e90150] width 2880 pitch 11520 (/4 2880)
>[ 74939.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c270]
>[ 74939.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c270] width 2880 pitch 11520 (/4 2880)
>[ 74939.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d79b8]
>[ 74939.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d79b8] width 2880 pitch 11520 (/4 2880)
>[ 74940.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c270]
>[ 74940.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c270] width 2880 pitch 11520 (/4 2880)
>[ 74940.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ac70]
>[ 74940.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ac70] width 2880 pitch 11520 (/4 2880)
>[ 74940.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969efb0]
>[ 74941.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969efb0] width 2880 pitch 11520 (/4 2880)
>[ 74941.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b8f8]
>[ 74941.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b8f8] width 2880 pitch 11520 (/4 2880)
>[ 74941.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74941.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74941.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5c070]
>[ 74941.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5c070] width 2880 pitch 11520 (/4 2880)
>[ 74941.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74941.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74944.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5c070]
>[ 74944.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5c070] width 2880 pitch 11520 (/4 2880)
>[ 74944.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a76ce0]
>[ 74944.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a76ce0] width 2880 pitch 11520 (/4 2880)
>[ 74945.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74945.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74945.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26178]
>[ 74945.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26178] width 2880 pitch 11520 (/4 2880)
>[ 74945.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74945.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74945.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26178]
>[ 74945.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26178] width 2880 pitch 11520 (/4 2880)
>[ 74945.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74945.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74945.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97994e8]
>[ 74945.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97994e8] width 2880 pitch 11520 (/4 2880)
>[ 74945.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 74945.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 74948.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74948.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74948.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97994e8]
>[ 74948.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97994e8] width 2880 pitch 11520 (/4 2880)
>[ 74948.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74948.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74948.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 74948.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 74948.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03f508]
>[ 74948.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03f508] width 2880 pitch 11520 (/4 2880)
>[ 74948.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 74948.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 74950.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aedf50]
>[ 74950.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aedf50] width 2880 pitch 11520 (/4 2880)
>[ 74950.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97994e8]
>[ 74950.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97994e8] width 2880 pitch 11520 (/4 2880)
>[ 74950.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97994e8]
>[ 74951.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97994e8] width 2880 pitch 11520 (/4 2880)
>[ 74951.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 74951.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 74951.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68790]
>[ 74951.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68790] width 2880 pitch 11520 (/4 2880)
>[ 74951.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96268]
>[ 74951.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96268] width 2880 pitch 11520 (/4 2880)
>[ 74952.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 74952.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 74953.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68790]
>[ 74953.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68790] width 2880 pitch 11520 (/4 2880)
>[ 74953.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722580]
>[ 74953.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722580] width 2880 pitch 11520 (/4 2880)
>[ 74955.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68790]
>[ 74955.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68790] width 2880 pitch 11520 (/4 2880)
>[ 74955.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aedf50]
>[ 74955.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aedf50] width 2880 pitch 11520 (/4 2880)
>[ 74956.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 74956.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 74958.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 74958.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 74958.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 74958.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 74959.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8908]
>[ 74959.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8908] width 2880 pitch 11520 (/4 2880)
>[ 74959.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aee818]
>[ 74959.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aee818] width 2880 pitch 11520 (/4 2880)
>[ 74959.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a73e8]
>[ 74959.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a73e8] width 2880 pitch 11520 (/4 2880)
>[ 74964.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70ff0]
>[ 74964.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70ff0] width 2880 pitch 11520 (/4 2880)
>[ 74964.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a73e8]
>[ 74964.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a73e8] width 2880 pitch 11520 (/4 2880)
>[ 74964.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b86e0]
>[ 74964.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b86e0] width 2880 pitch 11520 (/4 2880)
>[ 74964.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12b9e0]
>[ 74965.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12b9e0] width 2880 pitch 11520 (/4 2880)
>[ 74965.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a73e8]
>[ 74965.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a73e8] width 2880 pitch 11520 (/4 2880)
>[ 74966.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965c270]
>[ 74966.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965c270] width 2880 pitch 11520 (/4 2880)
>[ 74966.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7e858]
>[ 74967.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7e858] width 2880 pitch 11520 (/4 2880)
>[ 74967.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1edb0]
>[ 74967.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1edb0] width 2880 pitch 11520 (/4 2880)
>[ 74968.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975140]
>[ 74968.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975140] width 2880 pitch 11520 (/4 2880)
>[ 74968.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977e8e0]
>[ 74968.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977e8e0] width 2880 pitch 11520 (/4 2880)
>[ 74968.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af4d08]
>[ 74968.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af4d08] width 2880 pitch 11520 (/4 2880)
>[ 74969.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74969.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74969.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74969.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74969.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19e550]
>[ 74969.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19e550] width 2880 pitch 11520 (/4 2880)
>[ 74969.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7d648]
>[ 74969.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7d648] width 2880 pitch 11520 (/4 2880)
>[ 74970.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4150]
>[ 74970.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4150] width 2880 pitch 11520 (/4 2880)
>[ 74970.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1480]
>[ 74970.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1480] width 2880 pitch 11520 (/4 2880)
>[ 74970.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 74970.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 74970.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976d7a8]
>[ 74970.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976d7a8] width 2880 pitch 11520 (/4 2880)
>[ 74970.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4150]
>[ 74970.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4150] width 2880 pitch 11520 (/4 2880)
>[ 74976.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96afb88]
>[ 74976.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96afb88] width 2880 pitch 11520 (/4 2880)
>[ 75040.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786070]
>[ 75040.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786070] width 2880 pitch 11520 (/4 2880)
>[ 75040.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982240]
>[ 75040.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982240] width 2880 pitch 11520 (/4 2880)
>[ 75040.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c670]
>[ 75040.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c670] width 2880 pitch 11520 (/4 2880)
>[ 75040.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c670]
>[ 75040.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c670] width 2880 pitch 11520 (/4 2880)
>[ 75041.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa026e10]
>[ 75041.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa026e10] width 2880 pitch 11520 (/4 2880)
>[ 75041.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 75041.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 75041.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4da00]
>[ 75041.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4da00] width 2880 pitch 11520 (/4 2880)
>[ 75041.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982240]
>[ 75041.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982240] width 2880 pitch 11520 (/4 2880)
>[ 75042.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786070]
>[ 75042.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786070] width 2880 pitch 11520 (/4 2880)
>[ 75042.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 75042.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 75042.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833a30]
>[ 75042.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833a30] width 2880 pitch 11520 (/4 2880)
>[ 75042.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1eec0]
>[ 75043.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1eec0] width 2880 pitch 11520 (/4 2880)
>[ 75043.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97afbc0]
>[ 75043.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97afbc0] width 2880 pitch 11520 (/4 2880)
>[ 75043.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cde90]
>[ 75043.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cde90] width 2880 pitch 11520 (/4 2880)
>[ 75043.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d894f8]
>[ 75043.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d894f8] width 2880 pitch 11520 (/4 2880)
>[ 75044.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0868]
>[ 75044.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0868] width 2880 pitch 11520 (/4 2880)
>[ 75044.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973c1d8]
>[ 75044.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973c1d8] width 2880 pitch 11520 (/4 2880)
>[ 75044.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982240]
>[ 75044.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982240] width 2880 pitch 11520 (/4 2880)
>[ 75045.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833a30]
>[ 75045.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833a30] width 2880 pitch 11520 (/4 2880)
>[ 75046.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c550b0]
>[ 75046.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c550b0] width 2880 pitch 11520 (/4 2880)
>[ 75046.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98400c8]
>[ 75046.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98400c8] width 2880 pitch 11520 (/4 2880)
>[ 75046.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c670]
>[ 75046.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c670] width 2880 pitch 11520 (/4 2880)
>[ 75046.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0868]
>[ 75046.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0868] width 2880 pitch 11520 (/4 2880)
>[ 75046.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d894f8]
>[ 75046.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d894f8] width 2880 pitch 11520 (/4 2880)
>[ 75124.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb9138]
>[ 75124.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb9138] width 2880 pitch 11520 (/4 2880)
>[ 75125.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf63f8]
>[ 75125.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf63f8] width 2880 pitch 11520 (/4 2880)
>[ 75125.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75125.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75125.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75125.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75126.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a0790]
>[ 75126.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a0790] width 2880 pitch 11520 (/4 2880)
>[ 75134.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c77638]
>[ 75135.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c77638] width 2880 pitch 11520 (/4 2880)
>[ 75137.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75137.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75137.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a0790]
>[ 75137.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a0790] width 2880 pitch 11520 (/4 2880)
>[ 75138.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf63f8]
>[ 75138.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf63f8] width 2880 pitch 11520 (/4 2880)
>[ 75139.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a0790]
>[ 75139.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a0790] width 2880 pitch 11520 (/4 2880)
>[ 75139.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75139.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75140.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75140.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75140.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98330d8]
>[ 75140.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98330d8] width 2880 pitch 11520 (/4 2880)
>[ 75140.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8700]
>[ 75140.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8700] width 2880 pitch 11520 (/4 2880)
>[ 75140.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98330d8]
>[ 75140.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98330d8] width 2880 pitch 11520 (/4 2880)
>[ 75151.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe348]
>[ 75151.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe348] width 2880 pitch 11520 (/4 2880)
>[ 75182.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d91e60]
>[ 75182.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d91e60] width 2880 pitch 11520 (/4 2880)
>[ 75183.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52e10]
>[ 75183.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52e10] width 2880 pitch 11520 (/4 2880)
>[ 75183.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a5e60]
>[ 75183.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a5e60] width 2880 pitch 11520 (/4 2880)
>[ 75183.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a6060]
>[ 75183.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a6060] width 2880 pitch 11520 (/4 2880)
>[ 75184.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97127b0]
>[ 75185.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97127b0] width 2880 pitch 11520 (/4 2880)
>[ 75187.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdcc00]
>[ 75187.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdcc00] width 2880 pitch 11520 (/4 2880)
>[ 75187.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a6060]
>[ 75188.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a6060] width 2880 pitch 11520 (/4 2880)
>[ 75188.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 75188.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 75188.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9be0]
>[ 75188.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9be0] width 2880 pitch 11520 (/4 2880)
>[ 75188.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d91e60]
>[ 75188.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d91e60] width 2880 pitch 11520 (/4 2880)
>[ 75189.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9be0]
>[ 75189.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9be0] width 2880 pitch 11520 (/4 2880)
>[ 75189.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 75189.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 75190.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c164b8]
>[ 75190.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c164b8] width 2880 pitch 11520 (/4 2880)
>[ 75190.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af71f8]
>[ 75190.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af71f8] width 2880 pitch 11520 (/4 2880)
>[ 75190.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 75190.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 75190.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 75190.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 75190.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52e10]
>[ 75190.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52e10] width 2880 pitch 11520 (/4 2880)
>[ 75191.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a6060]
>[ 75191.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a6060] width 2880 pitch 11520 (/4 2880)
>[ 75191.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd94b0]
>[ 75191.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd94b0] width 2880 pitch 11520 (/4 2880)
>[ 75192.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6e2f8]
>[ 75192.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6e2f8] width 2880 pitch 11520 (/4 2880)
>[ 75192.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d54888]
>[ 75192.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d54888] width 2880 pitch 11520 (/4 2880)
>[ 75193.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 75193.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 75193.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52e10]
>[ 75193.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52e10] width 2880 pitch 11520 (/4 2880)
>[ 75194.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdcc00]
>[ 75194.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdcc00] width 2880 pitch 11520 (/4 2880)
>[ 75194.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 75194.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 75194.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649e98]
>[ 75194.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649e98] width 2880 pitch 11520 (/4 2880)
>[ 75194.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7c4e0]
>[ 75194.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7c4e0] width 2880 pitch 11520 (/4 2880)
>[ 75195.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9be0]
>[ 75195.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9be0] width 2880 pitch 11520 (/4 2880)
>[ 75195.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 75195.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 75195.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae920]
>[ 75195.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae920] width 2880 pitch 11520 (/4 2880)
>[ 75211.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75211.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75211.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75211.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75211.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75211.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75211.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75211.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75211.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75211.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75211.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75211.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75211.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75211.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75211.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75212.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd698]
>[ 75212.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd698] width 2880 pitch 11520 (/4 2880)
>[ 75212.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75212.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75212.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd698]
>[ 75212.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd698] width 2880 pitch 11520 (/4 2880)
>[ 75212.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75212.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75212.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75212.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75212.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028628]
>[ 75212.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028628] width 2880 pitch 11520 (/4 2880)
>[ 75212.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75212.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75213.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75213.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75213.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d37f0]
>[ 75213.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d37f0] width 2880 pitch 11520 (/4 2880)
>[ 75213.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d37f0]
>[ 75214.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d37f0] width 2880 pitch 11520 (/4 2880)
>[ 75214.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d37f0]
>[ 75214.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d37f0] width 2880 pitch 11520 (/4 2880)
>[ 75214.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d37f0]
>[ 75214.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d37f0] width 2880 pitch 11520 (/4 2880)
>[ 75214.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6668]
>[ 75214.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6668] width 2880 pitch 11520 (/4 2880)
>[ 75214.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e878]
>[ 75214.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e878] width 2880 pitch 11520 (/4 2880)
>[ 75214.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75214.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75214.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c410e8]
>[ 75214.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c410e8] width 2880 pitch 11520 (/4 2880)
>[ 75214.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75214.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75214.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75214.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75214.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e878]
>[ 75214.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e878] width 2880 pitch 11520 (/4 2880)
>[ 75215.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97233f8]
>[ 75215.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97233f8] width 2880 pitch 11520 (/4 2880)
>[ 75215.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75215.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75215.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e878]
>[ 75215.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e878] width 2880 pitch 11520 (/4 2880)
>[ 75215.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc9d8]
>[ 75215.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc9d8] width 2880 pitch 11520 (/4 2880)
>[ 75215.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75215.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75215.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75215.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75215.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723538]
>[ 75215.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723538] width 2880 pitch 11520 (/4 2880)
>[ 75215.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3ca0]
>[ 75215.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3ca0] width 2880 pitch 11520 (/4 2880)
>[ 75216.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723538]
>[ 75216.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723538] width 2880 pitch 11520 (/4 2880)
>[ 75216.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e878]
>[ 75216.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e878] width 2880 pitch 11520 (/4 2880)
>[ 75216.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97233f8]
>[ 75216.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97233f8] width 2880 pitch 11520 (/4 2880)
>[ 75216.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3ca0]
>[ 75216.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3ca0] width 2880 pitch 11520 (/4 2880)
>[ 75216.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97233f8]
>[ 75216.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97233f8] width 2880 pitch 11520 (/4 2880)
>[ 75216.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9723538]
>[ 75216.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9723538] width 2880 pitch 11520 (/4 2880)
>[ 75216.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae950]
>[ 75216.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae950] width 2880 pitch 11520 (/4 2880)
>[ 75216.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028588]
>[ 75216.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028588] width 2880 pitch 11520 (/4 2880)
>[ 75216.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc930]
>[ 75216.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc930] width 2880 pitch 11520 (/4 2880)
>[ 75216.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028588]
>[ 75216.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028588] width 2880 pitch 11520 (/4 2880)
>[ 75216.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e7c0]
>[ 75216.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e7c0] width 2880 pitch 11520 (/4 2880)
>[ 75216.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028588]
>[ 75216.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028588] width 2880 pitch 11520 (/4 2880)
>[ 75216.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e7c0]
>[ 75216.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e7c0] width 2880 pitch 11520 (/4 2880)
>[ 75216.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028588]
>[ 75216.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028588] width 2880 pitch 11520 (/4 2880)
>[ 75230.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781c08]
>[ 75230.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781c08] width 2880 pitch 11520 (/4 2880)
>[ 75230.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781c08]
>[ 75230.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781c08] width 2880 pitch 11520 (/4 2880)
>[ 75230.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75230.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75230.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781c08]
>[ 75230.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781c08] width 2880 pitch 11520 (/4 2880)
>[ 75230.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75230.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75231.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75231.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75231.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75231.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75231.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c538]
>[ 75231.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c538] width 2880 pitch 11520 (/4 2880)
>[ 75231.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75231.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75231.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781c08]
>[ 75231.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781c08] width 2880 pitch 11520 (/4 2880)
>[ 75231.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75231.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75231.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75231.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75232.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75232.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75232.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75232.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75232.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781c08]
>[ 75232.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781c08] width 2880 pitch 11520 (/4 2880)
>[ 75232.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c538]
>[ 75232.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c538] width 2880 pitch 11520 (/4 2880)
>[ 75232.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75232.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75233.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c538]
>[ 75233.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c538] width 2880 pitch 11520 (/4 2880)
>[ 75234.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c538]
>[ 75234.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c538] width 2880 pitch 11520 (/4 2880)
>[ 75234.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75234.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75235.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca66c8]
>[ 75235.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca66c8] width 2880 pitch 11520 (/4 2880)
>[ 75236.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977c538]
>[ 75236.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977c538] width 2880 pitch 11520 (/4 2880)
>[ 75236.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52e10]
>[ 75236.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52e10] width 2880 pitch 11520 (/4 2880)
>[ 75236.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2e98]
>[ 75236.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2e98] width 2880 pitch 11520 (/4 2880)
>[ 75236.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97127b0]
>[ 75236.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97127b0] width 2880 pitch 11520 (/4 2880)
>[ 75236.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 75236.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 75245.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 75245.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 75295.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa039a78]
>[ 75295.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa039a78] width 2880 pitch 11520 (/4 2880)
>[ 75312.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0286e0]
>[ 75312.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0286e0] width 2880 pitch 11520 (/4 2880)
>[ 75314.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd708]
>[ 75314.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd708] width 2880 pitch 11520 (/4 2880)
>[ 75318.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23e878]
>[ 75318.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23e878] width 2880 pitch 11520 (/4 2880)
>[ 75361.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75361.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75371.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4fa48]
>[ 75371.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4fa48] width 2880 pitch 11520 (/4 2880)
>[ 75380.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964b568]
>[ 75380.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964b568] width 2880 pitch 11520 (/4 2880)
>[ 75380.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979e788]
>[ 75380.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979e788] width 2880 pitch 11520 (/4 2880)
>[ 75380.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9649e98]
>[ 75380.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9649e98] width 2880 pitch 11520 (/4 2880)
>[ 75380.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca86e8]
>[ 75380.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca86e8] width 2880 pitch 11520 (/4 2880)
>[ 75402.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 75402.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 75427.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dcf8]
>[ 75427.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dcf8] width 2880 pitch 11520 (/4 2880)
>[ 75427.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0f58]
>[ 75427.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0f58] width 2880 pitch 11520 (/4 2880)
>[ 75427.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ba28]
>[ 75427.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ba28] width 2880 pitch 11520 (/4 2880)
>[ 75427.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3ebf0]
>[ 75427.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3ebf0] width 2880 pitch 11520 (/4 2880)
>[ 75427.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa078088]
>[ 75428.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa078088] width 2880 pitch 11520 (/4 2880)
>[ 75428.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ba28]
>[ 75428.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ba28] width 2880 pitch 11520 (/4 2880)
>[ 75428.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca4e40]
>[ 75428.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca4e40] width 2880 pitch 11520 (/4 2880)
>[ 75428.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a720d8]
>[ 75428.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a720d8] width 2880 pitch 11520 (/4 2880)
>[ 75428.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ba28]
>[ 75428.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ba28] width 2880 pitch 11520 (/4 2880)
>[ 75428.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dcf8]
>[ 75428.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dcf8] width 2880 pitch 11520 (/4 2880)
>[ 75428.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956ba28]
>[ 75428.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956ba28] width 2880 pitch 11520 (/4 2880)
>[ 75428.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75428.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75428.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0f58]
>[ 75428.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0f58] width 2880 pitch 11520 (/4 2880)
>[ 75429.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75429.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75430.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75430.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75430.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75430.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75430.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a720d8]
>[ 75430.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a720d8] width 2880 pitch 11520 (/4 2880)
>[ 75430.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75430.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75430.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a720d8]
>[ 75430.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a720d8] width 2880 pitch 11520 (/4 2880)
>[ 75431.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75431.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75431.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75431.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75431.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75431.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75431.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75431.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75431.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75431.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75431.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75431.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75431.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75431.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75431.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75431.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75431.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75431.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75431.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75431.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75431.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75431.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75432.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75432.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75432.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75432.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75432.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75432.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75432.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75432.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75432.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75432.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75432.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75432.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75432.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75432.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75432.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75432.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75433.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75433.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75433.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75433.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75433.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75433.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a720d8]
>[ 75433.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a720d8] width 2880 pitch 11520 (/4 2880)
>[ 75433.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 75433.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 75433.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a720d8]
>[ 75433.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a720d8] width 2880 pitch 11520 (/4 2880)
>[ 75433.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75433.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75433.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75433.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75434.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75434.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75434.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75434.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75434.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75434.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75434.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 75434.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 75434.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75434.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75434.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75434.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75434.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f590e0]
>[ 75434.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f590e0] width 2880 pitch 11520 (/4 2880)
>[ 75434.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75434.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75434.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75434.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75434.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ad28]
>[ 75434.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ad28] width 2880 pitch 11520 (/4 2880)
>[ 75434.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75434.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75438.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 75438.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 75482.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8ca8]
>[ 75482.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8ca8] width 2880 pitch 11520 (/4 2880)
>[ 75485.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c55280]
>[ 75485.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c55280] width 2880 pitch 11520 (/4 2880)
>[ 75485.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a80ae0]
>[ 75485.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a80ae0] width 2880 pitch 11520 (/4 2880)
>[ 75485.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33328]
>[ 75485.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33328] width 2880 pitch 11520 (/4 2880)
>[ 75485.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75485.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75485.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc970]
>[ 75485.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc970] width 2880 pitch 11520 (/4 2880)
>[ 75485.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75485.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75485.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75486.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75486.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33328]
>[ 75486.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33328] width 2880 pitch 11520 (/4 2880)
>[ 75486.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75486.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75486.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33328]
>[ 75486.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33328] width 2880 pitch 11520 (/4 2880)
>[ 75486.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75486.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75486.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b33328]
>[ 75486.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b33328] width 2880 pitch 11520 (/4 2880)
>[ 75486.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc970]
>[ 75486.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc970] width 2880 pitch 11520 (/4 2880)
>[ 75517.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75517.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75517.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c388]
>[ 75517.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c388] width 2880 pitch 11520 (/4 2880)
>[ 75517.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae0a0]
>[ 75517.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae0a0] width 2880 pitch 11520 (/4 2880)
>[ 75517.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c388]
>[ 75517.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c388] width 2880 pitch 11520 (/4 2880)
>[ 75517.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae0a0]
>[ 75517.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae0a0] width 2880 pitch 11520 (/4 2880)
>[ 75517.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76860]
>[ 75517.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76860] width 2880 pitch 11520 (/4 2880)
>[ 75517.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae0a0]
>[ 75517.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae0a0] width 2880 pitch 11520 (/4 2880)
>[ 75517.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75517.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75517.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae0a0]
>[ 75517.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae0a0] width 2880 pitch 11520 (/4 2880)
>[ 75517.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75517.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75517.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae0a0]
>[ 75517.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae0a0] width 2880 pitch 11520 (/4 2880)
>[ 75517.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75517.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75517.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75517.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75517.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75517.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75539.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76860]
>[ 75539.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76860] width 2880 pitch 11520 (/4 2880)
>[ 75547.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dd20]
>[ 75547.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dd20] width 2880 pitch 11520 (/4 2880)
>[ 75558.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[ 75558.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[ 75565.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[ 75565.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[ 75591.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225e90]
>[ 75591.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225e90] width 2880 pitch 11520 (/4 2880)
>[ 75591.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1cf78]
>[ 75591.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1cf78] width 2880 pitch 11520 (/4 2880)
>[ 75592.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494c0]
>[ 75592.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494c0] width 2880 pitch 11520 (/4 2880)
>[ 75592.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1cf78]
>[ 75592.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1cf78] width 2880 pitch 11520 (/4 2880)
>[ 75592.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75592.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75592.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225e90]
>[ 75592.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225e90] width 2880 pitch 11520 (/4 2880)
>[ 75592.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab75d0]
>[ 75592.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab75d0] width 2880 pitch 11520 (/4 2880)
>[ 75592.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494c0]
>[ 75592.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494c0] width 2880 pitch 11520 (/4 2880)
>[ 75592.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75592.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75592.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225e90]
>[ 75593.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225e90] width 2880 pitch 11520 (/4 2880)
>[ 75593.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494c0]
>[ 75593.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494c0] width 2880 pitch 11520 (/4 2880)
>[ 75593.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75593.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75593.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99514c8]
>[ 75593.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99514c8] width 2880 pitch 11520 (/4 2880)
>[ 75594.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38fd0]
>[ 75594.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38fd0] width 2880 pitch 11520 (/4 2880)
>[ 75594.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 75594.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 75594.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 75594.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 75594.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75594.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75599.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75599.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75599.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 75599.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 75599.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 75599.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 75599.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 75599.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 75599.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75599.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75599.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 75599.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 75599.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75599.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75599.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 75599.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 75599.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75599.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75599.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead798]
>[ 75599.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead798] width 2880 pitch 11520 (/4 2880)
>[ 75599.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60658]
>[ 75599.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60658] width 2880 pitch 11520 (/4 2880)
>[ 75599.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75599.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75599.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa274a88]
>[ 75599.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa274a88] width 2880 pitch 11520 (/4 2880)
>[ 75599.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75599.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75599.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75599.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75600.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75600.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75600.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dce710]
>[ 75600.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dce710] width 2880 pitch 11520 (/4 2880)
>[ 75600.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c936b8]
>[ 75600.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c936b8] width 2880 pitch 11520 (/4 2880)
>[ 75600.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494c0]
>[ 75600.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494c0] width 2880 pitch 11520 (/4 2880)
>[ 75600.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75600.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75600.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494c0]
>[ 75600.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494c0] width 2880 pitch 11520 (/4 2880)
>[ 75605.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75605.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75606.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c886d8]
>[ 75606.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c886d8] width 2880 pitch 11520 (/4 2880)
>[ 75606.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1cf78]
>[ 75606.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1cf78] width 2880 pitch 11520 (/4 2880)
>[ 75606.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f070]
>[ 75606.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f070] width 2880 pitch 11520 (/4 2880)
>[ 75606.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e9d8]
>[ 75606.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e9d8] width 2880 pitch 11520 (/4 2880)
>[ 75606.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f070]
>[ 75606.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f070] width 2880 pitch 11520 (/4 2880)
>[ 75606.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75606.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75607.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0daaa0]
>[ 75607.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0daaa0] width 2880 pitch 11520 (/4 2880)
>[ 75607.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4f070]
>[ 75607.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4f070] width 2880 pitch 11520 (/4 2880)
>[ 75607.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dce710]
>[ 75607.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dce710] width 2880 pitch 11520 (/4 2880)
>[ 75607.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c886d8]
>[ 75608.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c886d8] width 2880 pitch 11520 (/4 2880)
>[ 75608.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5fee8]
>[ 75608.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5fee8] width 2880 pitch 11520 (/4 2880)
>[ 75608.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9705f28]
>[ 75608.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9705f28] width 2880 pitch 11520 (/4 2880)
>[ 75608.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959988]
>[ 75608.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959988] width 2880 pitch 11520 (/4 2880)
>[ 75609.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70ff0]
>[ 75609.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70ff0] width 2880 pitch 11520 (/4 2880)
>[ 75609.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead5d0]
>[ 75609.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead5d0] width 2880 pitch 11520 (/4 2880)
>[ 75657.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aba3e8]
>[ 75657.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aba3e8] width 2880 pitch 11520 (/4 2880)
>[ 75657.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aba3e8]
>[ 75657.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aba3e8] width 2880 pitch 11520 (/4 2880)
>[ 75657.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa188870]
>[ 75657.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa188870] width 2880 pitch 11520 (/4 2880)
>[ 75657.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aba3e8]
>[ 75657.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aba3e8] width 2880 pitch 11520 (/4 2880)
>[ 75657.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa188870]
>[ 75657.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa188870] width 2880 pitch 11520 (/4 2880)
>[ 75657.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aba3e8]
>[ 75657.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aba3e8] width 2880 pitch 11520 (/4 2880)
>[ 75657.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa188870]
>[ 75657.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa188870] width 2880 pitch 11520 (/4 2880)
>[ 75658.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc1e38]
>[ 75658.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc1e38] width 2880 pitch 11520 (/4 2880)
>[ 75659.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75659.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97229f8]
>[ 75659.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97229f8] width 2880 pitch 11520 (/4 2880)
>[ 75659.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75659.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97229f8]
>[ 75659.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97229f8] width 2880 pitch 11520 (/4 2880)
>[ 75659.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75659.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97229f8]
>[ 75659.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97229f8] width 2880 pitch 11520 (/4 2880)
>[ 75659.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75659.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97229f8]
>[ 75659.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97229f8] width 2880 pitch 11520 (/4 2880)
>[ 75659.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75659.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d9ec8]
>[ 75659.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d9ec8] width 2880 pitch 11520 (/4 2880)
>[ 75660.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aba3e8]
>[ 75660.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aba3e8] width 2880 pitch 11520 (/4 2880)
>[ 75660.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df6a80]
>[ 75660.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df6a80] width 2880 pitch 11520 (/4 2880)
>[ 75660.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a008]
>[ 75660.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a008] width 2880 pitch 11520 (/4 2880)
>[ 75660.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08bda8]
>[ 75660.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08bda8] width 2880 pitch 11520 (/4 2880)
>[ 75660.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08bda8]
>[ 75660.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08bda8] width 2880 pitch 11520 (/4 2880)
>[ 75660.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75660.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75665.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a1f8]
>[ 75665.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a1f8] width 2880 pitch 11520 (/4 2880)
>[ 75665.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75665.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75665.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b02b8]
>[ 75665.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b02b8] width 2880 pitch 11520 (/4 2880)
>[ 75665.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8ce20]
>[ 75665.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8ce20] width 2880 pitch 11520 (/4 2880)
>[ 75665.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8b88]
>[ 75665.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8b88] width 2880 pitch 11520 (/4 2880)
>[ 75665.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a1f8]
>[ 75665.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a1f8] width 2880 pitch 11520 (/4 2880)
>[ 75665.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b02b8]
>[ 75665.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b02b8] width 2880 pitch 11520 (/4 2880)
>[ 75665.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9597230]
>[ 75665.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9597230] width 2880 pitch 11520 (/4 2880)
>[ 75665.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8b88]
>[ 75665.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8b88] width 2880 pitch 11520 (/4 2880)
>[ 75665.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9655448]
>[ 75665.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9655448] width 2880 pitch 11520 (/4 2880)
>[ 75665.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8ce20]
>[ 75665.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8ce20] width 2880 pitch 11520 (/4 2880)
>[ 75665.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b02b8]
>[ 75665.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b02b8] width 2880 pitch 11520 (/4 2880)
>[ 75665.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97048e0]
>[ 75665.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97048e0] width 2880 pitch 11520 (/4 2880)
>[ 75666.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c68848]
>[ 75666.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c68848] width 2880 pitch 11520 (/4 2880)
>[ 75666.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8ce20]
>[ 75666.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8ce20] width 2880 pitch 11520 (/4 2880)
>[ 75666.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09bcb8]
>[ 75666.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09bcb8] width 2880 pitch 11520 (/4 2880)
>[ 75666.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac648]
>[ 75666.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac648] width 2880 pitch 11520 (/4 2880)
>[ 75666.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051d18]
>[ 75666.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051d18] width 2880 pitch 11520 (/4 2880)
>[ 75666.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac648]
>[ 75666.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac648] width 2880 pitch 11520 (/4 2880)
>[ 75666.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09bcb8]
>[ 75666.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09bcb8] width 2880 pitch 11520 (/4 2880)
>[ 75666.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac648]
>[ 75666.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac648] width 2880 pitch 11520 (/4 2880)
>[ 75666.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09bcb8]
>[ 75666.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09bcb8] width 2880 pitch 11520 (/4 2880)
>[ 75666.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac648]
>[ 75666.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac648] width 2880 pitch 11520 (/4 2880)
>[ 75666.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09bcb8]
>[ 75666.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09bcb8] width 2880 pitch 11520 (/4 2880)
>[ 75666.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bac648]
>[ 75666.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bac648] width 2880 pitch 11520 (/4 2880)
>[ 75675.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa229780]
>[ 75675.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa229780] width 2880 pitch 11520 (/4 2880)
>[ 75675.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa076a98]
>[ 75675.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa076a98] width 2880 pitch 11520 (/4 2880)
>[ 75676.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96afe40]
>[ 75676.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96afe40] width 2880 pitch 11520 (/4 2880)
>[ 75676.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4008]
>[ 75676.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4008] width 2880 pitch 11520 (/4 2880)
>[ 75676.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96afe40]
>[ 75676.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96afe40] width 2880 pitch 11520 (/4 2880)
>[ 75676.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4008]
>[ 75676.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4008] width 2880 pitch 11520 (/4 2880)
>[ 75676.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96afe40]
>[ 75676.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96afe40] width 2880 pitch 11520 (/4 2880)
>[ 75676.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4008]
>[ 75676.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4008] width 2880 pitch 11520 (/4 2880)
>[ 75676.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75676.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75676.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b4008]
>[ 75676.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b4008] width 2880 pitch 11520 (/4 2880)
>[ 75676.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75676.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75676.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75676.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75677.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75677.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75677.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa076a98]
>[ 75677.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa076a98] width 2880 pitch 11520 (/4 2880)
>[ 75677.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75677.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75677.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75677.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75677.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75677.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75677.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75677.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75677.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75678.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75678.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa5800]
>[ 75678.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa5800] width 2880 pitch 11520 (/4 2880)
>[ 75678.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75678.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75678.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722bb8]
>[ 75678.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722bb8] width 2880 pitch 11520 (/4 2880)
>[ 75678.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75678.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75682.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75682.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75682.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81ce8]
>[ 75682.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81ce8] width 2880 pitch 11520 (/4 2880)
>[ 75682.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75682.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75682.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ab8]
>[ 75682.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ab8] width 2880 pitch 11520 (/4 2880)
>[ 75682.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75682.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75682.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ab8]
>[ 75682.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ab8] width 2880 pitch 11520 (/4 2880)
>[ 75682.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11c0b8]
>[ 75682.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11c0b8] width 2880 pitch 11520 (/4 2880)
>[ 75683.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749648]
>[ 75683.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749648] width 2880 pitch 11520 (/4 2880)
>[ 75685.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 75685.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 75685.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81d88]
>[ 75685.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81d88] width 2880 pitch 11520 (/4 2880)
>[ 75685.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a787e0]
>[ 75685.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a787e0] width 2880 pitch 11520 (/4 2880)
>[ 75685.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ab8]
>[ 75685.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ab8] width 2880 pitch 11520 (/4 2880)
>[ 75686.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81d88]
>[ 75686.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81d88] width 2880 pitch 11520 (/4 2880)
>[ 75686.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3ab78]
>[ 75686.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3ab78] width 2880 pitch 11520 (/4 2880)
>[ 75686.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81d88]
>[ 75686.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81d88] width 2880 pitch 11520 (/4 2880)
>[ 75686.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3ab78]
>[ 75686.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3ab78] width 2880 pitch 11520 (/4 2880)
>[ 75686.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ac668]
>[ 75686.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ac668] width 2880 pitch 11520 (/4 2880)
>[ 75703.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61b20]
>[ 75703.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61b20] width 2880 pitch 11520 (/4 2880)
>[ 75703.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dea0]
>[ 75703.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dea0] width 2880 pitch 11520 (/4 2880)
>[ 75703.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99514c8]
>[ 75703.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99514c8] width 2880 pitch 11520 (/4 2880)
>[ 75704.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61b20]
>[ 75704.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61b20] width 2880 pitch 11520 (/4 2880)
>[ 75704.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81d88]
>[ 75704.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81d88] width 2880 pitch 11520 (/4 2880)
>[ 75704.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81d88]
>[ 75704.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81d88] width 2880 pitch 11520 (/4 2880)
>[ 75704.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99514c8]
>[ 75704.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99514c8] width 2880 pitch 11520 (/4 2880)
>[ 75704.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61b20]
>[ 75704.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61b20] width 2880 pitch 11520 (/4 2880)
>[ 75704.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61c10]
>[ 75705.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61c10] width 2880 pitch 11520 (/4 2880)
>[ 75705.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1820e0]
>[ 75705.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1820e0] width 2880 pitch 11520 (/4 2880)
>[ 75705.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75705.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75705.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1820e0]
>[ 75705.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1820e0] width 2880 pitch 11520 (/4 2880)
>[ 75705.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1820e0]
>[ 75705.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1820e0] width 2880 pitch 11520 (/4 2880)
>[ 75730.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75730.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75730.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75730.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75731.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75731.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75731.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75731.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75731.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75732.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75732.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75732.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75733.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75733.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75733.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72e90]
>[ 75733.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72e90] width 2880 pitch 11520 (/4 2880)
>[ 75733.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75733.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75734.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72e90]
>[ 75734.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72e90] width 2880 pitch 11520 (/4 2880)
>[ 75734.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7a5e8]
>[ 75734.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7a5e8] width 2880 pitch 11520 (/4 2880)
>[ 75734.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75734.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75734.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8758]
>[ 75734.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8758] width 2880 pitch 11520 (/4 2880)
>[ 75741.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75741.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75741.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75741.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75741.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347ad0]
>[ 75741.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347ad0] width 2880 pitch 11520 (/4 2880)
>[ 75741.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b03d8]
>[ 75741.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b03d8] width 2880 pitch 11520 (/4 2880)
>[ 75741.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a838b0]
>[ 75741.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a838b0] width 2880 pitch 11520 (/4 2880)
>[ 75741.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75741.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75741.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75741.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75741.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75741.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75741.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75741.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75741.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75741.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75741.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75741.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75741.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75741.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75741.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[ 75741.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[ 75742.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75742.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75742.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6feb0]
>[ 75742.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6feb0] width 2880 pitch 11520 (/4 2880)
>[ 75742.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75742.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75742.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8758]
>[ 75742.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8758] width 2880 pitch 11520 (/4 2880)
>[ 75742.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b03d8]
>[ 75743.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b03d8] width 2880 pitch 11520 (/4 2880)
>[ 75743.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75743.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75743.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75744.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75744.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75744.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75744.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a838b0]
>[ 75744.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a838b0] width 2880 pitch 11520 (/4 2880)
>[ 75744.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75744.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75744.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715918]
>[ 75744.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715918] width 2880 pitch 11520 (/4 2880)
>[ 75746.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75746.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75746.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9715918]
>[ 75746.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9715918] width 2880 pitch 11520 (/4 2880)
>[ 75746.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75746.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75746.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b03d8]
>[ 75746.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b03d8] width 2880 pitch 11520 (/4 2880)
>[ 75747.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75747.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75747.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0931a0]
>[ 75747.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0931a0] width 2880 pitch 11520 (/4 2880)
>[ 75748.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 75748.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 75749.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75749.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75749.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9814e98]
>[ 75749.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9814e98] width 2880 pitch 11520 (/4 2880)
>[ 75749.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75749.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75750.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75750.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75750.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75750.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75750.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75750.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75750.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a838b0]
>[ 75751.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a838b0] width 2880 pitch 11520 (/4 2880)
>[ 75751.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[ 75751.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[ 75753.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75753.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75753.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8758]
>[ 75753.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8758] width 2880 pitch 11520 (/4 2880)
>[ 75753.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 75753.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 75753.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b03d8]
>[ 75753.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b03d8] width 2880 pitch 11520 (/4 2880)
>[ 75753.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9347ad0]
>[ 75753.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9347ad0] width 2880 pitch 11520 (/4 2880)
>[ 75753.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75753.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75753.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72e90]
>[ 75753.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72e90] width 2880 pitch 11520 (/4 2880)
>[ 75754.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02068]
>[ 75754.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02068] width 2880 pitch 11520 (/4 2880)
>[ 75754.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[ 75754.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[ 75754.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9d858]
>[ 75754.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9d858] width 2880 pitch 11520 (/4 2880)
>[ 75756.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75756.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75756.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 75756.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 75756.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75756.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75757.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75757.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75758.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0931a0]
>[ 75758.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0931a0] width 2880 pitch 11520 (/4 2880)
>[ 75759.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa099ed0]
>[ 75759.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa099ed0] width 2880 pitch 11520 (/4 2880)
>[ 75759.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75759.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75760.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9814e98]
>[ 75760.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9814e98] width 2880 pitch 11520 (/4 2880)
>[ 75760.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94301b0]
>[ 75760.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94301b0] width 2880 pitch 11520 (/4 2880)
>[ 75761.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75762.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75762.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b02068]
>[ 75762.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b02068] width 2880 pitch 11520 (/4 2880)
>[ 75762.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72e90]
>[ 75762.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72e90] width 2880 pitch 11520 (/4 2880)
>[ 75762.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75762.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75762.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75762.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75779.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75779.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75779.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75779.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75779.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75779.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75779.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9028]
>[ 75779.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9028] width 2880 pitch 11520 (/4 2880)
>[ 75779.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779080]
>[ 75779.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779080] width 2880 pitch 11520 (/4 2880)
>[ 75779.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75779.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75779.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 75779.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 75779.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9028]
>[ 75779.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9028] width 2880 pitch 11520 (/4 2880)
>[ 75780.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790ae0]
>[ 75780.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790ae0] width 2880 pitch 11520 (/4 2880)
>[ 75781.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa077fa0]
>[ 75781.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa077fa0] width 2880 pitch 11520 (/4 2880)
>[ 75781.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874420]
>[ 75781.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874420] width 2880 pitch 11520 (/4 2880)
>[ 75781.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9028]
>[ 75781.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9028] width 2880 pitch 11520 (/4 2880)
>[ 75781.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b03a8]
>[ 75781.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b03a8] width 2880 pitch 11520 (/4 2880)
>[ 75781.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa077fa0]
>[ 75781.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa077fa0] width 2880 pitch 11520 (/4 2880)
>[ 75781.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d38f90]
>[ 75781.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d38f90] width 2880 pitch 11520 (/4 2880)
>[ 75781.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874420]
>[ 75781.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874420] width 2880 pitch 11520 (/4 2880)
>[ 75781.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874420]
>[ 75781.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874420] width 2880 pitch 11520 (/4 2880)
>[ 75781.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6feb0]
>[ 75781.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6feb0] width 2880 pitch 11520 (/4 2880)
>[ 75781.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75781.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75786.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6feb0]
>[ 75786.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6feb0] width 2880 pitch 11520 (/4 2880)
>[ 75786.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75786.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75786.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874420]
>[ 75786.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874420] width 2880 pitch 11520 (/4 2880)
>[ 75787.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9874420]
>[ 75787.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9874420] width 2880 pitch 11520 (/4 2880)
>[ 75787.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75787.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75787.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75787.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75787.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec90a0]
>[ 75787.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec90a0] width 2880 pitch 11520 (/4 2880)
>[ 75800.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75800.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75800.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6feb0]
>[ 75800.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6feb0] width 2880 pitch 11520 (/4 2880)
>[ 75800.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaeea8]
>[ 75800.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaeea8] width 2880 pitch 11520 (/4 2880)
>[ 75800.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d8a8]
>[ 75800.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d8a8] width 2880 pitch 11520 (/4 2880)
>[ 75800.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6feb0]
>[ 75800.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6feb0] width 2880 pitch 11520 (/4 2880)
>[ 75812.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e52d78]
>[ 75812.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e52d78] width 2880 pitch 11520 (/4 2880)
>[ 75836.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75836.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75836.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75836.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75836.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995de88]
>[ 75836.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995de88] width 2880 pitch 11520 (/4 2880)
>[ 75837.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e52d78]
>[ 75837.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e52d78] width 2880 pitch 11520 (/4 2880)
>[ 75837.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75837.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75837.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75837.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75838.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75838.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75838.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75838.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75838.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75838.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75838.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75838.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75840.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75840.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75840.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75840.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75840.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75840.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75840.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c900]
>[ 75840.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c900] width 2880 pitch 11520 (/4 2880)
>[ 75840.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75840.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75840.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75840.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75840.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75840.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75840.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75840.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75840.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75840.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75840.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75840.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75844.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75844.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75844.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75844.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75844.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75844.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75844.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75844.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75844.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75844.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75844.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75844.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75844.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75844.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75844.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75844.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75844.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75844.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75844.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75844.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75844.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75844.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75844.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75844.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75845.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75845.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75845.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75845.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75845.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75845.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75845.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75845.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75845.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75845.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75845.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75845.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75845.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75845.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75845.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75845.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75845.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 75845.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 75845.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75845.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75845.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75845.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75850.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75850.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75850.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 75850.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 75850.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75850.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75850.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75851.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75851.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75851.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75851.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75851.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75851.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 75851.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 75852.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 75852.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 75852.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966faf0]
>[ 75852.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966faf0] width 2880 pitch 11520 (/4 2880)
>[ 75852.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75852.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75852.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e4f40]
>[ 75852.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e4f40] width 2880 pitch 11520 (/4 2880)
>[ 75852.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af51e8]
>[ 75852.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af51e8] width 2880 pitch 11520 (/4 2880)
>[ 75852.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 75852.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 75854.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aae48]
>[ 75855.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aae48] width 2880 pitch 11520 (/4 2880)
>[ 75855.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08fb8]
>[ 75855.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08fb8] width 2880 pitch 11520 (/4 2880)
>[ 75855.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979fc70]
>[ 75855.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979fc70] width 2880 pitch 11520 (/4 2880)
>[ 75855.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75855.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75855.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75855.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75855.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75855.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75855.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75855.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75855.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af51e8]
>[ 75855.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af51e8] width 2880 pitch 11520 (/4 2880)
>[ 75855.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c37808]
>[ 75855.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c37808] width 2880 pitch 11520 (/4 2880)
>[ 75855.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5178]
>[ 75855.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5178] width 2880 pitch 11520 (/4 2880)
>[ 75857.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5178]
>[ 75857.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5178] width 2880 pitch 11520 (/4 2880)
>[ 75857.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09d920]
>[ 75857.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09d920] width 2880 pitch 11520 (/4 2880)
>[ 75857.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5178]
>[ 75857.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5178] width 2880 pitch 11520 (/4 2880)
>[ 75857.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787cb8]
>[ 75857.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787cb8] width 2880 pitch 11520 (/4 2880)
>[ 75857.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a5178]
>[ 75857.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a5178] width 2880 pitch 11520 (/4 2880)
>[ 75857.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787cb8]
>[ 75857.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787cb8] width 2880 pitch 11520 (/4 2880)
>[ 75857.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174ed8]
>[ 75857.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174ed8] width 2880 pitch 11520 (/4 2880)
>[ 75857.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e52d78]
>[ 75857.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e52d78] width 2880 pitch 11520 (/4 2880)
>[ 75857.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8f98]
>[ 75857.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8f98] width 2880 pitch 11520 (/4 2880)
>[ 75859.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75859.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75859.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952ce78]
>[ 75859.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952ce78] width 2880 pitch 11520 (/4 2880)
>[ 75865.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20aad0]
>[ 75865.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20aad0] width 2880 pitch 11520 (/4 2880)
>[ 75865.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75865.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75865.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e52d78]
>[ 75865.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e52d78] width 2880 pitch 11520 (/4 2880)
>[ 75865.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08fb8]
>[ 75865.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08fb8] width 2880 pitch 11520 (/4 2880)
>[ 75865.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75865.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75865.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08fb8]
>[ 75865.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08fb8] width 2880 pitch 11520 (/4 2880)
>[ 75865.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56e80]
>[ 75865.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56e80] width 2880 pitch 11520 (/4 2880)
>[ 75865.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d500]
>[ 75865.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d500] width 2880 pitch 11520 (/4 2880)
>[ 75865.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75865.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75865.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d19d90]
>[ 75865.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d19d90] width 2880 pitch 11520 (/4 2880)
>[ 75865.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56e80]
>[ 75865.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56e80] width 2880 pitch 11520 (/4 2880)
>[ 75869.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75869.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75869.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75869.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b80b0]
>[ 75869.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b80b0] width 2880 pitch 11520 (/4 2880)
>[ 75869.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75869.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75869.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75869.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b80b0]
>[ 75869.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b80b0] width 2880 pitch 11520 (/4 2880)
>[ 75869.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75869.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75869.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08fb8]
>[ 75869.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08fb8] width 2880 pitch 11520 (/4 2880)
>[ 75869.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75869.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08fb8]
>[ 75869.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08fb8] width 2880 pitch 11520 (/4 2880)
>[ 75869.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75869.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75870.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d19d90]
>[ 75870.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d19d90] width 2880 pitch 11520 (/4 2880)
>[ 75870.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b80b0]
>[ 75870.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b80b0] width 2880 pitch 11520 (/4 2880)
>[ 75870.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75870.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75870.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75870.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75870.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75870.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75870.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75870.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75870.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75870.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75870.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75870.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75870.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acf400]
>[ 75870.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acf400] width 2880 pitch 11520 (/4 2880)
>[ 75870.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56e28]
>[ 75870.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56e28] width 2880 pitch 11520 (/4 2880)
>[ 75875.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787cb8]
>[ 75875.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787cb8] width 2880 pitch 11520 (/4 2880)
>[ 75875.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9addce8]
>[ 75875.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9addce8] width 2880 pitch 11520 (/4 2880)
>[ 75875.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75875.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75875.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582608]
>[ 75875.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582608] width 2880 pitch 11520 (/4 2880)
>[ 75875.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dca0]
>[ 75875.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dca0] width 2880 pitch 11520 (/4 2880)
>[ 75877.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fe870]
>[ 75877.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fe870] width 2880 pitch 11520 (/4 2880)
>[ 75877.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75878.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75878.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfec68]
>[ 75878.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfec68] width 2880 pitch 11520 (/4 2880)
>[ 75878.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8978]
>[ 75878.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8978] width 2880 pitch 11520 (/4 2880)
>[ 75943.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821c30]
>[ 75943.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821c30] width 2880 pitch 11520 (/4 2880)
>[ 75943.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995d8e8]
>[ 75943.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995d8e8] width 2880 pitch 11520 (/4 2880)
>[ 75944.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23d208]
>[ 75944.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23d208] width 2880 pitch 11520 (/4 2880)
>[ 75948.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c887b0]
>[ 75948.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c887b0] width 2880 pitch 11520 (/4 2880)
>[ 75958.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b396d0]
>[ 75958.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b396d0] width 2880 pitch 11520 (/4 2880)
>[ 75958.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b396d0]
>[ 75958.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b396d0] width 2880 pitch 11520 (/4 2880)
>[ 75958.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa126140]
>[ 75958.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa126140] width 2880 pitch 11520 (/4 2880)
>[ 75958.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a637a8]
>[ 75958.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a637a8] width 2880 pitch 11520 (/4 2880)
>[ 75958.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c566a8]
>[ 75958.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c566a8] width 2880 pitch 11520 (/4 2880)
>[ 75958.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a637a8]
>[ 75958.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a637a8] width 2880 pitch 11520 (/4 2880)
>[ 75958.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa126140]
>[ 75958.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa126140] width 2880 pitch 11520 (/4 2880)
>[ 75958.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c62c8]
>[ 75958.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c62c8] width 2880 pitch 11520 (/4 2880)
>[ 75958.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0f150]
>[ 75958.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0f150] width 2880 pitch 11520 (/4 2880)
>[ 75958.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7798]
>[ 75958.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7798] width 2880 pitch 11520 (/4 2880)
>[ 75960.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97db118]
>[ 75960.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97db118] width 2880 pitch 11520 (/4 2880)
>[ 75961.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7738]
>[ 75961.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7738] width 2880 pitch 11520 (/4 2880)
>[ 75961.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01ab0]
>[ 75961.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01ab0] width 2880 pitch 11520 (/4 2880)
>[ 75961.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc290]
>[ 75961.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc290] width 2880 pitch 11520 (/4 2880)
>[ 75961.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec90a0]
>[ 75961.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec90a0] width 2880 pitch 11520 (/4 2880)
>[ 75961.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972588]
>[ 75961.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972588] width 2880 pitch 11520 (/4 2880)
>[ 75961.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9972588]
>[ 75961.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9972588] width 2880 pitch 11520 (/4 2880)
>[ 75961.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cc290]
>[ 75961.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cc290] width 2880 pitch 11520 (/4 2880)
>[ 75963.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6d108]
>[ 75963.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6d108] width 2880 pitch 11520 (/4 2880)
>[ 75967.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2118]
>[ 75967.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2118] width 2880 pitch 11520 (/4 2880)
>[ 75976.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079ea0]
>[ 75976.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079ea0] width 2880 pitch 11520 (/4 2880)
>[ 75976.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974b938]
>[ 75976.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974b938] width 2880 pitch 11520 (/4 2880)
>[ 75976.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9536280]
>[ 75976.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9536280] width 2880 pitch 11520 (/4 2880)
>[ 75976.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fe20]
>[ 75976.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fe20] width 2880 pitch 11520 (/4 2880)
>[ 75976.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3560]
>[ 75976.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3560] width 2880 pitch 11520 (/4 2880)
>[ 75976.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974b938]
>[ 75977.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974b938] width 2880 pitch 11520 (/4 2880)
>[ 75977.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48338]
>[ 75977.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48338] width 2880 pitch 11520 (/4 2880)
>[ 75977.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c74098]
>[ 75977.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c74098] width 2880 pitch 11520 (/4 2880)
>[ 75986.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9532390]
>[ 75986.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9532390] width 2880 pitch 11520 (/4 2880)
>[ 76013.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977e6d8]
>[ 76013.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977e6d8] width 2880 pitch 11520 (/4 2880)
>[ 76013.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094cb0]
>[ 76013.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094cb0] width 2880 pitch 11520 (/4 2880)
>[ 76014.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbcc20]
>[ 76014.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbcc20] width 2880 pitch 11520 (/4 2880)
>[ 76014.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56660]
>[ 76014.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56660] width 2880 pitch 11520 (/4 2880)
>[ 76014.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ad6e0]
>[ 76014.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ad6e0] width 2880 pitch 11520 (/4 2880)
>[ 76014.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fe20]
>[ 76015.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fe20] width 2880 pitch 11520 (/4 2880)
>[ 76015.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c773b8]
>[ 76015.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c773b8] width 2880 pitch 11520 (/4 2880)
>[ 76017.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97845f0]
>[ 76017.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97845f0] width 2880 pitch 11520 (/4 2880)
>[ 76018.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa111f78]
>[ 76018.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa111f78] width 2880 pitch 11520 (/4 2880)
>[ 76018.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2cb88]
>[ 76018.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2cb88] width 2880 pitch 11520 (/4 2880)
>[ 76018.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986fe20]
>[ 76018.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986fe20] width 2880 pitch 11520 (/4 2880)
>[ 76019.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a36920]
>[ 76019.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a36920] width 2880 pitch 11520 (/4 2880)
>[ 76019.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae830]
>[ 76019.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae830] width 2880 pitch 11520 (/4 2880)
>[ 76019.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977e6d8]
>[ 76019.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977e6d8] width 2880 pitch 11520 (/4 2880)
>[ 76019.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa111f78]
>[ 76019.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa111f78] width 2880 pitch 11520 (/4 2880)
>[ 76019.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974e818]
>[ 76019.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974e818] width 2880 pitch 11520 (/4 2880)
>[ 76091.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9782920]
>[ 76091.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9782920] width 2880 pitch 11520 (/4 2880)
>[ 76092.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97de248]
>[ 76092.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97de248] width 2880 pitch 11520 (/4 2880)
>[ 76092.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7090]
>[ 76092.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7090] width 2880 pitch 11520 (/4 2880)
>[ 76092.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ae78]
>[ 76092.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ae78] width 2880 pitch 11520 (/4 2880)
>[ 76092.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a9068]
>[ 76092.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a9068] width 2880 pitch 11520 (/4 2880)
>[ 76093.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ed10]
>[ 76093.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ed10] width 2880 pitch 11520 (/4 2880)
>[ 76093.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997ed10]
>[ 76093.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997ed10] width 2880 pitch 11520 (/4 2880)
>[ 76094.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9782920]
>[ 76094.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9782920] width 2880 pitch 11520 (/4 2880)
>[ 76095.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1980]
>[ 76095.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1980] width 2880 pitch 11520 (/4 2880)
>[ 76095.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a340]
>[ 76095.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a340] width 2880 pitch 11520 (/4 2880)
>[ 76096.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d21b0]
>[ 76096.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d21b0] width 2880 pitch 11520 (/4 2880)
>[ 76096.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83600]
>[ 76096.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83600] width 2880 pitch 11520 (/4 2880)
>[ 76097.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab27b0]
>[ 76097.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab27b0] width 2880 pitch 11520 (/4 2880)
>[ 76100.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bf1c8]
>[ 76100.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bf1c8] width 2880 pitch 11520 (/4 2880)
>[ 76103.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9ba8]
>[ 76103.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9ba8] width 2880 pitch 11520 (/4 2880)
>[ 76103.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[ 76103.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[ 76104.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76104.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76104.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 76104.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 76104.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 76104.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 76104.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76104.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76210.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 76210.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 76210.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76210.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76210.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76211.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76211.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76211.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76211.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76211.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76211.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 76211.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 76211.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 76211.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 76211.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76211.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76211.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784930]
>[ 76212.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784930] width 2880 pitch 11520 (/4 2880)
>[ 76212.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c62c8]
>[ 76212.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c62c8] width 2880 pitch 11520 (/4 2880)
>[ 76212.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76212.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76212.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a83680]
>[ 76212.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a83680] width 2880 pitch 11520 (/4 2880)
>[ 76212.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c62c8]
>[ 76212.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c62c8] width 2880 pitch 11520 (/4 2880)
>[ 76212.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76212.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76212.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76212.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76232.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76232.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76233.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c62c8]
>[ 76233.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c62c8] width 2880 pitch 11520 (/4 2880)
>[ 76233.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76233.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76233.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76233.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76233.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76234.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76234.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76234.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76234.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76234.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76234.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76234.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76234.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76234.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76234.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76234.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76234.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76235.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76236.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76236.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76237.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76237.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76237.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76237.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76237.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76237.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76237.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76237.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76237.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76237.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76238.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76238.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76239.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76239.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76240.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76240.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76240.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76240.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76240.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76240.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76241.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff208]
>[ 76241.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff208] width 2880 pitch 11520 (/4 2880)
>[ 76242.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 76242.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 76242.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821c30]
>[ 76242.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821c30] width 2880 pitch 11520 (/4 2880)
>[ 76242.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821c30]
>[ 76242.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821c30] width 2880 pitch 11520 (/4 2880)
>[ 76242.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5458]
>[ 76242.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5458] width 2880 pitch 11520 (/4 2880)
>[ 76242.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786070]
>[ 76242.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786070] width 2880 pitch 11520 (/4 2880)
>[ 76242.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c260]
>[ 76242.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c260] width 2880 pitch 11520 (/4 2880)
>[ 76242.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982240]
>[ 76242.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982240] width 2880 pitch 11520 (/4 2880)
>[ 76272.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76272.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76272.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba5728]
>[ 76272.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba5728] width 2880 pitch 11520 (/4 2880)
>[ 76273.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833a30]
>[ 76273.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833a30] width 2880 pitch 11520 (/4 2880)
>[ 76273.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1818]
>[ 76273.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1818] width 2880 pitch 11520 (/4 2880)
>[ 76273.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ecce8]
>[ 76273.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ecce8] width 2880 pitch 11520 (/4 2880)
>[ 76273.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 76273.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 76273.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821c30]
>[ 76273.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821c30] width 2880 pitch 11520 (/4 2880)
>[ 76273.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4080]
>[ 76274.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4080] width 2880 pitch 11520 (/4 2880)
>[ 76274.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76274.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76274.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85a78]
>[ 76274.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85a78] width 2880 pitch 11520 (/4 2880)
>[ 76275.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76275.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76275.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76275.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76275.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997c260]
>[ 76275.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997c260] width 2880 pitch 11520 (/4 2880)
>[ 76276.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612878]
>[ 76276.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612878] width 2880 pitch 11520 (/4 2880)
>[ 76276.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 76276.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 76276.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba5728]
>[ 76276.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba5728] width 2880 pitch 11520 (/4 2880)
>[ 76276.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799920]
>[ 76276.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799920] width 2880 pitch 11520 (/4 2880)
>[ 76276.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821c30]
>[ 76276.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821c30] width 2880 pitch 11520 (/4 2880)
>[ 76285.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76285.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76289.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76289.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76289.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76289.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76289.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76289.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76289.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76289.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76289.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76289.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76289.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0388]
>[ 76289.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0388] width 2880 pitch 11520 (/4 2880)
>[ 76289.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76289.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76290.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76290.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76292.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76292.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76292.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa69c0]
>[ 76292.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa69c0] width 2880 pitch 11520 (/4 2880)
>[ 76292.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76292.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76292.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa69c0]
>[ 76292.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa69c0] width 2880 pitch 11520 (/4 2880)
>[ 76292.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceb2b0]
>[ 76292.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceb2b0] width 2880 pitch 11520 (/4 2880)
>[ 76292.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97524d8]
>[ 76292.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97524d8] width 2880 pitch 11520 (/4 2880)
>[ 76292.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76292.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76292.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76292.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76292.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76292.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76292.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9288]
>[ 76293.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9288] width 2880 pitch 11520 (/4 2880)
>[ 76293.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76293.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76293.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76293.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76293.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76293.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76294.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76294.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76294.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9288]
>[ 76294.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9288] width 2880 pitch 11520 (/4 2880)
>[ 76294.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76294.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76294.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76294.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76295.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76295.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76296.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76296.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76297.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76297.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76302.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76303.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76303.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76303.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76304.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceb2b0]
>[ 76304.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceb2b0] width 2880 pitch 11520 (/4 2880)
>[ 76304.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0388]
>[ 76305.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0388] width 2880 pitch 11520 (/4 2880)
>[ 76305.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76305.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76305.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76305.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76306.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76306.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76313.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7768]
>[ 76313.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7768] width 2880 pitch 11520 (/4 2880)
>[ 76313.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76313.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76313.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76313.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76313.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9288]
>[ 76313.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9288] width 2880 pitch 11520 (/4 2880)
>[ 76313.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76313.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76313.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a780]
>[ 76313.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a780] width 2880 pitch 11520 (/4 2880)
>[ 76313.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76313.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76314.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76314.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76314.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76314.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76314.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76314.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76315.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa69c0]
>[ 76315.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa69c0] width 2880 pitch 11520 (/4 2880)
>[ 76315.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76315.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76315.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76315.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76316.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76316.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76316.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db5b80]
>[ 76316.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db5b80] width 2880 pitch 11520 (/4 2880)
>[ 76316.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76316.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76317.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76317.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76317.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76317.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76317.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1eec0]
>[ 76317.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1eec0] width 2880 pitch 11520 (/4 2880)
>[ 76318.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7768]
>[ 76318.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7768] width 2880 pitch 11520 (/4 2880)
>[ 76318.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1eec0]
>[ 76318.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1eec0] width 2880 pitch 11520 (/4 2880)
>[ 76318.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76318.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76318.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76318.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76322.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1818]
>[ 76322.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1818] width 2880 pitch 11520 (/4 2880)
>[ 76323.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76323.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76323.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76323.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76323.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76323.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76323.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76323.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76323.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76323.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76323.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76323.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76323.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76323.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76323.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76323.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76323.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76323.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76323.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76323.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76323.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21e80]
>[ 76323.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21e80] width 2880 pitch 11520 (/4 2880)
>[ 76323.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76323.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76323.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21e80]
>[ 76323.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21e80] width 2880 pitch 11520 (/4 2880)
>[ 76323.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76323.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76323.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21e80]
>[ 76323.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21e80] width 2880 pitch 11520 (/4 2880)
>[ 76323.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76323.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76325.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76325.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76325.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76325.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76325.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21e80]
>[ 76325.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21e80] width 2880 pitch 11520 (/4 2880)
>[ 76325.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76325.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76325.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76325.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76325.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76325.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76325.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76325.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76325.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76325.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb94d0]
>[ 76325.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb94d0] width 2880 pitch 11520 (/4 2880)
>[ 76325.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76325.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643070]
>[ 76325.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643070] width 2880 pitch 11520 (/4 2880)
>[ 76325.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76325.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9643070]
>[ 76325.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9643070] width 2880 pitch 11520 (/4 2880)
>[ 76325.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76325.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76384.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9288]
>[ 76384.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9288] width 2880 pitch 11520 (/4 2880)
>[ 76384.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceb2b0]
>[ 76384.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceb2b0] width 2880 pitch 11520 (/4 2880)
>[ 76384.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76384.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76384.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76384.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76384.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84408]
>[ 76384.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84408] width 2880 pitch 11520 (/4 2880)
>[ 76384.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d21e80]
>[ 76384.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d21e80] width 2880 pitch 11520 (/4 2880)
>[ 76385.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76385.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76385.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76385.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76385.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[ 76385.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[ 76385.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ace9e8]
>[ 76385.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ace9e8] width 2880 pitch 11520 (/4 2880)
>[ 76385.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76385.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76385.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1818]
>[ 76385.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1818] width 2880 pitch 11520 (/4 2880)
>[ 76385.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0388]
>[ 76385.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0388] width 2880 pitch 11520 (/4 2880)
>[ 76385.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1818]
>[ 76385.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1818] width 2880 pitch 11520 (/4 2880)
>[ 76439.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76439.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76439.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76439.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76439.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76439.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76439.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76439.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76439.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2cc50]
>[ 76439.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2cc50] width 2880 pitch 11520 (/4 2880)
>[ 76439.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76439.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76439.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76439.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76439.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76439.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76439.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85a78]
>[ 76439.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85a78] width 2880 pitch 11520 (/4 2880)
>[ 76439.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76439.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76439.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba9288]
>[ 76439.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba9288] width 2880 pitch 11520 (/4 2880)
>[ 76439.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76439.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76443.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76443.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76443.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76443.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76443.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76443.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76443.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01ab0]
>[ 76443.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01ab0] width 2880 pitch 11520 (/4 2880)
>[ 76443.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76443.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76443.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76443.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76443.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76443.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76443.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76443.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76443.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01ab0]
>[ 76443.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01ab0] width 2880 pitch 11520 (/4 2880)
>[ 76443.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76443.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76443.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76443.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76443.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdae8]
>[ 76443.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdae8] width 2880 pitch 11520 (/4 2880)
>[ 76443.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76443.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76444.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76444.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76444.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76444.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76444.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acdae8]
>[ 76444.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acdae8] width 2880 pitch 11520 (/4 2880)
>[ 76444.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d1e8]
>[ 76444.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d1e8] width 2880 pitch 11520 (/4 2880)
>[ 76444.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76444.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76444.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76444.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76444.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76444.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76444.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76444.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76444.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76444.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76444.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76444.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76444.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71280]
>[ 76444.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71280] width 2880 pitch 11520 (/4 2880)
>[ 76444.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbd340]
>[ 76444.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbd340] width 2880 pitch 11520 (/4 2880)
>[ 76452.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76452.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76452.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76452.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76452.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76452.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76452.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76452.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76452.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76452.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76452.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76452.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76452.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76452.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76452.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76452.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76452.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76452.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76452.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04b6b8]
>[ 76452.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04b6b8] width 2880 pitch 11520 (/4 2880)
>[ 76452.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4bfb0]
>[ 76452.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4bfb0] width 2880 pitch 11520 (/4 2880)
>[ 76452.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973b370]
>[ 76452.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973b370] width 2880 pitch 11520 (/4 2880)
>[ 76452.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd87f8]
>[ 76452.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd87f8] width 2880 pitch 11520 (/4 2880)
>[ 76455.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9836be8]
>[ 76455.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9836be8] width 2880 pitch 11520 (/4 2880)
>[ 76455.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76455.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76455.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76455.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76455.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76455.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76455.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76455.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76455.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76455.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76455.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76455.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76455.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76455.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76455.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76455.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76455.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76456.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf6b8]
>[ 76456.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf6b8] width 2880 pitch 11520 (/4 2880)
>[ 76456.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d34a00]
>[ 76456.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d34a00] width 2880 pitch 11520 (/4 2880)
>[ 76457.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01ab0]
>[ 76457.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01ab0] width 2880 pitch 11520 (/4 2880)
>[ 76457.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76457.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceb2b0]
>[ 76457.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceb2b0] width 2880 pitch 11520 (/4 2880)
>[ 76457.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2858]
>[ 76457.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2858] width 2880 pitch 11520 (/4 2880)
>[ 76457.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76457.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76457.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76457.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76457.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76457.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76457.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76457.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76457.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76457.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76457.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2051a8]
>[ 76457.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2051a8] width 2880 pitch 11520 (/4 2880)
>[ 76457.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbd238]
>[ 76457.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbd238] width 2880 pitch 11520 (/4 2880)
>[ 76540.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f42660]
>[ 76540.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f42660] width 2880 pitch 11520 (/4 2880)
>[ 76540.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa037708]
>[ 76540.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa037708] width 2880 pitch 11520 (/4 2880)
>[ 76541.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a4e78]
>[ 76541.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a4e78] width 2880 pitch 11520 (/4 2880)
>[ 76541.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094898]
>[ 76541.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094898] width 2880 pitch 11520 (/4 2880)
>[ 76541.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a4e78]
>[ 76541.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a4e78] width 2880 pitch 11520 (/4 2880)
>[ 76541.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3f60]
>[ 76541.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3f60] width 2880 pitch 11520 (/4 2880)
>[ 76541.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094280]
>[ 76541.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094280] width 2880 pitch 11520 (/4 2880)
>[ 76541.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094898]
>[ 76542.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094898] width 2880 pitch 11520 (/4 2880)
>[ 76542.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094280]
>[ 76542.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094280] width 2880 pitch 11520 (/4 2880)
>[ 76542.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa094898]
>[ 76542.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa094898] width 2880 pitch 11520 (/4 2880)
>[ 76542.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3f60]
>[ 76542.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3f60] width 2880 pitch 11520 (/4 2880)
>[ 76542.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93a4e78]
>[ 76542.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93a4e78] width 2880 pitch 11520 (/4 2880)
>[ 76542.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986f048]
>[ 76542.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986f048] width 2880 pitch 11520 (/4 2880)
>[ 76542.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e11d0]
>[ 76542.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e11d0] width 2880 pitch 11520 (/4 2880)
>[ 76542.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986f048]
>[ 76543.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986f048] width 2880 pitch 11520 (/4 2880)
>[ 76543.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e11d0]
>[ 76543.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e11d0] width 2880 pitch 11520 (/4 2880)
>[ 76543.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa037708]
>[ 76543.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa037708] width 2880 pitch 11520 (/4 2880)
>[ 76543.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2888]
>[ 76543.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2888] width 2880 pitch 11520 (/4 2880)
>[ 76543.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2888]
>[ 76543.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2888] width 2880 pitch 11520 (/4 2880)
>[ 76543.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa037708]
>[ 76543.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa037708] width 2880 pitch 11520 (/4 2880)
>[ 76551.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c210f0]
>[ 76551.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c210f0] width 2880 pitch 11520 (/4 2880)
>[ 76551.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21090]
>[ 76551.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21090] width 2880 pitch 11520 (/4 2880)
>[ 76559.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aec968]
>[ 76559.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aec968] width 2880 pitch 11520 (/4 2880)
>[ 76559.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76559.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76559.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76559.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76559.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9783400]
>[ 76559.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9783400] width 2880 pitch 11520 (/4 2880)
>[ 76559.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76559.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76559.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9783400]
>[ 76559.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9783400] width 2880 pitch 11520 (/4 2880)
>[ 76559.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c44960]
>[ 76560.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c44960] width 2880 pitch 11520 (/4 2880)
>[ 76560.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bfe8]
>[ 76560.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bfe8] width 2880 pitch 11520 (/4 2880)
>[ 76560.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9783400]
>[ 76560.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9783400] width 2880 pitch 11520 (/4 2880)
>[ 76560.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bfe8]
>[ 76560.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bfe8] width 2880 pitch 11520 (/4 2880)
>[ 76560.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9783400]
>[ 76560.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9783400] width 2880 pitch 11520 (/4 2880)
>[ 76560.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bfe8]
>[ 76560.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bfe8] width 2880 pitch 11520 (/4 2880)
>[ 76560.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15b0b8]
>[ 76560.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15b0b8] width 2880 pitch 11520 (/4 2880)
>[ 76562.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76562.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e05c8]
>[ 76562.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e05c8] width 2880 pitch 11520 (/4 2880)
>[ 76562.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76562.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deae80]
>[ 76562.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deae80] width 2880 pitch 11520 (/4 2880)
>[ 76562.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76562.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deae80]
>[ 76562.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deae80] width 2880 pitch 11520 (/4 2880)
>[ 76562.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76562.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deae80]
>[ 76562.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deae80] width 2880 pitch 11520 (/4 2880)
>[ 76562.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76562.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c4f0]
>[ 76562.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c4f0] width 2880 pitch 11520 (/4 2880)
>[ 76562.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a327e8]
>[ 76562.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a327e8] width 2880 pitch 11520 (/4 2880)
>[ 76566.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973bfe8]
>[ 76566.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973bfe8] width 2880 pitch 11520 (/4 2880)
>[ 76566.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76566.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76566.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7570]
>[ 76566.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7570] width 2880 pitch 11520 (/4 2880)
>[ 76566.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76566.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76567.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df0cc8]
>[ 76567.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df0cc8] width 2880 pitch 11520 (/4 2880)
>[ 76568.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a390]
>[ 76568.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a390] width 2880 pitch 11520 (/4 2880)
>[ 76571.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7e270]
>[ 76572.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7e270] width 2880 pitch 11520 (/4 2880)
>[ 76572.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995d800]
>[ 76572.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995d800] width 2880 pitch 11520 (/4 2880)
>[ 76572.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a390]
>[ 76572.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a390] width 2880 pitch 11520 (/4 2880)
>[ 76572.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7570]
>[ 76572.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7570] width 2880 pitch 11520 (/4 2880)
>[ 76572.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7570]
>[ 76572.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7570] width 2880 pitch 11520 (/4 2880)
>[ 76573.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995d800]
>[ 76573.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995d800] width 2880 pitch 11520 (/4 2880)
>[ 76575.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7e270]
>[ 76575.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7e270] width 2880 pitch 11520 (/4 2880)
>[ 76575.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12f758]
>[ 76575.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12f758] width 2880 pitch 11520 (/4 2880)
>[ 76575.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7570]
>[ 76576.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7570] width 2880 pitch 11520 (/4 2880)
>[ 76580.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995d800]
>[ 76580.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995d800] width 2880 pitch 11520 (/4 2880)
>[ 76586.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bdce0]
>[ 76586.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bdce0] width 2880 pitch 11520 (/4 2880)
>[ 76586.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98375f0]
>[ 76586.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98375f0] width 2880 pitch 11520 (/4 2880)
>[ 76587.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bdce0]
>[ 76587.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bdce0] width 2880 pitch 11520 (/4 2880)
>[ 76587.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98375f0]
>[ 76587.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98375f0] width 2880 pitch 11520 (/4 2880)
>[ 76588.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98375f0]
>[ 76588.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98375f0] width 2880 pitch 11520 (/4 2880)
>[ 76589.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99784f0]
>[ 76589.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99784f0] width 2880 pitch 11520 (/4 2880)
>[ 76594.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dbc78]
>[ 76594.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dbc78] width 2880 pitch 11520 (/4 2880)
>[ 76595.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dbc78]
>[ 76595.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dbc78] width 2880 pitch 11520 (/4 2880)
>[ 76595.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7cc0]
>[ 76595.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7cc0] width 2880 pitch 11520 (/4 2880)
>[ 76595.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb7cc0]
>[ 76595.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb7cc0] width 2880 pitch 11520 (/4 2880)
>[ 76595.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d93970]
>[ 76595.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d93970] width 2880 pitch 11520 (/4 2880)
>[ 76595.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790e68]
>[ 76595.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790e68] width 2880 pitch 11520 (/4 2880)
>[ 76595.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d93970]
>[ 76595.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d93970] width 2880 pitch 11520 (/4 2880)
>[ 76636.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76636.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76636.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ee00]
>[ 76636.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ee00] width 2880 pitch 11520 (/4 2880)
>[ 76636.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76636.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76636.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[ 76636.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[ 76637.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76637.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76637.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[ 76637.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[ 76637.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76637.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76638.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76638.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76639.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76639.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76639.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76639.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76640.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76640.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76640.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[ 76640.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[ 76640.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[ 76640.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[ 76640.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76640.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76640.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76640.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76644.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76644.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76655.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76655.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76655.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76655.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76655.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24988]
>[ 76655.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24988] width 2880 pitch 11520 (/4 2880)
>[ 76655.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76655.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76655.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76655.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76656.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[ 76656.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[ 76656.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76656.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76656.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76656.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76656.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24988]
>[ 76657.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24988] width 2880 pitch 11520 (/4 2880)
>[ 76657.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[ 76657.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[ 76661.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76661.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76662.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76662.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76662.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76662.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76662.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[ 76662.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[ 76662.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76662.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76662.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76662.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76662.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76662.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76662.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76662.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76663.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76663.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76663.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76663.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76663.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76663.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76664.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211070]
>[ 76664.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211070] width 2880 pitch 11520 (/4 2880)
>[ 76664.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76664.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76664.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76664.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76665.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76665.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76665.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b488]
>[ 76665.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b488] width 2880 pitch 11520 (/4 2880)
>[ 76666.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d56b0]
>[ 76666.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d56b0] width 2880 pitch 11520 (/4 2880)
>[ 76666.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76666.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76666.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a178]
>[ 76666.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a178] width 2880 pitch 11520 (/4 2880)
>[ 76666.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76666.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76666.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76666.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76668.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[ 76668.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[ 76668.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76668.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76668.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df21d0]
>[ 76668.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df21d0] width 2880 pitch 11520 (/4 2880)
>[ 76668.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a75e38]
>[ 76668.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a75e38] width 2880 pitch 11520 (/4 2880)
>[ 76668.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a01ab0]
>[ 76668.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a01ab0] width 2880 pitch 11520 (/4 2880)
>[ 76671.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[ 76671.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[ 76673.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[ 76673.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[ 76674.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964adc0]
>[ 76674.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964adc0] width 2880 pitch 11520 (/4 2880)
>[ 76674.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dc48]
>[ 76674.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dc48] width 2880 pitch 11520 (/4 2880)
>[ 76674.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a94e80]
>[ 76674.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a94e80] width 2880 pitch 11520 (/4 2880)
>[ 76674.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714510]
>[ 76674.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714510] width 2880 pitch 11520 (/4 2880)
>[ 76674.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788638]
>[ 76674.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788638] width 2880 pitch 11520 (/4 2880)
>[ 76674.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788788]
>[ 76674.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788788] width 2880 pitch 11520 (/4 2880)
>[ 76674.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c754d8]
>[ 76674.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c754d8] width 2880 pitch 11520 (/4 2880)
>[ 76674.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714510]
>[ 76674.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714510] width 2880 pitch 11520 (/4 2880)
>[ 76674.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97884d8]
>[ 76674.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97884d8] width 2880 pitch 11520 (/4 2880)
>[ 76674.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788788]
>[ 76674.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788788] width 2880 pitch 11520 (/4 2880)
>[ 76674.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c754d8]
>[ 76674.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c754d8] width 2880 pitch 11520 (/4 2880)
>[ 76674.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9714510]
>[ 76674.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9714510] width 2880 pitch 11520 (/4 2880)
>[ 76674.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d522c0]
>[ 76674.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d522c0] width 2880 pitch 11520 (/4 2880)
>[ 76674.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9788788]
>[ 76675.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9788788] width 2880 pitch 11520 (/4 2880)
>[ 76675.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb8fb0]
>[ 76675.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb8fb0] width 2880 pitch 11520 (/4 2880)
>[ 76675.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d522c0]
>[ 76675.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d522c0] width 2880 pitch 11520 (/4 2880)
>[ 76675.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb8fb0]
>[ 76675.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb8fb0] width 2880 pitch 11520 (/4 2880)
>[ 76675.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d522c0]
>[ 76675.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d522c0] width 2880 pitch 11520 (/4 2880)
>[ 76675.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb8fb0]
>[ 76675.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb8fb0] width 2880 pitch 11520 (/4 2880)
>[ 76675.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa044950]
>[ 76675.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa044950] width 2880 pitch 11520 (/4 2880)
>[ 76678.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa044950]
>[ 76678.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa044950] width 2880 pitch 11520 (/4 2880)
>[ 76678.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dc158]
>[ 76678.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dc158] width 2880 pitch 11520 (/4 2880)
>[ 76678.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2828]
>[ 76678.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2828] width 2880 pitch 11520 (/4 2880)
>[ 76678.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a140e8]
>[ 76678.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a140e8] width 2880 pitch 11520 (/4 2880)
>[ 76678.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dc158]
>[ 76678.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dc158] width 2880 pitch 11520 (/4 2880)
>[ 76680.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a178]
>[ 76680.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a178] width 2880 pitch 11520 (/4 2880)
>[ 76682.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa021768]
>[ 76682.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa021768] width 2880 pitch 11520 (/4 2880)
>[ 76682.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bbd8]
>[ 76682.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bbd8] width 2880 pitch 11520 (/4 2880)
>[ 76688.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76688.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76688.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa021768]
>[ 76688.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa021768] width 2880 pitch 11520 (/4 2880)
>[ 76695.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c934f0]
>[ 76695.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c934f0] width 2880 pitch 11520 (/4 2880)
>[ 76695.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bbd8]
>[ 76695.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bbd8] width 2880 pitch 11520 (/4 2880)
>[ 76695.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76695.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76695.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c1a0]
>[ 76695.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c1a0] width 2880 pitch 11520 (/4 2880)
>[ 76695.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5080]
>[ 76695.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5080] width 2880 pitch 11520 (/4 2880)
>[ 76696.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 76696.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 76696.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 76696.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 76696.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c1a0]
>[ 76696.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c1a0] width 2880 pitch 11520 (/4 2880)
>[ 76697.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76697.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76697.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5080]
>[ 76697.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5080] width 2880 pitch 11520 (/4 2880)
>[ 76697.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942f490]
>[ 76697.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942f490] width 2880 pitch 11520 (/4 2880)
>[ 76697.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5080]
>[ 76697.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5080] width 2880 pitch 11520 (/4 2880)
>[ 76697.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9935be0]
>[ 76697.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9935be0] width 2880 pitch 11520 (/4 2880)
>[ 76705.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780898]
>[ 76705.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780898] width 2880 pitch 11520 (/4 2880)
>[ 76706.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9510]
>[ 76706.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9510] width 2880 pitch 11520 (/4 2880)
>[ 76706.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76706.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76706.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9510]
>[ 76706.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9510] width 2880 pitch 11520 (/4 2880)
>[ 76706.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76706.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76706.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9510]
>[ 76706.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9510] width 2880 pitch 11520 (/4 2880)
>[ 76706.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76706.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76706.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ff548]
>[ 76706.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ff548] width 2880 pitch 11520 (/4 2880)
>[ 76706.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9bf0]
>[ 76706.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9bf0] width 2880 pitch 11520 (/4 2880)
>[ 76706.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9510]
>[ 76706.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9510] width 2880 pitch 11520 (/4 2880)
>[ 76706.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcc0a8]
>[ 76706.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcc0a8] width 2880 pitch 11520 (/4 2880)
>[ 76710.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828628]
>[ 76710.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828628] width 2880 pitch 11520 (/4 2880)
>[ 76710.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f7b0]
>[ 76710.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f7b0] width 2880 pitch 11520 (/4 2880)
>[ 76710.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76710.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76710.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e1c8]
>[ 76710.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e1c8] width 2880 pitch 11520 (/4 2880)
>[ 76710.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76710.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76710.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76710.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76710.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9bf0]
>[ 76710.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9bf0] width 2880 pitch 11520 (/4 2880)
>[ 76710.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76710.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76710.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9bf0]
>[ 76710.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9bf0] width 2880 pitch 11520 (/4 2880)
>[ 76710.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39630]
>[ 76710.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39630] width 2880 pitch 11520 (/4 2880)
>[ 76710.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b9bf0]
>[ 76710.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b9bf0] width 2880 pitch 11520 (/4 2880)
>[ 76710.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828628]
>[ 76710.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828628] width 2880 pitch 11520 (/4 2880)
>[ 76713.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76713.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76713.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f7b0]
>[ 76713.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f7b0] width 2880 pitch 11520 (/4 2880)
>[ 76713.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76713.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76713.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76713.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76713.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76713.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76713.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76713.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76713.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76713.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76713.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9510]
>[ 76713.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9510] width 2880 pitch 11520 (/4 2880)
>[ 76713.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76713.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76713.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76713.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76714.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76714.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76714.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1339c0]
>[ 76714.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1339c0] width 2880 pitch 11520 (/4 2880)
>[ 76715.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76715.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76715.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1339c0]
>[ 76715.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1339c0] width 2880 pitch 11520 (/4 2880)
>[ 76715.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e7f8]
>[ 76715.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e7f8] width 2880 pitch 11520 (/4 2880)
>[ 76715.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1339c0]
>[ 76715.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1339c0] width 2880 pitch 11520 (/4 2880)
>[ 76715.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e7f8]
>[ 76715.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e7f8] width 2880 pitch 11520 (/4 2880)
>[ 76715.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1339c0]
>[ 76715.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1339c0] width 2880 pitch 11520 (/4 2880)
>[ 76715.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e938]
>[ 76715.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e938] width 2880 pitch 11520 (/4 2880)
>[ 76715.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f650]
>[ 76715.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f650] width 2880 pitch 11520 (/4 2880)
>[ 76719.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54bc0]
>[ 76719.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54bc0] width 2880 pitch 11520 (/4 2880)
>[ 76719.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2ef0]
>[ 76719.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2ef0] width 2880 pitch 11520 (/4 2880)
>[ 76719.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2e1c8]
>[ 76719.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2e1c8] width 2880 pitch 11520 (/4 2880)
>[ 76719.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f5e8]
>[ 76719.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f5e8] width 2880 pitch 11520 (/4 2880)
>[ 76719.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f1a0]
>[ 76719.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f1a0] width 2880 pitch 11520 (/4 2880)
>[ 76719.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f2ef0]
>[ 76719.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f2ef0] width 2880 pitch 11520 (/4 2880)
>[ 76719.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f9e0]
>[ 76719.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f9e0] width 2880 pitch 11520 (/4 2880)
>[ 76719.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f5e8]
>[ 76719.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f5e8] width 2880 pitch 11520 (/4 2880)
>[ 76719.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c571f0]
>[ 76719.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c571f0] width 2880 pitch 11520 (/4 2880)
>[ 76719.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f5e8]
>[ 76719.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f5e8] width 2880 pitch 11520 (/4 2880)
>[ 76719.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76719.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76719.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76719.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76719.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76719.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76719.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780aa8]
>[ 76719.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780aa8] width 2880 pitch 11520 (/4 2880)
>[ 76719.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76719.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76719.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780aa8]
>[ 76719.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780aa8] width 2880 pitch 11520 (/4 2880)
>[ 76719.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76719.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76719.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780aa8]
>[ 76719.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780aa8] width 2880 pitch 11520 (/4 2880)
>[ 76719.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 76719.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 76719.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76719.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76719.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76719.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76719.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76719.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76719.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d93918]
>[ 76719.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d93918] width 2880 pitch 11520 (/4 2880)
>[ 76720.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f5e8]
>[ 76720.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f5e8] width 2880 pitch 11520 (/4 2880)
>[ 76720.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76720.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76720.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f9e0]
>[ 76720.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f9e0] width 2880 pitch 11520 (/4 2880)
>[ 76720.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76720.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76720.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76720.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76720.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95100]
>[ 76720.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95100] width 2880 pitch 11520 (/4 2880)
>[ 76720.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76720.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76720.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d93918]
>[ 76720.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d93918] width 2880 pitch 11520 (/4 2880)
>[ 76720.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f9e0]
>[ 76720.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f9e0] width 2880 pitch 11520 (/4 2880)
>[ 76720.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494f0]
>[ 76720.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494f0] width 2880 pitch 11520 (/4 2880)
>[ 76720.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54bc0]
>[ 76720.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54bc0] width 2880 pitch 11520 (/4 2880)
>[ 76723.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfbaf8]
>[ 76723.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfbaf8] width 2880 pitch 11520 (/4 2880)
>[ 76729.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76729.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfbaf8]
>[ 76732.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfbaf8] width 2880 pitch 11520 (/4 2880)
>[ 76732.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfbaf8]
>[ 76732.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfbaf8] width 2880 pitch 11520 (/4 2880)
>[ 76732.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfbaf8]
>[ 76732.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfbaf8] width 2880 pitch 11520 (/4 2880)
>[ 76732.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa131670]
>[ 76732.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa131670] width 2880 pitch 11520 (/4 2880)
>[ 76732.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76732.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76732.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76732.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76732.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76732.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76732.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76732.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76732.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76733.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76733.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64918]
>[ 76733.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64918] width 2880 pitch 11520 (/4 2880)
>[ 76733.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d52210]
>[ 76733.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d52210] width 2880 pitch 11520 (/4 2880)
>[ 76742.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb8990]
>[ 76742.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb8990] width 2880 pitch 11520 (/4 2880)
>[ 76742.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76742.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76742.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26ca8]
>[ 76742.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26ca8] width 2880 pitch 11520 (/4 2880)
>[ 76742.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494f0]
>[ 76742.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494f0] width 2880 pitch 11520 (/4 2880)
>[ 76742.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfba80]
>[ 76742.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfba80] width 2880 pitch 11520 (/4 2880)
>[ 76742.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c97830]
>[ 76742.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c97830] width 2880 pitch 11520 (/4 2880)
>[ 76742.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494f0]
>[ 76743.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494f0] width 2880 pitch 11520 (/4 2880)
>[ 76743.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c41d8]
>[ 76743.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c41d8] width 2880 pitch 11520 (/4 2880)
>[ 76743.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76743.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76743.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c41d8]
>[ 76743.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c41d8] width 2880 pitch 11520 (/4 2880)
>[ 76743.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7c620]
>[ 76743.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7c620] width 2880 pitch 11520 (/4 2880)
>[ 76743.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfba80]
>[ 76743.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfba80] width 2880 pitch 11520 (/4 2880)
>[ 76743.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76743.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76743.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97494f0]
>[ 76743.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97494f0] width 2880 pitch 11520 (/4 2880)
>[ 76743.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f26ca8]
>[ 76743.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f26ca8] width 2880 pitch 11520 (/4 2880)
>[ 76743.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f800]
>[ 76743.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f800] width 2880 pitch 11520 (/4 2880)
>[ 76743.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76743.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76743.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c41d8]
>[ 76743.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c41d8] width 2880 pitch 11520 (/4 2880)
>[ 76743.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1f800]
>[ 76743.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1f800] width 2880 pitch 11520 (/4 2880)
>[ 76743.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76743.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76743.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c41d8]
>[ 76743.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c41d8] width 2880 pitch 11520 (/4 2880)
>[ 76744.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76744.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76744.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76744.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76744.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76744.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76744.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76744.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76744.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76744.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76744.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76744.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76744.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76744.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76744.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76744.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76744.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86b40]
>[ 76744.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86b40] width 2880 pitch 11520 (/4 2880)
>[ 76744.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 76744.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 76744.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 76744.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 76745.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa086250]
>[ 76745.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa086250] width 2880 pitch 11520 (/4 2880)
>[ 76745.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 76745.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 76745.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76745.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76745.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76745.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76745.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7db0]
>[ 76745.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7db0] width 2880 pitch 11520 (/4 2880)
>[ 76745.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7db0]
>[ 76745.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7db0] width 2880 pitch 11520 (/4 2880)
>[ 76749.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76749.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76754.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76754.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76757.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76757.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76757.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76757.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76757.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76757.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76757.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76757.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76757.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76757.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76757.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76757.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76758.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76758.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76758.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76758.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76758.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76758.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76758.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76758.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76758.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76758.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76759.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76759.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76759.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d1fd0]
>[ 76759.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d1fd0] width 2880 pitch 11520 (/4 2880)
>[ 76759.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d1d60]
>[ 76759.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d1d60] width 2880 pitch 11520 (/4 2880)
>[ 76759.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743f20]
>[ 76759.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743f20] width 2880 pitch 11520 (/4 2880)
>[ 76759.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ab8]
>[ 76759.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ab8] width 2880 pitch 11520 (/4 2880)
>[ 76768.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633900]
>[ 76768.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633900] width 2880 pitch 11520 (/4 2880)
>[ 76773.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d15b08]
>[ 76773.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d15b08] width 2880 pitch 11520 (/4 2880)
>[ 76776.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43f88]
>[ 76776.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43f88] width 2880 pitch 11520 (/4 2880)
>[ 76780.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76780.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76783.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cab10]
>[ 76783.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cab10] width 2880 pitch 11520 (/4 2880)
>[ 76784.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dbac8]
>[ 76784.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dbac8] width 2880 pitch 11520 (/4 2880)
>[ 76784.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c078]
>[ 76784.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c078] width 2880 pitch 11520 (/4 2880)
>[ 76784.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76784.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76784.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811be8]
>[ 76784.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811be8] width 2880 pitch 11520 (/4 2880)
>[ 76785.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf8280]
>[ 76785.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf8280] width 2880 pitch 11520 (/4 2880)
>[ 76785.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c078]
>[ 76785.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c078] width 2880 pitch 11520 (/4 2880)
>[ 76785.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dbac8]
>[ 76785.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dbac8] width 2880 pitch 11520 (/4 2880)
>[ 76785.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981608]
>[ 76785.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981608] width 2880 pitch 11520 (/4 2880)
>[ 76785.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3ec10]
>[ 76785.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3ec10] width 2880 pitch 11520 (/4 2880)
>[ 76785.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c078]
>[ 76785.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c078] width 2880 pitch 11520 (/4 2880)
>[ 76796.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a448]
>[ 76796.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a448] width 2880 pitch 11520 (/4 2880)
>[ 76796.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085e18]
>[ 76796.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085e18] width 2880 pitch 11520 (/4 2880)
>[ 76796.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a448]
>[ 76796.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a448] width 2880 pitch 11520 (/4 2880)
>[ 76796.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085e18]
>[ 76796.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085e18] width 2880 pitch 11520 (/4 2880)
>[ 76796.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76796.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76796.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085e18]
>[ 76796.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085e18] width 2880 pitch 11520 (/4 2880)
>[ 76796.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76796.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76796.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085e18]
>[ 76796.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085e18] width 2880 pitch 11520 (/4 2880)
>[ 76796.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76796.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76797.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24bb8]
>[ 76797.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24bb8] width 2880 pitch 11520 (/4 2880)
>[ 76798.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76798.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76798.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811888]
>[ 76798.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811888] width 2880 pitch 11520 (/4 2880)
>[ 76798.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76798.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76798.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d1fd0]
>[ 76798.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d1fd0] width 2880 pitch 11520 (/4 2880)
>[ 76798.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ede8]
>[ 76798.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ede8] width 2880 pitch 11520 (/4 2880)
>[ 76798.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186e28]
>[ 76799.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186e28] width 2880 pitch 11520 (/4 2880)
>[ 76799.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c930c8]
>[ 76799.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c930c8] width 2880 pitch 11520 (/4 2880)
>[ 76802.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76802.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76802.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c21460]
>[ 76802.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c21460] width 2880 pitch 11520 (/4 2880)
>[ 76802.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76802.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76802.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa022098]
>[ 76802.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa022098] width 2880 pitch 11520 (/4 2880)
>[ 76802.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76802.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76802.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa022098]
>[ 76802.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa022098] width 2880 pitch 11520 (/4 2880)
>[ 76802.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76802.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76802.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976dce0]
>[ 76802.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976dce0] width 2880 pitch 11520 (/4 2880)
>[ 76802.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c42898]
>[ 76802.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c42898] width 2880 pitch 11520 (/4 2880)
>[ 76803.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76803.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76804.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76804.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76804.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76804.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76804.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76804.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76804.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028318]
>[ 76804.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028318] width 2880 pitch 11520 (/4 2880)
>[ 76804.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76804.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76804.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0758a0]
>[ 76804.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0758a0] width 2880 pitch 11520 (/4 2880)
>[ 76804.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76804.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76811.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76811.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76811.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76811.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76811.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76812.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76812.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0912d0]
>[ 76812.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0912d0] width 2880 pitch 11520 (/4 2880)
>[ 76812.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76812.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76812.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfea48]
>[ 76812.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfea48] width 2880 pitch 11520 (/4 2880)
>[ 76813.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76813.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76813.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76814.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76814.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76814.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76814.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76814.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76814.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e39e0]
>[ 76814.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e39e0] width 2880 pitch 11520 (/4 2880)
>[ 76837.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa308]
>[ 76837.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa308] width 2880 pitch 11520 (/4 2880)
>[ 76851.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76851.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76851.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29960]
>[ 76851.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29960] width 2880 pitch 11520 (/4 2880)
>[ 76852.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d523b0]
>[ 76852.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d523b0] width 2880 pitch 11520 (/4 2880)
>[ 76852.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d7760]
>[ 76852.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d7760] width 2880 pitch 11520 (/4 2880)
>[ 76852.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f168]
>[ 76852.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f168] width 2880 pitch 11520 (/4 2880)
>[ 76852.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76852.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76852.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76852.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76852.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76853.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76853.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f168]
>[ 76853.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f168] width 2880 pitch 11520 (/4 2880)
>[ 76853.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f3a0]
>[ 76853.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f3a0] width 2880 pitch 11520 (/4 2880)
>[ 76853.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d5690]
>[ 76853.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d5690] width 2880 pitch 11520 (/4 2880)
>[ 76853.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76854.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76854.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582160]
>[ 76854.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582160] width 2880 pitch 11520 (/4 2880)
>[ 76854.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f3a0]
>[ 76854.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f3a0] width 2880 pitch 11520 (/4 2880)
>[ 76855.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ca6f8]
>[ 76855.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ca6f8] width 2880 pitch 11520 (/4 2880)
>[ 76855.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9754350]
>[ 76855.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9754350] width 2880 pitch 11520 (/4 2880)
>[ 76855.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ca6f8]
>[ 76855.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ca6f8] width 2880 pitch 11520 (/4 2880)
>[ 76855.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9754350]
>[ 76855.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9754350] width 2880 pitch 11520 (/4 2880)
>[ 76872.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76872.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76872.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76872.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76872.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76872.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76872.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76872.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76872.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76872.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76872.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3c40]
>[ 76872.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3c40] width 2880 pitch 11520 (/4 2880)
>[ 76872.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f168]
>[ 76872.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f168] width 2880 pitch 11520 (/4 2880)
>[ 76872.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b41488]
>[ 76872.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b41488] width 2880 pitch 11520 (/4 2880)
>[ 76872.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f168]
>[ 76872.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f168] width 2880 pitch 11520 (/4 2880)
>[ 76875.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76875.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76875.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76875.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76875.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76875.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76875.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76876.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76876.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079120]
>[ 76876.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079120] width 2880 pitch 11520 (/4 2880)
>[ 76876.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76876.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76876.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76876.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76876.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76876.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76876.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76876.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76876.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76876.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76876.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76876.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76876.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76876.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76876.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76876.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76876.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76876.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76876.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76876.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76876.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76876.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76876.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090628]
>[ 76876.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090628] width 2880 pitch 11520 (/4 2880)
>[ 76876.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76876.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76877.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76877.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76877.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b41488]
>[ 76877.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b41488] width 2880 pitch 11520 (/4 2880)
>[ 76877.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76877.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76877.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbcff8]
>[ 76877.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbcff8] width 2880 pitch 11520 (/4 2880)
>[ 76877.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec40]
>[ 76877.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec40] width 2880 pitch 11520 (/4 2880)
>[ 76878.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079120]
>[ 76878.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079120] width 2880 pitch 11520 (/4 2880)
>[ 76878.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b41488]
>[ 76878.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b41488] width 2880 pitch 11520 (/4 2880)
>[ 76878.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b41488]
>[ 76878.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b41488] width 2880 pitch 11520 (/4 2880)
>[ 76880.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c692c0]
>[ 76881.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c692c0] width 2880 pitch 11520 (/4 2880)
>[ 76881.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ca70]
>[ 76881.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ca70] width 2880 pitch 11520 (/4 2880)
>[ 76881.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b3f0]
>[ 76881.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b3f0] width 2880 pitch 11520 (/4 2880)
>[ 76881.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c692c0]
>[ 76881.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c692c0] width 2880 pitch 11520 (/4 2880)
>[ 76881.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ca70]
>[ 76881.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ca70] width 2880 pitch 11520 (/4 2880)
>[ 76882.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741e90]
>[ 76882.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741e90] width 2880 pitch 11520 (/4 2880)
>[ 76882.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb8a8]
>[ 76882.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb8a8] width 2880 pitch 11520 (/4 2880)
>[ 76882.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29838]
>[ 76882.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29838] width 2880 pitch 11520 (/4 2880)
>[ 76882.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76882.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76884.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76884.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76884.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76884.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76885.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cab10]
>[ 76885.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cab10] width 2880 pitch 11520 (/4 2880)
>[ 76885.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76885.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76885.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76885.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76885.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76885.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76885.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76885.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76886.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76886.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76887.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76887.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76887.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76887.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76887.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76887.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76887.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76887.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76887.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 76887.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 76893.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76893.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76893.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76893.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76894.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76894.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76894.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76894.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76894.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76894.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76894.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76895.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76895.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76895.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76895.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76895.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76895.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76895.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76896.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76896.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76898.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76898.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76898.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76898.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76898.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76898.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76898.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76898.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76898.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76898.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76898.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76898.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76954.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76954.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76954.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76954.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76954.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76954.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76954.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76954.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76955.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76955.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76955.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76955.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76955.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76955.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76955.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76955.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76955.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76955.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76956.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76956.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76956.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76956.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76956.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76956.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76959.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4ea8]
>[ 76959.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4ea8] width 2880 pitch 11520 (/4 2880)
>[ 76960.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76960.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76960.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9790c28]
>[ 76960.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9790c28] width 2880 pitch 11520 (/4 2880)
>[ 76960.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a52c0]
>[ 76960.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a52c0] width 2880 pitch 11520 (/4 2880)
>[ 76960.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76960.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76960.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b3c0]
>[ 76960.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b3c0] width 2880 pitch 11520 (/4 2880)
>[ 76980.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ad80]
>[ 76980.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ad80] width 2880 pitch 11520 (/4 2880)
>[ 76980.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76980.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76980.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76980.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76980.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ad80]
>[ 76980.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ad80] width 2880 pitch 11520 (/4 2880)
>[ 76980.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b3c0]
>[ 76980.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b3c0] width 2880 pitch 11520 (/4 2880)
>[ 76981.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76981.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76981.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5c48]
>[ 76981.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5c48] width 2880 pitch 11520 (/4 2880)
>[ 76981.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76981.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76982.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b3c0]
>[ 76982.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b3c0] width 2880 pitch 11520 (/4 2880)
>[ 76982.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76982.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76982.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46ac0]
>[ 76982.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46ac0] width 2880 pitch 11520 (/4 2880)
>[ 76984.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76984.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76984.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76984.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76984.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b3c0]
>[ 76984.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b3c0] width 2880 pitch 11520 (/4 2880)
>[ 76984.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76984.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76984.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76984.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76985.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76985.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76985.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a8f8]
>[ 76985.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a8f8] width 2880 pitch 11520 (/4 2880)
>[ 76986.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76986.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 76986.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58d68]
>[ 76986.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58d68] width 2880 pitch 11520 (/4 2880)
>[ 76986.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749138]
>[ 76986.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749138] width 2880 pitch 11520 (/4 2880)
>[ 76986.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a8f8]
>[ 76986.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a8f8] width 2880 pitch 11520 (/4 2880)
>[ 76989.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7e68]
>[ 76989.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7e68] width 2880 pitch 11520 (/4 2880)
>[ 77099.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d27b00]
>[ 77099.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d27b00] width 2880 pitch 11520 (/4 2880)
>[ 77144.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a64a0]
>[ 77144.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a64a0] width 2880 pitch 11520 (/4 2880)
>[ 77144.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77144.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77144.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77144.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77144.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77144.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77145.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0985d8]
>[ 77145.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0985d8] width 2880 pitch 11520 (/4 2880)
>[ 77145.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d14370]
>[ 77145.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d14370] width 2880 pitch 11520 (/4 2880)
>[ 77145.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77145.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77145.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c048]
>[ 77145.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c048] width 2880 pitch 11520 (/4 2880)
>[ 77146.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77146.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77146.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77146.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77146.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c048]
>[ 77146.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c048] width 2880 pitch 11520 (/4 2880)
>[ 77147.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983a448]
>[ 77147.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983a448] width 2880 pitch 11520 (/4 2880)
>[ 77147.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77147.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77147.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77147.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77158.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77158.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77158.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77158.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77158.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77158.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77158.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77158.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77158.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77158.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77158.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b433a0]
>[ 77158.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b433a0] width 2880 pitch 11520 (/4 2880)
>[ 77158.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77158.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77158.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77158.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77158.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2052f0]
>[ 77158.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2052f0] width 2880 pitch 11520 (/4 2880)
>[ 77159.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2052f0]
>[ 77159.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2052f0] width 2880 pitch 11520 (/4 2880)
>[ 77159.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098b80]
>[ 77159.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098b80] width 2880 pitch 11520 (/4 2880)
>[ 77162.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99814e0]
>[ 77162.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99814e0] width 2880 pitch 11520 (/4 2880)
>[ 77162.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05b5f0]
>[ 77162.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05b5f0] width 2880 pitch 11520 (/4 2880)
>[ 77162.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99814e0]
>[ 77162.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99814e0] width 2880 pitch 11520 (/4 2880)
>[ 77162.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966f968]
>[ 77162.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966f968] width 2880 pitch 11520 (/4 2880)
>[ 77163.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966f968]
>[ 77163.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966f968] width 2880 pitch 11520 (/4 2880)
>[ 77163.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976de00]
>[ 77163.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976de00] width 2880 pitch 11520 (/4 2880)
>[ 77163.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77163.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77163.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99814e0]
>[ 77163.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99814e0] width 2880 pitch 11520 (/4 2880)
>[ 77164.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966f968]
>[ 77164.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966f968] width 2880 pitch 11520 (/4 2880)
>[ 77164.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99814e0]
>[ 77164.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99814e0] width 2880 pitch 11520 (/4 2880)
>[ 77164.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186dd8]
>[ 77164.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186dd8] width 2880 pitch 11520 (/4 2880)
>[ 77165.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77165.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77165.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186dd8]
>[ 77165.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186dd8] width 2880 pitch 11520 (/4 2880)
>[ 77165.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77165.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77165.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77165.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77165.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77165.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77166.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77420]
>[ 77166.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77420] width 2880 pitch 11520 (/4 2880)
>[ 77166.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77166.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77166.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77166.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77166.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4c338]
>[ 77166.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4c338] width 2880 pitch 11520 (/4 2880)
>[ 77189.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f2450]
>[ 77189.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f2450] width 2880 pitch 11520 (/4 2880)
>[ 77189.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77189.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77189.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea73b8]
>[ 77189.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea73b8] width 2880 pitch 11520 (/4 2880)
>[ 77189.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99814e0]
>[ 77189.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99814e0] width 2880 pitch 11520 (/4 2880)
>[ 77190.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77190.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77190.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77190.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77190.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77190.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77191.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77191.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77191.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77191.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77191.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77191.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77191.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77191.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77191.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77191.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77192.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77192.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77192.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77192.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77192.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77192.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77192.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77193.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77193.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77193.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77193.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 77193.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 77193.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77193.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77193.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77193.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77193.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77193.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77193.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77193.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77194.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77194.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77194.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77194.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77194.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77194.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77194.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77194.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77194.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77194.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77206.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77206.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77207.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77207.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77210.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77210.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77216.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77216.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77236.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77236.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77236.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77236.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77236.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9409110]
>[ 77236.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9409110] width 2880 pitch 11520 (/4 2880)
>[ 77236.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77236.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77237.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b408]
>[ 77237.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b408] width 2880 pitch 11520 (/4 2880)
>[ 77237.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77237.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77237.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174068]
>[ 77237.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174068] width 2880 pitch 11520 (/4 2880)
>[ 77237.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0db890]
>[ 77237.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0db890] width 2880 pitch 11520 (/4 2880)
>[ 77237.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77237.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77237.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77238.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77238.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77238.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77238.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174068]
>[ 77238.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174068] width 2880 pitch 11520 (/4 2880)
>[ 77238.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77238.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77238.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174068]
>[ 77238.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174068] width 2880 pitch 11520 (/4 2880)
>[ 77238.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77238.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77278.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77278.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77278.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77278.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77278.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77278.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77278.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77278.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77278.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77278.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77278.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77278.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77278.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77278.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77278.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77278.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77278.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77278.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77278.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87890]
>[ 77278.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87890] width 2880 pitch 11520 (/4 2880)
>[ 77278.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77278.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77278.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4d48]
>[ 77278.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4d48] width 2880 pitch 11520 (/4 2880)
>[ 77281.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87890]
>[ 77281.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87890] width 2880 pitch 11520 (/4 2880)
>[ 77282.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973ba60]
>[ 77282.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973ba60] width 2880 pitch 11520 (/4 2880)
>[ 77282.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f65a8]
>[ 77282.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f65a8] width 2880 pitch 11520 (/4 2880)
>[ 77282.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08320]
>[ 77282.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08320] width 2880 pitch 11520 (/4 2880)
>[ 77282.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973ba60]
>[ 77282.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973ba60] width 2880 pitch 11520 (/4 2880)
>[ 77282.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973ba60]
>[ 77282.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973ba60] width 2880 pitch 11520 (/4 2880)
>[ 77282.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65950]
>[ 77282.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65950] width 2880 pitch 11520 (/4 2880)
>[ 77282.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d27c90]
>[ 77282.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d27c90] width 2880 pitch 11520 (/4 2880)
>[ 77282.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65950]
>[ 77282.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65950] width 2880 pitch 11520 (/4 2880)
>[ 77282.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d27c90]
>[ 77282.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d27c90] width 2880 pitch 11520 (/4 2880)
>[ 77298.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77298.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77298.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77298.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77299.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77299.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77299.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77299.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77299.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77299.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77299.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77299.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77299.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77299.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77299.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77299.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77300.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77300.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77301.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77301.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77301.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77301.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77302.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77302.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77303.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77303.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77306.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77306.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77307.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77307.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77325.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99516e8]
>[ 77326.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99516e8] width 2880 pitch 11520 (/4 2880)
>[ 77326.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77326.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77326.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77326.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77326.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77326.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77326.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77326.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77339.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77339.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77339.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77339.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77339.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f249f0]
>[ 77339.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f249f0] width 2880 pitch 11520 (/4 2880)
>[ 77339.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77339.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77339.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77339.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77339.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cca7d8]
>[ 77339.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cca7d8] width 2880 pitch 11520 (/4 2880)
>[ 77339.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77339.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77339.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77339.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77339.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c648]
>[ 77339.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c648] width 2880 pitch 11520 (/4 2880)
>[ 77341.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24b00]
>[ 77341.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24b00] width 2880 pitch 11520 (/4 2880)
>[ 77341.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9730440]
>[ 77341.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9730440] width 2880 pitch 11520 (/4 2880)
>[ 77341.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77341.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77341.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77342.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77342.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823668]
>[ 77342.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823668] width 2880 pitch 11520 (/4 2880)
>[ 77342.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24b00]
>[ 77342.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24b00] width 2880 pitch 11520 (/4 2880)
>[ 77342.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7c70]
>[ 77342.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7c70] width 2880 pitch 11520 (/4 2880)
>[ 77342.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77342.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77342.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77342.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77342.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa027630]
>[ 77342.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa027630] width 2880 pitch 11520 (/4 2880)
>[ 77342.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77342.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77342.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa027630]
>[ 77342.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa027630] width 2880 pitch 11520 (/4 2880)
>[ 77342.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77342.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77342.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa027630]
>[ 77342.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa027630] width 2880 pitch 11520 (/4 2880)
>[ 77342.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7c70]
>[ 77342.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7c70] width 2880 pitch 11520 (/4 2880)
>[ 77342.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77342.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77342.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77342.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77342.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7c70]
>[ 77343.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7c70] width 2880 pitch 11520 (/4 2880)
>[ 77343.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77343.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77343.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77343.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77343.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7c70]
>[ 77343.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7c70] width 2880 pitch 11520 (/4 2880)
>[ 77343.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77343.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77343.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77343.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77343.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77343.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77343.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77343.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77343.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77343.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623e30]
>[ 77344.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623e30] width 2880 pitch 11520 (/4 2880)
>[ 77344.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77344.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77344.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9623e30]
>[ 77344.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9623e30] width 2880 pitch 11520 (/4 2880)
>[ 77344.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77344.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77344.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[ 77344.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[ 77344.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[ 77344.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[ 77344.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77344.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77344.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77344.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77344.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77344.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77344.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77344.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77344.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77345.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77345.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77345.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77345.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77345.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77345.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77345.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77345.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77345.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77345.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77345.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[ 77345.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[ 77345.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77345.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77345.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[ 77345.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[ 77345.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77345.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77345.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77345.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77345.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77345.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77345.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77345.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77345.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77345.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77345.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 77345.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 77345.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77345.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77345.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77345.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77345.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77345.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77345.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99c7538]
>[ 77345.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99c7538] width 2880 pitch 11520 (/4 2880)
>[ 77346.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9626260]
>[ 77346.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9626260] width 2880 pitch 11520 (/4 2880)
>[ 77346.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9614488]
>[ 77346.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9614488] width 2880 pitch 11520 (/4 2880)
>[ 77346.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77346.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77346.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b220d8]
>[ 77346.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b220d8] width 2880 pitch 11520 (/4 2880)
>[ 77346.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24b00]
>[ 77346.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24b00] width 2880 pitch 11520 (/4 2880)
>[ 77346.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77346.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77346.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69348]
>[ 77346.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69348] width 2880 pitch 11520 (/4 2880)
>[ 77346.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9608d38]
>[ 77346.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9608d38] width 2880 pitch 11520 (/4 2880)
>[ 77346.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69348]
>[ 77346.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69348] width 2880 pitch 11520 (/4 2880)
>[ 77351.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa8b8]
>[ 77351.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa8b8] width 2880 pitch 11520 (/4 2880)
>[ 77351.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[ 77351.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[ 77351.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[ 77351.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[ 77351.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[ 77351.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[ 77352.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97526f8]
>[ 77352.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97526f8] width 2880 pitch 11520 (/4 2880)
>[ 77352.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa8b8]
>[ 77352.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa8b8] width 2880 pitch 11520 (/4 2880)
>[ 77352.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77353.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77353.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77353.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77353.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77353.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77354.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77354.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77354.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77354.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77354.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24b00]
>[ 77354.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24b00] width 2880 pitch 11520 (/4 2880)
>[ 77354.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77354.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77376.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77376.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77376.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77376.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77376.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77376.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77376.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77376.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77376.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77376.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77377.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77377.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77377.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77377.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77377.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77377.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77377.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77377.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77377.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc6710]
>[ 77378.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc6710] width 2880 pitch 11520 (/4 2880)
>[ 77378.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8a220]
>[ 77378.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8a220] width 2880 pitch 11520 (/4 2880)
>[ 77379.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11b428]
>[ 77379.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11b428] width 2880 pitch 11520 (/4 2880)
>[ 77401.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07dc40]
>[ 77401.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07dc40] width 2880 pitch 11520 (/4 2880)
>[ 77401.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37780]
>[ 77401.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37780] width 2880 pitch 11520 (/4 2880)
>[ 77402.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ccfa0]
>[ 77402.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ccfa0] width 2880 pitch 11520 (/4 2880)
>[ 77402.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 77402.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 77402.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37780]
>[ 77402.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37780] width 2880 pitch 11520 (/4 2880)
>[ 77402.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 77402.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 77403.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37780]
>[ 77403.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37780] width 2880 pitch 11520 (/4 2880)
>[ 77403.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07dc40]
>[ 77403.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07dc40] width 2880 pitch 11520 (/4 2880)
>[ 77403.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37780]
>[ 77403.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37780] width 2880 pitch 11520 (/4 2880)
>[ 77403.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07dc40]
>[ 77403.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07dc40] width 2880 pitch 11520 (/4 2880)
>[ 77403.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970c658]
>[ 77403.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970c658] width 2880 pitch 11520 (/4 2880)
>[ 77424.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e6038]
>[ 77424.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e6038] width 2880 pitch 11520 (/4 2880)
>[ 77429.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9748f48]
>[ 77429.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9748f48] width 2880 pitch 11520 (/4 2880)
>[ 77429.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e54b8]
>[ 77429.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e54b8] width 2880 pitch 11520 (/4 2880)
>[ 77430.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e54b8]
>[ 77430.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e54b8] width 2880 pitch 11520 (/4 2880)
>[ 77430.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e54b8]
>[ 77430.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e54b8] width 2880 pitch 11520 (/4 2880)
>[ 77459.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77459.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77459.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa146588]
>[ 77459.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa146588] width 2880 pitch 11520 (/4 2880)
>[ 77459.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972add8]
>[ 77459.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972add8] width 2880 pitch 11520 (/4 2880)
>[ 77459.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 77459.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 77459.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e47988]
>[ 77459.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e47988] width 2880 pitch 11520 (/4 2880)
>[ 77459.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971cba8]
>[ 77459.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971cba8] width 2880 pitch 11520 (/4 2880)
>[ 77459.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa146588]
>[ 77459.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa146588] width 2880 pitch 11520 (/4 2880)
>[ 77459.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa146588]
>[ 77459.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa146588] width 2880 pitch 11520 (/4 2880)
>[ 77459.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86490]
>[ 77459.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86490] width 2880 pitch 11520 (/4 2880)
>[ 77461.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590500]
>[ 77461.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590500] width 2880 pitch 11520 (/4 2880)
>[ 77461.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77461.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77461.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e6108]
>[ 77461.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e6108] width 2880 pitch 11520 (/4 2880)
>[ 77461.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[ 77461.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[ 77461.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63330]
>[ 77461.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63330] width 2880 pitch 11520 (/4 2880)
>[ 77461.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1fc88]
>[ 77461.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1fc88] width 2880 pitch 11520 (/4 2880)
>[ 77474.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972add8]
>[ 77474.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972add8] width 2880 pitch 11520 (/4 2880)
>[ 77500.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030b98]
>[ 77500.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030b98] width 2880 pitch 11520 (/4 2880)
>[ 77500.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0313c0]
>[ 77500.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0313c0] width 2880 pitch 11520 (/4 2880)
>[ 77500.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030b98]
>[ 77500.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030b98] width 2880 pitch 11520 (/4 2880)
>[ 77500.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0313c0]
>[ 77500.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0313c0] width 2880 pitch 11520 (/4 2880)
>[ 77500.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030b98]
>[ 77500.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030b98] width 2880 pitch 11520 (/4 2880)
>[ 77500.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1877f8]
>[ 77501.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1877f8] width 2880 pitch 11520 (/4 2880)
>[ 77501.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031470]
>[ 77501.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031470] width 2880 pitch 11520 (/4 2880)
>[ 77501.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031498]
>[ 77501.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031498] width 2880 pitch 11520 (/4 2880)
>[ 77501.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24290]
>[ 77501.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24290] width 2880 pitch 11520 (/4 2880)
>[ 77501.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030b98]
>[ 77501.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030b98] width 2880 pitch 11520 (/4 2880)
>[ 77501.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1877f8]
>[ 77501.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1877f8] width 2880 pitch 11520 (/4 2880)
>[ 77501.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1878b8]
>[ 77501.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1878b8] width 2880 pitch 11520 (/4 2880)
>[ 77502.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e6428]
>[ 77502.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e6428] width 2880 pitch 11520 (/4 2880)
>[ 77502.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e6428]
>[ 77502.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e6428] width 2880 pitch 11520 (/4 2880)
>[ 77502.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77502.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77503.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e6428]
>[ 77503.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e6428] width 2880 pitch 11520 (/4 2880)
>[ 77503.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77503.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77503.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031420]
>[ 77503.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031420] width 2880 pitch 11520 (/4 2880)
>[ 77503.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77503.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031420]
>[ 77503.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031420] width 2880 pitch 11520 (/4 2880)
>[ 77503.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77503.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77503.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031420]
>[ 77503.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031420] width 2880 pitch 11520 (/4 2880)
>[ 77505.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a71f8]
>[ 77505.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a71f8] width 2880 pitch 11520 (/4 2880)
>[ 77505.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a71f8]
>[ 77505.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a71f8] width 2880 pitch 11520 (/4 2880)
>[ 77505.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad5a88]
>[ 77505.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad5a88] width 2880 pitch 11520 (/4 2880)
>[ 77505.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a71f8]
>[ 77505.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a71f8] width 2880 pitch 11520 (/4 2880)
>[ 77505.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962e9c0]
>[ 77505.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962e9c0] width 2880 pitch 11520 (/4 2880)
>[ 77524.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa187920]
>[ 77524.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa187920] width 2880 pitch 11520 (/4 2880)
>[ 77525.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5588]
>[ 77525.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5588] width 2880 pitch 11520 (/4 2880)
>[ 77525.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2c88]
>[ 77525.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2c88] width 2880 pitch 11520 (/4 2880)
>[ 77525.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9753340]
>[ 77525.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9753340] width 2880 pitch 11520 (/4 2880)
>[ 77525.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77525.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77525.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb8a8]
>[ 77525.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb8a8] width 2880 pitch 11520 (/4 2880)
>[ 77526.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f4198]
>[ 77526.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f4198] width 2880 pitch 11520 (/4 2880)
>[ 77526.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13d390]
>[ 77527.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13d390] width 2880 pitch 11520 (/4 2880)
>[ 77527.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb8a8]
>[ 77527.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb8a8] width 2880 pitch 11520 (/4 2880)
>[ 77527.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dcbc8]
>[ 77528.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dcbc8] width 2880 pitch 11520 (/4 2880)
>[ 77528.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dcbc8]
>[ 77528.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dcbc8] width 2880 pitch 11520 (/4 2880)
>[ 77528.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9753340]
>[ 77528.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9753340] width 2880 pitch 11520 (/4 2880)
>[ 77528.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9753340]
>[ 77528.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9753340] width 2880 pitch 11520 (/4 2880)
>[ 77529.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9158]
>[ 77529.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9158] width 2880 pitch 11520 (/4 2880)
>[ 77529.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9753340]
>[ 77529.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9753340] width 2880 pitch 11520 (/4 2880)
>[ 77529.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9158]
>[ 77529.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9158] width 2880 pitch 11520 (/4 2880)
>[ 77553.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968ea48]
>[ 77553.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968ea48] width 2880 pitch 11520 (/4 2880)
>[ 77578.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a2900]
>[ 77578.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a2900] width 2880 pitch 11520 (/4 2880)
>[ 77578.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77578.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77578.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5eb8]
>[ 77578.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5eb8] width 2880 pitch 11520 (/4 2880)
>[ 77578.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23d08]
>[ 77578.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23d08] width 2880 pitch 11520 (/4 2880)
>[ 77578.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1260]
>[ 77579.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1260] width 2880 pitch 11520 (/4 2880)
>[ 77579.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77579.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77579.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb8a8]
>[ 77579.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb8a8] width 2880 pitch 11520 (/4 2880)
>[ 77579.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145558]
>[ 77579.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145558] width 2880 pitch 11520 (/4 2880)
>[ 77579.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb8a8]
>[ 77579.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb8a8] width 2880 pitch 11520 (/4 2880)
>[ 77579.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98226b0]
>[ 77579.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98226b0] width 2880 pitch 11520 (/4 2880)
>[ 77581.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24060]
>[ 77581.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24060] width 2880 pitch 11520 (/4 2880)
>[ 77581.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23cd8]
>[ 77581.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23cd8] width 2880 pitch 11520 (/4 2880)
>[ 77581.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23cd8]
>[ 77581.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23cd8] width 2880 pitch 11520 (/4 2880)
>[ 77581.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77581.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77581.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77581.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77581.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77581.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77581.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145558]
>[ 77581.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145558] width 2880 pitch 11520 (/4 2880)
>[ 77629.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77629.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77629.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77629.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77629.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77629.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77629.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77629.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77629.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77629.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77629.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5d28]
>[ 77629.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5d28] width 2880 pitch 11520 (/4 2880)
>[ 77629.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77629.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77629.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77629.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77629.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77629.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77629.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5d28]
>[ 77629.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5d28] width 2880 pitch 11520 (/4 2880)
>[ 77629.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77629.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77629.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77629.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77629.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77629.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77629.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77629.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77630.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77630.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77630.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77630.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77630.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77630.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77630.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77630.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77630.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77630.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77630.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77630.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77630.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77630.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77631.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77631.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981398]
>[ 77631.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981398] width 2880 pitch 11520 (/4 2880)
>[ 77631.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24060]
>[ 77631.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24060] width 2880 pitch 11520 (/4 2880)
>[ 77631.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97880]
>[ 77631.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97880] width 2880 pitch 11520 (/4 2880)
>[ 77631.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77631.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77631.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77631.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77631.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77631.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77631.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77633.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77633.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77633.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77633.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77634.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77634.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77634.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77634.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77634.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77634.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77635.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77635.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77635.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77635.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77635.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77635.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77635.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9781018]
>[ 77635.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9781018] width 2880 pitch 11520 (/4 2880)
>[ 77635.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77635.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77635.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77635.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77636.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77636.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77636.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77636.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77636.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e5e0]
>[ 77636.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e5e0] width 2880 pitch 11520 (/4 2880)
>[ 77637.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77637.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77637.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77637.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77638.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77638.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77638.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77638.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77639.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77639.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77639.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77639.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77640.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77640.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77640.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77640.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77640.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dce30]
>[ 77640.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dce30] width 2880 pitch 11520 (/4 2880)
>[ 77641.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03b6f0]
>[ 77641.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03b6f0] width 2880 pitch 11520 (/4 2880)
>[ 77641.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97880]
>[ 77641.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97880] width 2880 pitch 11520 (/4 2880)
>[ 77641.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145698]
>[ 77641.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145698] width 2880 pitch 11520 (/4 2880)
>[ 77662.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97880]
>[ 77662.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97880] width 2880 pitch 11520 (/4 2880)
>[ 77663.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77663.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77663.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24298]
>[ 77663.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24298] width 2880 pitch 11520 (/4 2880)
>[ 77663.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77663.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77663.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981398]
>[ 77664.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981398] width 2880 pitch 11520 (/4 2880)
>[ 77664.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24298]
>[ 77664.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24298] width 2880 pitch 11520 (/4 2880)
>[ 77664.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97880]
>[ 77664.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97880] width 2880 pitch 11520 (/4 2880)
>[ 77668.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77668.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77668.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97880]
>[ 77669.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97880] width 2880 pitch 11520 (/4 2880)
>[ 77669.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981398]
>[ 77669.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981398] width 2880 pitch 11520 (/4 2880)
>[ 77669.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77669.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77669.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24298]
>[ 77669.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24298] width 2880 pitch 11520 (/4 2880)
>[ 77699.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031350]
>[ 77699.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031350] width 2880 pitch 11520 (/4 2880)
>[ 77699.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0797c0]
>[ 77699.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0797c0] width 2880 pitch 11520 (/4 2880)
>[ 77699.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 77699.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 77699.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0797c0]
>[ 77699.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0797c0] width 2880 pitch 11520 (/4 2880)
>[ 77699.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a4d78]
>[ 77699.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a4d78] width 2880 pitch 11520 (/4 2880)
>[ 77699.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc56d0]
>[ 77699.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc56d0] width 2880 pitch 11520 (/4 2880)
>[ 77699.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77699.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77699.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0797c0]
>[ 77699.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0797c0] width 2880 pitch 11520 (/4 2880)
>[ 77701.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0dee8]
>[ 77701.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0dee8] width 2880 pitch 11520 (/4 2880)
>[ 77701.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a908]
>[ 77701.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a908] width 2880 pitch 11520 (/4 2880)
>[ 77701.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77702.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77702.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5a908]
>[ 77702.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5a908] width 2880 pitch 11520 (/4 2880)
>[ 77702.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77702.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77702.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0dee8]
>[ 77702.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0dee8] width 2880 pitch 11520 (/4 2880)
>[ 77731.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 77731.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 77732.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 77732.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 77732.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 77732.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 77732.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77732.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77732.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77732.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77734.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77734.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77735.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 77735.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 77735.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77736.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77736.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 77736.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 77736.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b210]
>[ 77736.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b210] width 2880 pitch 11520 (/4 2880)
>[ 77736.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77736.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77740.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77740.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77740.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77740.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77740.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 77740.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 77740.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aabce0]
>[ 77740.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aabce0] width 2880 pitch 11520 (/4 2880)
>[ 77740.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77741.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77741.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 77741.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 77741.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77741.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77741.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77741.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77741.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77741.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77742.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77742.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77742.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aabce0]
>[ 77742.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aabce0] width 2880 pitch 11520 (/4 2880)
>[ 77742.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77742.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77742.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77742.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77742.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77742.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77756.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77756.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77756.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77756.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77756.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77756.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77756.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a328]
>[ 77756.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a328] width 2880 pitch 11520 (/4 2880)
>[ 77756.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77756.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77756.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77756.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77756.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77756.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77756.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77756.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77757.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77757.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77757.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77757.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77757.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77757.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77758.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77758.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77758.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77758.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77758.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77758.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77758.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77758.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77759.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77759.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77759.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77759.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77759.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77759.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77760.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77760.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77760.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77760.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77760.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d772d0]
>[ 77760.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d772d0] width 2880 pitch 11520 (/4 2880)
>[ 77761.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 77761.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 77761.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b878]
>[ 77761.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b878] width 2880 pitch 11520 (/4 2880)
>[ 77762.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d772d0]
>[ 77762.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d772d0] width 2880 pitch 11520 (/4 2880)
>[ 77762.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77762.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77762.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77762.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77762.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77762.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031840]
>[ 77770.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031840] width 2880 pitch 11520 (/4 2880)
>[ 77770.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031840]
>[ 77770.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031840] width 2880 pitch 11520 (/4 2880)
>[ 77770.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77c38]
>[ 77770.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77c38] width 2880 pitch 11520 (/4 2880)
>[ 77770.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031840]
>[ 77770.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031840] width 2880 pitch 11520 (/4 2880)
>[ 77770.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77770.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77770.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77770.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77770.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e56f0]
>[ 77770.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e56f0] width 2880 pitch 11520 (/4 2880)
>[ 77770.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e56f0]
>[ 77770.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e56f0] width 2880 pitch 11520 (/4 2880)
>[ 77770.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971c48]
>[ 77770.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971c48] width 2880 pitch 11520 (/4 2880)
>[ 77770.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e56f0]
>[ 77770.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e56f0] width 2880 pitch 11520 (/4 2880)
>[ 77779.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77779.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77780.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfa10]
>[ 77780.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfa10] width 2880 pitch 11520 (/4 2880)
>[ 77780.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031840]
>[ 77780.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031840] width 2880 pitch 11520 (/4 2880)
>[ 77780.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972b4a0]
>[ 77780.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972b4a0] width 2880 pitch 11520 (/4 2880)
>[ 77781.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfa10]
>[ 77781.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfa10] width 2880 pitch 11520 (/4 2880)
>[ 77782.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77782.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77782.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 77782.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 77782.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77782.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77782.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2940]
>[ 77782.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2940] width 2880 pitch 11520 (/4 2880)
>[ 77783.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77783.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77783.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 77783.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 77784.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77784.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77784.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77784.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77784.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42580]
>[ 77784.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42580] width 2880 pitch 11520 (/4 2880)
>[ 77784.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 77784.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 77784.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 77784.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 77784.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a6ed8]
>[ 77784.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a6ed8] width 2880 pitch 11520 (/4 2880)
>[ 77784.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 77784.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 77787.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 77787.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 77789.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3e530]
>[ 77789.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3e530] width 2880 pitch 11520 (/4 2880)
>[ 77809.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[ 77809.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[ 77809.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dbf10]
>[ 77809.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dbf10] width 2880 pitch 11520 (/4 2880)
>[ 77810.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 77810.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 77810.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dbf10]
>[ 77810.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dbf10] width 2880 pitch 11520 (/4 2880)
>[ 77810.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37588]
>[ 77810.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37588] width 2880 pitch 11520 (/4 2880)
>[ 77810.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9980fa8]
>[ 77810.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9980fa8] width 2880 pitch 11520 (/4 2880)
>[ 77810.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[ 77810.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[ 77810.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def590]
>[ 77810.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def590] width 2880 pitch 11520 (/4 2880)
>[ 77811.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 77811.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 77811.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dbf10]
>[ 77811.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dbf10] width 2880 pitch 11520 (/4 2880)
>[ 77811.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 77811.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 77811.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[ 77811.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[ 77811.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def590]
>[ 77811.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def590] width 2880 pitch 11520 (/4 2880)
>[ 77932.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95821b0]
>[ 77932.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95821b0] width 2880 pitch 11520 (/4 2880)
>[ 77935.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def590]
>[ 77935.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def590] width 2880 pitch 11520 (/4 2880)
>[ 77941.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6ab8]
>[ 77941.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6ab8] width 2880 pitch 11520 (/4 2880)
>[ 77944.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10fe08]
>[ 77944.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10fe08] width 2880 pitch 11520 (/4 2880)
>[ 77988.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10f860]
>[ 77988.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10f860] width 2880 pitch 11520 (/4 2880)
>[ 77991.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77991.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77991.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a328]
>[ 77991.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a328] width 2880 pitch 11520 (/4 2880)
>[ 77991.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77991.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77992.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77992.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77992.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 77992.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 77992.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77992.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77992.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77992.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77993.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77993.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77994.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77994.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77994.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77994.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77995.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77995.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77995.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77995.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77995.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 77995.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 77995.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc5638]
>[ 77995.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc5638] width 2880 pitch 11520 (/4 2880)
>[ 77996.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 77996.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 77997.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77997.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77997.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77997.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 77998.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 77998.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 77999.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d772e0]
>[ 77999.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d772e0] width 2880 pitch 11520 (/4 2880)
>[ 77999.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973cf38]
>[ 77999.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973cf38] width 2880 pitch 11520 (/4 2880)
>[ 78000.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 78000.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 78000.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 78000.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 78000.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e608]
>[ 78000.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e608] width 2880 pitch 11520 (/4 2880)
>[ 78000.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e608]
>[ 78000.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e608] width 2880 pitch 11520 (/4 2880)
>[ 78001.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20be20]
>[ 78001.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20be20] width 2880 pitch 11520 (/4 2880)
>[ 78001.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 78001.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 78008.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d8c0]
>[ 78008.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d8c0] width 2880 pitch 11520 (/4 2880)
>[ 78024.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 78024.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 78024.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78024.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78024.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78024.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78024.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 78024.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 78024.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78024.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78024.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78025.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78025.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78025.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78025.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 78025.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 78025.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78025.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78025.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78025.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78026.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 78026.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 78026.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78026.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78026.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78026.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78027.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78027.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78027.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78027.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78027.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15acc8]
>[ 78027.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15acc8] width 2880 pitch 11520 (/4 2880)
>[ 78027.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78027.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78027.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97378]
>[ 78027.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97378] width 2880 pitch 11520 (/4 2880)
>[ 78032.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e608]
>[ 78032.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e608] width 2880 pitch 11520 (/4 2880)
>[ 78050.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa045e48]
>[ 78050.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa045e48] width 2880 pitch 11520 (/4 2880)
>[ 78050.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174b18]
>[ 78050.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174b18] width 2880 pitch 11520 (/4 2880)
>[ 78055.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113440]
>[ 78055.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113440] width 2880 pitch 11520 (/4 2880)
>[ 78062.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4d880]
>[ 78062.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4d880] width 2880 pitch 11520 (/4 2880)
>[ 78062.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d48]
>[ 78062.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d48] width 2880 pitch 11520 (/4 2880)
>[ 78068.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f190]
>[ 78068.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f190] width 2880 pitch 11520 (/4 2880)
>[ 78073.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78073.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78073.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78073.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78096.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78096.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78096.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78096.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78096.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78096.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78096.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78096.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78097.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78097.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78097.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78097.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78097.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78097.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78098.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78098.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78098.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78098.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78099.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78099.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78099.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78099.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78099.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78099.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78100.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78100.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78100.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78101.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78101.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78101.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78102.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78102.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78103.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78103.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78112.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78112.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78113.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78113.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78113.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78113.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78113.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78113.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78113.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bf170]
>[ 78113.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bf170] width 2880 pitch 11520 (/4 2880)
>[ 78115.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78115.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78115.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99360e8]
>[ 78115.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99360e8] width 2880 pitch 11520 (/4 2880)
>[ 78115.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78115.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78115.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7c70]
>[ 78115.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7c70] width 2880 pitch 11520 (/4 2880)
>[ 78116.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78116.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78116.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78116.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78116.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7c70]
>[ 78116.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7c70] width 2880 pitch 11520 (/4 2880)
>[ 78116.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99360e8]
>[ 78116.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99360e8] width 2880 pitch 11520 (/4 2880)
>[ 78116.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f38]
>[ 78117.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f38] width 2880 pitch 11520 (/4 2880)
>[ 78117.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78117.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78117.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x941ad70]
>[ 78117.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x941ad70] width 2880 pitch 11520 (/4 2880)
>[ 78117.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99360e8]
>[ 78117.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99360e8] width 2880 pitch 11520 (/4 2880)
>[ 78117.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7c70]
>[ 78117.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7c70] width 2880 pitch 11520 (/4 2880)
>[ 78124.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7be88]
>[ 78124.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7be88] width 2880 pitch 11520 (/4 2880)
>[ 78128.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08b150]
>[ 78128.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08b150] width 2880 pitch 11520 (/4 2880)
>[ 78128.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1865d0]
>[ 78128.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1865d0] width 2880 pitch 11520 (/4 2880)
>[ 78131.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa057a68]
>[ 78131.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa057a68] width 2880 pitch 11520 (/4 2880)
>[ 78146.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78146.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78150.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78150.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78150.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b87120]
>[ 78150.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b87120] width 2880 pitch 11520 (/4 2880)
>[ 78161.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978e1f0]
>[ 78161.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978e1f0] width 2880 pitch 11520 (/4 2880)
>[ 78163.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092840]
>[ 78163.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092840] width 2880 pitch 11520 (/4 2880)
>[ 78163.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092ac0]
>[ 78163.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092ac0] width 2880 pitch 11520 (/4 2880)
>[ 78163.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78163.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092ac0]
>[ 78163.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092ac0] width 2880 pitch 11520 (/4 2880)
>[ 78163.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78163.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092ac0]
>[ 78163.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092ac0] width 2880 pitch 11520 (/4 2880)
>[ 78163.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092ac0]
>[ 78163.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092ac0] width 2880 pitch 11520 (/4 2880)
>[ 78163.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78163.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa227010]
>[ 78163.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa227010] width 2880 pitch 11520 (/4 2880)
>[ 78163.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78163.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa227010]
>[ 78163.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa227010] width 2880 pitch 11520 (/4 2880)
>[ 78163.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78163.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa227010]
>[ 78163.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa227010] width 2880 pitch 11520 (/4 2880)
>[ 78163.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092528]
>[ 78163.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092528] width 2880 pitch 11520 (/4 2880)
>[ 78166.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfc88]
>[ 78166.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfc88] width 2880 pitch 11520 (/4 2880)
>[ 78166.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78166.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78166.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08b2e8]
>[ 78166.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08b2e8] width 2880 pitch 11520 (/4 2880)
>[ 78166.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfc88]
>[ 78166.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfc88] width 2880 pitch 11520 (/4 2880)
>[ 78166.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a49e8]
>[ 78166.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a49e8] width 2880 pitch 11520 (/4 2880)
>[ 78166.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfc88]
>[ 78166.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfc88] width 2880 pitch 11520 (/4 2880)
>[ 78166.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a49e8]
>[ 78166.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a49e8] width 2880 pitch 11520 (/4 2880)
>[ 78166.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78166.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78166.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08b2e8]
>[ 78166.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08b2e8] width 2880 pitch 11520 (/4 2880)
>[ 78166.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78166.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78166.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfc88]
>[ 78166.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfc88] width 2880 pitch 11520 (/4 2880)
>[ 78166.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a49e8]
>[ 78166.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a49e8] width 2880 pitch 11520 (/4 2880)
>[ 78166.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78166.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78166.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cfc88]
>[ 78166.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cfc88] width 2880 pitch 11520 (/4 2880)
>[ 78172.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083378]
>[ 78172.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083378] width 2880 pitch 11520 (/4 2880)
>[ 78180.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083728]
>[ 78180.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083728] width 2880 pitch 11520 (/4 2880)
>[ 78180.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff6060]
>[ 78180.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff6060] width 2880 pitch 11520 (/4 2880)
>[ 78181.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d850]
>[ 78181.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d850] width 2880 pitch 11520 (/4 2880)
>[ 78193.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2adf0]
>[ 78193.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2adf0] width 2880 pitch 11520 (/4 2880)
>[ 78205.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95613b8]
>[ 78206.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95613b8] width 2880 pitch 11520 (/4 2880)
>[ 78206.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa146218]
>[ 78206.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa146218] width 2880 pitch 11520 (/4 2880)
>[ 78206.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936228]
>[ 78206.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936228] width 2880 pitch 11520 (/4 2880)
>[ 78206.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d850]
>[ 78206.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d850] width 2880 pitch 11520 (/4 2880)
>[ 78206.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936228]
>[ 78206.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936228] width 2880 pitch 11520 (/4 2880)
>[ 78206.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d850]
>[ 78206.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d850] width 2880 pitch 11520 (/4 2880)
>[ 78206.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936228]
>[ 78206.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936228] width 2880 pitch 11520 (/4 2880)
>[ 78206.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d850]
>[ 78207.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d850] width 2880 pitch 11520 (/4 2880)
>[ 78207.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9936228]
>[ 78207.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9936228] width 2880 pitch 11520 (/4 2880)
>[ 78207.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d850]
>[ 78207.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d850] width 2880 pitch 11520 (/4 2880)
>[ 78207.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78207.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78207.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b448]
>[ 78207.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b448] width 2880 pitch 11520 (/4 2880)
>[ 78207.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78207.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78208.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78208.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78208.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a976d0]
>[ 78208.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a976d0] width 2880 pitch 11520 (/4 2880)
>[ 78208.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78208.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78208.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a976d0]
>[ 78208.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a976d0] width 2880 pitch 11520 (/4 2880)
>[ 78238.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78238.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78238.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78238.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78238.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78238.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78238.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78238.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78238.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78238.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78238.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97830]
>[ 78238.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97830] width 2880 pitch 11520 (/4 2880)
>[ 78238.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78238.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78238.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78238.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78238.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092a48]
>[ 78238.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092a48] width 2880 pitch 11520 (/4 2880)
>[ 78238.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfc628]
>[ 78238.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfc628] width 2880 pitch 11520 (/4 2880)
>[ 78238.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03bb08]
>[ 78238.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03bb08] width 2880 pitch 11520 (/4 2880)
>[ 78239.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78239.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78239.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78239.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78239.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78239.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78239.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1990]
>[ 78239.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1990] width 2880 pitch 11520 (/4 2880)
>[ 78239.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78239.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78239.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78240.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78240.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x993fdf8]
>[ 78240.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x993fdf8] width 2880 pitch 11520 (/4 2880)
>[ 78240.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97830]
>[ 78240.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97830] width 2880 pitch 11520 (/4 2880)
>[ 78240.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78240.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78240.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78240.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78240.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78240.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78240.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78240.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78240.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97830]
>[ 78240.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97830] width 2880 pitch 11520 (/4 2880)
>[ 78240.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78240.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78240.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78240.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78240.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977ebf0]
>[ 78240.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977ebf0] width 2880 pitch 11520 (/4 2880)
>[ 78240.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78240.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78240.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78299.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78299.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78299.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78299.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78299.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78299.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78299.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78299.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78299.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78299.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78299.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97de1e8]
>[ 78299.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97de1e8] width 2880 pitch 11520 (/4 2880)
>[ 78299.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78299.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78299.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78299.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78299.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7db0]
>[ 78299.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7db0] width 2880 pitch 11520 (/4 2880)
>[ 78299.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae378]
>[ 78299.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae378] width 2880 pitch 11520 (/4 2880)
>[ 78299.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78299.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78299.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78299.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78300.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78300.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78300.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78300.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78300.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78300.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78300.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78300.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78300.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78300.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78300.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78300.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78300.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78300.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78305.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78305.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78305.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78305.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78305.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78305.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78305.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78305.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78305.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78305.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78305.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78305.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78305.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78305.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78305.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78305.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78305.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78305.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78305.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78305.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78305.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78305.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78305.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78305.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78306.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78306.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78307.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78307.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78307.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78307.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78307.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78307.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78307.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78307.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78307.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78307.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78308.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78308.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78308.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78308.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78308.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78308.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78308.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78308.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78309.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78309.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78309.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78309.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78309.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78309.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78309.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78309.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78309.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78309.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78310.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78310.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78310.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78310.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78310.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78311.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78311.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78311.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78311.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78311.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78311.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78311.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78311.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78311.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78312.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78312.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78312.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78312.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78312.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78312.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78312.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78312.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78312.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78313.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78318.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78318.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78326.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78326.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78333.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dc8a8]
>[ 78333.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dc8a8] width 2880 pitch 11520 (/4 2880)
>[ 78333.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0edf90]
>[ 78333.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0edf90] width 2880 pitch 11520 (/4 2880)
>[ 78333.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78333.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78333.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038480]
>[ 78333.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038480] width 2880 pitch 11520 (/4 2880)
>[ 78333.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78333.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78334.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78334.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78334.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78334.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78334.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78335.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78335.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78335.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78335.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78335.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78335.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78335.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78335.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78335.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78336.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45100]
>[ 78336.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45100] width 2880 pitch 11520 (/4 2880)
>[ 78336.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddc4a0]
>[ 78336.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddc4a0] width 2880 pitch 11520 (/4 2880)
>[ 78336.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0382d0]
>[ 78336.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0382d0] width 2880 pitch 11520 (/4 2880)
>[ 78346.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d408]
>[ 78346.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d408] width 2880 pitch 11520 (/4 2880)
>[ 78347.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b240]
>[ 78347.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b240] width 2880 pitch 11520 (/4 2880)
>[ 78351.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d631b0]
>[ 78351.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d631b0] width 2880 pitch 11520 (/4 2880)
>[ 78352.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211388]
>[ 78352.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211388] width 2880 pitch 11520 (/4 2880)
>[ 78352.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211388]
>[ 78352.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211388] width 2880 pitch 11520 (/4 2880)
>[ 78352.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0929a0]
>[ 78352.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0929a0] width 2880 pitch 11520 (/4 2880)
>[ 78352.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10fbe0]
>[ 78352.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10fbe0] width 2880 pitch 11520 (/4 2880)
>[ 78352.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab27a0]
>[ 78352.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab27a0] width 2880 pitch 11520 (/4 2880)
>[ 78352.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d631b0]
>[ 78352.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d631b0] width 2880 pitch 11520 (/4 2880)
>[ 78352.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02af60]
>[ 78352.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02af60] width 2880 pitch 11520 (/4 2880)
>[ 78352.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0929a0]
>[ 78352.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0929a0] width 2880 pitch 11520 (/4 2880)
>[ 78352.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78352.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78352.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8bc18]
>[ 78352.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8bc18] width 2880 pitch 11520 (/4 2880)
>[ 78352.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d631b0]
>[ 78352.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d631b0] width 2880 pitch 11520 (/4 2880)
>[ 78352.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25f78]
>[ 78352.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25f78] width 2880 pitch 11520 (/4 2880)
>[ 78353.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb678]
>[ 78353.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb678] width 2880 pitch 11520 (/4 2880)
>[ 78354.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78354.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78354.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd70]
>[ 78354.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd70] width 2880 pitch 11520 (/4 2880)
>[ 78354.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78354.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78354.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78354.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78354.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0276e0]
>[ 78354.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0276e0] width 2880 pitch 11520 (/4 2880)
>[ 78354.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78354.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78355.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2c88]
>[ 78355.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2c88] width 2880 pitch 11520 (/4 2880)
>[ 78355.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78355.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78355.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750e8]
>[ 78355.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750e8] width 2880 pitch 11520 (/4 2880)
>[ 78356.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78356.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78356.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd70]
>[ 78356.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd70] width 2880 pitch 11520 (/4 2880)
>[ 78356.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d408]
>[ 78356.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d408] width 2880 pitch 11520 (/4 2880)
>[ 78356.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78356.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78357.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d631b0]
>[ 78357.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d631b0] width 2880 pitch 11520 (/4 2880)
>[ 78357.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0276e0]
>[ 78357.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0276e0] width 2880 pitch 11520 (/4 2880)
>[ 78357.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78357.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78357.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddca88]
>[ 78357.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddca88] width 2880 pitch 11520 (/4 2880)
>[ 78358.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cf98]
>[ 78358.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cf98] width 2880 pitch 11520 (/4 2880)
>[ 78358.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08d028]
>[ 78358.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08d028] width 2880 pitch 11520 (/4 2880)
>[ 78358.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78359.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78359.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78359.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78359.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78359.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78359.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78360.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78360.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78360.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3bdf0]
>[ 78360.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3bdf0] width 2880 pitch 11520 (/4 2880)
>[ 78360.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78360.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78360.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff768]
>[ 78360.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff768] width 2880 pitch 11520 (/4 2880)
>[ 78360.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97de1e8]
>[ 78360.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97de1e8] width 2880 pitch 11520 (/4 2880)
>[ 78363.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78363.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78363.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78363.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78363.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97de1e8]
>[ 78363.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97de1e8] width 2880 pitch 11520 (/4 2880)
>[ 78364.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab2158]
>[ 78364.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab2158] width 2880 pitch 11520 (/4 2880)
>[ 78364.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78364.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78364.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78364.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78365.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78365.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78366.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78366.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78366.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6d38]
>[ 78366.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6d38] width 2880 pitch 11520 (/4 2880)
>[ 78366.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 78366.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 78366.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[ 78366.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[ 78391.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4710]
>[ 78391.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4710] width 2880 pitch 11520 (/4 2880)
>[ 78391.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78391.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78392.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f3f10]
>[ 78392.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f3f10] width 2880 pitch 11520 (/4 2880)
>[ 78392.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78392.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78392.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a78158]
>[ 78392.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a78158] width 2880 pitch 11520 (/4 2880)
>[ 78392.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c410]
>[ 78392.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c410] width 2880 pitch 11520 (/4 2880)
>[ 78394.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78394.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78394.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78395.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78397.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78397.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78397.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c410]
>[ 78397.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c410] width 2880 pitch 11520 (/4 2880)
>[ 78397.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4710]
>[ 78397.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4710] width 2880 pitch 11520 (/4 2880)
>[ 78397.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78397.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78397.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78397.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78418.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78418.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78419.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78419.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78419.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78419.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78419.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78419.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78419.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78419.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78419.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78419.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78419.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78419.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78419.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78419.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78419.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78419.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78419.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78419.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78420.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78420.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78420.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78420.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78420.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78420.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78420.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78420.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78420.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78420.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78420.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78420.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78420.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78420.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78420.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78420.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78420.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78420.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78420.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78420.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78420.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78420.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78420.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78420.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78420.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78420.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78420.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78420.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78420.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78421.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78421.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78421.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78421.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78421.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78421.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78421.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78421.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78421.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78421.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78421.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78421.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78422.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78422.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78422.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78422.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78422.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78422.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78422.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78422.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78422.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78422.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78422.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78422.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78422.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78422.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78422.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78422.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78422.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78422.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78422.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78422.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78422.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78422.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78422.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78422.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78422.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78422.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78422.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78422.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78422.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78423.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78423.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78423.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa092ac0]
>[ 78423.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa092ac0] width 2880 pitch 11520 (/4 2880)
>[ 78423.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78423.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78423.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78423.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78423.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78423.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78423.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78423.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78423.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2480]
>[ 78423.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2480] width 2880 pitch 11520 (/4 2880)
>[ 78423.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212e20]
>[ 78423.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212e20] width 2880 pitch 11520 (/4 2880)
>[ 78423.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78423.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78423.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa202da0]
>[ 78423.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa202da0] width 2880 pitch 11520 (/4 2880)
>[ 78479.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c410]
>[ 78479.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c410] width 2880 pitch 11520 (/4 2880)
>[ 78479.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aed750]
>[ 78479.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aed750] width 2880 pitch 11520 (/4 2880)
>[ 78480.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c1a0]
>[ 78480.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c1a0] width 2880 pitch 11520 (/4 2880)
>[ 78480.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78480.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78480.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b945a8]
>[ 78480.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b945a8] width 2880 pitch 11520 (/4 2880)
>[ 78480.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78480.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78480.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c410]
>[ 78480.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c410] width 2880 pitch 11520 (/4 2880)
>[ 78482.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b945a8]
>[ 78482.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b945a8] width 2880 pitch 11520 (/4 2880)
>[ 78482.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c410]
>[ 78482.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c410] width 2880 pitch 11520 (/4 2880)
>[ 78482.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1440]
>[ 78482.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1440] width 2880 pitch 11520 (/4 2880)
>[ 78482.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78482.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78482.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173b30]
>[ 78482.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173b30] width 2880 pitch 11520 (/4 2880)
>[ 78482.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f5958]
>[ 78482.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f5958] width 2880 pitch 11520 (/4 2880)
>[ 78482.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78482.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78482.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96084c8]
>[ 78482.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96084c8] width 2880 pitch 11520 (/4 2880)
>[ 78487.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78487.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78487.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa213280]
>[ 78487.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa213280] width 2880 pitch 11520 (/4 2880)
>[ 78487.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140170]
>[ 78487.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140170] width 2880 pitch 11520 (/4 2880)
>[ 78487.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173b30]
>[ 78487.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173b30] width 2880 pitch 11520 (/4 2880)
>[ 78487.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78487.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78489.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78489.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78489.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b945a8]
>[ 78489.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b945a8] width 2880 pitch 11520 (/4 2880)
>[ 78489.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b945a8]
>[ 78490.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b945a8] width 2880 pitch 11520 (/4 2880)
>[ 78490.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030db8]
>[ 78490.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030db8] width 2880 pitch 11520 (/4 2880)
>[ 78490.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2480]
>[ 78490.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2480] width 2880 pitch 11520 (/4 2880)
>[ 78490.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae5ea8]
>[ 78490.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae5ea8] width 2880 pitch 11520 (/4 2880)
>[ 78493.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2c88]
>[ 78493.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2c88] width 2880 pitch 11520 (/4 2880)
>[ 78493.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173b30]
>[ 78493.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173b30] width 2880 pitch 11520 (/4 2880)
>[ 78493.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58228]
>[ 78493.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58228] width 2880 pitch 11520 (/4 2880)
>[ 78493.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78493.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78493.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173b30]
>[ 78493.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173b30] width 2880 pitch 11520 (/4 2880)
>[ 78493.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78493.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78493.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173b30]
>[ 78493.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173b30] width 2880 pitch 11520 (/4 2880)
>[ 78493.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58228]
>[ 78493.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58228] width 2880 pitch 11520 (/4 2880)
>[ 78493.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74c60]
>[ 78493.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74c60] width 2880 pitch 11520 (/4 2880)
>[ 78496.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7bdb8]
>[ 78496.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7bdb8] width 2880 pitch 11520 (/4 2880)
>[ 78496.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78496.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78496.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120410]
>[ 78496.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120410] width 2880 pitch 11520 (/4 2880)
>[ 78496.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78496.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78496.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120410]
>[ 78496.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120410] width 2880 pitch 11520 (/4 2880)
>[ 78496.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78497.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78497.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120410]
>[ 78497.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120410] width 2880 pitch 11520 (/4 2880)
>[ 78497.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ccbb8]
>[ 78497.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ccbb8] width 2880 pitch 11520 (/4 2880)
>[ 78497.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120410]
>[ 78497.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120410] width 2880 pitch 11520 (/4 2880)
>[ 78499.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f0ad8]
>[ 78499.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f0ad8] width 2880 pitch 11520 (/4 2880)
>[ 78499.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2c88]
>[ 78499.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2c88] width 2880 pitch 11520 (/4 2880)
>[ 78499.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f0ad8]
>[ 78499.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f0ad8] width 2880 pitch 11520 (/4 2880)
>[ 78499.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0200]
>[ 78499.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0200] width 2880 pitch 11520 (/4 2880)
>[ 78499.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fe3c0]
>[ 78499.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fe3c0] width 2880 pitch 11520 (/4 2880)
>[ 78499.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ceec8]
>[ 78499.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ceec8] width 2880 pitch 11520 (/4 2880)
>[ 78500.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ceec8]
>[ 78500.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ceec8] width 2880 pitch 11520 (/4 2880)
>[ 78500.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ceec8]
>[ 78500.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ceec8] width 2880 pitch 11520 (/4 2880)
>[ 78500.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca1e60]
>[ 78500.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca1e60] width 2880 pitch 11520 (/4 2880)
>[ 78500.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4def8]
>[ 78500.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4def8] width 2880 pitch 11520 (/4 2880)
>[ 78500.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca1e60]
>[ 78500.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca1e60] width 2880 pitch 11520 (/4 2880)
>[ 78504.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9791058]
>[ 78504.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9791058] width 2880 pitch 11520 (/4 2880)
>[ 78512.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceee20]
>[ 78512.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceee20] width 2880 pitch 11520 (/4 2880)
>[ 78516.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff908]
>[ 78516.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff908] width 2880 pitch 11520 (/4 2880)
>[ 78516.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b64bf0]
>[ 78516.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b64bf0] width 2880 pitch 11520 (/4 2880)
>[ 78517.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2bc8]
>[ 78517.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2bc8] width 2880 pitch 11520 (/4 2880)
>[ 78517.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98226b0]
>[ 78517.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98226b0] width 2880 pitch 11520 (/4 2880)
>[ 78517.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 78517.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 78517.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4def8]
>[ 78517.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4def8] width 2880 pitch 11520 (/4 2880)
>[ 78518.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca1e60]
>[ 78518.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca1e60] width 2880 pitch 11520 (/4 2880)
>[ 78518.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6ab8]
>[ 78518.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6ab8] width 2880 pitch 11520 (/4 2880)
>[ 78518.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7710]
>[ 78518.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7710] width 2880 pitch 11520 (/4 2880)
>[ 78527.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950a350]
>[ 78527.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950a350] width 2880 pitch 11520 (/4 2880)
>[ 78528.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff908]
>[ 78528.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff908] width 2880 pitch 11520 (/4 2880)
>[ 78528.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10fe08]
>[ 78528.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10fe08] width 2880 pitch 11520 (/4 2880)
>[ 78544.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0b480]
>[ 78544.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0b480] width 2880 pitch 11520 (/4 2880)
>[ 78544.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce50]
>[ 78544.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce50] width 2880 pitch 11520 (/4 2880)
>[ 78544.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590208]
>[ 78544.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590208] width 2880 pitch 11520 (/4 2880)
>[ 78545.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d8a38]
>[ 78545.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d8a38] width 2880 pitch 11520 (/4 2880)
>[ 78545.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590208]
>[ 78545.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590208] width 2880 pitch 11520 (/4 2880)
>[ 78545.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212458]
>[ 78545.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212458] width 2880 pitch 11520 (/4 2880)
>[ 78546.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978e2a0]
>[ 78546.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978e2a0] width 2880 pitch 11520 (/4 2880)
>[ 78546.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b8a8]
>[ 78546.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b8a8] width 2880 pitch 11520 (/4 2880)
>[ 78546.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b433a0]
>[ 78546.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b433a0] width 2880 pitch 11520 (/4 2880)
>[ 78546.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 78546.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 78546.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78546.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78559.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b8a8]
>[ 78559.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b8a8] width 2880 pitch 11520 (/4 2880)
>[ 78559.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 78559.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 78559.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78559.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78560.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 78560.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 78560.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78560.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78560.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78560.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78560.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 78560.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 78561.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78561.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78561.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 78561.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 78561.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b8a8]
>[ 78562.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b8a8] width 2880 pitch 11520 (/4 2880)
>[ 78562.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971ce8]
>[ 78562.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971ce8] width 2880 pitch 11520 (/4 2880)
>[ 78562.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b8a8]
>[ 78562.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b8a8] width 2880 pitch 11520 (/4 2880)
>[ 78562.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971ce8]
>[ 78562.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971ce8] width 2880 pitch 11520 (/4 2880)
>[ 78658.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070e18]
>[ 78658.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070e18] width 2880 pitch 11520 (/4 2880)
>[ 78658.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78658.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78658.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3eed0]
>[ 78658.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3eed0] width 2880 pitch 11520 (/4 2880)
>[ 78658.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26b68]
>[ 78658.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26b68] width 2880 pitch 11520 (/4 2880)
>[ 78658.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78658.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78658.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78658.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78658.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ca30]
>[ 78658.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ca30] width 2880 pitch 11520 (/4 2880)
>[ 78658.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 78658.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 78658.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e050]
>[ 78658.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e050] width 2880 pitch 11520 (/4 2880)
>[ 78658.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78658.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78663.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13008]
>[ 78663.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13008] width 2880 pitch 11520 (/4 2880)
>[ 78663.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c26f60]
>[ 78663.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c26f60] width 2880 pitch 11520 (/4 2880)
>[ 78663.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78663.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78663.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e050]
>[ 78663.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e050] width 2880 pitch 11520 (/4 2880)
>[ 78663.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 78663.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 78663.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ca30]
>[ 78663.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ca30] width 2880 pitch 11520 (/4 2880)
>[ 78663.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c26f60]
>[ 78663.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c26f60] width 2880 pitch 11520 (/4 2880)
>[ 78663.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78663.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78663.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78663.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78663.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 78664.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 78664.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ca30]
>[ 78664.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ca30] width 2880 pitch 11520 (/4 2880)
>[ 78664.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971ce8]
>[ 78664.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971ce8] width 2880 pitch 11520 (/4 2880)
>[ 78664.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13008]
>[ 78664.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13008] width 2880 pitch 11520 (/4 2880)
>[ 78664.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e050]
>[ 78664.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e050] width 2880 pitch 11520 (/4 2880)
>[ 78664.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc4dd0]
>[ 78664.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc4dd0] width 2880 pitch 11520 (/4 2880)
>[ 78664.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97668]
>[ 78664.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97668] width 2880 pitch 11520 (/4 2880)
>[ 78664.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78664.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78665.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26b68]
>[ 78665.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26b68] width 2880 pitch 11520 (/4 2880)
>[ 78665.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e19b8]
>[ 78665.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e19b8] width 2880 pitch 11520 (/4 2880)
>[ 78665.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26b68]
>[ 78665.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26b68] width 2880 pitch 11520 (/4 2880)
>[ 78665.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78665.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78665.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ca30]
>[ 78665.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ca30] width 2880 pitch 11520 (/4 2880)
>[ 78665.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78665.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78665.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2ca30]
>[ 78665.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2ca30] width 2880 pitch 11520 (/4 2880)
>[ 78665.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070e18]
>[ 78665.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070e18] width 2880 pitch 11520 (/4 2880)
>[ 78665.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc4dd0]
>[ 78665.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc4dd0] width 2880 pitch 11520 (/4 2880)
>[ 78665.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa070e18]
>[ 78665.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa070e18] width 2880 pitch 11520 (/4 2880)
>[ 78665.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b37a8]
>[ 78665.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b37a8] width 2880 pitch 11520 (/4 2880)
>[ 78665.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4150]
>[ 78665.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4150] width 2880 pitch 11520 (/4 2880)
>[ 78665.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b37a8]
>[ 78665.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b37a8] width 2880 pitch 11520 (/4 2880)
>[ 78665.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4150]
>[ 78665.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4150] width 2880 pitch 11520 (/4 2880)
>[ 78666.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbde38]
>[ 78666.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbde38] width 2880 pitch 11520 (/4 2880)
>[ 78666.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b4150]
>[ 78666.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b4150] width 2880 pitch 11520 (/4 2880)
>[ 78666.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0bcc08]
>[ 78666.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0bcc08] width 2880 pitch 11520 (/4 2880)
>[ 78667.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e788]
>[ 78667.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e788] width 2880 pitch 11520 (/4 2880)
>[ 78667.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fee0]
>[ 78667.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fee0] width 2880 pitch 11520 (/4 2880)
>[ 78667.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf6d10]
>[ 78667.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf6d10] width 2880 pitch 11520 (/4 2880)
>[ 78667.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba5388]
>[ 78667.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba5388] width 2880 pitch 11520 (/4 2880)
>[ 78667.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99aa188]
>[ 78667.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99aa188] width 2880 pitch 11520 (/4 2880)
>[ 78667.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fee0]
>[ 78667.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fee0] width 2880 pitch 11520 (/4 2880)
>[ 78667.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972e788]
>[ 78667.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972e788] width 2880 pitch 11520 (/4 2880)
>[ 78672.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ef0]
>[ 78672.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ef0] width 2880 pitch 11520 (/4 2880)
>[ 78679.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967a598]
>[ 78679.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967a598] width 2880 pitch 11520 (/4 2880)
>[ 78679.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f340]
>[ 78679.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f340] width 2880 pitch 11520 (/4 2880)
>[ 78679.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cd1b0]
>[ 78679.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cd1b0] width 2880 pitch 11520 (/4 2880)
>[ 78679.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f340]
>[ 78680.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f340] width 2880 pitch 11520 (/4 2880)
>[ 78680.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051280]
>[ 78680.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051280] width 2880 pitch 11520 (/4 2880)
>[ 78680.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2048]
>[ 78680.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2048] width 2880 pitch 11520 (/4 2880)
>[ 78680.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f870]
>[ 78680.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f870] width 2880 pitch 11520 (/4 2880)
>[ 78680.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa123a58]
>[ 78680.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa123a58] width 2880 pitch 11520 (/4 2880)
>[ 78680.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 78681.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 78681.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051280]
>[ 78681.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051280] width 2880 pitch 11520 (/4 2880)
>[ 78681.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62c20]
>[ 78681.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62c20] width 2880 pitch 11520 (/4 2880)
>[ 78681.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9583058]
>[ 78681.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9583058] width 2880 pitch 11520 (/4 2880)
>[ 78682.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2940]
>[ 78682.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2940] width 2880 pitch 11520 (/4 2880)
>[ 78682.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2940]
>[ 78682.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2940] width 2880 pitch 11520 (/4 2880)
>[ 78682.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9583058]
>[ 78682.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9583058] width 2880 pitch 11520 (/4 2880)
>[ 78690.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdfcb8]
>[ 78690.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdfcb8] width 2880 pitch 11520 (/4 2880)
>[ 78690.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce9e8]
>[ 78690.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce9e8] width 2880 pitch 11520 (/4 2880)
>[ 78690.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b7a0]
>[ 78690.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b7a0] width 2880 pitch 11520 (/4 2880)
>[ 78691.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce9e8]
>[ 78691.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce9e8] width 2880 pitch 11520 (/4 2880)
>[ 78692.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9c600]
>[ 78692.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9c600] width 2880 pitch 11520 (/4 2880)
>[ 78692.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6460]
>[ 78692.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6460] width 2880 pitch 11520 (/4 2880)
>[ 78693.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc64c0]
>[ 78693.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc64c0] width 2880 pitch 11520 (/4 2880)
>[ 78693.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac0278]
>[ 78693.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac0278] width 2880 pitch 11520 (/4 2880)
>[ 78693.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b7a0]
>[ 78693.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b7a0] width 2880 pitch 11520 (/4 2880)
>[ 78694.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc64c0]
>[ 78694.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc64c0] width 2880 pitch 11520 (/4 2880)
>[ 78694.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079da8]
>[ 78694.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079da8] width 2880 pitch 11520 (/4 2880)
>[ 78694.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995b7a0]
>[ 78694.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995b7a0] width 2880 pitch 11520 (/4 2880)
>[ 78694.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079da8]
>[ 78694.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079da8] width 2880 pitch 11520 (/4 2880)
>[ 78727.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1209a0]
>[ 78727.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1209a0] width 2880 pitch 11520 (/4 2880)
>[ 78727.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7bf78]
>[ 78727.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7bf78] width 2880 pitch 11520 (/4 2880)
>[ 78729.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7bf78]
>[ 78729.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7bf78] width 2880 pitch 11520 (/4 2880)
>[ 78730.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c28]
>[ 78730.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c28] width 2880 pitch 11520 (/4 2880)
>[ 78730.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c78]
>[ 78730.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c78] width 2880 pitch 11520 (/4 2880)
>[ 78730.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085198]
>[ 78730.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085198] width 2880 pitch 11520 (/4 2880)
>[ 78731.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 78731.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 78731.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c28]
>[ 78731.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c28] width 2880 pitch 11520 (/4 2880)
>[ 78731.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78732.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78732.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb468]
>[ 78732.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb468] width 2880 pitch 11520 (/4 2880)
>[ 78732.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78732.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78732.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb468]
>[ 78732.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb468] width 2880 pitch 11520 (/4 2880)
>[ 78733.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78733.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78733.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb468]
>[ 78733.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb468] width 2880 pitch 11520 (/4 2880)
>[ 78733.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78733.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78733.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb468]
>[ 78733.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb468] width 2880 pitch 11520 (/4 2880)
>[ 78734.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78734.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78734.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb468]
>[ 78734.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb468] width 2880 pitch 11520 (/4 2880)
>[ 78734.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78734.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78734.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10eab0]
>[ 78734.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10eab0] width 2880 pitch 11520 (/4 2880)
>[ 78735.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46098]
>[ 78735.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46098] width 2880 pitch 11520 (/4 2880)
>[ 78735.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2126e8]
>[ 78735.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2126e8] width 2880 pitch 11520 (/4 2880)
>[ 78735.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46098]
>[ 78735.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46098] width 2880 pitch 11520 (/4 2880)
>[ 78735.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e74eb8]
>[ 78735.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e74eb8] width 2880 pitch 11520 (/4 2880)
>[ 78783.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 78783.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 78784.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58e88]
>[ 78784.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58e88] width 2880 pitch 11520 (/4 2880)
>[ 78784.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c81d50]
>[ 78784.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c81d50] width 2880 pitch 11520 (/4 2880)
>[ 78784.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ef0]
>[ 78784.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ef0] width 2880 pitch 11520 (/4 2880)
>[ 78786.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ef0]
>[ 78786.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ef0] width 2880 pitch 11520 (/4 2880)
>[ 78786.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d28610]
>[ 78786.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d28610] width 2880 pitch 11520 (/4 2880)
>[ 78787.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c58e88]
>[ 78787.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c58e88] width 2880 pitch 11520 (/4 2880)
>[ 78787.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2cd18]
>[ 78787.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2cd18] width 2880 pitch 11520 (/4 2880)
>[ 78787.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9c600]
>[ 78787.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9c600] width 2880 pitch 11520 (/4 2880)
>[ 78787.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7128]
>[ 78787.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7128] width 2880 pitch 11520 (/4 2880)
>[ 78812.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d538]
>[ 78812.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d538] width 2880 pitch 11520 (/4 2880)
>[ 78812.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fae0]
>[ 78812.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fae0] width 2880 pitch 11520 (/4 2880)
>[ 78813.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb67c0]
>[ 78813.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb67c0] width 2880 pitch 11520 (/4 2880)
>[ 78813.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f68]
>[ 78813.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f68] width 2880 pitch 11520 (/4 2880)
>[ 78813.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb67c0]
>[ 78813.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb67c0] width 2880 pitch 11520 (/4 2880)
>[ 78813.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f68]
>[ 78813.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f68] width 2880 pitch 11520 (/4 2880)
>[ 78813.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b6c8]
>[ 78813.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b6c8] width 2880 pitch 11520 (/4 2880)
>[ 78813.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78813.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78813.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6f68]
>[ 78813.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6f68] width 2880 pitch 11520 (/4 2880)
>[ 78813.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204280]
>[ 78813.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204280] width 2880 pitch 11520 (/4 2880)
>[ 78814.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fae0]
>[ 78814.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fae0] width 2880 pitch 11520 (/4 2880)
>[ 78817.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f48728]
>[ 78817.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f48728] width 2880 pitch 11520 (/4 2880)
>[ 78817.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b754e0]
>[ 78817.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b754e0] width 2880 pitch 11520 (/4 2880)
>[ 78817.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9909ef0]
>[ 78817.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9909ef0] width 2880 pitch 11520 (/4 2880)
>[ 78817.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b754e0]
>[ 78817.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b754e0] width 2880 pitch 11520 (/4 2880)
>[ 78817.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9909ef0]
>[ 78817.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9909ef0] width 2880 pitch 11520 (/4 2880)
>[ 78817.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b754e0]
>[ 78817.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b754e0] width 2880 pitch 11520 (/4 2880)
>[ 78817.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9909ef0]
>[ 78817.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9909ef0] width 2880 pitch 11520 (/4 2880)
>[ 78817.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b754e0]
>[ 78817.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b754e0] width 2880 pitch 11520 (/4 2880)
>[ 78817.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750e8]
>[ 78817.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750e8] width 2880 pitch 11520 (/4 2880)
>[ 78817.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b754e0]
>[ 78817.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b754e0] width 2880 pitch 11520 (/4 2880)
>[ 78817.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750e8]
>[ 78817.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750e8] width 2880 pitch 11520 (/4 2880)
>[ 78821.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d32ef0]
>[ 78821.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d32ef0] width 2880 pitch 11520 (/4 2880)
>[ 78849.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa180658]
>[ 78849.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa180658] width 2880 pitch 11520 (/4 2880)
>[ 78850.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 78850.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 78850.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39eb0]
>[ 78850.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39eb0] width 2880 pitch 11520 (/4 2880)
>[ 78850.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 78850.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 78850.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225300]
>[ 78850.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225300] width 2880 pitch 11520 (/4 2880)
>[ 78851.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7da8]
>[ 78851.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7da8] width 2880 pitch 11520 (/4 2880)
>[ 78851.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ea90]
>[ 78851.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ea90] width 2880 pitch 11520 (/4 2880)
>[ 78851.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 78852.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 78852.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2ef8]
>[ 78852.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2ef8] width 2880 pitch 11520 (/4 2880)
>[ 78852.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7da0]
>[ 78853.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7da0] width 2880 pitch 11520 (/4 2880)
>[ 78853.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7da8]
>[ 78853.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7da8] width 2880 pitch 11520 (/4 2880)
>[ 78853.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f55e8]
>[ 78854.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f55e8] width 2880 pitch 11520 (/4 2880)
>[ 78854.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 78854.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 78854.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ea90]
>[ 78854.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ea90] width 2880 pitch 11520 (/4 2880)
>[ 78854.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cdd198]
>[ 78854.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cdd198] width 2880 pitch 11520 (/4 2880)
>[ 78854.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 78854.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 78854.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2ef8]
>[ 78854.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2ef8] width 2880 pitch 11520 (/4 2880)
>[ 78855.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7da0]
>[ 78855.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7da0] width 2880 pitch 11520 (/4 2880)
>[ 78856.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 78856.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 78857.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa180658]
>[ 78857.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa180658] width 2880 pitch 11520 (/4 2880)
>[ 78857.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7da0]
>[ 78857.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7da0] width 2880 pitch 11520 (/4 2880)
>[ 78857.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deab60]
>[ 78857.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deab60] width 2880 pitch 11520 (/4 2880)
>[ 78857.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c5268]
>[ 78857.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c5268] width 2880 pitch 11520 (/4 2880)
>[ 78857.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9811b68]
>[ 78857.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9811b68] width 2880 pitch 11520 (/4 2880)
>[ 78864.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f568]
>[ 78864.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f568] width 2880 pitch 11520 (/4 2880)
>[ 78876.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1370]
>[ 78876.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1370] width 2880 pitch 11520 (/4 2880)
>[ 78876.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b664f0]
>[ 78876.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b664f0] width 2880 pitch 11520 (/4 2880)
>[ 78876.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b664f0]
>[ 78876.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b664f0] width 2880 pitch 11520 (/4 2880)
>[ 78876.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b664f0]
>[ 78876.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b664f0] width 2880 pitch 11520 (/4 2880)
>[ 78876.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f568]
>[ 78876.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f568] width 2880 pitch 11520 (/4 2880)
>[ 78876.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f568]
>[ 78876.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f568] width 2880 pitch 11520 (/4 2880)
>[ 78876.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f568]
>[ 78876.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f568] width 2880 pitch 11520 (/4 2880)
>[ 78876.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78876.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b1370]
>[ 78876.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b1370] width 2880 pitch 11520 (/4 2880)
>[ 78876.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01e868]
>[ 78876.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01e868] width 2880 pitch 11520 (/4 2880)
>[ 78880.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66458]
>[ 78880.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66458] width 2880 pitch 11520 (/4 2880)
>[ 78880.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9637df8]
>[ 78880.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9637df8] width 2880 pitch 11520 (/4 2880)
>[ 78880.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc518]
>[ 78880.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc518] width 2880 pitch 11520 (/4 2880)
>[ 78880.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9637df8]
>[ 78880.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9637df8] width 2880 pitch 11520 (/4 2880)
>[ 78880.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78880.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9637df8]
>[ 78880.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9637df8] width 2880 pitch 11520 (/4 2880)
>[ 78880.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78880.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9637df8]
>[ 78880.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9637df8] width 2880 pitch 11520 (/4 2880)
>[ 78880.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78880.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f3b8]
>[ 78880.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f3b8] width 2880 pitch 11520 (/4 2880)
>[ 78880.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78880.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f3b8]
>[ 78880.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f3b8] width 2880 pitch 11520 (/4 2880)
>[ 78880.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78880.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f3b8]
>[ 78880.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f3b8] width 2880 pitch 11520 (/4 2880)
>[ 78880.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983c128]
>[ 78880.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983c128] width 2880 pitch 11520 (/4 2880)
>[ 78880.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4430]
>[ 78880.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4430] width 2880 pitch 11520 (/4 2880)
>[ 78911.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a761a8]
>[ 78911.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a761a8] width 2880 pitch 11520 (/4 2880)
>[ 78911.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e6cf88]
>[ 78911.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e6cf88] width 2880 pitch 11520 (/4 2880)
>[ 78956.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f1598]
>[ 78956.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f1598] width 2880 pitch 11520 (/4 2880)
>[ 78982.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f1578]
>[ 78982.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f1578] width 2880 pitch 11520 (/4 2880)
>[ 79057.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b737e8]
>[ 79057.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b737e8] width 2880 pitch 11520 (/4 2880)
>[ 79068.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab938]
>[ 79068.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab938] width 2880 pitch 11520 (/4 2880)
>[ 79071.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbb8f8]
>[ 79071.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbb8f8] width 2880 pitch 11520 (/4 2880)
>[ 79072.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08f8d0]
>[ 79072.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08f8d0] width 2880 pitch 11520 (/4 2880)
>[ 79072.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbb898]
>[ 79072.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbb898] width 2880 pitch 11520 (/4 2880)
>[ 79072.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 79072.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 79072.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9737ea8]
>[ 79072.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9737ea8] width 2880 pitch 11520 (/4 2880)
>[ 79073.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aadf8]
>[ 79073.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aadf8] width 2880 pitch 11520 (/4 2880)
>[ 79114.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79114.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79116.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75a8]
>[ 79116.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75a8] width 2880 pitch 11520 (/4 2880)
>[ 79116.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb4c8]
>[ 79116.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb4c8] width 2880 pitch 11520 (/4 2880)
>[ 79116.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75a8]
>[ 79116.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75a8] width 2880 pitch 11520 (/4 2880)
>[ 79116.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb4c8]
>[ 79116.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb4c8] width 2880 pitch 11520 (/4 2880)
>[ 79116.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75a8]
>[ 79116.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75a8] width 2880 pitch 11520 (/4 2880)
>[ 79116.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb4c8]
>[ 79116.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb4c8] width 2880 pitch 11520 (/4 2880)
>[ 79116.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f1590]
>[ 79116.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f1590] width 2880 pitch 11520 (/4 2880)
>[ 79116.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79116.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79116.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb4c8]
>[ 79116.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb4c8] width 2880 pitch 11520 (/4 2880)
>[ 79116.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79116.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79116.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb4c8]
>[ 79116.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb4c8] width 2880 pitch 11520 (/4 2880)
>[ 79116.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79116.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79116.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf88]
>[ 79116.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf88] width 2880 pitch 11520 (/4 2880)
>[ 79116.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79116.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79116.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf88]
>[ 79116.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf88] width 2880 pitch 11520 (/4 2880)
>[ 79116.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3cf58]
>[ 79116.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3cf58] width 2880 pitch 11520 (/4 2880)
>[ 79117.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f6b8]
>[ 79117.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f6b8] width 2880 pitch 11520 (/4 2880)
>[ 79117.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f1578]
>[ 79117.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f1578] width 2880 pitch 11520 (/4 2880)
>[ 79117.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79117.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79117.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf780]
>[ 79117.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf780] width 2880 pitch 11520 (/4 2880)
>[ 79117.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf780]
>[ 79117.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf780] width 2880 pitch 11520 (/4 2880)
>[ 79117.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79117.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79117.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d282c0]
>[ 79117.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d282c0] width 2880 pitch 11520 (/4 2880)
>[ 79117.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79117.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79117.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d282c0]
>[ 79117.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d282c0] width 2880 pitch 11520 (/4 2880)
>[ 79117.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189eb0]
>[ 79117.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189eb0] width 2880 pitch 11520 (/4 2880)
>[ 79117.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf780]
>[ 79117.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf780] width 2880 pitch 11520 (/4 2880)
>[ 79117.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189eb0]
>[ 79117.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189eb0] width 2880 pitch 11520 (/4 2880)
>[ 79117.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 79117.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 79117.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf780]
>[ 79117.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf780] width 2880 pitch 11520 (/4 2880)
>[ 79117.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 79117.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 79127.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 79127.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 79127.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2ae0]
>[ 79127.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2ae0] width 2880 pitch 11520 (/4 2880)
>[ 79129.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af6470]
>[ 79129.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af6470] width 2880 pitch 11520 (/4 2880)
>[ 79129.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b5d8]
>[ 79129.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b5d8] width 2880 pitch 11520 (/4 2880)
>[ 79129.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2ae0]
>[ 79129.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2ae0] width 2880 pitch 11520 (/4 2880)
>[ 79130.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72170]
>[ 79130.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72170] width 2880 pitch 11520 (/4 2880)
>[ 79130.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72170]
>[ 79130.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72170] width 2880 pitch 11520 (/4 2880)
>[ 79130.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b5d8]
>[ 79130.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b5d8] width 2880 pitch 11520 (/4 2880)
>[ 79131.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72170]
>[ 79131.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72170] width 2880 pitch 11520 (/4 2880)
>[ 79132.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844d0]
>[ 79132.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844d0] width 2880 pitch 11520 (/4 2880)
>[ 79132.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca9f90]
>[ 79132.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca9f90] width 2880 pitch 11520 (/4 2880)
>[ 79132.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94858e0]
>[ 79132.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94858e0] width 2880 pitch 11520 (/4 2880)
>[ 79132.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b844d0]
>[ 79132.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b844d0] width 2880 pitch 11520 (/4 2880)
>[ 79149.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cf18]
>[ 79149.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cf18] width 2880 pitch 11520 (/4 2880)
>[ 79149.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121738]
>[ 79149.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121738] width 2880 pitch 11520 (/4 2880)
>[ 79149.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4cf18]
>[ 79149.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4cf18] width 2880 pitch 11520 (/4 2880)
>[ 79149.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121738]
>[ 79149.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121738] width 2880 pitch 11520 (/4 2880)
>[ 79149.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79149.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79149.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121738]
>[ 79149.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121738] width 2880 pitch 11520 (/4 2880)
>[ 79149.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79149.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79149.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121738]
>[ 79149.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121738] width 2880 pitch 11520 (/4 2880)
>[ 79149.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79149.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79149.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b765a8]
>[ 79149.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b765a8] width 2880 pitch 11520 (/4 2880)
>[ 79152.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab4820]
>[ 79152.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab4820] width 2880 pitch 11520 (/4 2880)
>[ 79152.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79152.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79152.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab4820]
>[ 79152.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab4820] width 2880 pitch 11520 (/4 2880)
>[ 79152.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79152.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79152.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab4820]
>[ 79152.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab4820] width 2880 pitch 11520 (/4 2880)
>[ 79152.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79152.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79152.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b765a8]
>[ 79152.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b765a8] width 2880 pitch 11520 (/4 2880)
>[ 79152.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79152.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79152.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b765a8]
>[ 79152.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b765a8] width 2880 pitch 11520 (/4 2880)
>[ 79152.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8738]
>[ 79152.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8738] width 2880 pitch 11520 (/4 2880)
>[ 79203.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 79203.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 79258.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd30]
>[ 79258.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd30] width 2880 pitch 11520 (/4 2880)
>[ 79258.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211cc0]
>[ 79258.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211cc0] width 2880 pitch 11520 (/4 2880)
>[ 79258.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acfa0]
>[ 79258.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acfa0] width 2880 pitch 11520 (/4 2880)
>[ 79258.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4aaf0]
>[ 79259.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4aaf0] width 2880 pitch 11520 (/4 2880)
>[ 79259.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 79259.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 79259.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acfa0]
>[ 79259.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acfa0] width 2880 pitch 11520 (/4 2880)
>[ 79259.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 79259.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 79259.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2ef8]
>[ 79259.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2ef8] width 2880 pitch 11520 (/4 2880)
>[ 79260.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a8d8]
>[ 79260.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a8d8] width 2880 pitch 11520 (/4 2880)
>[ 79260.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eb468]
>[ 79260.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eb468] width 2880 pitch 11520 (/4 2880)
>[ 79261.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79261.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79261.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75d8]
>[ 79261.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75d8] width 2880 pitch 11520 (/4 2880)
>[ 79261.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79261.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79261.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75d8]
>[ 79261.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75d8] width 2880 pitch 11520 (/4 2880)
>[ 79261.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79261.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79261.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d75d8]
>[ 79261.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d75d8] width 2880 pitch 11520 (/4 2880)
>[ 79261.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79261.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79261.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978bf08]
>[ 79261.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978bf08] width 2880 pitch 11520 (/4 2880)
>[ 79261.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79261.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79261.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978bf08]
>[ 79261.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978bf08] width 2880 pitch 11520 (/4 2880)
>[ 79267.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c81d50]
>[ 79267.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c81d50] width 2880 pitch 11520 (/4 2880)
>[ 79267.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79267.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79268.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df1fe8]
>[ 79268.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df1fe8] width 2880 pitch 11520 (/4 2880)
>[ 79268.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4680]
>[ 79268.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4680] width 2880 pitch 11520 (/4 2880)
>[ 79268.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df1fe8]
>[ 79268.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df1fe8] width 2880 pitch 11520 (/4 2880)
>[ 79268.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4680]
>[ 79268.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4680] width 2880 pitch 11520 (/4 2880)
>[ 79268.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4680]
>[ 79268.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4680] width 2880 pitch 11520 (/4 2880)
>[ 79269.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c81d50]
>[ 79269.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c81d50] width 2880 pitch 11520 (/4 2880)
>[ 79269.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7da8]
>[ 79269.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7da8] width 2880 pitch 11520 (/4 2880)
>[ 79269.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7da8]
>[ 79269.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7da8] width 2880 pitch 11520 (/4 2880)
>[ 79269.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79269.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79269.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4680]
>[ 79269.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4680] width 2880 pitch 11520 (/4 2880)
>[ 79270.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97955b0]
>[ 79270.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97955b0] width 2880 pitch 11520 (/4 2880)
>[ 79270.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97955b0]
>[ 79270.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97955b0] width 2880 pitch 11520 (/4 2880)
>[ 79270.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051160]
>[ 79270.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051160] width 2880 pitch 11520 (/4 2880)
>[ 79270.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65410]
>[ 79270.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65410] width 2880 pitch 11520 (/4 2880)
>[ 79270.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97955b0]
>[ 79270.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97955b0] width 2880 pitch 11520 (/4 2880)
>[ 79277.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1f58]
>[ 79277.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1f58] width 2880 pitch 11520 (/4 2880)
>[ 79277.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9920320]
>[ 79277.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9920320] width 2880 pitch 11520 (/4 2880)
>[ 79277.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfba10]
>[ 79277.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfba10] width 2880 pitch 11520 (/4 2880)
>[ 79277.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9453b70]
>[ 79277.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9453b70] width 2880 pitch 11520 (/4 2880)
>[ 79277.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a750f0]
>[ 79277.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a750f0] width 2880 pitch 11520 (/4 2880)
>[ 79278.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1750e8]
>[ 79278.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1750e8] width 2880 pitch 11520 (/4 2880)
>[ 79278.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63048]
>[ 79278.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63048] width 2880 pitch 11520 (/4 2880)
>[ 79278.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54740]
>[ 79278.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54740] width 2880 pitch 11520 (/4 2880)
>[ 79278.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94bba38]
>[ 79278.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94bba38] width 2880 pitch 11520 (/4 2880)
>[ 79278.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9594fe0]
>[ 79279.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9594fe0] width 2880 pitch 11520 (/4 2880)
>[ 79279.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff2c88]
>[ 79279.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff2c88] width 2880 pitch 11520 (/4 2880)
>[ 79279.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c45dc8]
>[ 79280.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c45dc8] width 2880 pitch 11520 (/4 2880)
>[ 79280.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0f428]
>[ 79280.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0f428] width 2880 pitch 11520 (/4 2880)
>[ 79280.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79280.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79281.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df14c8]
>[ 79281.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df14c8] width 2880 pitch 11520 (/4 2880)
>[ 79281.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ebf8]
>[ 79281.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ebf8] width 2880 pitch 11520 (/4 2880)
>[ 79282.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455840]
>[ 79282.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455840] width 2880 pitch 11520 (/4 2880)
>[ 79282.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1f58]
>[ 79282.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1f58] width 2880 pitch 11520 (/4 2880)
>[ 79282.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deca8]
>[ 79282.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deca8] width 2880 pitch 11520 (/4 2880)
>[ 79282.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cfa0]
>[ 79282.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cfa0] width 2880 pitch 11520 (/4 2880)
>[ 79282.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e1b0]
>[ 79282.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e1b0] width 2880 pitch 11520 (/4 2880)
>[ 79282.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19d510]
>[ 79282.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19d510] width 2880 pitch 11520 (/4 2880)
>[ 79295.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9476478]
>[ 79295.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9476478] width 2880 pitch 11520 (/4 2880)
>[ 79296.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa027630]
>[ 79296.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa027630] width 2880 pitch 11520 (/4 2880)
>[ 79296.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3210]
>[ 79296.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3210] width 2880 pitch 11520 (/4 2880)
>[ 79296.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4e60]
>[ 79296.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4e60] width 2880 pitch 11520 (/4 2880)
>[ 79296.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0f428]
>[ 79296.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0f428] width 2880 pitch 11520 (/4 2880)
>[ 79296.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19d510]
>[ 79296.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19d510] width 2880 pitch 11520 (/4 2880)
>[ 79297.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99891e0]
>[ 79297.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99891e0] width 2880 pitch 11520 (/4 2880)
>[ 79297.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b0c0]
>[ 79297.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b0c0] width 2880 pitch 11520 (/4 2880)
>[ 79297.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79297.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79298.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b0c0]
>[ 79298.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b0c0] width 2880 pitch 11520 (/4 2880)
>[ 79310.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79310.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79319.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79319.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79319.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083af0]
>[ 79319.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083af0] width 2880 pitch 11520 (/4 2880)
>[ 79319.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c78]
>[ 79320.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c78] width 2880 pitch 11520 (/4 2880)
>[ 79320.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 79320.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 79320.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79320.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79320.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79320.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79320.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79320.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79320.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 79320.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 79324.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79324.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79324.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79324.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79324.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79324.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79324.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79324.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79324.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79324.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79324.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79324.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79324.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 79324.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 79324.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e70d0]
>[ 79324.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e70d0] width 2880 pitch 11520 (/4 2880)
>[ 79324.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79324.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79324.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79324.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79324.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79324.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79324.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79324.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79324.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79324.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79325.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79325.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79325.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79325.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79325.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79325.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79325.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e70d0]
>[ 79325.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e70d0] width 2880 pitch 11520 (/4 2880)
>[ 79325.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79325.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79325.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79325.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79325.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79325.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79325.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79325.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79325.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79325.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79325.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79325.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79325.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79325.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79325.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79325.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79345.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e70d0]
>[ 79346.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e70d0] width 2880 pitch 11520 (/4 2880)
>[ 79346.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79346.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79346.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e70d0]
>[ 79346.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e70d0] width 2880 pitch 11520 (/4 2880)
>[ 79346.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79346.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79346.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79346.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79346.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79346.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79346.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085198]
>[ 79346.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085198] width 2880 pitch 11520 (/4 2880)
>[ 79346.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79346.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79346.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79346.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79346.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79346.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79346.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79346.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79346.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79346.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79350.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 79350.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 79350.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79350.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79350.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085198]
>[ 79350.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085198] width 2880 pitch 11520 (/4 2880)
>[ 79350.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79350.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79350.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1002b0]
>[ 79350.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1002b0] width 2880 pitch 11520 (/4 2880)
>[ 79350.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79350.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79350.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79350.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79350.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79350.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79350.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79350.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79350.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79350.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79379.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79379.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79379.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79379.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79379.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79379.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79379.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79379.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79379.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79379.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79379.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79379.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79379.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79379.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79379.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79379.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79379.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79379.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79379.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79379.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79379.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79379.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79379.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79379.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79383.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79383.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79383.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79383.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79383.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79383.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79383.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79383.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79383.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79383.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79383.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3c8]
>[ 79383.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3c8] width 2880 pitch 11520 (/4 2880)
>[ 79383.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79383.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79383.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79383.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79383.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79383.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79383.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79383.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79383.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79383.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79383.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79383.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79412.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efb40]
>[ 79412.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efb40] width 2880 pitch 11520 (/4 2880)
>[ 79414.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79414.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79419.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79419.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79446.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79446.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79490.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79490.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79491.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afca50]
>[ 79491.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afca50] width 2880 pitch 11520 (/4 2880)
>[ 79558.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e8a0]
>[ 79558.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e8a0] width 2880 pitch 11520 (/4 2880)
>[ 79558.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79558.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79558.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79558.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79558.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79558.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79558.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79558.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79558.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18c248]
>[ 79558.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18c248] width 2880 pitch 11520 (/4 2880)
>[ 79558.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efb40]
>[ 79558.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efb40] width 2880 pitch 11520 (/4 2880)
>[ 79558.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7ae0]
>[ 79558.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7ae0] width 2880 pitch 11520 (/4 2880)
>[ 79558.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79558.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79558.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79558.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79558.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79558.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79558.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999e8a0]
>[ 79558.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999e8a0] width 2880 pitch 11520 (/4 2880)
>[ 79562.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb740]
>[ 79562.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb740] width 2880 pitch 11520 (/4 2880)
>[ 79562.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e71b0]
>[ 79562.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e71b0] width 2880 pitch 11520 (/4 2880)
>[ 79562.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973aa08]
>[ 79562.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973aa08] width 2880 pitch 11520 (/4 2880)
>[ 79562.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b722c8]
>[ 79563.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b722c8] width 2880 pitch 11520 (/4 2880)
>[ 79563.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb41a0]
>[ 79563.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb41a0] width 2880 pitch 11520 (/4 2880)
>[ 79563.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79563.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79563.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79563.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79563.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95459e8]
>[ 79563.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95459e8] width 2880 pitch 11520 (/4 2880)
>[ 79563.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79563.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79563.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7bf78]
>[ 79563.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7bf78] width 2880 pitch 11520 (/4 2880)
>[ 79563.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79563.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79563.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e7bf78]
>[ 79563.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e7bf78] width 2880 pitch 11520 (/4 2880)
>[ 79563.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79563.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79652.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e368]
>[ 79652.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e368] width 2880 pitch 11520 (/4 2880)
>[ 79673.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959a18]
>[ 79673.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959a18] width 2880 pitch 11520 (/4 2880)
>[ 79673.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80e80]
>[ 79674.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80e80] width 2880 pitch 11520 (/4 2880)
>[ 79674.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423bf0]
>[ 79674.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423bf0] width 2880 pitch 11520 (/4 2880)
>[ 79674.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbb868]
>[ 79674.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbb868] width 2880 pitch 11520 (/4 2880)
>[ 79674.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984108]
>[ 79674.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984108] width 2880 pitch 11520 (/4 2880)
>[ 79674.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16b240]
>[ 79674.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16b240] width 2880 pitch 11520 (/4 2880)
>[ 79674.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9d0]
>[ 79674.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9d0] width 2880 pitch 11520 (/4 2880)
>[ 79674.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80e80]
>[ 79674.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80e80] width 2880 pitch 11520 (/4 2880)
>[ 79675.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa058cc0]
>[ 79675.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa058cc0] width 2880 pitch 11520 (/4 2880)
>[ 79675.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9d0]
>[ 79675.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9d0] width 2880 pitch 11520 (/4 2880)
>[ 79676.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54740]
>[ 79676.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54740] width 2880 pitch 11520 (/4 2880)
>[ 79676.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc5480]
>[ 79676.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc5480] width 2880 pitch 11520 (/4 2880)
>[ 79676.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de8bd0]
>[ 79676.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de8bd0] width 2880 pitch 11520 (/4 2880)
>[ 79676.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99891e0]
>[ 79676.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99891e0] width 2880 pitch 11520 (/4 2880)
>[ 79676.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae7da8]
>[ 79676.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae7da8] width 2880 pitch 11520 (/4 2880)
>[ 79676.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79677.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79677.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d62c20]
>[ 79677.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d62c20] width 2880 pitch 11520 (/4 2880)
>[ 79678.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c54740]
>[ 79678.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c54740] width 2880 pitch 11520 (/4 2880)
>[ 79678.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18bf00]
>[ 79678.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18bf00] width 2880 pitch 11520 (/4 2880)
>[ 79679.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79679.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79679.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79679.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79679.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083af0]
>[ 79679.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083af0] width 2880 pitch 11520 (/4 2880)
>[ 79680.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109070]
>[ 79680.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109070] width 2880 pitch 11520 (/4 2880)
>[ 79681.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 79681.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 79681.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79681.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79681.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79681.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79681.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109070]
>[ 79681.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109070] width 2880 pitch 11520 (/4 2880)
>[ 79681.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79681.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79682.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109070]
>[ 79682.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109070] width 2880 pitch 11520 (/4 2880)
>[ 79682.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79682.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79682.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a8d8]
>[ 79682.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a8d8] width 2880 pitch 11520 (/4 2880)
>[ 79682.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2bc8]
>[ 79682.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2bc8] width 2880 pitch 11520 (/4 2880)
>[ 79682.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a8d8]
>[ 79682.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a8d8] width 2880 pitch 11520 (/4 2880)
>[ 79682.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 79682.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 79683.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ea90]
>[ 79683.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ea90] width 2880 pitch 11520 (/4 2880)
>[ 79683.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 79683.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 79683.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9590218]
>[ 79683.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9590218] width 2880 pitch 11520 (/4 2880)
>[ 79683.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211cc0]
>[ 79683.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211cc0] width 2880 pitch 11520 (/4 2880)
>[ 79683.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79683.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79683.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2078f0]
>[ 79683.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2078f0] width 2880 pitch 11520 (/4 2880)
>[ 79683.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79683.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79683.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2078f0]
>[ 79683.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2078f0] width 2880 pitch 11520 (/4 2880)
>[ 79683.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79683.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79683.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ab00]
>[ 79683.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ab00] width 2880 pitch 11520 (/4 2880)
>[ 79683.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79683.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79683.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79683.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79683.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79683.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79683.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79683.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79703.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 79703.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 79703.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 79703.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 79704.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 79704.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 79704.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 79704.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 79704.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d25eb8]
>[ 79704.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d25eb8] width 2880 pitch 11520 (/4 2880)
>[ 79704.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2ef8]
>[ 79704.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2ef8] width 2880 pitch 11520 (/4 2880)
>[ 79704.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 79705.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 79705.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2078f0]
>[ 79705.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2078f0] width 2880 pitch 11520 (/4 2880)
>[ 79705.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4aaf0]
>[ 79705.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4aaf0] width 2880 pitch 11520 (/4 2880)
>[ 79705.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978be10]
>[ 79705.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978be10] width 2880 pitch 11520 (/4 2880)
>[ 79706.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225300]
>[ 79706.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225300] width 2880 pitch 11520 (/4 2880)
>[ 79707.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed2ef8]
>[ 79707.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed2ef8] width 2880 pitch 11520 (/4 2880)
>[ 79708.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 79708.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 79708.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ea90]
>[ 79708.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ea90] width 2880 pitch 11520 (/4 2880)
>[ 79709.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acfa0]
>[ 79709.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acfa0] width 2880 pitch 11520 (/4 2880)
>[ 79709.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 79709.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 79709.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 79709.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 79709.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977b6e0]
>[ 79709.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977b6e0] width 2880 pitch 11520 (/4 2880)
>[ 79709.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d239e0]
>[ 79709.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d239e0] width 2880 pitch 11520 (/4 2880)
>[ 79729.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79729.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79729.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79729.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79729.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79729.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79729.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79729.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79729.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adf3f8]
>[ 79729.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adf3f8] width 2880 pitch 11520 (/4 2880)
>[ 79729.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6bca8]
>[ 79729.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6bca8] width 2880 pitch 11520 (/4 2880)
>[ 79729.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bc9d0]
>[ 79729.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bc9d0] width 2880 pitch 11520 (/4 2880)
>[ 79729.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aec10]
>[ 79729.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aec10] width 2880 pitch 11520 (/4 2880)
>[ 79729.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 79729.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 79729.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aec10]
>[ 79729.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aec10] width 2880 pitch 11520 (/4 2880)
>[ 79729.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bc9d0]
>[ 79729.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bc9d0] width 2880 pitch 11520 (/4 2880)
>[ 79730.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6bca8]
>[ 79730.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6bca8] width 2880 pitch 11520 (/4 2880)
>[ 79730.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bc9d0]
>[ 79730.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bc9d0] width 2880 pitch 11520 (/4 2880)
>[ 79730.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aec10]
>[ 79730.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aec10] width 2880 pitch 11520 (/4 2880)
>[ 79730.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6bca8]
>[ 79730.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6bca8] width 2880 pitch 11520 (/4 2880)
>[ 79730.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63048]
>[ 79730.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63048] width 2880 pitch 11520 (/4 2880)
>[ 79730.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79730.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79730.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79730.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79730.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79730.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79730.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79730.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79730.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79730.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79730.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79730.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79730.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79730.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79730.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79730.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79730.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79730.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79730.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79730.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79730.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79730.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79730.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79730.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79730.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79730.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79731.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79731.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79731.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79731.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79731.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79731.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79731.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 79731.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 79731.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29628]
>[ 79731.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29628] width 2880 pitch 11520 (/4 2880)
>[ 79731.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79731.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79732.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79732.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79732.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79732.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79732.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79732.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79732.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ce0]
>[ 79732.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ce0] width 2880 pitch 11520 (/4 2880)
>[ 79734.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 79734.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 79735.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0e28]
>[ 79735.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0e28] width 2880 pitch 11520 (/4 2880)
>[ 79735.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb6a10]
>[ 79735.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb6a10] width 2880 pitch 11520 (/4 2880)
>[ 79735.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0e28]
>[ 79735.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0e28] width 2880 pitch 11520 (/4 2880)
>[ 79736.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79736.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79736.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08b3e8]
>[ 79736.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08b3e8] width 2880 pitch 11520 (/4 2880)
>[ 79736.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79736.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79736.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995cd10]
>[ 79736.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995cd10] width 2880 pitch 11520 (/4 2880)
>[ 79736.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a217d8]
>[ 79737.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a217d8] width 2880 pitch 11520 (/4 2880)
>[ 79737.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79737.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79737.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79737.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79737.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79737.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79737.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe3e8]
>[ 79737.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe3e8] width 2880 pitch 11520 (/4 2880)
>[ 79737.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bfb68]
>[ 79737.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bfb68] width 2880 pitch 11520 (/4 2880)
>[ 79737.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79738.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79781.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96abb08]
>[ 79781.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96abb08] width 2880 pitch 11520 (/4 2880)
>[ 79781.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79781.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79781.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 79781.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 79781.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79781.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79782.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 79782.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 79782.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 79782.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 79782.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79782.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79782.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79782.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79783.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79783.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79783.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051270]
>[ 79783.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051270] width 2880 pitch 11520 (/4 2880)
>[ 79784.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79784.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79784.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbb928]
>[ 79784.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbb928] width 2880 pitch 11520 (/4 2880)
>[ 79786.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051270]
>[ 79786.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051270] width 2880 pitch 11520 (/4 2880)
>[ 79786.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79786.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79787.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 79787.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 79787.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 79788.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 79788.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79788.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79790.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79790.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79794.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051270]
>[ 79794.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051270] width 2880 pitch 11520 (/4 2880)
>[ 79794.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051270]
>[ 79794.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051270] width 2880 pitch 11520 (/4 2880)
>[ 79794.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79794.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79794.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbb928]
>[ 79794.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbb928] width 2880 pitch 11520 (/4 2880)
>[ 79794.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582950]
>[ 79795.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582950] width 2880 pitch 11520 (/4 2880)
>[ 79819.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e524a8]
>[ 79819.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e524a8] width 2880 pitch 11520 (/4 2880)
>[ 79819.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9ab0]
>[ 79819.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9ab0] width 2880 pitch 11520 (/4 2880)
>[ 79819.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e524a8]
>[ 79819.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e524a8] width 2880 pitch 11520 (/4 2880)
>[ 79819.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64108]
>[ 79819.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64108] width 2880 pitch 11520 (/4 2880)
>[ 79819.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30988]
>[ 79820.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30988] width 2880 pitch 11520 (/4 2880)
>[ 79820.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2b88]
>[ 79820.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2b88] width 2880 pitch 11520 (/4 2880)
>[ 79820.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b27b58]
>[ 79820.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b27b58] width 2880 pitch 11520 (/4 2880)
>[ 79821.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd908]
>[ 79821.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd908] width 2880 pitch 11520 (/4 2880)
>[ 79836.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e524a8]
>[ 79836.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e524a8] width 2880 pitch 11520 (/4 2880)
>[ 79837.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79837.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79837.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79837.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79837.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79837.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79838.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a4490]
>[ 79838.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a4490] width 2880 pitch 11520 (/4 2880)
>[ 79838.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a0d0]
>[ 79838.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a0d0] width 2880 pitch 11520 (/4 2880)
>[ 79838.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a0d0]
>[ 79838.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a0d0] width 2880 pitch 11520 (/4 2880)
>[ 79838.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a44c0]
>[ 79838.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a44c0] width 2880 pitch 11520 (/4 2880)
>[ 79855.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79855.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79855.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9ab0]
>[ 79855.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9ab0] width 2880 pitch 11520 (/4 2880)
>[ 79855.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79855.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79855.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671c98]
>[ 79855.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671c98] width 2880 pitch 11520 (/4 2880)
>[ 79856.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c00]
>[ 79856.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c00] width 2880 pitch 11520 (/4 2880)
>[ 79856.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671c98]
>[ 79856.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671c98] width 2880 pitch 11520 (/4 2880)
>[ 79857.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14a0d0]
>[ 79857.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14a0d0] width 2880 pitch 11520 (/4 2880)
>[ 79857.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74018]
>[ 79857.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74018] width 2880 pitch 11520 (/4 2880)
>[ 79857.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9ab0]
>[ 79857.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9ab0] width 2880 pitch 11520 (/4 2880)
>[ 79857.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e524a8]
>[ 79857.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e524a8] width 2880 pitch 11520 (/4 2880)
>[ 79858.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942fc78]
>[ 79858.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942fc78] width 2880 pitch 11520 (/4 2880)
>[ 79858.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c125f0]
>[ 79858.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c125f0] width 2880 pitch 11520 (/4 2880)
>[ 79858.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2dcd0]
>[ 79858.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2dcd0] width 2880 pitch 11520 (/4 2880)
>[ 79858.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d628]
>[ 79858.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d628] width 2880 pitch 11520 (/4 2880)
>[ 79859.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a9b0]
>[ 79859.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a9b0] width 2880 pitch 11520 (/4 2880)
>[ 79859.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa058000]
>[ 79859.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa058000] width 2880 pitch 11520 (/4 2880)
>[ 79859.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98101a0]
>[ 79859.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98101a0] width 2880 pitch 11520 (/4 2880)
>[ 79859.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977d628]
>[ 79859.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977d628] width 2880 pitch 11520 (/4 2880)
>[ 79860.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f4d0]
>[ 79860.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f4d0] width 2880 pitch 11520 (/4 2880)
>[ 79860.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f4d0]
>[ 79860.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f4d0] width 2880 pitch 11520 (/4 2880)
>[ 79860.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79860.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79860.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79860.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79861.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f4d0]
>[ 79861.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f4d0] width 2880 pitch 11520 (/4 2880)
>[ 79861.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b10f8]
>[ 79861.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b10f8] width 2880 pitch 11520 (/4 2880)
>[ 79861.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f4d0]
>[ 79861.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f4d0] width 2880 pitch 11520 (/4 2880)
>[ 79861.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ff98]
>[ 79861.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ff98] width 2880 pitch 11520 (/4 2880)
>[ 79861.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa058010]
>[ 79861.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa058010] width 2880 pitch 11520 (/4 2880)
>[ 79861.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79861.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79861.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa058010]
>[ 79861.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa058010] width 2880 pitch 11520 (/4 2880)
>[ 79861.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79861.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79861.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa058010]
>[ 79861.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa058010] width 2880 pitch 11520 (/4 2880)
>[ 79866.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9813aa8]
>[ 79866.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9813aa8] width 2880 pitch 11520 (/4 2880)
>[ 79866.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995cd10]
>[ 79866.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995cd10] width 2880 pitch 11520 (/4 2880)
>[ 79891.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 79891.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 79891.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 79891.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 79891.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 79891.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 79892.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 79892.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 79892.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa025770]
>[ 79892.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa025770] width 2880 pitch 11520 (/4 2880)
>[ 79892.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb880]
>[ 79892.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb880] width 2880 pitch 11520 (/4 2880)
>[ 79892.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72500]
>[ 79892.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72500] width 2880 pitch 11520 (/4 2880)
>[ 79893.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb880]
>[ 79893.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb880] width 2880 pitch 11520 (/4 2880)
>[ 79893.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72500]
>[ 79893.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72500] width 2880 pitch 11520 (/4 2880)
>[ 79893.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb880]
>[ 79893.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb880] width 2880 pitch 11520 (/4 2880)
>[ 79893.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72500]
>[ 79893.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72500] width 2880 pitch 11520 (/4 2880)
>[ 79893.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb880]
>[ 79893.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb880] width 2880 pitch 11520 (/4 2880)
>[ 79893.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a1128]
>[ 79893.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a1128] width 2880 pitch 11520 (/4 2880)
>[ 79893.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 79893.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 79894.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97743a0]
>[ 79894.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97743a0] width 2880 pitch 11520 (/4 2880)
>[ 79894.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212210]
>[ 79894.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212210] width 2880 pitch 11520 (/4 2880)
>[ 79894.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 79894.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 79894.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 79894.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 79896.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 79896.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 79897.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 79897.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 79897.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 79897.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 79897.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa025770]
>[ 79897.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa025770] width 2880 pitch 11520 (/4 2880)
>[ 79897.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d640]
>[ 79897.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d640] width 2880 pitch 11520 (/4 2880)
>[ 79897.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa025770]
>[ 79897.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa025770] width 2880 pitch 11520 (/4 2880)
>[ 79897.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d640]
>[ 79897.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d640] width 2880 pitch 11520 (/4 2880)
>[ 79920.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 79920.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 79920.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 79920.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 79920.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23ba90]
>[ 79920.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23ba90] width 2880 pitch 11520 (/4 2880)
>[ 79920.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 79920.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 79920.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 79920.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 79920.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028550]
>[ 79920.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028550] width 2880 pitch 11520 (/4 2880)
>[ 79920.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970fba0]
>[ 79920.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970fba0] width 2880 pitch 11520 (/4 2880)
>[ 79920.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 79920.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 79920.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755428]
>[ 79920.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755428] width 2880 pitch 11520 (/4 2880)
>[ 79920.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a0b0]
>[ 79920.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a0b0] width 2880 pitch 11520 (/4 2880)
>[ 79920.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30a50]
>[ 79920.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30a50] width 2880 pitch 11520 (/4 2880)
>[ 79921.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 79921.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 79921.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755428]
>[ 79921.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755428] width 2880 pitch 11520 (/4 2880)
>[ 79921.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970fba0]
>[ 79922.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970fba0] width 2880 pitch 11520 (/4 2880)
>[ 79922.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 79922.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 79922.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 79922.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 79922.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[ 79922.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[ 79922.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 79922.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 79922.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 79922.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 79924.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545c80]
>[ 79924.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545c80] width 2880 pitch 11520 (/4 2880)
>[ 79924.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 79924.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 79925.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79925.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79925.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 79925.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 79925.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 79925.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 79926.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72500]
>[ 79926.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72500] width 2880 pitch 11520 (/4 2880)
>[ 79926.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32688]
>[ 79926.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32688] width 2880 pitch 11520 (/4 2880)
>[ 79926.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 79926.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 79926.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23ba90]
>[ 79926.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23ba90] width 2880 pitch 11520 (/4 2880)
>[ 79927.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93cb880]
>[ 79927.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93cb880] width 2880 pitch 11520 (/4 2880)
>[ 79928.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970fba0]
>[ 79928.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970fba0] width 2880 pitch 11520 (/4 2880)
>[ 79928.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 79928.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 79930.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545c80]
>[ 79930.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545c80] width 2880 pitch 11520 (/4 2880)
>[ 79931.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 79931.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 79932.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 79932.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 79933.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 79933.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 79933.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9423c30]
>[ 79933.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9423c30] width 2880 pitch 11520 (/4 2880)
>[ 79933.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a0b0]
>[ 79934.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a0b0] width 2880 pitch 11520 (/4 2880)
>[ 79934.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 79934.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 79934.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 79934.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 79934.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 79934.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 79935.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 79935.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 79935.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 79935.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 79935.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 79935.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 79935.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa025770]
>[ 79935.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa025770] width 2880 pitch 11520 (/4 2880)
>[ 79935.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 79935.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 79980.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 79980.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 79980.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 79980.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 79980.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970fba0]
>[ 79980.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970fba0] width 2880 pitch 11520 (/4 2880)
>[ 79980.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9545c80]
>[ 79980.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9545c80] width 2880 pitch 11520 (/4 2880)
>[ 79980.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 79980.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 79980.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 79980.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 79980.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 79980.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 79980.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c5f0]
>[ 79980.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c5f0] width 2880 pitch 11520 (/4 2880)
>[ 79980.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 79980.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 79980.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 79980.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 79983.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 79983.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 79984.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 79984.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 79984.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cce0]
>[ 79984.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cce0] width 2880 pitch 11520 (/4 2880)
>[ 79984.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 79984.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 79984.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9484cf0]
>[ 79984.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9484cf0] width 2880 pitch 11520 (/4 2880)
>[ 79984.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30a50]
>[ 79984.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30a50] width 2880 pitch 11520 (/4 2880)
>[ 79984.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 79984.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 79992.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531778]
>[ 79992.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531778] width 2880 pitch 11520 (/4 2880)
>[ 79992.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970fba0]
>[ 79992.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970fba0] width 2880 pitch 11520 (/4 2880)
>[ 79992.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 79992.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 79992.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72500]
>[ 79992.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72500] width 2880 pitch 11520 (/4 2880)
>[ 79993.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 79993.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 79993.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212210]
>[ 79993.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212210] width 2880 pitch 11520 (/4 2880)
>[ 79993.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 79994.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 79994.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212210]
>[ 79994.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212210] width 2880 pitch 11520 (/4 2880)
>[ 79994.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 79994.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 79994.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94590c8]
>[ 79994.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94590c8] width 2880 pitch 11520 (/4 2880)
>[ 79994.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 79994.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 79995.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531778]
>[ 79995.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531778] width 2880 pitch 11520 (/4 2880)
>[ 79995.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 79995.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 79995.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30a50]
>[ 79995.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30a50] width 2880 pitch 11520 (/4 2880)
>[ 79995.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212210]
>[ 79995.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212210] width 2880 pitch 11520 (/4 2880)
>[ 79995.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 79995.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 80013.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9d2e0]
>[ 80013.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9d2e0] width 2880 pitch 11520 (/4 2880)
>[ 80023.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac8548]
>[ 80023.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac8548] width 2880 pitch 11520 (/4 2880)
>[ 80039.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80039.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80039.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e3280]
>[ 80039.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e3280] width 2880 pitch 11520 (/4 2880)
>[ 80039.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80039.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80039.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e3280]
>[ 80039.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e3280] width 2880 pitch 11520 (/4 2880)
>[ 80039.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e5c8]
>[ 80039.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e5c8] width 2880 pitch 11520 (/4 2880)
>[ 80039.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80039.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80039.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15dc10]
>[ 80040.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15dc10] width 2880 pitch 11520 (/4 2880)
>[ 80040.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5f520]
>[ 80040.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5f520] width 2880 pitch 11520 (/4 2880)
>[ 80046.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80046.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80046.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e3280]
>[ 80046.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e3280] width 2880 pitch 11520 (/4 2880)
>[ 80046.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 80046.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 80046.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80046.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80046.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a190]
>[ 80046.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a190] width 2880 pitch 11520 (/4 2880)
>[ 80046.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80046.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80046.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15dc10]
>[ 80046.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15dc10] width 2880 pitch 11520 (/4 2880)
>[ 80046.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 80046.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 80046.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8490]
>[ 80046.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8490] width 2880 pitch 11520 (/4 2880)
>[ 80046.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a190]
>[ 80046.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a190] width 2880 pitch 11520 (/4 2880)
>[ 80046.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80046.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80046.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144ff8]
>[ 80046.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144ff8] width 2880 pitch 11520 (/4 2880)
>[ 80046.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 80046.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 80047.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a190]
>[ 80047.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a190] width 2880 pitch 11520 (/4 2880)
>[ 80047.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 80047.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 80047.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8490]
>[ 80047.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8490] width 2880 pitch 11520 (/4 2880)
>[ 80047.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80047.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80047.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8490]
>[ 80047.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8490] width 2880 pitch 11520 (/4 2880)
>[ 80047.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 80047.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 80047.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80047.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80047.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144ff8]
>[ 80047.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144ff8] width 2880 pitch 11520 (/4 2880)
>[ 80047.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5efe0]
>[ 80047.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5efe0] width 2880 pitch 11520 (/4 2880)
>[ 80047.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8490]
>[ 80047.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8490] width 2880 pitch 11520 (/4 2880)
>[ 80047.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a190]
>[ 80047.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a190] width 2880 pitch 11520 (/4 2880)
>[ 80068.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144ff8]
>[ 80068.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144ff8] width 2880 pitch 11520 (/4 2880)
>[ 80068.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80068.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80069.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 80069.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 80069.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa110460]
>[ 80069.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa110460] width 2880 pitch 11520 (/4 2880)
>[ 80069.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ab00]
>[ 80069.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ab00] width 2880 pitch 11520 (/4 2880)
>[ 80070.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118a50]
>[ 80070.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118a50] width 2880 pitch 11520 (/4 2880)
>[ 80070.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15dc10]
>[ 80070.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15dc10] width 2880 pitch 11520 (/4 2880)
>[ 80070.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98319b8]
>[ 80070.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98319b8] width 2880 pitch 11520 (/4 2880)
>[ 80071.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80071.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80071.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 80071.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 80071.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80071.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80071.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6d390]
>[ 80071.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6d390] width 2880 pitch 11520 (/4 2880)
>[ 80071.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e9e10]
>[ 80071.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e9e10] width 2880 pitch 11520 (/4 2880)
>[ 80080.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e33d0]
>[ 80080.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e33d0] width 2880 pitch 11520 (/4 2880)
>[ 80083.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 80083.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 80084.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80084.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80089.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80089.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80089.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80089.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80089.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80089.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80089.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80089.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80089.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80089.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80090.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 80090.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 80091.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210b48]
>[ 80091.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210b48] width 2880 pitch 11520 (/4 2880)
>[ 80091.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80091.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80091.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80091.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80092.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 80092.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 80092.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210b48]
>[ 80092.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210b48] width 2880 pitch 11520 (/4 2880)
>[ 80092.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 80092.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 80092.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210b48]
>[ 80092.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210b48] width 2880 pitch 11520 (/4 2880)
>[ 80092.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5ecf0]
>[ 80092.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5ecf0] width 2880 pitch 11520 (/4 2880)
>[ 80092.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa110460]
>[ 80092.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa110460] width 2880 pitch 11520 (/4 2880)
>[ 80092.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69060]
>[ 80092.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69060] width 2880 pitch 11520 (/4 2880)
>[ 80100.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa360b00]
>[ 80100.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa360b00] width 2880 pitch 11520 (/4 2880)
>[ 80100.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972c7e8]
>[ 80100.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972c7e8] width 2880 pitch 11520 (/4 2880)
>[ 80100.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61ec0]
>[ 80100.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61ec0] width 2880 pitch 11520 (/4 2880)
>[ 80100.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5200]
>[ 80100.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5200] width 2880 pitch 11520 (/4 2880)
>[ 80100.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755428]
>[ 80100.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755428] width 2880 pitch 11520 (/4 2880)
>[ 80100.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1c238]
>[ 80100.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1c238] width 2880 pitch 11520 (/4 2880)
>[ 80104.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa230ef8]
>[ 80104.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa230ef8] width 2880 pitch 11520 (/4 2880)
>[ 80104.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144ff8]
>[ 80104.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144ff8] width 2880 pitch 11520 (/4 2880)
>[ 80104.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3e08]
>[ 80104.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3e08] width 2880 pitch 11520 (/4 2880)
>[ 80104.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c962a0]
>[ 80104.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c962a0] width 2880 pitch 11520 (/4 2880)
>[ 80104.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1c238]
>[ 80104.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1c238] width 2880 pitch 11520 (/4 2880)
>[ 80104.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80104.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80104.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961860]
>[ 80104.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961860] width 2880 pitch 11520 (/4 2880)
>[ 80111.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755428]
>[ 80111.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755428] width 2880 pitch 11520 (/4 2880)
>[ 80117.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9963290]
>[ 80118.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9963290] width 2880 pitch 11520 (/4 2880)
>[ 80118.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46818]
>[ 80118.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46818] width 2880 pitch 11520 (/4 2880)
>[ 80131.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa203408]
>[ 80131.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa203408] width 2880 pitch 11520 (/4 2880)
>[ 80171.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69060]
>[ 80171.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69060] width 2880 pitch 11520 (/4 2880)
>[ 80171.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa110460]
>[ 80171.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa110460] width 2880 pitch 11520 (/4 2880)
>[ 80171.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755428]
>[ 80171.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755428] width 2880 pitch 11520 (/4 2880)
>[ 80171.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13bf90]
>[ 80171.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13bf90] width 2880 pitch 11520 (/4 2880)
>[ 80171.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8ec8]
>[ 80171.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8ec8] width 2880 pitch 11520 (/4 2880)
>[ 80171.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3b70]
>[ 80171.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3b70] width 2880 pitch 11520 (/4 2880)
>[ 80171.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfeae8]
>[ 80171.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfeae8] width 2880 pitch 11520 (/4 2880)
>[ 80171.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9e818]
>[ 80171.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9e818] width 2880 pitch 11520 (/4 2880)
>[ 80171.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104b38]
>[ 80171.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104b38] width 2880 pitch 11520 (/4 2880)
>[ 80171.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139088]
>[ 80171.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139088] width 2880 pitch 11520 (/4 2880)
>[ 80171.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3b70]
>[ 80171.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3b70] width 2880 pitch 11520 (/4 2880)
>[ 80180.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69060]
>[ 80180.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69060] width 2880 pitch 11520 (/4 2880)
>[ 80221.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa084888]
>[ 80221.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa084888] width 2880 pitch 11520 (/4 2880)
>[ 80221.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e5d30]
>[ 80221.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e5d30] width 2880 pitch 11520 (/4 2880)
>[ 80221.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f00a0]
>[ 80221.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f00a0] width 2880 pitch 11520 (/4 2880)
>[ 80221.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173a70]
>[ 80221.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173a70] width 2880 pitch 11520 (/4 2880)
>[ 80222.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b96e50]
>[ 80222.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b96e50] width 2880 pitch 11520 (/4 2880)
>[ 80222.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b670]
>[ 80222.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b670] width 2880 pitch 11520 (/4 2880)
>[ 80222.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977ef8]
>[ 80222.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977ef8] width 2880 pitch 11520 (/4 2880)
>[ 80222.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9782760]
>[ 80222.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9782760] width 2880 pitch 11520 (/4 2880)
>[ 80222.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1478a8]
>[ 80222.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1478a8] width 2880 pitch 11520 (/4 2880)
>[ 80222.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9977ef8]
>[ 80222.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9977ef8] width 2880 pitch 11520 (/4 2880)
>[ 80222.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977cc58]
>[ 80222.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977cc58] width 2880 pitch 11520 (/4 2880)
>[ 80222.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b670]
>[ 80222.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b670] width 2880 pitch 11520 (/4 2880)
>[ 80222.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa084888]
>[ 80222.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa084888] width 2880 pitch 11520 (/4 2880)
>[ 80222.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772cf0]
>[ 80222.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772cf0] width 2880 pitch 11520 (/4 2880)
>[ 80222.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977cc58]
>[ 80222.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977cc58] width 2880 pitch 11520 (/4 2880)
>[ 80222.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9380368]
>[ 80222.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9380368] width 2880 pitch 11520 (/4 2880)
>[ 80222.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa084888]
>[ 80223.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa084888] width 2880 pitch 11520 (/4 2880)
>[ 80223.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3f468]
>[ 80223.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3f468] width 2880 pitch 11520 (/4 2880)
>[ 80223.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305d0]
>[ 80223.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305d0] width 2880 pitch 11520 (/4 2880)
>[ 80223.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173a70]
>[ 80223.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173a70] width 2880 pitch 11520 (/4 2880)
>[ 80223.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa169730]
>[ 80223.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa169730] width 2880 pitch 11520 (/4 2880)
>[ 80223.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9827800]
>[ 80223.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9827800] width 2880 pitch 11520 (/4 2880)
>[ 80223.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa169730]
>[ 80223.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa169730] width 2880 pitch 11520 (/4 2880)
>[ 80223.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305d0]
>[ 80223.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305d0] width 2880 pitch 11520 (/4 2880)
>[ 80223.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08af40]
>[ 80223.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08af40] width 2880 pitch 11520 (/4 2880)
>[ 80223.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1478a8]
>[ 80224.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1478a8] width 2880 pitch 11520 (/4 2880)
>[ 80224.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3fa38]
>[ 80224.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3fa38] width 2880 pitch 11520 (/4 2880)
>[ 80224.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9380368]
>[ 80224.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9380368] width 2880 pitch 11520 (/4 2880)
>[ 80224.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9634be0]
>[ 80224.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9634be0] width 2880 pitch 11520 (/4 2880)
>[ 80224.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa072d50]
>[ 80224.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa072d50] width 2880 pitch 11520 (/4 2880)
>[ 80224.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b670]
>[ 80225.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b670] width 2880 pitch 11520 (/4 2880)
>[ 80225.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08af40]
>[ 80225.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08af40] width 2880 pitch 11520 (/4 2880)
>[ 80225.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08af40]
>[ 80225.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08af40] width 2880 pitch 11520 (/4 2880)
>[ 80225.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5160]
>[ 80225.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5160] width 2880 pitch 11520 (/4 2880)
>[ 80225.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de9518]
>[ 80225.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de9518] width 2880 pitch 11520 (/4 2880)
>[ 80232.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f5c0e8]
>[ 80232.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f5c0e8] width 2880 pitch 11520 (/4 2880)
>[ 80234.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11d2b8]
>[ 80234.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11d2b8] width 2880 pitch 11520 (/4 2880)
>[ 80331.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[ 80331.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[ 80338.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80338.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80338.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80338.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80338.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80339.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80339.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80339.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80339.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80339.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80339.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5f3d8]
>[ 80339.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5f3d8] width 2880 pitch 11520 (/4 2880)
>[ 80339.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80339.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80339.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80339.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80339.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749ac8]
>[ 80339.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749ac8] width 2880 pitch 11520 (/4 2880)
>[ 80339.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13b460]
>[ 80339.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13b460] width 2880 pitch 11520 (/4 2880)
>[ 80345.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80345.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80345.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 80345.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 80345.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80345.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80345.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80345.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80345.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80345.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80345.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80345.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80345.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 80345.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 80345.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80345.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80345.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80345.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80345.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80345.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80345.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80345.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80345.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 80345.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 80345.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80345.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80346.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80346.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80346.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 80346.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 80346.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c658]
>[ 80346.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c658] width 2880 pitch 11520 (/4 2880)
>[ 80346.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80346.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80346.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80346.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80346.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5f3d8]
>[ 80346.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5f3d8] width 2880 pitch 11520 (/4 2880)
>[ 80346.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5f3d8]
>[ 80346.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5f3d8] width 2880 pitch 11520 (/4 2880)
>[ 80346.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80346.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80346.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5f3d8]
>[ 80346.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5f3d8] width 2880 pitch 11520 (/4 2880)
>[ 80390.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80390.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80420.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80420.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80432.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80432.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80432.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80432.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80432.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80432.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80432.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80432.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80432.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80432.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80432.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80432.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80433.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80433.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80433.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80433.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80433.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80433.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80434.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80434.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80435.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80435.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80435.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80436.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80436.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80436.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80436.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80436.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80436.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80436.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80437.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80437.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80437.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80437.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80437.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80437.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80437.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80437.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80437.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2268d8]
>[ 80437.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2268d8] width 2880 pitch 11520 (/4 2880)
>[ 80437.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80437.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80437.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787fb0]
>[ 80437.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787fb0] width 2880 pitch 11520 (/4 2880)
>[ 80437.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b635f8]
>[ 80437.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b635f8] width 2880 pitch 11520 (/4 2880)
>[ 80459.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9432bd0]
>[ 80459.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9432bd0] width 2880 pitch 11520 (/4 2880)
>[ 80459.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b400]
>[ 80459.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b400] width 2880 pitch 11520 (/4 2880)
>[ 80459.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9432bd0]
>[ 80459.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9432bd0] width 2880 pitch 11520 (/4 2880)
>[ 80459.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b400]
>[ 80459.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b400] width 2880 pitch 11520 (/4 2880)
>[ 80459.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d11be0]
>[ 80459.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d11be0] width 2880 pitch 11520 (/4 2880)
>[ 80459.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b400]
>[ 80459.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b400] width 2880 pitch 11520 (/4 2880)
>[ 80459.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22728]
>[ 80459.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22728] width 2880 pitch 11520 (/4 2880)
>[ 80459.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ada430]
>[ 80459.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ada430] width 2880 pitch 11520 (/4 2880)
>[ 80460.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cdb8]
>[ 80460.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cdb8] width 2880 pitch 11520 (/4 2880)
>[ 80462.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15ebe0]
>[ 80462.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15ebe0] width 2880 pitch 11520 (/4 2880)
>[ 80462.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b400]
>[ 80462.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b400] width 2880 pitch 11520 (/4 2880)
>[ 80462.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744470]
>[ 80462.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744470] width 2880 pitch 11520 (/4 2880)
>[ 80462.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996bcb0]
>[ 80462.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996bcb0] width 2880 pitch 11520 (/4 2880)
>[ 80462.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af7c88]
>[ 80462.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af7c88] width 2880 pitch 11520 (/4 2880)
>[ 80462.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996bcb0]
>[ 80462.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996bcb0] width 2880 pitch 11520 (/4 2880)
>[ 80462.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996bcb0]
>[ 80462.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996bcb0] width 2880 pitch 11520 (/4 2880)
>[ 80462.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af7c88]
>[ 80462.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af7c88] width 2880 pitch 11520 (/4 2880)
>[ 80468.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996bcb0]
>[ 80468.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996bcb0] width 2880 pitch 11520 (/4 2880)
>[ 80519.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160a90]
>[ 80519.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160a90] width 2880 pitch 11520 (/4 2880)
>[ 80519.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6f5e8]
>[ 80519.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6f5e8] width 2880 pitch 11520 (/4 2880)
>[ 80519.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 80519.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 80519.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d22b8]
>[ 80519.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d22b8] width 2880 pitch 11520 (/4 2880)
>[ 80519.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0870]
>[ 80519.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0870] width 2880 pitch 11520 (/4 2880)
>[ 80519.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5dc8]
>[ 80519.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5dc8] width 2880 pitch 11520 (/4 2880)
>[ 80519.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 80519.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 80519.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80519.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80519.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d37a60]
>[ 80519.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d37a60] width 2880 pitch 11520 (/4 2880)
>[ 80519.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1672e0]
>[ 80519.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1672e0] width 2880 pitch 11520 (/4 2880)
>[ 80519.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cdb8]
>[ 80519.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cdb8] width 2880 pitch 11520 (/4 2880)
>[ 80519.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160a90]
>[ 80519.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160a90] width 2880 pitch 11520 (/4 2880)
>[ 80520.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d9d30]
>[ 80520.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d9d30] width 2880 pitch 11520 (/4 2880)
>[ 80521.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9d800]
>[ 80521.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9d800] width 2880 pitch 11520 (/4 2880)
>[ 80521.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4ab8]
>[ 80521.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4ab8] width 2880 pitch 11520 (/4 2880)
>[ 80521.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80521.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80521.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80521.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80521.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80521.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80521.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1672e0]
>[ 80521.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1672e0] width 2880 pitch 11520 (/4 2880)
>[ 80532.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80532.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80533.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80533.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80533.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1672e0]
>[ 80533.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1672e0] width 2880 pitch 11520 (/4 2880)
>[ 80533.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80533.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80533.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80533.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80534.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80534.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80534.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80534.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80534.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80534.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80534.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80534.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80534.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80534.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80534.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 80535.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 80535.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80535.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80552.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80552.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80556.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80556.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80599.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80599.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80599.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80599.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80599.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1672e0]
>[ 80599.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1672e0] width 2880 pitch 11520 (/4 2880)
>[ 80599.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85220]
>[ 80599.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85220] width 2880 pitch 11520 (/4 2880)
>[ 80599.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195a50]
>[ 80599.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195a50] width 2880 pitch 11520 (/4 2880)
>[ 80599.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80599.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80599.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 80600.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 80600.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80600.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80600.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ab00]
>[ 80600.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ab00] width 2880 pitch 11520 (/4 2880)
>[ 80600.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80600.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80600.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80600.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80601.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80601.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80602.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80602.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80602.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80602.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80602.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1672e0]
>[ 80602.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1672e0] width 2880 pitch 11520 (/4 2880)
>[ 80602.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c658]
>[ 80603.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c658] width 2880 pitch 11520 (/4 2880)
>[ 80603.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80603.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80603.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195a50]
>[ 80603.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195a50] width 2880 pitch 11520 (/4 2880)
>[ 80603.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aecf38]
>[ 80603.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aecf38] width 2880 pitch 11520 (/4 2880)
>[ 80604.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b50e8]
>[ 80604.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b50e8] width 2880 pitch 11520 (/4 2880)
>[ 80604.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80605.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80605.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80605.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80605.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80605.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80605.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80605.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80605.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22b8f8]
>[ 80605.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22b8f8] width 2880 pitch 11520 (/4 2880)
>[ 80609.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ab00]
>[ 80609.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ab00] width 2880 pitch 11520 (/4 2880)
>[ 80624.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80624.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80624.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 80624.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 80624.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80624.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80624.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80624.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80624.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80624.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80624.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80624.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80625.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80625.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80625.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80625.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80625.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80625.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80625.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80625.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80625.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aecf38]
>[ 80625.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aecf38] width 2880 pitch 11520 (/4 2880)
>[ 80626.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85220]
>[ 80626.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85220] width 2880 pitch 11520 (/4 2880)
>[ 80626.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80626.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80626.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80626.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80626.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80626.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80626.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80626.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80628.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b50e8]
>[ 80628.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b50e8] width 2880 pitch 11520 (/4 2880)
>[ 80629.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80629.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80629.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80629.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80629.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80629.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80629.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80629.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80630.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80630.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80630.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80630.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80630.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80630.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80631.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aecf38]
>[ 80631.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aecf38] width 2880 pitch 11520 (/4 2880)
>[ 80632.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80632.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80632.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80632.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80632.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80632.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80632.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57f50]
>[ 80632.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57f50] width 2880 pitch 11520 (/4 2880)
>[ 80632.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1cd0]
>[ 80632.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1cd0] width 2880 pitch 11520 (/4 2880)
>[ 80640.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57f50]
>[ 80640.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57f50] width 2880 pitch 11520 (/4 2880)
>[ 80640.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80640.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80640.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195a50]
>[ 80640.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195a50] width 2880 pitch 11520 (/4 2880)
>[ 80641.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f57f50]
>[ 80641.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f57f50] width 2880 pitch 11520 (/4 2880)
>[ 80641.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80641.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80641.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80641.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80642.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80642.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80642.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80642.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80642.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c658]
>[ 80642.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c658] width 2880 pitch 11520 (/4 2880)
>[ 80642.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb5c0]
>[ 80642.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb5c0] width 2880 pitch 11520 (/4 2880)
>[ 80643.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976c658]
>[ 80643.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976c658] width 2880 pitch 11520 (/4 2880)
>[ 80647.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0870]
>[ 80647.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0870] width 2880 pitch 11520 (/4 2880)
>[ 80647.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b4f8]
>[ 80647.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b4f8] width 2880 pitch 11520 (/4 2880)
>[ 80647.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0870]
>[ 80647.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0870] width 2880 pitch 11520 (/4 2880)
>[ 80647.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa084ef0]
>[ 80647.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa084ef0] width 2880 pitch 11520 (/4 2880)
>[ 80648.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0870]
>[ 80648.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0870] width 2880 pitch 11520 (/4 2880)
>[ 80648.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b4f8]
>[ 80648.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b4f8] width 2880 pitch 11520 (/4 2880)
>[ 80648.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0870]
>[ 80648.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0870] width 2880 pitch 11520 (/4 2880)
>[ 80648.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4ab8]
>[ 80648.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4ab8] width 2880 pitch 11520 (/4 2880)
>[ 80648.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f56ee0]
>[ 80648.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f56ee0] width 2880 pitch 11520 (/4 2880)
>[ 80655.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8b3a0]
>[ 80655.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8b3a0] width 2880 pitch 11520 (/4 2880)
>[ 80655.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eab58]
>[ 80655.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eab58] width 2880 pitch 11520 (/4 2880)
>[ 80655.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4ab8]
>[ 80655.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4ab8] width 2880 pitch 11520 (/4 2880)
>[ 80655.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b4f8]
>[ 80655.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b4f8] width 2880 pitch 11520 (/4 2880)
>[ 80655.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96374b0]
>[ 80655.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96374b0] width 2880 pitch 11520 (/4 2880)
>[ 80655.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eab58]
>[ 80655.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eab58] width 2880 pitch 11520 (/4 2880)
>[ 80655.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96374b0]
>[ 80655.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96374b0] width 2880 pitch 11520 (/4 2880)
>[ 80655.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3b4f8]
>[ 80655.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3b4f8] width 2880 pitch 11520 (/4 2880)
>[ 80655.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5258]
>[ 80655.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5258] width 2880 pitch 11520 (/4 2880)
>[ 80657.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d28658]
>[ 80657.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d28658] width 2880 pitch 11520 (/4 2880)
>[ 80657.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974e8b0]
>[ 80657.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974e8b0] width 2880 pitch 11520 (/4 2880)
>[ 80657.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c204d8]
>[ 80657.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c204d8] width 2880 pitch 11520 (/4 2880)
>[ 80657.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0436b0]
>[ 80657.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0436b0] width 2880 pitch 11520 (/4 2880)
>[ 80657.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e03c8]
>[ 80657.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e03c8] width 2880 pitch 11520 (/4 2880)
>[ 80657.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e9d0]
>[ 80657.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e9d0] width 2880 pitch 11520 (/4 2880)
>[ 80657.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974e8b0]
>[ 80657.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974e8b0] width 2880 pitch 11520 (/4 2880)
>[ 80657.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974e8b0]
>[ 80657.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974e8b0] width 2880 pitch 11520 (/4 2880)
>[ 80657.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e03c8]
>[ 80657.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e03c8] width 2880 pitch 11520 (/4 2880)
>[ 80670.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d18868]
>[ 80670.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d18868] width 2880 pitch 11520 (/4 2880)
>[ 80670.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160140]
>[ 80670.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160140] width 2880 pitch 11520 (/4 2880)
>[ 80670.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94df380]
>[ 80670.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94df380] width 2880 pitch 11520 (/4 2880)
>[ 80670.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a23c8]
>[ 80670.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a23c8] width 2880 pitch 11520 (/4 2880)
>[ 80670.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1291c0]
>[ 80670.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1291c0] width 2880 pitch 11520 (/4 2880)
>[ 80671.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0f28]
>[ 80671.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0f28] width 2880 pitch 11520 (/4 2880)
>[ 80671.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3b40]
>[ 80671.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3b40] width 2880 pitch 11520 (/4 2880)
>[ 80671.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b2f10]
>[ 80671.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b2f10] width 2880 pitch 11520 (/4 2880)
>[ 80671.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3b40]
>[ 80671.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3b40] width 2880 pitch 11520 (/4 2880)
>[ 80672.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a1e8]
>[ 80672.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a1e8] width 2880 pitch 11520 (/4 2880)
>[ 80672.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe1c8]
>[ 80672.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe1c8] width 2880 pitch 11520 (/4 2880)
>[ 80672.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0f28]
>[ 80672.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0f28] width 2880 pitch 11520 (/4 2880)
>[ 80673.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe1c8]
>[ 80673.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe1c8] width 2880 pitch 11520 (/4 2880)
>[ 80673.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147570]
>[ 80673.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147570] width 2880 pitch 11520 (/4 2880)
>[ 80673.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 80673.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 80673.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147570]
>[ 80673.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147570] width 2880 pitch 11520 (/4 2880)
>[ 80673.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dceb00]
>[ 80673.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dceb00] width 2880 pitch 11520 (/4 2880)
>[ 80684.385] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 80684.419] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 80684.464] (II) RADEON(0): Ok, leaving now...
>[ 80687.451] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 80687.451] (II) RADEON(0): RADEONEnterVT_KMS
>[ 80687.994] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 80687.994] (II) RADEON(0): Using hsync ranges from config file
>[ 80687.994] (II) RADEON(0): Using vrefresh ranges from config file
>[ 80687.994] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 80687.994] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 80687.994] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 80687.994] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 80687.995] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 80687.999] (II) RADEON(0): RADEONSaveScreen(2)
>[ 80694.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80694.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80695.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba7a0]
>[ 80695.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba7a0] width 2880 pitch 11520 (/4 2880)
>[ 80695.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c540b0]
>[ 80695.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c540b0] width 2880 pitch 11520 (/4 2880)
>[ 80695.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95735d0]
>[ 80695.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95735d0] width 2880 pitch 11520 (/4 2880)
>[ 80696.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c540b0]
>[ 80696.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c540b0] width 2880 pitch 11520 (/4 2880)
>[ 80697.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95735d0]
>[ 80697.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95735d0] width 2880 pitch 11520 (/4 2880)
>[ 80697.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95735d0]
>[ 80697.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95735d0] width 2880 pitch 11520 (/4 2880)
>[ 80697.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba7a0]
>[ 80697.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba7a0] width 2880 pitch 11520 (/4 2880)
>[ 80697.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9595d70]
>[ 80697.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9595d70] width 2880 pitch 11520 (/4 2880)
>[ 80699.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fb6e8]
>[ 80699.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fb6e8] width 2880 pitch 11520 (/4 2880)
>[ 80699.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0da0b0]
>[ 80699.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0da0b0] width 2880 pitch 11520 (/4 2880)
>[ 80699.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962e7b8]
>[ 80699.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962e7b8] width 2880 pitch 11520 (/4 2880)
>[ 80699.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d18868]
>[ 80699.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d18868] width 2880 pitch 11520 (/4 2880)
>[ 80699.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa6708]
>[ 80699.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa6708] width 2880 pitch 11520 (/4 2880)
>[ 80699.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4488]
>[ 80699.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4488] width 2880 pitch 11520 (/4 2880)
>[ 80699.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d98d0]
>[ 80699.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d98d0] width 2880 pitch 11520 (/4 2880)
>[ 80699.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d98d0]
>[ 80699.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d98d0] width 2880 pitch 11520 (/4 2880)
>[ 80699.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80699.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80702.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80702.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80702.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d18868]
>[ 80702.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d18868] width 2880 pitch 11520 (/4 2880)
>[ 80702.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fb6e8]
>[ 80702.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fb6e8] width 2880 pitch 11520 (/4 2880)
>[ 80702.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95735d0]
>[ 80702.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95735d0] width 2880 pitch 11520 (/4 2880)
>[ 80702.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80702.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80702.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80702.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80702.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80702.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80702.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80702.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80702.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80702.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80702.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80702.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80702.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80702.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80703.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80703.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80703.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80703.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 80703.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 80703.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95735d0]
>[ 80703.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95735d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997a860]
>[ 80703.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997a860] width 2880 pitch 11520 (/4 2880)
>[ 80703.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96105d0]
>[ 80703.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96105d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d98d0]
>[ 80703.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d98d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c22728]
>[ 80703.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c22728] width 2880 pitch 11520 (/4 2880)
>[ 80703.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d98d0]
>[ 80703.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d98d0] width 2880 pitch 11520 (/4 2880)
>[ 80703.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a136e8]
>[ 80703.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a136e8] width 2880 pitch 11520 (/4 2880)
>[ 80703.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d98d0]
>[ 80703.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d98d0] width 2880 pitch 11520 (/4 2880)
>[ 80706.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47670]
>[ 80706.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47670] width 2880 pitch 11520 (/4 2880)
>[ 80706.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99be400]
>[ 80706.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99be400] width 2880 pitch 11520 (/4 2880)
>[ 80706.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588900]
>[ 80706.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588900] width 2880 pitch 11520 (/4 2880)
>[ 80706.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8128]
>[ 80706.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8128] width 2880 pitch 11520 (/4 2880)
>[ 80706.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e0f98]
>[ 80706.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e0f98] width 2880 pitch 11520 (/4 2880)
>[ 80706.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3498]
>[ 80706.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3498] width 2880 pitch 11520 (/4 2880)
>[ 80706.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9478030]
>[ 80706.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9478030] width 2880 pitch 11520 (/4 2880)
>[ 80706.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f638]
>[ 80706.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f638] width 2880 pitch 11520 (/4 2880)
>[ 80706.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8128]
>[ 80706.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8128] width 2880 pitch 11520 (/4 2880)
>[ 80706.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7e6d0]
>[ 80706.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7e6d0] width 2880 pitch 11520 (/4 2880)
>[ 80707.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7f710]
>[ 80707.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7f710] width 2880 pitch 11520 (/4 2880)
>[ 80707.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f47670]
>[ 80707.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f47670] width 2880 pitch 11520 (/4 2880)
>[ 80707.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96be9b0]
>[ 80707.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96be9b0] width 2880 pitch 11520 (/4 2880)
>[ 80707.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3bbe0]
>[ 80707.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3bbe0] width 2880 pitch 11520 (/4 2880)
>[ 80707.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecc220]
>[ 80707.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecc220] width 2880 pitch 11520 (/4 2880)
>[ 80707.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588900]
>[ 80707.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588900] width 2880 pitch 11520 (/4 2880)
>[ 80707.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48510]
>[ 80707.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48510] width 2880 pitch 11520 (/4 2880)
>[ 80707.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9588900]
>[ 80707.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9588900] width 2880 pitch 11520 (/4 2880)
>[ 80707.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48510]
>[ 80707.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48510] width 2880 pitch 11520 (/4 2880)
>[ 80707.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46818]
>[ 80707.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46818] width 2880 pitch 11520 (/4 2880)
>[ 80707.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b0a70]
>[ 80707.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b0a70] width 2880 pitch 11520 (/4 2880)
>[ 80707.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940aa58]
>[ 80707.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940aa58] width 2880 pitch 11520 (/4 2880)
>[ 80707.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17fbf8]
>[ 80707.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80707.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8128]
>[ 80707.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8128] width 2880 pitch 11520 (/4 2880)
>[ 80707.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9478030]
>[ 80707.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9478030] width 2880 pitch 11520 (/4 2880)
>[ 80707.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9b8a8]
>[ 80707.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9b8a8] width 2880 pitch 11520 (/4 2880)
>[ 80707.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738f40]
>[ 80707.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738f40] width 2880 pitch 11520 (/4 2880)
>[ 80708.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f638]
>[ 80708.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f638] width 2880 pitch 11520 (/4 2880)
>[ 80708.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22db50]
>[ 80708.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22db50] width 2880 pitch 11520 (/4 2880)
>[ 80710.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x939b018]
>[ 80710.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x939b018] width 2880 pitch 11520 (/4 2880)
>[ 80713.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b0a70]
>[ 80713.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b0a70] width 2880 pitch 11520 (/4 2880)
>[ 80716.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d760]
>[ 80716.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d760] width 2880 pitch 11520 (/4 2880)
>[ 80716.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b0a70]
>[ 80716.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b0a70] width 2880 pitch 11520 (/4 2880)
>[ 80716.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20640]
>[ 80716.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20640] width 2880 pitch 11520 (/4 2880)
>[ 80716.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17fbf8]
>[ 80716.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80716.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9478030]
>[ 80716.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9478030] width 2880 pitch 11520 (/4 2880)
>[ 80716.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940aa58]
>[ 80716.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940aa58] width 2880 pitch 11520 (/4 2880)
>[ 80716.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a34c8]
>[ 80717.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a34c8] width 2880 pitch 11520 (/4 2880)
>[ 80717.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40148]
>[ 80717.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40148] width 2880 pitch 11520 (/4 2880)
>[ 80717.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11fbd8]
>[ 80717.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11fbd8] width 2880 pitch 11520 (/4 2880)
>[ 80717.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0513e0]
>[ 80717.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0513e0] width 2880 pitch 11520 (/4 2880)
>[ 80717.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e71bc8]
>[ 80717.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e71bc8] width 2880 pitch 11520 (/4 2880)
>[ 80717.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cfe8]
>[ 80717.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cfe8] width 2880 pitch 11520 (/4 2880)
>[ 80717.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22db50]
>[ 80717.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22db50] width 2880 pitch 11520 (/4 2880)
>[ 80717.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cfe8]
>[ 80717.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cfe8] width 2880 pitch 11520 (/4 2880)
>[ 80725.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9978520]
>[ 80725.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9978520] width 2880 pitch 11520 (/4 2880)
>[ 80860.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2850]
>[ 80860.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2850] width 2880 pitch 11520 (/4 2880)
>[ 80860.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995bee0]
>[ 80860.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995bee0] width 2880 pitch 11520 (/4 2880)
>[ 80860.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb66d0]
>[ 80860.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb66d0] width 2880 pitch 11520 (/4 2880)
>[ 80860.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995bee0]
>[ 80860.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995bee0] width 2880 pitch 11520 (/4 2880)
>[ 80860.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb66d0]
>[ 80860.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb66d0] width 2880 pitch 11520 (/4 2880)
>[ 80860.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e971e8]
>[ 80860.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e971e8] width 2880 pitch 11520 (/4 2880)
>[ 80860.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab8ab8]
>[ 80860.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab8ab8] width 2880 pitch 11520 (/4 2880)
>[ 80860.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953dc90]
>[ 80860.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953dc90] width 2880 pitch 11520 (/4 2880)
>[ 80860.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9c398]
>[ 80860.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9c398] width 2880 pitch 11520 (/4 2880)
>[ 80860.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 80860.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 80860.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b95ae0]
>[ 80860.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b95ae0] width 2880 pitch 11520 (/4 2880)
>[ 80860.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c720]
>[ 80860.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c720] width 2880 pitch 11520 (/4 2880)
>[ 80860.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b95ae0]
>[ 80860.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b95ae0] width 2880 pitch 11520 (/4 2880)
>[ 80861.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80861.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80861.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 80862.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 80864.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80864.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80864.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 80864.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 80864.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80864.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80864.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80864.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80864.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80864.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80864.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80864.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80864.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80864.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80864.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80864.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80864.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80864.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80867.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80867.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80871.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80871.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80871.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80871.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80871.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80871.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80872.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80872.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80872.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80872.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80872.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80872.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80872.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80872.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80872.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80872.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80872.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80872.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80873.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80873.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80873.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 80873.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 80873.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80873.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80873.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80873.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80873.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80873.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80873.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80873.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80873.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80873.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80873.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80873.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80876.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80876.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80877.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80877.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80877.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80877.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80877.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 80877.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 80877.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80877.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80877.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 80877.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 80877.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80877.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80878.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80878.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80878.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80878.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80878.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80878.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80878.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 80878.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 80878.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4730]
>[ 80878.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4730] width 2880 pitch 11520 (/4 2880)
>[ 80878.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80878.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80878.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80878.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80878.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80878.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80878.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80878.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80878.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80878.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80882.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80882.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80882.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80882.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80882.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80882.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80882.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80882.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80883.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80883.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80883.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80883.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80883.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80883.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80883.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80883.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80883.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80883.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80883.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80883.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80883.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80883.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80883.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80883.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80884.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80884.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80884.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80884.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80884.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80884.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80884.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80884.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80884.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80884.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80884.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80884.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80884.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80884.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80884.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80884.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80884.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80884.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80884.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80884.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80884.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80884.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80884.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80884.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80885.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 80885.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 80891.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80891.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80891.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80891.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80891.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80891.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80892.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80892.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80892.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80892.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80892.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80892.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80892.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80892.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80892.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80892.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80893.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80893.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80893.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80893.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80894.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80894.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80894.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80894.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80894.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80894.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80894.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80894.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80903.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80903.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80904.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80904.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80904.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1797d8]
>[ 80904.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1797d8] width 2880 pitch 11520 (/4 2880)
>[ 80904.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80904.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80904.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80904.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80904.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80904.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80904.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80904.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80904.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80904.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80904.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80904.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80904.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80904.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80904.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80904.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80904.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80904.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80904.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80904.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80905.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80905.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80905.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80905.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80907.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80907.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80909.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80909.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80909.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 80909.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 80909.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80909.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80909.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 80909.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 80909.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80909.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80909.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80909.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80909.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80909.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80909.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80909.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80909.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80909.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80909.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80909.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80909.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80909.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80909.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80909.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80909.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80909.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80909.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80909.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80913.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80913.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80913.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80913.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80913.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80913.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80913.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80913.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80913.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80913.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80913.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80913.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80913.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80913.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80913.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80913.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80913.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80913.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80913.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80913.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80913.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80913.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80913.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80913.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80913.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80914.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80914.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80914.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80916.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80916.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80920.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80920.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80921.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80921.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80921.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80921.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80921.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f69d0]
>[ 80921.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f69d0] width 2880 pitch 11520 (/4 2880)
>[ 80921.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80922.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80922.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80922.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80922.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80922.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80923.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17f560]
>[ 80923.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17f560] width 2880 pitch 11520 (/4 2880)
>[ 80928.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80928.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80928.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80928.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80929.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80929.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80929.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80929.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80929.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80929.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80929.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80929.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80929.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80929.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80934.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80934.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80934.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c13880]
>[ 80934.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c13880] width 2880 pitch 11520 (/4 2880)
>[ 80935.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80935.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80935.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80935.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80935.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80935.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80935.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80935.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80936.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9c8c0]
>[ 80936.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9c8c0] width 2880 pitch 11520 (/4 2880)
>[ 80936.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 80936.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 80936.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 80936.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 80937.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9c8c0]
>[ 80937.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9c8c0] width 2880 pitch 11520 (/4 2880)
>[ 80938.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 80938.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 80938.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80938.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80938.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 80938.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 80940.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80940.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80940.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80940.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80940.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80940.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80940.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80940.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80940.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80940.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80940.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80940.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80940.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80940.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80940.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80940.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80940.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 80940.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 80940.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 80940.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 80940.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 80940.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 80940.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 80940.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 80940.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80940.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80941.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 80941.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 80941.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80941.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80941.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 80941.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 80941.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 80941.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 80941.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80941.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80941.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80941.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80941.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 80941.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 80941.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 80941.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 80941.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 80941.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 80941.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80941.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80941.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 80941.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 80941.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80941.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 80941.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 80941.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 80943.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 80943.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 80944.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 80944.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 80944.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80944.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80944.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 80944.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 80944.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 80944.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 80944.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 80944.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 80944.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 80944.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 80944.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 80944.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 80944.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 80944.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 80951.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 80951.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 80984.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 80984.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 80990.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 80990.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 80990.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 80990.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 80997.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 80997.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81003.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 81003.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 81023.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 81023.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 81023.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81023.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81023.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81023.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81023.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81023.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81023.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81023.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81023.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81024.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81024.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81024.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81024.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81024.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81024.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81024.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81024.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81024.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81024.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81024.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81024.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81024.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81024.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81024.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81024.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81024.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81026.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81026.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81026.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 81026.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 81026.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 81026.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 81026.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81026.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81027.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81027.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81027.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81027.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81027.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81027.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81028.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81028.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81028.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81028.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81028.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81028.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81028.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81028.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81028.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81028.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81028.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81028.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81028.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81028.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81028.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81028.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81028.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81028.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81028.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81028.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81028.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81028.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81028.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81028.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81028.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81028.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81028.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81028.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81028.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81028.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81028.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81028.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81028.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81028.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81028.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81028.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81028.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81028.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81028.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81028.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81028.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81028.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81028.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81028.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81028.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81028.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81032.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 81032.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 81056.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81056.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81056.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81056.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81056.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81057.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81057.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81057.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81057.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 81057.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 81057.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81057.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81057.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81057.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81057.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81057.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81058.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81058.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81058.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81058.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81058.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81058.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81058.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81058.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81058.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81058.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81069.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81069.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81069.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81069.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81070.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 81070.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 81070.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81070.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81070.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81070.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81070.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81070.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81070.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81071.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81071.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81071.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81071.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81071.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81071.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81071.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81072.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20e78]
>[ 81072.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20e78] width 2880 pitch 11520 (/4 2880)
>[ 81072.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81072.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81072.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 81072.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 81072.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81072.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81072.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b50a68]
>[ 81072.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b50a68] width 2880 pitch 11520 (/4 2880)
>[ 81072.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81072.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81072.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81072.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81073.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dec370]
>[ 81073.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dec370] width 2880 pitch 11520 (/4 2880)
>[ 81073.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81073.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81074.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81074.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81074.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81074.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81074.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81074.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81074.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81074.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81074.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81074.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81074.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81074.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81074.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81074.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81074.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81074.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81074.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81074.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81074.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81074.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81074.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81074.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81083.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81083.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81087.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81087.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81100.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81100.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81100.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81100.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81100.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81100.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81118.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81118.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81118.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81118.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81118.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81118.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81118.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81118.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81118.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81118.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81118.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81118.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81118.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81118.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81118.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81118.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81118.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81118.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81119.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81119.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81119.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81119.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81123.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81123.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81123.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81123.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81123.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81123.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81123.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81123.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81123.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81123.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81123.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81123.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81123.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81123.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81123.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81123.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81123.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81123.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81123.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81123.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81123.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81123.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81123.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81123.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81146.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81146.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81146.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81146.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81146.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81146.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81146.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81146.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81146.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81146.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81146.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81146.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81146.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81146.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81146.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81146.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81146.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81146.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81146.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81146.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81146.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81146.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81146.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81146.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81146.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81146.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81147.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81147.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81147.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81147.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81147.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81147.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81147.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81147.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81147.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81147.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81147.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81147.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81147.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81147.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81147.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81147.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81147.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81147.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81147.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81147.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81148.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81148.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81148.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81148.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81148.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81148.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81148.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81148.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81148.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa107778]
>[ 81148.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa107778] width 2880 pitch 11520 (/4 2880)
>[ 81148.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81148.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81148.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81148.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81148.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81148.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81148.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81148.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81148.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81148.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81148.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81148.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81148.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81148.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81148.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81148.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81148.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81148.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81148.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81148.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81148.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81148.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81149.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81149.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81149.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81149.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81149.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81149.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81150.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81150.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81150.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81150.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81150.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81150.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81150.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81150.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81150.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81151.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81151.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81151.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81151.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81151.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81151.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81151.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81151.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81151.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81178.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81178.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81178.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81178.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81178.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81178.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81178.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81178.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81178.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81178.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81178.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81178.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81178.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81178.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81178.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81178.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81178.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81178.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81178.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 81178.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 81178.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81178.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81178.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81178.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81182.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81182.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81182.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 81182.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 81182.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81182.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81182.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2fbf8]
>[ 81182.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2fbf8] width 2880 pitch 11520 (/4 2880)
>[ 81182.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81182.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81182.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81182.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81182.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81182.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81182.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81183.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81183.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81183.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81183.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81183.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81183.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81183.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81183.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81183.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81185.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81185.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81185.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9646930]
>[ 81185.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9646930] width 2880 pitch 11520 (/4 2880)
>[ 81185.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81186.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81186.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81186.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81187.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a128]
>[ 81187.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a128] width 2880 pitch 11520 (/4 2880)
>[ 81187.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81187.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81187.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf220]
>[ 81187.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf220] width 2880 pitch 11520 (/4 2880)
>[ 81187.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81188.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81188.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81188.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81190.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81190.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81190.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81190.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81191.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81191.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81191.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e3d8]
>[ 81191.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e3d8] width 2880 pitch 11520 (/4 2880)
>[ 81192.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81192.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81203.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81203.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81203.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81203.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81204.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81204.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81204.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81204.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81206.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81206.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81206.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81206.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81207.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81207.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81208.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768db0]
>[ 81208.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768db0] width 2880 pitch 11520 (/4 2880)
>[ 81208.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a4c30]
>[ 81208.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a4c30] width 2880 pitch 11520 (/4 2880)
>[ 81208.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81208.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81220.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81220.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81239.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81239.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81239.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81240.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81240.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81240.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81240.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81240.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81240.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81240.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81240.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81240.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81240.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81240.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81244.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81244.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81244.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81244.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81244.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81244.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81244.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81244.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81244.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81244.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81244.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81244.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81244.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81244.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81244.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81244.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81244.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81244.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81244.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81244.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81244.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81244.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81244.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81244.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81244.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81244.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81245.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81245.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81245.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81245.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81245.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad26e8]
>[ 81245.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad26e8] width 2880 pitch 11520 (/4 2880)
>[ 81245.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81245.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81245.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81245.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81245.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81245.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81245.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81245.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81245.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81245.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81245.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81245.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81245.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81245.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81245.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81245.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81245.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81245.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81259.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81259.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81259.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81259.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81259.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81259.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81259.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81259.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81259.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81259.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81259.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81259.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81259.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81259.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81259.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81259.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81259.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81259.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81259.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81259.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81259.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81259.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81260.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81260.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81260.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81260.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81260.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81260.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81260.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81260.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81260.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81260.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81260.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81261.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81261.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81261.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81261.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81261.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81261.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81261.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81261.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81261.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81262.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81262.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81262.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81262.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81262.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81262.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81262.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81262.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81263.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81263.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81263.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81263.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81263.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81263.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81263.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81263.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81263.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81263.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81263.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81263.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81263.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81263.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81263.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81264.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81264.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81264.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81264.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81264.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81264.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9931f98]
>[ 81264.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9931f98] width 2880 pitch 11520 (/4 2880)
>[ 81279.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81279.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81280.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81280.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81288.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81288.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81295.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81295.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81295.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81295.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81296.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81296.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81296.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81296.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81296.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81296.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81296.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81296.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81296.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81296.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81296.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81297.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81297.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81297.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81297.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81297.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81297.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81297.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81297.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81297.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81297.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81297.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81298.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81298.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81298.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81298.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81298.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81298.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81298.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81298.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81298.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81298.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81298.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81298.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81298.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81298.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81298.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81298.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81298.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81298.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81298.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81298.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81298.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81299.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81299.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81299.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81299.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81299.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81299.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81299.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81299.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81299.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81300.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81300.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81301.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81301.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81301.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81301.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81301.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81301.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81301.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81301.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81301.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81301.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81301.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109c50]
>[ 81301.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109c50] width 2880 pitch 11520 (/4 2880)
>[ 81301.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81301.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81326.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81326.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81326.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81326.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81326.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81326.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81327.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81327.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81327.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81327.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81327.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81327.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81327.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81327.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81327.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81327.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81327.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81327.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81327.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81327.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81327.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81327.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81327.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81327.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81327.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81327.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81327.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81327.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81327.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c10378]
>[ 81327.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c10378] width 2880 pitch 11520 (/4 2880)
>[ 81328.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81328.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81328.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81328.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81328.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81328.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81329.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109c50]
>[ 81329.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109c50] width 2880 pitch 11520 (/4 2880)
>[ 81329.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81329.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81329.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81329.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81329.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81329.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81329.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81329.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81329.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81329.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81329.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81329.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81329.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109c50]
>[ 81329.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109c50] width 2880 pitch 11520 (/4 2880)
>[ 81330.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81330.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81330.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81330.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81330.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81330.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81330.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81330.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81330.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81330.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81330.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81330.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81330.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81330.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81330.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81330.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81330.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81330.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81330.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81331.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81331.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81331.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81331.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81331.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81331.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81331.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81331.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81331.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81331.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81331.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81331.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81331.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81331.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81331.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81331.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81331.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81331.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81331.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81331.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81331.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81331.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81331.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb0ed8]
>[ 81331.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb0ed8] width 2880 pitch 11520 (/4 2880)
>[ 81331.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81331.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81331.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81331.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81331.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109c50]
>[ 81331.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109c50] width 2880 pitch 11520 (/4 2880)
>[ 81331.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81331.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81332.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81332.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81332.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81332.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81332.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81332.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81332.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81332.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81332.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81332.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81332.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81332.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81332.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81332.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81333.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81333.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81333.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81333.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81333.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81333.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81334.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81334.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81351.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81351.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81357.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81357.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81357.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81357.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81360.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81360.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81360.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81360.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81360.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81360.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81360.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81360.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81360.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81360.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81360.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81360.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81360.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81360.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81360.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81360.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81360.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81360.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81363.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81363.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81363.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81363.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81363.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81363.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81363.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81363.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81363.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81363.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81363.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81363.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81363.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81363.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81367.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81367.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81367.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81367.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81367.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81367.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81367.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81367.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81367.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81367.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81367.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81367.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81367.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81367.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81367.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81367.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81376.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81376.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81376.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81376.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81376.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81376.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81377.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81377.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81377.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81377.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81377.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81377.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81377.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81377.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81377.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81378.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81378.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81378.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81379.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81379.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81380.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81380.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81380.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81380.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81380.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81380.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81380.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81380.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81380.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81380.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81380.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81380.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81381.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81381.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81402.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 81402.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 81403.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 81403.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 81405.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81405.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81432.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 81432.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 81433.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 81433.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 81433.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81433.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81433.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 81433.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 81433.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81433.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81433.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81433.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81433.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81433.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81433.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 81433.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 81433.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81433.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81433.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 81433.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 81433.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81433.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81433.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81433.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81433.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81433.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81433.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81433.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81434.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81434.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81434.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c235c8]
>[ 81434.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c235c8] width 2880 pitch 11520 (/4 2880)
>[ 81434.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81434.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81435.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81435.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81435.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81435.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81435.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81435.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81435.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81435.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81435.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81435.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81435.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81435.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81436.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 81436.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 81444.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81444.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81461.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81461.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81469.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81469.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81478.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81478.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81481.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81481.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81504.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 81504.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 81504.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81504.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81505.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81505.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81505.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81505.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81505.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81505.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81505.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81505.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81505.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81505.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81505.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81505.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81506.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81506.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81506.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81506.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81506.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81506.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81506.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81506.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81506.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81506.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81507.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81507.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81513.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81513.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81514.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81514.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81514.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0128]
>[ 81514.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0128] width 2880 pitch 11520 (/4 2880)
>[ 81514.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81514.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81514.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81514.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81514.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81514.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81514.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81514.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81515.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81515.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81515.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81515.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81515.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81515.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81515.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 81515.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 81515.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81515.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81527.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81527.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81529.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 81529.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 81538.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81538.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81538.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81538.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81538.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81538.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81538.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81538.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81538.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 81538.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 81538.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81538.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81538.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 81538.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 81538.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81538.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81538.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81538.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81538.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81538.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81538.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81538.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81538.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81538.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81542.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81542.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81542.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81542.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81542.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81542.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81542.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81542.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81542.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81542.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81542.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81543.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81543.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81543.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81543.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81543.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81543.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81543.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81543.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ffbd0]
>[ 81543.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ffbd0] width 2880 pitch 11520 (/4 2880)
>[ 81543.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81543.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81543.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81543.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81544.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81544.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81544.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 81544.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 81546.583] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 81546.583] (II) RADEON(0): Using hsync ranges from config file
>[ 81546.583] (II) RADEON(0): Using vrefresh ranges from config file
>[ 81546.583] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 81546.583] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 81546.583] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 81546.583] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 81546.584] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 81571.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81571.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81572.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20610]
>[ 81572.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20610] width 2880 pitch 11520 (/4 2880)
>[ 81572.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81572.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81572.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81572.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81572.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81572.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81572.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81572.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81572.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81572.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81572.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81572.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81572.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81572.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81572.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81572.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81573.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81573.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81573.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81573.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81573.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81573.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81573.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81573.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81573.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a873a0]
>[ 81573.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a873a0] width 2880 pitch 11520 (/4 2880)
>[ 81573.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81573.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81573.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81573.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81573.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81573.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81573.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81573.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81573.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81612.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81612.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81613.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81613.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81613.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81613.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81613.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81613.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81613.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81613.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81613.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81613.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81613.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81613.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81613.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81613.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81613.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81613.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81613.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81613.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81613.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81613.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81613.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81613.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81616.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81616.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81616.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81616.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81619.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81619.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81620.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81620.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81620.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81620.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81621.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81621.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81621.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81621.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81621.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81621.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81621.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81621.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81621.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81621.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81621.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81621.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81621.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81621.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81621.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81621.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81621.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81621.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81621.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81621.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81621.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81621.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81621.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81621.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81626.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81626.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81638.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81638.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81639.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81639.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81647.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81647.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81653.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81653.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81653.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81653.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81653.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81653.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81654.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81654.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81654.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81654.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81654.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81654.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81654.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81654.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81654.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81654.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81655.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81655.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81656.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81656.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81657.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81657.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81657.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81657.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81657.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81658.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81658.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81658.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81658.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81658.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81658.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81658.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81659.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81659.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81679.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81679.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81679.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81679.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81683.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81683.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81685.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81685.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81692.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81692.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81695.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81695.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81713.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81713.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81714.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81714.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81749.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81749.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81751.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81751.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81760.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81760.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81764.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81764.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81823.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81823.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81823.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81823.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81824.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81824.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81824.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81824.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81824.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81824.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81824.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81824.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81825.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81825.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81825.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81825.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81825.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81825.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81825.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81825.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81825.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81825.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81826.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81826.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81826.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81826.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81845.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81845.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81845.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 81845.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 81845.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81845.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81845.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81846.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81846.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2305c0]
>[ 81846.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2305c0] width 2880 pitch 11520 (/4 2880)
>[ 81846.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81846.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81846.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81846.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81846.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81846.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81846.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81846.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81846.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81846.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81856.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81856.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81859.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81859.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81859.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81859.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81859.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81859.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81859.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81859.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81859.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81859.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81859.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81860.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81860.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81860.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81860.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81860.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81860.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de21f0]
>[ 81860.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de21f0] width 2880 pitch 11520 (/4 2880)
>[ 81860.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81860.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81860.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81860.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81860.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81860.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81860.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81860.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81860.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81860.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81860.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 81860.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 81860.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 81860.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 81868.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81868.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81868.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81868.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81868.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 81868.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 81868.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 81868.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 81906.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81906.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81906.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81906.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81907.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81907.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81907.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81907.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81907.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81907.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81907.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81907.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81907.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81908.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81908.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81908.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81908.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81908.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81908.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81908.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81909.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81909.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81910.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81910.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81910.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81910.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81910.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81910.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81911.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81911.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81911.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81911.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81912.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81912.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81912.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81912.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81913.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81913.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81914.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81914.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81914.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 81914.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 81915.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81915.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81915.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81915.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81915.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81915.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81915.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa042520]
>[ 81915.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa042520] width 2880 pitch 11520 (/4 2880)
>[ 81962.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 81962.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 81962.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81962.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81962.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81962.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81962.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 81963.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 81963.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81963.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81963.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81963.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81963.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81963.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81963.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81963.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81964.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 81964.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 81964.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81964.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81964.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81964.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81964.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81964.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81964.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 81964.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 81964.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 81964.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 81966.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81966.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81966.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 81966.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 81966.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81966.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81966.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81966.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81966.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 81966.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 81966.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81967.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81967.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 81967.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 81967.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x966fc40]
>[ 81967.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x966fc40] width 2880 pitch 11520 (/4 2880)
>[ 81967.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81967.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81967.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 81967.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 81967.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81967.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81967.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 81967.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 81967.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81967.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81967.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 81967.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 81967.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 81967.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 81971.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 81971.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 81971.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81971.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81971.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 81971.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 81971.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81971.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81971.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 81971.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 81972.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81972.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81972.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 81972.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 81972.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81972.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81972.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 81972.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 81972.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 81972.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 81972.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 81972.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 81972.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 81972.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 81972.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de21f0]
>[ 81972.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de21f0] width 2880 pitch 11520 (/4 2880)
>[ 81974.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81974.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81998.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3cd00]
>[ 81998.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3cd00] width 2880 pitch 11520 (/4 2880)
>[ 81998.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de21f0]
>[ 81998.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de21f0] width 2880 pitch 11520 (/4 2880)
>[ 81999.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 81999.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 81999.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82000.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82000.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82000.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82000.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82000.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82000.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82000.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82000.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82000.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82000.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82001.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82001.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82001.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82001.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82001.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82001.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 82001.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 82001.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82001.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82001.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b618]
>[ 82001.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b618] width 2880 pitch 11520 (/4 2880)
>[ 82037.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82037.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82037.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82037.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82037.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82037.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82037.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82037.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82038.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82038.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82038.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82038.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82039.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82039.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82040.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82040.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82040.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82040.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82040.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82040.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82040.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82040.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82040.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82040.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82040.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82040.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82041.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82041.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82041.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82041.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82061.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82061.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82063.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82063.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82115.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82115.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82116.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82116.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82116.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82116.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82116.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82116.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82116.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82116.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82116.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82116.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82116.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82116.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82116.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82116.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82116.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82116.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82116.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82116.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82116.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82116.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82116.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82116.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82120.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82120.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82120.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82120.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82120.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82120.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82120.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82120.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82120.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82120.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82120.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82120.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82120.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82120.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82120.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82120.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82120.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82120.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82120.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82120.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82120.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82120.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82120.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82120.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82259.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82259.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82259.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82259.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82259.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82259.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82259.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82259.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82259.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 82259.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 82259.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82259.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82259.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82259.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82259.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82259.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82259.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82259.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82259.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82259.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82263.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82263.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82263.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82263.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82263.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82263.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82263.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82263.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82263.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82263.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82263.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82263.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82263.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82263.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82263.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82263.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82263.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82263.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82263.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82263.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82263.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82263.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82263.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82263.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82295.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82295.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82295.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82295.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82295.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82295.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82295.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82295.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82295.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82295.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82295.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82295.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82295.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82295.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82295.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82295.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82295.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82295.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82295.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82295.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82295.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82295.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82295.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82295.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82295.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82295.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82295.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82295.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82295.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82295.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82295.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82295.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82295.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82295.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82295.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82295.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82295.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82295.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82296.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82296.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82296.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82296.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82296.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82296.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82296.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82296.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82296.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82296.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82296.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82296.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82296.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82296.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82297.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82297.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82297.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82297.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82298.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82298.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82298.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82298.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82298.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82298.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82298.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82298.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82298.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82298.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82298.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82298.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82298.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82298.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82298.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82298.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82298.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82298.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82298.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82298.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82298.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82298.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82298.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82298.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82298.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82298.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82298.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82298.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82299.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82299.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82300.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82300.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82305.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82305.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82308.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82308.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82323.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82323.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82324.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82324.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82332.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82332.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82332.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82332.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82332.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82332.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82332.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82332.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82333.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82333.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82333.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82333.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82333.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82333.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82333.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82333.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82333.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82333.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82333.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82333.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82333.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82333.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82333.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82333.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82334.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82334.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82334.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82334.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82334.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82334.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82334.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82334.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82334.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82334.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82335.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82335.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82335.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82335.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82335.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82335.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82335.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82335.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82335.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82335.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82335.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82335.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82335.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82335.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82335.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82335.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82335.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82335.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82336.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82336.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82341.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82341.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82359.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82359.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82363.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82363.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82363.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82363.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82363.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82363.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82363.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82363.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82364.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82364.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82364.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82364.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82364.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82364.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82364.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82364.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82364.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82364.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82364.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82364.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82364.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82364.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82365.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82365.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82365.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82365.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82365.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82365.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82365.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82365.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82375.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82375.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82375.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82375.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82375.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82375.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82375.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82375.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82376.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82376.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82376.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82376.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82376.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82376.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82376.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82376.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82377.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82377.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82377.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82377.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82377.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82377.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82377.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82377.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82377.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82377.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82377.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82377.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82378.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82378.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82378.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82378.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82378.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82378.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82390.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82390.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82392.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82392.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82392.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82392.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82393.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82393.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82393.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82393.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82393.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82393.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82393.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82393.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82393.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82394.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82394.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82394.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82394.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82394.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82394.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82394.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82394.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82394.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82394.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82394.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82394.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82394.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82394.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82394.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82394.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82394.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82406.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82406.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82407.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82407.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82407.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82407.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82407.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82407.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82408.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82408.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82408.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82408.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82408.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82408.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82408.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82408.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82408.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82408.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82408.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82408.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82408.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82409.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82411.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82411.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82411.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82411.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82411.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82411.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82411.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82412.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82412.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82412.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82412.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82412.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82412.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 82412.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 82412.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82412.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82412.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82412.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82412.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82412.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82417.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82417.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82433.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82433.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82434.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82434.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82450.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82450.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82451.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82451.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82462.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82462.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82463.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82463.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82481.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82481.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82481.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82481.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82482.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82482.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82482.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82482.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82498.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82498.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82498.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82498.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82498.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82498.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82498.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9741ea8]
>[ 82498.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9741ea8] width 2880 pitch 11520 (/4 2880)
>[ 82498.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82498.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82498.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82498.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82498.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82498.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82498.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82498.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82499.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82499.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82499.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82499.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82503.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82503.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82503.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82503.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82503.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82503.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82503.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82503.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82503.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 82503.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 82503.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82503.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82503.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82503.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82503.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82503.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82503.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82503.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82503.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82503.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82503.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82503.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82503.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82503.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82507.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82507.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82507.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82507.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82507.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82507.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82507.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82507.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82507.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82507.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82507.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82507.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82507.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82507.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82507.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82507.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82507.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82507.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82507.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82507.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82507.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82507.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82507.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82507.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82507.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82507.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82507.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82507.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82508.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 82508.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 82510.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82510.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82517.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82517.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82519.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82519.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82519.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82519.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82541.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82541.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82541.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82541.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82542.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82542.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82542.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82542.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82542.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82542.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82543.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82543.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82543.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82543.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82543.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82543.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82543.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82543.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82543.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82543.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82543.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580018]
>[ 82543.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580018] width 2880 pitch 11520 (/4 2880)
>[ 82544.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82544.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82548.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82548.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82549.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82549.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82554.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82554.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82554.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82554.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82569.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 82569.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 82571.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82571.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82571.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82571.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82644.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82644.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82651.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82651.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82653.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82653.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82658.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82658.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82664.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82664.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82665.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82665.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82665.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82665.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82665.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82665.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82665.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82665.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82665.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82665.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82665.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82665.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82665.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82665.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82665.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82665.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82665.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82665.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82665.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82665.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82665.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82665.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82665.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82665.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82669.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82669.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82669.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82669.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82669.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82669.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82669.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82669.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82669.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82669.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82669.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82669.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82669.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82669.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82670.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82670.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82670.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da0a0]
>[ 82670.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da0a0] width 2880 pitch 11520 (/4 2880)
>[ 82670.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82670.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82670.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82670.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82670.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82670.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82670.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82670.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82670.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82670.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82670.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82670.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82670.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82670.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82670.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82671.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82671.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82671.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82671.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82671.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82671.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82671.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82671.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82672.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82672.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82672.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82672.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82672.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82672.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82672.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82672.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82672.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82672.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82672.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82672.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82672.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82672.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82672.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82672.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82672.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82672.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82672.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82672.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82672.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82672.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82672.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82672.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82676.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82676.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82678.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82678.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82678.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82678.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82678.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82678.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82678.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa085740]
>[ 82678.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa085740] width 2880 pitch 11520 (/4 2880)
>[ 82678.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82678.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82678.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82678.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82678.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82678.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82678.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82678.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82678.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82678.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82678.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82678.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82682.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82682.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82682.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82682.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82682.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82682.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82682.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82682.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82682.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82682.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82682.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82682.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82682.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82682.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82682.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82682.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82682.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82682.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82682.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82682.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82682.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82682.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82682.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82682.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82682.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82682.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82690.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82690.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82690.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82690.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82692.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82692.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82697.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82697.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82700.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82701.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82701.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82701.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82702.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82702.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82702.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82702.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82702.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82702.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82702.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82702.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82702.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82702.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82703.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82703.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82703.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82703.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82703.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 82703.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 82703.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82703.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82703.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82703.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82703.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82703.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82704.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82704.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82704.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82704.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82704.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82705.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82706.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 82706.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 82706.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82706.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82707.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82707.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82707.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82707.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82707.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82707.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82707.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82707.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82717.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82717.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82717.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82717.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82717.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82717.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82717.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82717.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82717.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82717.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82717.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82718.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82718.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82718.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82718.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82718.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82718.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 82718.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 82718.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82718.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82718.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82718.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82718.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82718.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82718.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82718.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82720.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82720.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82721.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82721.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82721.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041668]
>[ 82721.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041668] width 2880 pitch 11520 (/4 2880)
>[ 82721.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82721.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82721.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82721.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82725.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa508]
>[ 82725.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa508] width 2880 pitch 11520 (/4 2880)
>[ 82768.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82768.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82768.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82768.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82768.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82768.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82768.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82768.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82768.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82768.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82768.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82768.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82768.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82768.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82768.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82769.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82769.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82769.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82769.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82769.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82769.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82769.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82769.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82769.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82769.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82769.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82769.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82769.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82769.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82769.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82769.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 82769.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 82784.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82784.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82784.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82784.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82784.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82784.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82785.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82785.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82785.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82785.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82785.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 82785.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 82785.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82785.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82785.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82785.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82796.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82796.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82798.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82798.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82798.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82798.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82825.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82825.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82826.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82826.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82826.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82826.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82826.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82826.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82826.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82826.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82826.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82826.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82826.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82826.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82826.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82826.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82826.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82826.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82826.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82826.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82826.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82826.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82826.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82826.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82830.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82830.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82830.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82830.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82830.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 82830.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 82830.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82830.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82830.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82830.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82830.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82830.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82830.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82830.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82830.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82830.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82830.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82830.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82830.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82830.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82830.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 82830.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 82830.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82830.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82858.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82858.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82858.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82858.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82858.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82859.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82859.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117b80]
>[ 82859.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117b80] width 2880 pitch 11520 (/4 2880)
>[ 82859.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82859.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82859.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82859.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82859.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 82859.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 82859.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82859.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82859.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82859.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82859.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 82859.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 82859.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 82859.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 82863.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 82863.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 82863.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82863.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82863.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 82863.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 82863.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 82863.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 82863.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82863.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82863.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82863.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82863.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 82863.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 82863.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82863.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 82863.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 82863.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 82863.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 82863.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 82863.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 82863.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 83015.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83015.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83015.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83015.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83015.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 83015.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 83015.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83015.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83015.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 83015.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 83015.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83015.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83015.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83015.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83015.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83015.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83015.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83015.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83015.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83016.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83016.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83016.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83016.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83016.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83016.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83016.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83016.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83016.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83016.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83016.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83016.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83016.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83016.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83016.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83016.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83016.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83016.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83016.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83016.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83016.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83016.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83017.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83017.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83017.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83017.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83018.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 83018.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 83018.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83019.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83019.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83019.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83019.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83019.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83019.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83019.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a218c0]
>[ 83019.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a218c0] width 2880 pitch 11520 (/4 2880)
>[ 83019.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83019.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83020.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 83020.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 83024.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83024.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83024.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83024.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83025.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83025.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83025.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83025.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83026.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83026.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83026.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83026.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83029.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2295a0]
>[ 83030.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2295a0] width 2880 pitch 11520 (/4 2880)
>[ 83030.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83030.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83043.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041668]
>[ 83043.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041668] width 2880 pitch 11520 (/4 2880)
>[ 83045.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83045.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83055.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83055.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83057.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83057.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83073.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041668]
>[ 83073.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041668] width 2880 pitch 11520 (/4 2880)
>[ 83076.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83076.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83076.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 83076.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 83082.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83082.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83082.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83083.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83083.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83083.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83083.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83083.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83083.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83083.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83084.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83084.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83084.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83084.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83084.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83084.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83084.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83084.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83084.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83084.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83084.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83084.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83084.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd70]
>[ 83084.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd70] width 2880 pitch 11520 (/4 2880)
>[ 83085.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83085.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83085.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83085.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83086.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83086.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83086.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 83086.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 83086.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83086.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83086.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dccd70]
>[ 83086.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dccd70] width 2880 pitch 11520 (/4 2880)
>[ 83086.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041668]
>[ 83086.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041668] width 2880 pitch 11520 (/4 2880)
>[ 83100.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83100.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83101.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83101.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83101.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 83101.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 83102.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 83102.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 83102.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83102.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83103.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83103.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83103.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83103.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83103.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83103.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83103.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83103.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83103.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 83103.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 83103.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83103.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83104.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 83104.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 83104.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83104.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83104.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ad30]
>[ 83104.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ad30] width 2880 pitch 11520 (/4 2880)
>[ 83104.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83104.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83104.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83104.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83104.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83104.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83104.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83104.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83104.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83104.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83105.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83105.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83105.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83105.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83105.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83105.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83105.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83105.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83106.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83106.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83106.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83106.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83106.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83106.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83106.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83106.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83107.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83107.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83107.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83107.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83107.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83107.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83107.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83107.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83108.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83108.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83108.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83108.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83108.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83108.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83108.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83108.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83110.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83110.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83152.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83152.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83154.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83154.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83154.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07b500]
>[ 83154.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07b500] width 2880 pitch 11520 (/4 2880)
>[ 83217.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83217.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83217.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83217.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83217.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83217.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83217.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83217.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83217.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83217.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83217.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83217.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83217.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83217.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83217.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83217.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83217.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83217.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83217.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83217.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83217.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83217.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83218.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83218.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83218.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83218.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83218.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83218.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83218.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83218.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83218.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83218.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83218.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83218.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83218.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83218.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83218.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d2d88]
>[ 83218.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d2d88] width 2880 pitch 11520 (/4 2880)
>[ 83221.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac8cd8]
>[ 83221.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac8cd8] width 2880 pitch 11520 (/4 2880)
>[ 83233.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83233.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83237.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83237.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83238.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83238.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83238.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d292f8]
>[ 83238.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d292f8] width 2880 pitch 11520 (/4 2880)
>[ 83238.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83238.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83238.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83238.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d292f8]
>[ 83238.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d292f8] width 2880 pitch 11520 (/4 2880)
>[ 83238.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83238.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83238.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83238.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83238.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83238.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83238.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d292f8]
>[ 83238.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d292f8] width 2880 pitch 11520 (/4 2880)
>[ 83238.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83238.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83238.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b1680]
>[ 83238.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b1680] width 2880 pitch 11520 (/4 2880)
>[ 83238.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273d18]
>[ 83238.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273d18] width 2880 pitch 11520 (/4 2880)
>[ 83241.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83241.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83241.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83241.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83241.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83241.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83241.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83241.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83241.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743470]
>[ 83241.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743470] width 2880 pitch 11520 (/4 2880)
>[ 83241.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2708c8]
>[ 83241.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2708c8] width 2880 pitch 11520 (/4 2880)
>[ 83241.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83241.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83241.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83241.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83241.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743470]
>[ 83241.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743470] width 2880 pitch 11520 (/4 2880)
>[ 83241.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02f2c8]
>[ 83241.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02f2c8] width 2880 pitch 11520 (/4 2880)
>[ 83241.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9743470]
>[ 83242.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9743470] width 2880 pitch 11520 (/4 2880)
>[ 83242.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612a48]
>[ 83242.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612a48] width 2880 pitch 11520 (/4 2880)
>[ 83242.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a520]
>[ 83242.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a520] width 2880 pitch 11520 (/4 2880)
>[ 83242.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f9a68]
>[ 83242.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f9a68] width 2880 pitch 11520 (/4 2880)
>[ 83260.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05d450]
>[ 83260.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05d450] width 2880 pitch 11520 (/4 2880)
>[ 83260.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83260.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83260.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05d450]
>[ 83260.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05d450] width 2880 pitch 11520 (/4 2880)
>[ 83260.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0424f0]
>[ 83260.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0424f0] width 2880 pitch 11520 (/4 2880)
>[ 83260.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83260.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83260.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83261.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83264.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83265.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83265.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83265.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83265.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83265.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83265.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83265.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83265.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83265.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83265.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83265.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83265.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160140]
>[ 83265.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160140] width 2880 pitch 11520 (/4 2880)
>[ 83265.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a1e8]
>[ 83265.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a1e8] width 2880 pitch 11520 (/4 2880)
>[ 83265.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2b00]
>[ 83265.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2b00] width 2880 pitch 11520 (/4 2880)
>[ 83265.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83265.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83265.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83265.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83265.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160140]
>[ 83265.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160140] width 2880 pitch 11520 (/4 2880)
>[ 83266.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a1e8]
>[ 83266.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a1e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83266.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83266.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83266.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160140]
>[ 83266.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160140] width 2880 pitch 11520 (/4 2880)
>[ 83266.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a1e8]
>[ 83266.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a1e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83266.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a1e8]
>[ 83266.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a1e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83266.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83266.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83266.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83266.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83266.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2165d8]
>[ 83266.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2165d8] width 2880 pitch 11520 (/4 2880)
>[ 83266.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a29e8]
>[ 83266.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a29e8] width 2880 pitch 11520 (/4 2880)
>[ 83305.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83305.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83306.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83306.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83306.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83306.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83306.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83306.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83306.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83306.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83306.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83306.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83306.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fda78]
>[ 83306.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fda78] width 2880 pitch 11520 (/4 2880)
>[ 83306.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a738]
>[ 83306.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a738] width 2880 pitch 11520 (/4 2880)
>[ 83306.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c900]
>[ 83306.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c900] width 2880 pitch 11520 (/4 2880)
>[ 83306.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b588]
>[ 83306.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b588] width 2880 pitch 11520 (/4 2880)
>[ 83306.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e79150]
>[ 83306.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e79150] width 2880 pitch 11520 (/4 2880)
>[ 83306.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fda78]
>[ 83306.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fda78] width 2880 pitch 11520 (/4 2880)
>[ 83306.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a738]
>[ 83306.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a738] width 2880 pitch 11520 (/4 2880)
>[ 83308.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83308.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83308.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83308.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83309.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83309.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83309.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83309.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83309.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83309.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83309.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83309.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83309.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27da98]
>[ 83309.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27da98] width 2880 pitch 11520 (/4 2880)
>[ 83309.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83309.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83310.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83310.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83310.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83310.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83311.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83311.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83311.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83311.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83311.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83311.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83311.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83311.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83311.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e2e8]
>[ 83311.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e2e8] width 2880 pitch 11520 (/4 2880)
>[ 83311.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6608]
>[ 83311.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6608] width 2880 pitch 11520 (/4 2880)
>[ 83311.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e2e8]
>[ 83311.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e2e8] width 2880 pitch 11520 (/4 2880)
>[ 83311.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce6608]
>[ 83311.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce6608] width 2880 pitch 11520 (/4 2880)
>[ 83311.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e2e8]
>[ 83311.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e2e8] width 2880 pitch 11520 (/4 2880)
>[ 83311.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83311.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83311.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83312.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83312.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83312.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83314.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83315.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83323.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83323.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83327.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a738]
>[ 83327.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a738] width 2880 pitch 11520 (/4 2880)
>[ 83333.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83333.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83339.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e79150]
>[ 83339.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e79150] width 2880 pitch 11520 (/4 2880)
>[ 83339.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83339.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83339.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83339.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83339.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83339.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83339.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83339.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83339.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83339.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83339.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83339.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83339.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83339.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83339.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27da98]
>[ 83339.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27da98] width 2880 pitch 11520 (/4 2880)
>[ 83339.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83339.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83339.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83339.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83339.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83339.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83351.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83351.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83351.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83351.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83352.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83352.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83352.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27da98]
>[ 83352.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27da98] width 2880 pitch 11520 (/4 2880)
>[ 83352.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83352.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83352.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83352.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83353.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83353.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83353.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83353.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83353.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83353.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83353.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83353.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83353.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83353.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83354.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83354.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83354.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83354.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83354.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83354.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83354.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83354.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83355.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27da98]
>[ 83355.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27da98] width 2880 pitch 11520 (/4 2880)
>[ 83355.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83355.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83355.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83355.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83355.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83355.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83361.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27da98]
>[ 83361.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27da98] width 2880 pitch 11520 (/4 2880)
>[ 83361.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83361.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83361.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83361.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83362.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83362.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83362.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83362.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83362.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83362.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83362.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83362.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83363.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83363.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83363.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83363.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83366.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83366.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83369.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83369.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83377.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83377.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83412.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975b618]
>[ 83412.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975b618] width 2880 pitch 11520 (/4 2880)
>[ 83412.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83412.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83430.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83430.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83430.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83430.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83430.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83430.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83430.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83430.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83430.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83430.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83430.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83430.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83430.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83431.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83431.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83431.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83431.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83431.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83431.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20d388]
>[ 83431.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20d388] width 2880 pitch 11520 (/4 2880)
>[ 83431.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83431.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83431.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83431.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83431.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a348]
>[ 83431.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a348] width 2880 pitch 11520 (/4 2880)
>[ 83431.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83431.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83432.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83432.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83432.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83432.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83435.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83435.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83435.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83435.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83435.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83435.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83436.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83436.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83436.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83436.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83436.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83436.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83436.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83436.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83436.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83436.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83436.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83436.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83436.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83436.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83436.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83436.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83436.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83436.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83436.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83436.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83436.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83436.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83436.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83436.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83438.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83438.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83440.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83440.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83440.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83440.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83440.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83440.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83453.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83453.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83454.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d2ed0]
>[ 83454.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d2ed0] width 2880 pitch 11520 (/4 2880)
>[ 83454.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83454.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83454.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83454.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83457.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83457.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83465.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83465.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83467.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83467.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83475.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d2ed0]
>[ 83475.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d2ed0] width 2880 pitch 11520 (/4 2880)
>[ 83476.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d2ed0]
>[ 83476.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d2ed0] width 2880 pitch 11520 (/4 2880)
>[ 83478.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83478.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83484.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367768]
>[ 83484.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367768] width 2880 pitch 11520 (/4 2880)
>[ 83484.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83484.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83492.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83492.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83493.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83493.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83493.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83493.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83493.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83493.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83493.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83493.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83493.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83493.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83493.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83493.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83493.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83493.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83493.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83493.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83493.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367768]
>[ 83493.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367768] width 2880 pitch 11520 (/4 2880)
>[ 83493.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83493.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83493.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83493.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83493.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83493.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83494.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83494.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83494.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83495.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83495.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367768]
>[ 83495.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367768] width 2880 pitch 11520 (/4 2880)
>[ 83495.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83495.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83495.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83495.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83495.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83495.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83495.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83495.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83495.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367768]
>[ 83495.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367768] width 2880 pitch 11520 (/4 2880)
>[ 83495.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c7980]
>[ 83496.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c7980] width 2880 pitch 11520 (/4 2880)
>[ 83499.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83499.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83500.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83500.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83501.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83501.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83501.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83501.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83502.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83502.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83502.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83503.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83503.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83503.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83503.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83503.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83507.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03c490]
>[ 83507.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03c490] width 2880 pitch 11520 (/4 2880)
>[ 83523.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83523.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83523.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83523.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83523.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83523.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83548.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19b40]
>[ 83548.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19b40] width 2880 pitch 11520 (/4 2880)
>[ 83548.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83548.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83563.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21b830]
>[ 83563.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21b830] width 2880 pitch 11520 (/4 2880)
>[ 83565.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd9138]
>[ 83565.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd9138] width 2880 pitch 11520 (/4 2880)
>[ 83567.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83567.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83567.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83567.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83578.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83578.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83578.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83578.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83578.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83578.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83578.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83578.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83578.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83578.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83578.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83578.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83578.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83578.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83578.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83578.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83578.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83578.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83578.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83578.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83578.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83578.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83578.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83578.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83582.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83582.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83582.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83582.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83582.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83582.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83582.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83582.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83582.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83582.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83582.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa140ec0]
>[ 83582.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa140ec0] width 2880 pitch 11520 (/4 2880)
>[ 83582.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83582.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83582.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[ 83582.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[ 83582.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83582.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83582.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83582.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83582.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7e68]
>[ 83583.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7e68] width 2880 pitch 11520 (/4 2880)
>[ 83583.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36a370]
>[ 83583.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36a370] width 2880 pitch 11520 (/4 2880)
>[ 83584.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83584.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83584.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83584.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83584.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2380d0]
>[ 83584.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2380d0] width 2880 pitch 11520 (/4 2880)
>[ 83584.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83584.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83584.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83584.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83584.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83584.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83584.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83584.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83584.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83584.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83584.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83584.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83584.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83584.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83584.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83584.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83584.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a86728]
>[ 83584.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a86728] width 2880 pitch 11520 (/4 2880)
>[ 83584.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fd1c0]
>[ 83584.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fd1c0] width 2880 pitch 11520 (/4 2880)
>[ 83591.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83591.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83591.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83591.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83607.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83607.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83607.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6050]
>[ 83607.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6050] width 2880 pitch 11520 (/4 2880)
>[ 83615.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83615.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83616.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83616.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83616.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83616.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83616.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83616.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83616.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acde40]
>[ 83616.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acde40] width 2880 pitch 11520 (/4 2880)
>[ 83616.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83616.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83616.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e4e8]
>[ 83616.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e4e8] width 2880 pitch 11520 (/4 2880)
>[ 83616.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d00]
>[ 83616.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d00] width 2880 pitch 11520 (/4 2880)
>[ 83616.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acde40]
>[ 83616.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acde40] width 2880 pitch 11520 (/4 2880)
>[ 83616.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 83616.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 83616.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83616.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83616.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e4e8]
>[ 83616.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e4e8] width 2880 pitch 11520 (/4 2880)
>[ 83616.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b0d00]
>[ 83616.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b0d00] width 2880 pitch 11520 (/4 2880)
>[ 83616.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acde40]
>[ 83616.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acde40] width 2880 pitch 11520 (/4 2880)
>[ 83617.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83617.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83617.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83617.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83617.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83617.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83617.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83617.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83619.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc88e8]
>[ 83619.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc88e8] width 2880 pitch 11520 (/4 2880)
>[ 83620.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83620.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83620.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 83620.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 83620.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83620.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83620.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83620.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83620.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83620.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83620.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83620.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83620.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 83620.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 83620.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83620.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83620.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 83620.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 83620.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83620.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83620.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 83620.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 83620.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83620.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83620.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a050c0]
>[ 83620.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a050c0] width 2880 pitch 11520 (/4 2880)
>[ 83629.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 83629.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 83629.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 83629.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 83640.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83640.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83640.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83640.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83640.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83640.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83640.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83640.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83640.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83640.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83640.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83640.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83640.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83640.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83640.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83640.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83640.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd28]
>[ 83640.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd28] width 2880 pitch 11520 (/4 2880)
>[ 83644.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83644.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83644.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83644.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83644.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83644.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83644.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83644.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83644.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83644.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83644.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83644.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83644.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83644.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83644.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9d800]
>[ 83644.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9d800] width 2880 pitch 11520 (/4 2880)
>[ 83644.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca18d0]
>[ 83644.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca18d0] width 2880 pitch 11520 (/4 2880)
>[ 83644.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83644.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83644.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ff28]
>[ 83644.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ff28] width 2880 pitch 11520 (/4 2880)
>[ 83644.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83644.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83644.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83644.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83645.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83645.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83645.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83645.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83645.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83645.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83645.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83645.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83645.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83645.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83645.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83645.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83645.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca18d0]
>[ 83645.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca18d0] width 2880 pitch 11520 (/4 2880)
>[ 83645.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83645.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83645.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca18d0]
>[ 83645.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca18d0] width 2880 pitch 11520 (/4 2880)
>[ 83645.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83645.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83645.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca18d0]
>[ 83645.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca18d0] width 2880 pitch 11520 (/4 2880)
>[ 83645.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83645.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83645.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca18d0]
>[ 83645.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca18d0] width 2880 pitch 11520 (/4 2880)
>[ 83655.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83655.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83655.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963ff28]
>[ 83655.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963ff28] width 2880 pitch 11520 (/4 2880)
>[ 83655.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9765878]
>[ 83655.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9765878] width 2880 pitch 11520 (/4 2880)
>[ 83655.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83655.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83655.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83655.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83655.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83655.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83655.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83655.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83655.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83655.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83655.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83655.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83655.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83655.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83656.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83656.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83659.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e920]
>[ 83659.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e920] width 2880 pitch 11520 (/4 2880)
>[ 83659.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83659.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83659.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97a40]
>[ 83659.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97a40] width 2880 pitch 11520 (/4 2880)
>[ 83659.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2d50]
>[ 83659.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2d50] width 2880 pitch 11520 (/4 2880)
>[ 83659.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 83659.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 83659.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83659.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83659.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 83659.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 83659.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83659.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83659.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 83659.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 83659.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83659.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83659.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b4d8]
>[ 83659.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b4d8] width 2880 pitch 11520 (/4 2880)
>[ 83659.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942ee40]
>[ 83659.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942ee40] width 2880 pitch 11520 (/4 2880)
>[ 83689.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83689.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83689.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83689.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83689.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83689.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83689.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2d50]
>[ 83689.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2d50] width 2880 pitch 11520 (/4 2880)
>[ 83689.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9fe0]
>[ 83689.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9fe0] width 2880 pitch 11520 (/4 2880)
>[ 83689.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 83689.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 83689.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97a40]
>[ 83689.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97a40] width 2880 pitch 11520 (/4 2880)
>[ 83689.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2d50]
>[ 83689.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2d50] width 2880 pitch 11520 (/4 2880)
>[ 83689.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9fe0]
>[ 83689.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9fe0] width 2880 pitch 11520 (/4 2880)
>[ 83690.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 83690.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 83690.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9fe0]
>[ 83690.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9fe0] width 2880 pitch 11520 (/4 2880)
>[ 83690.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 83690.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 83690.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93c9fe0]
>[ 83690.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93c9fe0] width 2880 pitch 11520 (/4 2880)
>[ 83690.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af35f8]
>[ 83690.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af35f8] width 2880 pitch 11520 (/4 2880)
>[ 83690.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83690.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83690.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83690.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83690.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83690.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83690.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83690.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83690.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83690.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83690.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d863f0]
>[ 83690.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d863f0] width 2880 pitch 11520 (/4 2880)
>[ 83690.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3b40]
>[ 83690.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3b40] width 2880 pitch 11520 (/4 2880)
>[ 83690.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83690.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83690.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83690.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83690.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83690.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83690.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83690.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83691.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83691.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83691.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d1e8]
>[ 83691.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d1e8] width 2880 pitch 11520 (/4 2880)
>[ 83691.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceca48]
>[ 83691.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceca48] width 2880 pitch 11520 (/4 2880)
>[ 83691.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3b40]
>[ 83691.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3b40] width 2880 pitch 11520 (/4 2880)
>[ 83692.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceca48]
>[ 83692.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceca48] width 2880 pitch 11520 (/4 2880)
>[ 83692.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f3b40]
>[ 83692.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f3b40] width 2880 pitch 11520 (/4 2880)
>[ 83692.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ceca48]
>[ 83692.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ceca48] width 2880 pitch 11520 (/4 2880)
>[ 83693.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83693.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83693.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83693.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83694.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83694.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83695.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83695.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83695.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83695.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83695.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83695.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83695.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d9c50]
>[ 83695.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d9c50] width 2880 pitch 11520 (/4 2880)
>[ 83695.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d9c50]
>[ 83695.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d9c50] width 2880 pitch 11520 (/4 2880)
>[ 83696.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050d40]
>[ 83696.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050d40] width 2880 pitch 11520 (/4 2880)
>[ 83696.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83696.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83696.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83696.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83696.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83696.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83696.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a67d0]
>[ 83696.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a67d0] width 2880 pitch 11520 (/4 2880)
>[ 83697.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83697.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83699.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3838]
>[ 83699.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3838] width 2880 pitch 11520 (/4 2880)
>[ 83699.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83699.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83699.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83699.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83699.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83699.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83699.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83699.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83699.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3838]
>[ 83699.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3838] width 2880 pitch 11520 (/4 2880)
>[ 83699.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83699.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83699.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3838]
>[ 83699.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3838] width 2880 pitch 11520 (/4 2880)
>[ 83699.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83699.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83699.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83699.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83700.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83700.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83700.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83700.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83700.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdf28]
>[ 83700.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdf28] width 2880 pitch 11520 (/4 2880)
>[ 83700.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4e2e8]
>[ 83700.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4e2e8] width 2880 pitch 11520 (/4 2880)
>[ 83700.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6c08]
>[ 83700.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6c08] width 2880 pitch 11520 (/4 2880)
>[ 83700.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83700.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83704.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83704.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83704.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae060]
>[ 83704.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae060] width 2880 pitch 11520 (/4 2880)
>[ 83704.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdf28]
>[ 83704.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdf28] width 2880 pitch 11520 (/4 2880)
>[ 83704.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973af00]
>[ 83704.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973af00] width 2880 pitch 11520 (/4 2880)
>[ 83704.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9f910]
>[ 83704.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9f910] width 2880 pitch 11520 (/4 2880)
>[ 83704.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d408]
>[ 83704.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d408] width 2880 pitch 11520 (/4 2880)
>[ 83704.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aae060]
>[ 83704.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aae060] width 2880 pitch 11520 (/4 2880)
>[ 83704.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d1e8]
>[ 83704.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d1e8] width 2880 pitch 11520 (/4 2880)
>[ 83704.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83704.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83704.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83704.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83704.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83704.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83704.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eccf0]
>[ 83704.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eccf0] width 2880 pitch 11520 (/4 2880)
>[ 83704.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9f910]
>[ 83704.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9f910] width 2880 pitch 11520 (/4 2880)
>[ 83704.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83704.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83705.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83705.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83705.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d1e8]
>[ 83705.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d1e8] width 2880 pitch 11520 (/4 2880)
>[ 83705.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9d800]
>[ 83705.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9d800] width 2880 pitch 11520 (/4 2880)
>[ 83705.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 83705.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 83705.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eccf0]
>[ 83705.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eccf0] width 2880 pitch 11520 (/4 2880)
>[ 83705.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9f910]
>[ 83705.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9f910] width 2880 pitch 11520 (/4 2880)
>[ 83705.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eccf0]
>[ 83705.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eccf0] width 2880 pitch 11520 (/4 2880)
>[ 83705.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9f910]
>[ 83705.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9f910] width 2880 pitch 11520 (/4 2880)
>[ 83705.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eccf0]
>[ 83705.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eccf0] width 2880 pitch 11520 (/4 2880)
>[ 83705.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9f910]
>[ 83705.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9f910] width 2880 pitch 11520 (/4 2880)
>[ 83705.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0eccf0]
>[ 83705.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0eccf0] width 2880 pitch 11520 (/4 2880)
>[ 83711.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83711.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83711.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83711.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83714.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83714.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83714.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0bbe70]
>[ 83714.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0bbe70] width 2880 pitch 11520 (/4 2880)
>[ 83729.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83729.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83729.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970330]
>[ 83729.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970330] width 2880 pitch 11520 (/4 2880)
>[ 83729.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041930]
>[ 83729.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041930] width 2880 pitch 11520 (/4 2880)
>[ 83730.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0bbe70]
>[ 83730.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0bbe70] width 2880 pitch 11520 (/4 2880)
>[ 83730.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29dba8]
>[ 83730.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29dba8] width 2880 pitch 11520 (/4 2880)
>[ 83730.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974ce90]
>[ 83730.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974ce90] width 2880 pitch 11520 (/4 2880)
>[ 83730.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108128]
>[ 83730.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108128] width 2880 pitch 11520 (/4 2880)
>[ 83730.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d1e8]
>[ 83731.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d1e8] width 2880 pitch 11520 (/4 2880)
>[ 83731.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29dba8]
>[ 83731.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29dba8] width 2880 pitch 11520 (/4 2880)
>[ 83731.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c20f0]
>[ 83731.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c20f0] width 2880 pitch 11520 (/4 2880)
>[ 83731.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d40d0]
>[ 83731.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d40d0] width 2880 pitch 11520 (/4 2880)
>[ 83731.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4b160]
>[ 83731.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4b160] width 2880 pitch 11520 (/4 2880)
>[ 83732.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0bbe70]
>[ 83732.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0bbe70] width 2880 pitch 11520 (/4 2880)
>[ 83732.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9591c10]
>[ 83732.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9591c10] width 2880 pitch 11520 (/4 2880)
>[ 83732.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ee78]
>[ 83732.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ee78] width 2880 pitch 11520 (/4 2880)
>[ 83733.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b8220]
>[ 83733.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b8220] width 2880 pitch 11520 (/4 2880)
>[ 83733.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 83733.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 83733.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[ 83733.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[ 83733.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97ea8]
>[ 83733.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97ea8] width 2880 pitch 11520 (/4 2880)
>[ 83748.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83748.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83749.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83749.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83749.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83749.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83749.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83749.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83749.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97ea8]
>[ 83749.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97ea8] width 2880 pitch 11520 (/4 2880)
>[ 83749.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83749.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83749.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83749.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83749.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83749.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83749.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97ea8]
>[ 83749.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97ea8] width 2880 pitch 11520 (/4 2880)
>[ 83749.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83749.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83749.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97ea8]
>[ 83749.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97ea8] width 2880 pitch 11520 (/4 2880)
>[ 83749.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83749.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83749.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a97ea8]
>[ 83749.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a97ea8] width 2880 pitch 11520 (/4 2880)
>[ 83749.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83749.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83749.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83749.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83749.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 83749.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 83749.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83749.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83749.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 83749.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 83749.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 83750.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 83750.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4e08]
>[ 83750.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4e08] width 2880 pitch 11520 (/4 2880)
>[ 83750.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 83750.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 83750.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83750.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83750.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83750.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83750.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83750.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83750.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a0b0]
>[ 83750.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a0b0] width 2880 pitch 11520 (/4 2880)
>[ 83750.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83750.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83750.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83750.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83750.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa028550]
>[ 83750.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa028550] width 2880 pitch 11520 (/4 2880)
>[ 83750.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83750.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83750.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83750.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83750.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83750.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83750.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83750.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83750.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83750.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83750.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953be48]
>[ 83750.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953be48] width 2880 pitch 11520 (/4 2880)
>[ 83750.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 83750.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 83750.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83750.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83750.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 83750.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 83750.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83750.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83750.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83750.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83750.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6280]
>[ 83750.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6280] width 2880 pitch 11520 (/4 2880)
>[ 83751.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c5f0]
>[ 83751.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c5f0] width 2880 pitch 11520 (/4 2880)
>[ 83751.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83751.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83751.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c5f0]
>[ 83751.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c5f0] width 2880 pitch 11520 (/4 2880)
>[ 83751.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83752.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83752.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3c5f0]
>[ 83752.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3c5f0] width 2880 pitch 11520 (/4 2880)
>[ 83752.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83752.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83752.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 83752.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 83752.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83752.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83752.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 83753.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 83770.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 83770.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 83772.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83772.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83774.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83774.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83780.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 83780.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 83789.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83789.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83789.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953be48]
>[ 83789.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953be48] width 2880 pitch 11520 (/4 2880)
>[ 83826.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83826.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83826.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83826.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83826.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83826.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83826.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83826.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83826.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83826.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83826.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83826.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83826.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83826.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83826.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83826.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83826.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83826.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83826.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83827.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83827.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83827.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83827.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83827.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83827.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83827.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83827.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83827.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83827.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83827.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83827.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdbc0]
>[ 83828.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdbc0] width 2880 pitch 11520 (/4 2880)
>[ 83828.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83828.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83828.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 83828.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 83828.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83828.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83828.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83828.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83828.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83828.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83828.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83828.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83828.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83853.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83853.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83853.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83853.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83853.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83853.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83853.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83853.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83853.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83853.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83853.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83853.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83853.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83853.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83853.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83853.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83853.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83853.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83853.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83853.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83853.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83853.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83853.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83853.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83853.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83853.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83854.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83854.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83854.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83854.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83854.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83854.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83854.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83854.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83854.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83854.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83854.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83854.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83854.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83854.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83854.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83854.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83854.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83854.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83854.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x965d440]
>[ 83854.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x965d440] width 2880 pitch 11520 (/4 2880)
>[ 83855.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83855.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83855.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83855.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83855.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83855.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83855.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83855.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83855.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83855.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83855.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83855.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83855.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83856.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83856.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83856.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83856.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83856.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83856.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 83856.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 83856.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83856.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83856.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83856.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83856.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 83856.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 83858.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83858.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83859.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a0b0]
>[ 83859.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a0b0] width 2880 pitch 11520 (/4 2880)
>[ 83876.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83876.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83881.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83881.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83883.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4e08]
>[ 83883.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4e08] width 2880 pitch 11520 (/4 2880)
>[ 83884.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 83884.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 83884.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83885.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83890.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83890.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83890.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 83890.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 83932.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83932.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83932.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c090]
>[ 83932.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c090] width 2880 pitch 11520 (/4 2880)
>[ 83932.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83932.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83932.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c090]
>[ 83932.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c090] width 2880 pitch 11520 (/4 2880)
>[ 83932.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816128]
>[ 83932.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816128] width 2880 pitch 11520 (/4 2880)
>[ 83932.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 83932.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 83932.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83932.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83932.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c090]
>[ 83932.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c090] width 2880 pitch 11520 (/4 2880)
>[ 83932.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4e08]
>[ 83932.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4e08] width 2880 pitch 11520 (/4 2880)
>[ 83932.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 83932.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 83932.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4e08]
>[ 83932.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4e08] width 2880 pitch 11520 (/4 2880)
>[ 83932.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 83932.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 83933.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83933.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83933.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83933.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83933.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83933.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83933.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3c090]
>[ 83933.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3c090] width 2880 pitch 11520 (/4 2880)
>[ 83933.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 83933.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 83933.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83933.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83933.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83933.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83933.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83933.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83933.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83933.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83933.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83933.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83933.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83933.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83933.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe50]
>[ 83933.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe50] width 2880 pitch 11520 (/4 2880)
>[ 83933.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afe4c0]
>[ 83933.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afe4c0] width 2880 pitch 11520 (/4 2880)
>[ 83933.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83933.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83933.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 83933.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 83933.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83933.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83933.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83933.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83933.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83933.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83933.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83933.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83934.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 83934.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 83934.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83934.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83934.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83934.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83934.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 83934.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 83934.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83934.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83934.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 83934.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 83934.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83935.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83935.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 83935.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 83935.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83935.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83935.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52958]
>[ 83935.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52958] width 2880 pitch 11520 (/4 2880)
>[ 83936.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83936.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83936.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 83936.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 83936.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83936.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83936.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83936.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83936.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83936.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83936.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83936.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83937.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 83937.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 83937.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83937.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83937.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 83937.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 83937.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 83937.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 83937.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 83937.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 83938.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afdbc0]
>[ 83938.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afdbc0] width 2880 pitch 11520 (/4 2880)
>[ 83939.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 83939.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 83939.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83939.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83939.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4e08]
>[ 83939.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4e08] width 2880 pitch 11520 (/4 2880)
>[ 83939.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 83939.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 83939.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83939.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83944.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29da70]
>[ 83944.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29da70] width 2880 pitch 11520 (/4 2880)
>[ 83944.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83944.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83944.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 83944.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 83944.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 83944.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 83944.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 83944.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 83945.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83945.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83945.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83945.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83945.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83945.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83945.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83945.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83945.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83945.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83945.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83945.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83945.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83945.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83945.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 83945.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 83959.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83959.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83981.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23b878]
>[ 83981.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23b878] width 2880 pitch 11520 (/4 2880)
>[ 83981.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9704930]
>[ 83981.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9704930] width 2880 pitch 11520 (/4 2880)
>[ 83981.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83981.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83981.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83981.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83982.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83982.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83982.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83982.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83982.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83982.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83982.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83982.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83982.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83982.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83983.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a92380]
>[ 83983.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a92380] width 2880 pitch 11520 (/4 2880)
>[ 83985.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83985.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83985.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 83985.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 83985.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83985.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83986.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 83986.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 83986.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 83986.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 83987.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9410808]
>[ 83987.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9410808] width 2880 pitch 11520 (/4 2880)
>[ 83987.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 83987.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 83987.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e6430]
>[ 83987.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e6430] width 2880 pitch 11520 (/4 2880)
>[ 83987.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83987.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 83988.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 83988.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84006.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84006.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84012.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84012.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84044.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84044.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84049.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84049.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84060.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84060.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84061.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84061.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84066.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84066.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84079.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84079.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84081.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84081.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84082.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84082.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84082.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84082.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84082.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84082.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84082.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84082.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84082.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84082.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84082.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84082.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84082.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84082.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84082.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84082.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84082.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84083.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84083.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84083.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84083.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84083.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84083.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84083.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84083.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84083.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84083.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84083.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84083.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84083.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84083.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84083.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84083.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84083.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84083.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84083.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84083.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84083.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84083.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84083.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84083.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84083.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84083.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84083.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84084.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84084.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84084.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84084.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84084.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84084.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84084.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84084.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84084.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84084.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84084.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84084.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84084.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84084.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84084.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84084.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84084.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84085.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84085.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84085.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84085.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84085.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84085.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84086.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84086.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84086.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84086.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84086.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84086.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84086.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84086.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84086.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84086.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84086.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84086.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84086.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84086.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84086.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84086.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84086.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84086.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84086.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84086.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84086.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84086.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84086.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84086.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84089.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84089.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84092.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84092.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84094.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84094.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84094.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84094.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84095.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84096.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84096.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84096.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84096.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84096.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84096.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84096.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84096.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84096.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84097.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84097.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84097.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84097.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84097.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84097.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84097.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84098.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84098.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84098.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84098.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84099.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84099.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84099.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84099.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84099.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84100.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84100.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84101.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84101.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84102.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84102.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84102.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84102.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84103.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84103.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84105.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6280]
>[ 84105.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6280] width 2880 pitch 11520 (/4 2880)
>[ 84105.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84105.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84106.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6280]
>[ 84106.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6280] width 2880 pitch 11520 (/4 2880)
>[ 84107.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84107.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84107.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84107.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84107.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84108.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84108.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84108.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84108.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84108.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84109.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84109.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84109.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84109.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84109.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84109.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84109.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84109.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84109.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84109.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84110.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84110.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84110.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84110.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84110.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84110.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84110.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84110.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84110.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84110.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84110.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84110.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84111.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84111.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84111.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84111.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84111.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84111.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84111.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84111.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84111.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84111.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84112.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84112.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84112.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84112.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84112.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84112.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84112.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84113.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84113.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84113.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84113.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84113.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84118.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84118.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84118.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84118.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84118.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84118.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84118.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84118.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84118.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84118.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84118.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84118.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84118.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84119.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84119.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84119.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84119.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84119.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84119.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84119.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84124.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84124.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84128.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84128.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84128.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84128.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84128.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84128.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84128.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84128.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84128.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84128.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84128.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84128.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84128.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84128.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84128.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84128.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84128.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84128.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84128.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84128.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84128.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84128.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84128.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84128.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84128.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84128.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84129.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84129.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84129.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84129.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84129.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84129.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84129.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84129.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84129.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84129.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84129.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84129.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84129.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84129.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84129.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84129.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84129.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84129.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84129.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84129.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84129.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84129.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84129.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84129.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84139.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84139.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84139.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84139.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84139.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84139.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84139.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84140.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84140.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84140.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84140.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84140.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84140.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84140.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84140.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84141.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84141.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02e8]
>[ 84141.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02e8] width 2880 pitch 11520 (/4 2880)
>[ 84141.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84141.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84141.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84141.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84141.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84141.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84141.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84141.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84142.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84142.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84149.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84149.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84177.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84177.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84182.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84182.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84186.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84186.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84187.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84187.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84193.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84193.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84199.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163ff8]
>[ 84199.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163ff8] width 2880 pitch 11520 (/4 2880)
>[ 84199.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84199.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84223.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84223.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84223.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 84223.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 84223.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84223.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84223.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 84223.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 84223.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84223.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84224.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 84224.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 84224.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84224.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84224.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84224.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84224.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84224.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84224.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84224.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84224.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84224.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84224.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d910]
>[ 84225.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d910] width 2880 pitch 11520 (/4 2880)
>[ 84225.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84225.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84225.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84225.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84241.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84241.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84241.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d910]
>[ 84241.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d910] width 2880 pitch 11520 (/4 2880)
>[ 84242.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84242.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84242.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84242.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84242.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21d910]
>[ 84242.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21d910] width 2880 pitch 11520 (/4 2880)
>[ 84243.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 84243.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 84243.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84243.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84243.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 84243.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 84243.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 84243.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 84243.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84243.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84244.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c2568]
>[ 84244.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c2568] width 2880 pitch 11520 (/4 2880)
>[ 84244.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84244.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84244.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84244.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84244.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84244.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84244.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84244.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84248.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84248.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84256.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84256.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84259.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84259.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84261.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84261.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84289.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84289.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84289.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84289.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84289.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84289.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84289.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84289.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84289.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84289.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84289.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84289.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84289.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84289.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84289.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84289.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84289.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84289.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84289.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84289.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84289.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84289.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84289.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84289.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84289.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84289.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84289.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84289.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84289.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84289.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84290.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84290.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84290.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84290.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84290.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84290.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84290.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84290.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84290.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84290.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84290.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84290.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84291.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84291.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84291.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84291.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84291.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84291.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84291.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84291.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84291.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84291.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84291.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84291.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84291.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84291.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84291.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84291.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84291.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84291.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84291.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84291.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84292.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84292.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84292.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84292.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84292.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84292.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84292.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84292.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84292.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204110]
>[ 84293.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204110] width 2880 pitch 11520 (/4 2880)
>[ 84293.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84293.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84294.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84294.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84294.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84294.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84294.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84294.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84295.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84295.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84296.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84296.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84296.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84296.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84296.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84296.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84296.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ff1a8]
>[ 84296.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ff1a8] width 2880 pitch 11520 (/4 2880)
>[ 84296.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84296.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84299.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84299.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84304.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84304.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84304.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84304.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84307.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84307.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84311.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84311.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84311.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84311.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84316.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84316.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84318.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84318.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84330.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84331.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84331.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84331.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84349.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84349.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84352.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84352.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84358.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 84358.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 84358.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84358.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84358.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84358.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84358.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84358.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84358.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84358.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84358.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84358.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84358.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84358.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84358.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84358.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84358.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84358.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84358.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 84358.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 84358.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84358.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84362.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84362.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84362.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84362.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84362.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84362.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84362.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84362.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84362.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84362.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84362.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84362.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84362.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84362.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84362.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84362.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84362.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84362.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84362.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84363.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84363.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84363.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84363.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84363.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84363.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84363.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84366.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84366.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84366.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84366.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84366.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 84366.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 84367.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84367.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84367.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 84367.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 84367.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84367.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84367.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84367.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84367.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84368.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84368.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84368.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84368.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84368.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84368.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84368.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84368.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84368.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84368.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0588]
>[ 84368.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0588] width 2880 pitch 11520 (/4 2880)
>[ 84368.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84368.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84370.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84370.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84391.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84391.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84391.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84391.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84410.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84410.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84417.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84417.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84418.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84418.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84418.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84418.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84418.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84418.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84418.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84418.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84418.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84418.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84418.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84418.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84418.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84418.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84418.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84418.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84418.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84418.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84418.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84418.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84418.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84418.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84422.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84422.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84422.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84422.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84422.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84422.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84422.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84422.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84422.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84422.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84422.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84422.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84422.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84422.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84422.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84422.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84422.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84422.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84422.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84423.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84423.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84423.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84423.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84423.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84423.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84423.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84425.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84425.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84433.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84433.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84439.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99860f8]
>[ 84439.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99860f8] width 2880 pitch 11520 (/4 2880)
>[ 84439.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84439.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84441.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84441.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84441.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84441.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84441.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84441.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84441.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84441.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84441.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84442.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84442.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84442.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84442.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84442.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84442.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84442.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84442.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84442.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84443.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84443.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84443.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84443.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84443.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84443.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84443.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84443.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84443.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1c60]
>[ 84443.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1c60] width 2880 pitch 11520 (/4 2880)
>[ 84443.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84443.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84444.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84444.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84446.628] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 84446.628] (II) RADEON(0): Using hsync ranges from config file
>[ 84446.628] (II) RADEON(0): Using vrefresh ranges from config file
>[ 84446.628] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 84446.628] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 84446.628] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 84446.628] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 84446.629] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 84542.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84542.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84543.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84543.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84543.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84543.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84543.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84543.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84543.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84543.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84543.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84543.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84543.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84543.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84543.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84543.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84543.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84543.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84543.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84543.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84543.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84543.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84543.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84543.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84543.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84543.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84544.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84544.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84544.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84544.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84544.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84544.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84544.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84544.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84544.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84544.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84544.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84544.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84545.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84545.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84545.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84545.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84545.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84545.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84545.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84545.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84546.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84546.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84546.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6270]
>[ 84546.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6270] width 2880 pitch 11520 (/4 2880)
>[ 84546.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84546.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84546.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6270]
>[ 84546.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6270] width 2880 pitch 11520 (/4 2880)
>[ 84550.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84550.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84554.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84554.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84554.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84554.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84554.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84554.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84554.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84554.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84554.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84554.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84555.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84555.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84555.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84555.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84555.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84555.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84555.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84555.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84555.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84555.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84555.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84555.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84556.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84556.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84556.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84556.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84556.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84556.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84556.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969e178]
>[ 84556.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969e178] width 2880 pitch 11520 (/4 2880)
>[ 84556.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84556.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84556.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84556.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84556.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84556.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84556.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84556.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84556.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84556.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84556.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84556.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84557.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84557.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84557.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84557.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84559.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84559.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84560.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84560.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84560.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84560.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84560.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84560.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84560.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84560.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84560.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84560.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84560.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84560.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84560.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84560.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84560.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84560.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84560.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84560.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84560.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84560.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84560.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84560.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84563.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84563.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84569.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84569.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84572.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84572.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84574.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84574.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84576.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84576.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84578.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84578.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84580.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84580.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84581.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84581.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84592.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84592.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84595.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84595.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84597.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84597.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84597.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84597.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84598.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84598.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84598.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84598.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84598.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84598.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84598.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84598.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84598.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84598.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84598.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84598.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84598.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84598.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84598.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84598.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84598.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f66b8]
>[ 84598.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f66b8] width 2880 pitch 11520 (/4 2880)
>[ 84598.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58f48]
>[ 84598.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58f48] width 2880 pitch 11520 (/4 2880)
>[ 84598.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84598.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84599.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d334a8]
>[ 84599.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d334a8] width 2880 pitch 11520 (/4 2880)
>[ 84599.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6c920]
>[ 84599.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6c920] width 2880 pitch 11520 (/4 2880)
>[ 84599.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84599.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84599.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e8b8]
>[ 84600.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e8b8] width 2880 pitch 11520 (/4 2880)
>[ 84600.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84600.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84600.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d267e8]
>[ 84600.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d267e8] width 2880 pitch 11520 (/4 2880)
>[ 84600.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa174038]
>[ 84600.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa174038] width 2880 pitch 11520 (/4 2880)
>[ 84600.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84600.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84607.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84607.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84607.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84607.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84607.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84607.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84607.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84607.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84607.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84607.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84607.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84607.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84607.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84607.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84607.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84607.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84607.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84607.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84607.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84607.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84607.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84607.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84607.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84607.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84607.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84607.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84608.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a917f0]
>[ 84609.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a917f0] width 2880 pitch 11520 (/4 2880)
>[ 84609.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84609.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84609.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206e50]
>[ 84610.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206e50] width 2880 pitch 11520 (/4 2880)
>[ 84610.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84610.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84610.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84610.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84610.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84610.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84610.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84611.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84611.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84611.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84611.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9780a78]
>[ 84611.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9780a78] width 2880 pitch 11520 (/4 2880)
>[ 84611.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84611.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84611.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84611.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84611.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84611.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84611.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84611.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84611.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84611.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84611.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84611.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84611.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84611.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84611.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84611.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84611.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 84611.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 84611.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84611.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84615.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84615.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84619.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84619.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84623.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84623.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84623.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84623.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84623.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8ce0]
>[ 84623.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8ce0] width 2880 pitch 11520 (/4 2880)
>[ 84639.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84639.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84639.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84639.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84647.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x954a380]
>[ 84647.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x954a380] width 2880 pitch 11520 (/4 2880)
>[ 84647.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9bb0]
>[ 84647.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9bb0] width 2880 pitch 11520 (/4 2880)
>[ 84655.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84655.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84655.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84655.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84655.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84655.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84655.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84655.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84655.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84655.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84655.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84656.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84656.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84656.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84656.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84656.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84656.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2733f0]
>[ 84656.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2733f0] width 2880 pitch 11520 (/4 2880)
>[ 84656.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84656.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84657.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84657.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84657.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84657.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84657.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9543c50]
>[ 84657.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9543c50] width 2880 pitch 11520 (/4 2880)
>[ 84659.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84659.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84659.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976bda0]
>[ 84659.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976bda0] width 2880 pitch 11520 (/4 2880)
>[ 84659.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84659.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84659.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976bda0]
>[ 84659.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976bda0] width 2880 pitch 11520 (/4 2880)
>[ 84659.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84659.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84659.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976bda0]
>[ 84659.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976bda0] width 2880 pitch 11520 (/4 2880)
>[ 84659.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84659.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84660.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84660.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84660.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84660.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84660.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84660.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84660.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84660.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84660.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84660.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84660.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84660.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84660.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84660.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84660.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84660.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84661.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84661.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84661.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84661.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84661.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84661.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84661.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d1568]
>[ 84661.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d1568] width 2880 pitch 11520 (/4 2880)
>[ 84661.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c48]
>[ 84661.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c48] width 2880 pitch 11520 (/4 2880)
>[ 84661.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84661.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84661.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84661.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84661.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84661.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84661.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e590]
>[ 84661.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e590] width 2880 pitch 11520 (/4 2880)
>[ 84661.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa28]
>[ 84661.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa28] width 2880 pitch 11520 (/4 2880)
>[ 84710.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31e7b0]
>[ 84710.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31e7b0] width 2880 pitch 11520 (/4 2880)
>[ 84710.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96397b0]
>[ 84710.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96397b0] width 2880 pitch 11520 (/4 2880)
>[ 84712.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6270]
>[ 84713.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6270] width 2880 pitch 11520 (/4 2880)
>[ 84715.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31cc18]
>[ 84715.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31cc18] width 2880 pitch 11520 (/4 2880)
>[ 84718.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84718.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84718.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84718.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84718.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31cc18]
>[ 84718.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31cc18] width 2880 pitch 11520 (/4 2880)
>[ 84718.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84718.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84718.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31cc18]
>[ 84718.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31cc18] width 2880 pitch 11520 (/4 2880)
>[ 84718.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84718.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84718.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84718.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84718.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dca158]
>[ 84719.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dca158] width 2880 pitch 11520 (/4 2880)
>[ 84719.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4080]
>[ 84719.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4080] width 2880 pitch 11520 (/4 2880)
>[ 84719.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4080]
>[ 84719.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4080] width 2880 pitch 11520 (/4 2880)
>[ 84719.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31cc18]
>[ 84719.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31cc18] width 2880 pitch 11520 (/4 2880)
>[ 84725.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774d00]
>[ 84725.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774d00] width 2880 pitch 11520 (/4 2880)
>[ 84725.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7e68]
>[ 84725.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7e68] width 2880 pitch 11520 (/4 2880)
>[ 84725.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84725.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84725.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84725.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84725.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18ec88]
>[ 84725.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18ec88] width 2880 pitch 11520 (/4 2880)
>[ 84725.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774d00]
>[ 84725.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774d00] width 2880 pitch 11520 (/4 2880)
>[ 84725.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84725.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84725.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582868]
>[ 84725.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582868] width 2880 pitch 11520 (/4 2880)
>[ 84725.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18ec88]
>[ 84725.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18ec88] width 2880 pitch 11520 (/4 2880)
>[ 84725.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c8d58]
>[ 84725.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c8d58] width 2880 pitch 11520 (/4 2880)
>[ 84725.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84725.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84725.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4080]
>[ 84725.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4080] width 2880 pitch 11520 (/4 2880)
>[ 84725.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774d00]
>[ 84725.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774d00] width 2880 pitch 11520 (/4 2880)
>[ 84725.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18ec88]
>[ 84725.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18ec88] width 2880 pitch 11520 (/4 2880)
>[ 84725.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84725.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84725.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 84725.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 84725.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0802c0]
>[ 84725.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0802c0] width 2880 pitch 11520 (/4 2880)
>[ 84725.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 84725.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 84725.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0802c0]
>[ 84725.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0802c0] width 2880 pitch 11520 (/4 2880)
>[ 84725.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 84725.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 84725.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84725.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84725.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1961b8]
>[ 84725.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1961b8] width 2880 pitch 11520 (/4 2880)
>[ 84725.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 84725.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 84725.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1961b8]
>[ 84725.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1961b8] width 2880 pitch 11520 (/4 2880)
>[ 84726.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0b348]
>[ 84726.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0b348] width 2880 pitch 11520 (/4 2880)
>[ 84726.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d99880]
>[ 84726.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d99880] width 2880 pitch 11520 (/4 2880)
>[ 84726.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d0b348]
>[ 84726.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d0b348] width 2880 pitch 11520 (/4 2880)
>[ 84726.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c8d58]
>[ 84726.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c8d58] width 2880 pitch 11520 (/4 2880)
>[ 84726.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84726.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84726.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84726.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84726.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f898]
>[ 84726.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f898] width 2880 pitch 11520 (/4 2880)
>[ 84726.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1cd8]
>[ 84726.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1cd8] width 2880 pitch 11520 (/4 2880)
>[ 84726.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84726.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84726.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1cd8]
>[ 84726.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1cd8] width 2880 pitch 11520 (/4 2880)
>[ 84726.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84726.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84726.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1346a0]
>[ 84726.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1346a0] width 2880 pitch 11520 (/4 2880)
>[ 84726.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84726.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84726.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1346a0]
>[ 84726.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1346a0] width 2880 pitch 11520 (/4 2880)
>[ 84726.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774810]
>[ 84726.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774810] width 2880 pitch 11520 (/4 2880)
>[ 84726.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1346a0]
>[ 84726.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1346a0] width 2880 pitch 11520 (/4 2880)
>[ 84726.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774810]
>[ 84726.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774810] width 2880 pitch 11520 (/4 2880)
>[ 84726.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1346a0]
>[ 84726.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1346a0] width 2880 pitch 11520 (/4 2880)
>[ 84726.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774810]
>[ 84726.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774810] width 2880 pitch 11520 (/4 2880)
>[ 84726.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1346a0]
>[ 84726.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1346a0] width 2880 pitch 11520 (/4 2880)
>[ 84726.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774810]
>[ 84726.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774810] width 2880 pitch 11520 (/4 2880)
>[ 84726.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 84726.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 84726.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84726.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84726.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 84726.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 84726.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 84726.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 84726.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 84726.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 84726.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 84726.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 84726.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 84726.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 84726.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 84727.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 84727.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84727.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84727.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d40840]
>[ 84727.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d40840] width 2880 pitch 11520 (/4 2880)
>[ 84727.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 84727.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 84727.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[ 84727.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[ 84733.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa225300]
>[ 84733.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa225300] width 2880 pitch 11520 (/4 2880)
>[ 84733.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94590c8]
>[ 84733.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94590c8] width 2880 pitch 11520 (/4 2880)
>[ 84733.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a778]
>[ 84733.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a778] width 2880 pitch 11520 (/4 2880)
>[ 84733.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa212210]
>[ 84733.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa212210] width 2880 pitch 11520 (/4 2880)
>[ 84733.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42948]
>[ 84734.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42948] width 2880 pitch 11520 (/4 2880)
>[ 84734.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 84734.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 84734.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9daf1f8]
>[ 84734.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9daf1f8] width 2880 pitch 11520 (/4 2880)
>[ 84734.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc80]
>[ 84734.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc80] width 2880 pitch 11520 (/4 2880)
>[ 84734.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 84734.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 84734.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 84734.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 84734.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 84734.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 84734.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 84734.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 84734.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0baac8]
>[ 84734.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0baac8] width 2880 pitch 11520 (/4 2880)
>[ 84734.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30a50]
>[ 84734.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30a50] width 2880 pitch 11520 (/4 2880)
>[ 84735.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109070]
>[ 84735.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109070] width 2880 pitch 11520 (/4 2880)
>[ 84735.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 84735.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 84735.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2bc8]
>[ 84735.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2bc8] width 2880 pitch 11520 (/4 2880)
>[ 84735.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 84735.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 84735.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbc980]
>[ 84735.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbc980] width 2880 pitch 11520 (/4 2880)
>[ 84736.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978be10]
>[ 84736.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978be10] width 2880 pitch 11520 (/4 2880)
>[ 84736.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 84736.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 84736.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97acfa0]
>[ 84736.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97acfa0] width 2880 pitch 11520 (/4 2880)
>[ 84736.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 84736.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 84736.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94590c8]
>[ 84736.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94590c8] width 2880 pitch 11520 (/4 2880)
>[ 84736.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9daf1f8]
>[ 84736.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9daf1f8] width 2880 pitch 11520 (/4 2880)
>[ 84739.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9daf1f8]
>[ 84739.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9daf1f8] width 2880 pitch 11520 (/4 2880)
>[ 84741.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2bc8]
>[ 84741.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2bc8] width 2880 pitch 11520 (/4 2880)
>[ 84741.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 84741.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 84741.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 84741.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 84741.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a1ea90]
>[ 84741.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a1ea90] width 2880 pitch 11520 (/4 2880)
>[ 84742.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa180658]
>[ 84742.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa180658] width 2880 pitch 11520 (/4 2880)
>[ 84742.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 84742.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 84742.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a778]
>[ 84742.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a778] width 2880 pitch 11520 (/4 2880)
>[ 84742.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a778]
>[ 84742.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a778] width 2880 pitch 11520 (/4 2880)
>[ 84742.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6eda8]
>[ 84742.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6eda8] width 2880 pitch 11520 (/4 2880)
>[ 84745.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9daf1f8]
>[ 84745.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9daf1f8] width 2880 pitch 11520 (/4 2880)
>[ 84749.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b580a0]
>[ 84749.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b580a0] width 2880 pitch 11520 (/4 2880)
>[ 84762.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f36d50]
>[ 84762.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f36d50] width 2880 pitch 11520 (/4 2880)
>[ 84766.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d0608]
>[ 84766.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d0608] width 2880 pitch 11520 (/4 2880)
>[ 84935.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d9ba0]
>[ 84935.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d9ba0] width 2880 pitch 11520 (/4 2880)
>[ 84942.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f58138]
>[ 84942.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f58138] width 2880 pitch 11520 (/4 2880)
>[ 84967.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97127b0]
>[ 84967.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97127b0] width 2880 pitch 11520 (/4 2880)
>[ 84973.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d9ba0]
>[ 84973.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d9ba0] width 2880 pitch 11520 (/4 2880)
>[ 84980.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9daf1f8]
>[ 84980.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9daf1f8] width 2880 pitch 11520 (/4 2880)
>[ 84982.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27398]
>[ 84982.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27398] width 2880 pitch 11520 (/4 2880)
>[ 85031.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784830]
>[ 85031.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784830] width 2880 pitch 11520 (/4 2880)
>[ 85031.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 85031.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 85032.889] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 85032.889] (II) RADEON(0): Using hsync ranges from config file
>[ 85032.889] (II) RADEON(0): Using vrefresh ranges from config file
>[ 85032.889] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 85032.889] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 85032.889] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 85032.889] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 85032.890] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 85032.890] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 85032.890] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 85032.890] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 85177.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b580a0]
>[ 85177.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b580a0] width 2880 pitch 11520 (/4 2880)
>[ 85184.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9cd78]
>[ 85184.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9cd78] width 2880 pitch 11520 (/4 2880)
>[ 85187.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d34f8]
>[ 85187.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d34f8] width 2880 pitch 11520 (/4 2880)
>[ 85193.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 85193.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 85194.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030f68]
>[ 85194.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030f68] width 2880 pitch 11520 (/4 2880)
>[ 85195.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 85195.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 85198.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 85198.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 85218.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 85218.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 85225.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cb418]
>[ 85225.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cb418] width 2880 pitch 11520 (/4 2880)
>[ 85249.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd0038]
>[ 85249.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd0038] width 2880 pitch 11520 (/4 2880)
>[ 85252.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa126d08]
>[ 85252.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa126d08] width 2880 pitch 11520 (/4 2880)
>[ 85260.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa109070]
>[ 85260.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa109070] width 2880 pitch 11520 (/4 2880)
>[ 85263.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94590c8]
>[ 85263.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94590c8] width 2880 pitch 11520 (/4 2880)
>[ 85281.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b580a0]
>[ 85281.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b580a0] width 2880 pitch 11520 (/4 2880)
>[ 85288.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371478]
>[ 85288.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371478] width 2880 pitch 11520 (/4 2880)
>[ 85299.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 85299.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 85321.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27398]
>[ 85321.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27398] width 2880 pitch 11520 (/4 2880)
>[ 85323.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9cd78]
>[ 85323.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9cd78] width 2880 pitch 11520 (/4 2880)
>[ 85331.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 85331.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 85334.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 85334.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 85336.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 85336.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 85336.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c80858]
>[ 85336.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c80858] width 2880 pitch 11520 (/4 2880)
>[ 85347.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f36d50]
>[ 85347.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f36d50] width 2880 pitch 11520 (/4 2880)
>[ 85389.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736168]
>[ 85389.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736168] width 2880 pitch 11520 (/4 2880)
>[ 85389.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa126d08]
>[ 85389.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa126d08] width 2880 pitch 11520 (/4 2880)
>[ 85390.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a027b8]
>[ 85390.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a027b8] width 2880 pitch 11520 (/4 2880)
>[ 85390.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f900]
>[ 85390.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f900] width 2880 pitch 11520 (/4 2880)
>[ 85391.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af72c8]
>[ 85391.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af72c8] width 2880 pitch 11520 (/4 2880)
>[ 85391.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafce8]
>[ 85391.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafce8] width 2880 pitch 11520 (/4 2880)
>[ 85391.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 85391.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 85391.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1689a0]
>[ 85391.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1689a0] width 2880 pitch 11520 (/4 2880)
>[ 85391.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa030f68]
>[ 85391.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa030f68] width 2880 pitch 11520 (/4 2880)
>[ 85391.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 85392.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 85392.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a678]
>[ 85392.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a678] width 2880 pitch 11520 (/4 2880)
>[ 85392.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a778]
>[ 85392.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a778] width 2880 pitch 11520 (/4 2880)
>[ 85392.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0957f8]
>[ 85392.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0957f8] width 2880 pitch 11520 (/4 2880)
>[ 85392.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11aad8]
>[ 85393.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11aad8] width 2880 pitch 11520 (/4 2880)
>[ 85393.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034940]
>[ 85393.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034940] width 2880 pitch 11520 (/4 2880)
>[ 85393.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 85393.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 85393.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 85393.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 85393.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c702b8]
>[ 85393.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c702b8] width 2880 pitch 11520 (/4 2880)
>[ 85393.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 85393.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 85394.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d35ca8]
>[ 85394.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d35ca8] width 2880 pitch 11520 (/4 2880)
>[ 85394.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978f8e8]
>[ 85394.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978f8e8] width 2880 pitch 11520 (/4 2880)
>[ 85394.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d25eb8]
>[ 85394.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d25eb8] width 2880 pitch 11520 (/4 2880)
>[ 85394.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978be10]
>[ 85394.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978be10] width 2880 pitch 11520 (/4 2880)
>[ 85395.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02d9a0]
>[ 85395.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02d9a0] width 2880 pitch 11520 (/4 2880)
>[ 85395.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c416b0]
>[ 85395.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c416b0] width 2880 pitch 11520 (/4 2880)
>[ 85395.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40620]
>[ 85395.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40620] width 2880 pitch 11520 (/4 2880)
>[ 85395.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2073f0]
>[ 85396.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2073f0] width 2880 pitch 11520 (/4 2880)
>[ 85396.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1689a0]
>[ 85396.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1689a0] width 2880 pitch 11520 (/4 2880)
>[ 85396.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafce8]
>[ 85396.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafce8] width 2880 pitch 11520 (/4 2880)
>[ 85396.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1565b8]
>[ 85396.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1565b8] width 2880 pitch 11520 (/4 2880)
>[ 85396.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff7f0]
>[ 85396.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff7f0] width 2880 pitch 11520 (/4 2880)
>[ 85396.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2073f0]
>[ 85396.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2073f0] width 2880 pitch 11520 (/4 2880)
>[ 85418.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 85418.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 85418.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85418.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85419.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafce8]
>[ 85419.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafce8] width 2880 pitch 11520 (/4 2880)
>[ 85419.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c416b0]
>[ 85419.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c416b0] width 2880 pitch 11520 (/4 2880)
>[ 85419.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326db0]
>[ 85419.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326db0] width 2880 pitch 11520 (/4 2880)
>[ 85420.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f36d50]
>[ 85420.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f36d50] width 2880 pitch 11520 (/4 2880)
>[ 85420.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af72c8]
>[ 85420.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af72c8] width 2880 pitch 11520 (/4 2880)
>[ 85420.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aad728]
>[ 85420.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aad728] width 2880 pitch 11520 (/4 2880)
>[ 85420.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 85420.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 85420.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85421.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85421.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafce8]
>[ 85421.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafce8] width 2880 pitch 11520 (/4 2880)
>[ 85423.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326db0]
>[ 85423.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326db0] width 2880 pitch 11520 (/4 2880)
>[ 85424.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c416b0]
>[ 85424.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c416b0] width 2880 pitch 11520 (/4 2880)
>[ 85424.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af72c8]
>[ 85424.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af72c8] width 2880 pitch 11520 (/4 2880)
>[ 85424.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1689a0]
>[ 85424.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1689a0] width 2880 pitch 11520 (/4 2880)
>[ 85424.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af72c8]
>[ 85424.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af72c8] width 2880 pitch 11520 (/4 2880)
>[ 85424.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aad728]
>[ 85424.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aad728] width 2880 pitch 11520 (/4 2880)
>[ 85425.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40620]
>[ 85425.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40620] width 2880 pitch 11520 (/4 2880)
>[ 85433.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85433.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85437.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85437.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85445.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85445.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85446.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85446.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85464.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85464.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85464.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85464.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85464.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85464.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85465.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85465.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85465.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85465.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85465.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85465.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85465.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85465.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85465.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85465.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85465.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85465.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85466.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85466.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85467.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85467.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85470.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85470.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85471.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85471.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85472.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85473.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85473.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85473.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85474.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85474.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85474.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85474.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85475.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85475.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85475.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85475.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85475.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85476.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85476.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85476.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85476.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85476.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85476.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85476.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85476.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85476.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85476.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85476.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85476.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85477.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85477.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85477.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85477.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85477.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85477.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85477.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85477.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85478.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85478.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85478.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85478.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85478.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85478.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85479.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85479.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85479.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85479.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85479.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85479.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85479.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85479.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85479.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85479.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85480.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85480.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85480.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85531.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85531.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85533.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85533.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85536.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85536.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85551.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85551.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85607.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85607.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85616.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85616.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85656.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85656.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85656.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85656.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85657.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85657.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85657.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85657.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85657.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85657.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85657.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85657.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85657.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85657.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85658.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85658.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85659.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85659.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85660.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85660.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85660.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85660.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85660.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff320]
>[ 85660.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff320] width 2880 pitch 11520 (/4 2880)
>[ 85660.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19b800]
>[ 85660.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19b800] width 2880 pitch 11520 (/4 2880)
>[ 85665.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0b480]
>[ 85665.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0b480] width 2880 pitch 11520 (/4 2880)
>[ 85665.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85665.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85665.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e8e08]
>[ 85665.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e8e08] width 2880 pitch 11520 (/4 2880)
>[ 85665.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85665.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85665.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1801c8]
>[ 85665.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1801c8] width 2880 pitch 11520 (/4 2880)
>[ 85665.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cde40]
>[ 85666.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cde40] width 2880 pitch 11520 (/4 2880)
>[ 85666.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671c98]
>[ 85666.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671c98] width 2880 pitch 11520 (/4 2880)
>[ 85666.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed348]
>[ 85666.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed348] width 2880 pitch 11520 (/4 2880)
>[ 85666.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf53c0]
>[ 85666.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf53c0] width 2880 pitch 11520 (/4 2880)
>[ 85666.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb66d0]
>[ 85666.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb66d0] width 2880 pitch 11520 (/4 2880)
>[ 85667.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f660]
>[ 85667.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f660] width 2880 pitch 11520 (/4 2880)
>[ 85667.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 85667.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 85667.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85667.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85667.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 85667.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 85667.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85667.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85667.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 85667.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 85671.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 85671.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 85674.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85674.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85689.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85689.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85691.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85691.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85699.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85699.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85711.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85711.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85711.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85711.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85714.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85714.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85715.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85715.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85717.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85717.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85798.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e2d0]
>[ 85798.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e2d0] width 2880 pitch 11520 (/4 2880)
>[ 85798.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85798.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85798.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992e2d0]
>[ 85798.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992e2d0] width 2880 pitch 11520 (/4 2880)
>[ 85798.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85798.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85798.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22a8]
>[ 85798.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22a8] width 2880 pitch 11520 (/4 2880)
>[ 85798.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 85798.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 85798.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f1a0]
>[ 85799.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f1a0] width 2880 pitch 11520 (/4 2880)
>[ 85799.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[ 85799.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[ 85799.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 85799.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 85799.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85799.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85799.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85799.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 85803.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85803.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85803.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f1a0]
>[ 85803.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f1a0] width 2880 pitch 11520 (/4 2880)
>[ 85803.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 85803.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 85803.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959ad8]
>[ 85803.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959ad8] width 2880 pitch 11520 (/4 2880)
>[ 85803.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85803.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85803.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 85803.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 85803.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f1a0]
>[ 85803.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f1a0] width 2880 pitch 11520 (/4 2880)
>[ 85803.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 85803.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 85803.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85803.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 85804.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 85804.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 85804.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f1a0]
>[ 85804.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f1a0] width 2880 pitch 11520 (/4 2880)
>[ 85804.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 85804.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 85804.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 85804.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 85804.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85804.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85804.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970f1a0]
>[ 85804.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970f1a0] width 2880 pitch 11520 (/4 2880)
>[ 85804.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85804.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85804.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85804.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 85804.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e2ff0]
>[ 85804.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e2ff0] width 2880 pitch 11520 (/4 2880)
>[ 85804.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85804.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 85804.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 85804.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 85804.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85804.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 85804.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 85804.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 85804.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e880]
>[ 85804.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e880] width 2880 pitch 11520 (/4 2880)
>[ 86038.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86038.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86038.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86038.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86038.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86038.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86038.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86038.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86038.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86038.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86038.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86038.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86038.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 86038.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 86038.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86038.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86038.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86038.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86038.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f2f40]
>[ 86038.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f2f40] width 2880 pitch 11520 (/4 2880)
>[ 86038.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa364620]
>[ 86038.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa364620] width 2880 pitch 11520 (/4 2880)
>[ 86038.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 86038.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 86042.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c4c8]
>[ 86042.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c4c8] width 2880 pitch 11520 (/4 2880)
>[ 86042.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86042.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86042.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86042.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86042.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65b10]
>[ 86042.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65b10] width 2880 pitch 11520 (/4 2880)
>[ 86042.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce3568]
>[ 86042.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce3568] width 2880 pitch 11520 (/4 2880)
>[ 86042.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86042.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86042.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce3568]
>[ 86042.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce3568] width 2880 pitch 11520 (/4 2880)
>[ 86042.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86042.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86042.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce3568]
>[ 86042.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce3568] width 2880 pitch 11520 (/4 2880)
>[ 86043.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86043.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86158.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096d20]
>[ 86158.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096d20] width 2880 pitch 11520 (/4 2880)
>[ 86158.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86159.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86159.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86159.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86159.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86159.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86159.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25a18]
>[ 86159.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25a18] width 2880 pitch 11520 (/4 2880)
>[ 86159.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969fe58]
>[ 86159.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969fe58] width 2880 pitch 11520 (/4 2880)
>[ 86159.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86159.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86159.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282ab8]
>[ 86159.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282ab8] width 2880 pitch 11520 (/4 2880)
>[ 86159.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959ad8]
>[ 86159.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959ad8] width 2880 pitch 11520 (/4 2880)
>[ 86159.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86159.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86163.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65b10]
>[ 86163.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65b10] width 2880 pitch 11520 (/4 2880)
>[ 86163.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969fe58]
>[ 86163.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969fe58] width 2880 pitch 11520 (/4 2880)
>[ 86163.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f45788]
>[ 86163.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f45788] width 2880 pitch 11520 (/4 2880)
>[ 86163.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096d20]
>[ 86163.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096d20] width 2880 pitch 11520 (/4 2880)
>[ 86163.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86163.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86163.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86163.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86163.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86163.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86163.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86163.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86163.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86163.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86163.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a7998]
>[ 86163.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a7998] width 2880 pitch 11520 (/4 2880)
>[ 86163.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86163.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86163.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c50360]
>[ 86163.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c50360] width 2880 pitch 11520 (/4 2880)
>[ 86163.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86163.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86175.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa160190]
>[ 86175.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa160190] width 2880 pitch 11520 (/4 2880)
>[ 86184.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86184.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86185.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86185.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86185.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 86186.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 86186.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 86186.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 86186.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61cd8]
>[ 86186.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61cd8] width 2880 pitch 11520 (/4 2880)
>[ 86186.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a855a8]
>[ 86186.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a855a8] width 2880 pitch 11520 (/4 2880)
>[ 86186.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 86186.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 86186.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ca38]
>[ 86186.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ca38] width 2880 pitch 11520 (/4 2880)
>[ 86187.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86187.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86187.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86187.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86187.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f519f8]
>[ 86187.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f519f8] width 2880 pitch 11520 (/4 2880)
>[ 86188.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8450]
>[ 86188.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8450] width 2880 pitch 11520 (/4 2880)
>[ 86188.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120920]
>[ 86188.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120920] width 2880 pitch 11520 (/4 2880)
>[ 86188.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a855a8]
>[ 86188.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a855a8] width 2880 pitch 11520 (/4 2880)
>[ 86188.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f228]
>[ 86188.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f228] width 2880 pitch 11520 (/4 2880)
>[ 86191.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a1838]
>[ 86191.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a1838] width 2880 pitch 11520 (/4 2880)
>[ 86191.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86191.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86191.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61cd8]
>[ 86191.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61cd8] width 2880 pitch 11520 (/4 2880)
>[ 86191.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa097900]
>[ 86191.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa097900] width 2880 pitch 11520 (/4 2880)
>[ 86191.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a75c0]
>[ 86191.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a75c0] width 2880 pitch 11520 (/4 2880)
>[ 86192.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ca38]
>[ 86192.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ca38] width 2880 pitch 11520 (/4 2880)
>[ 86192.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86192.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86192.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 86192.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 86192.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 86192.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 86192.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a87d0]
>[ 86192.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a87d0] width 2880 pitch 11520 (/4 2880)
>[ 86192.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768d80]
>[ 86193.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768d80] width 2880 pitch 11520 (/4 2880)
>[ 86193.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 86193.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 86193.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa4fb0]
>[ 86193.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa4fb0] width 2880 pitch 11520 (/4 2880)
>[ 86193.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61cd8]
>[ 86194.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61cd8] width 2880 pitch 11520 (/4 2880)
>[ 86195.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86195.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86195.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f519f8]
>[ 86195.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f519f8] width 2880 pitch 11520 (/4 2880)
>[ 86196.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa097900]
>[ 86196.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa097900] width 2880 pitch 11520 (/4 2880)
>[ 86197.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa364620]
>[ 86197.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa364620] width 2880 pitch 11520 (/4 2880)
>[ 86197.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61cd8]
>[ 86197.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61cd8] width 2880 pitch 11520 (/4 2880)
>[ 86197.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa120920]
>[ 86197.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa120920] width 2880 pitch 11520 (/4 2880)
>[ 86197.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e2bc8]
>[ 86197.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e2bc8] width 2880 pitch 11520 (/4 2880)
>[ 86198.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 86198.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 86198.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd0038]
>[ 86198.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd0038] width 2880 pitch 11520 (/4 2880)
>[ 86199.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 86199.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 86199.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c702b8]
>[ 86199.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c702b8] width 2880 pitch 11520 (/4 2880)
>[ 86199.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fde00]
>[ 86199.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fde00] width 2880 pitch 11520 (/4 2880)
>[ 86199.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 86199.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 86199.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 86199.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 86200.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b580a0]
>[ 86200.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b580a0] width 2880 pitch 11520 (/4 2880)
>[ 86200.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f58138]
>[ 86200.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f58138] width 2880 pitch 11520 (/4 2880)
>[ 86200.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145028]
>[ 86200.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145028] width 2880 pitch 11520 (/4 2880)
>[ 86202.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b8450]
>[ 86202.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b8450] width 2880 pitch 11520 (/4 2880)
>[ 86205.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fde00]
>[ 86205.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fde00] width 2880 pitch 11520 (/4 2880)
>[ 86205.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034940]
>[ 86205.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034940] width 2880 pitch 11520 (/4 2880)
>[ 86205.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e648]
>[ 86205.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e648] width 2880 pitch 11520 (/4 2880)
>[ 86205.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5e2a0]
>[ 86205.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5e2a0] width 2880 pitch 11520 (/4 2880)
>[ 86205.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa273690]
>[ 86205.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa273690] width 2880 pitch 11520 (/4 2880)
>[ 86205.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d42948]
>[ 86206.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d42948] width 2880 pitch 11520 (/4 2880)
>[ 86206.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b50d00]
>[ 86206.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b50d00] width 2880 pitch 11520 (/4 2880)
>[ 86206.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d9ba0]
>[ 86206.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d9ba0] width 2880 pitch 11520 (/4 2880)
>[ 86207.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0baac8]
>[ 86207.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0baac8] width 2880 pitch 11520 (/4 2880)
>[ 86207.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa284628]
>[ 86207.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa284628] width 2880 pitch 11520 (/4 2880)
>[ 86207.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a027b8]
>[ 86207.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a027b8] width 2880 pitch 11520 (/4 2880)
>[ 86224.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 86224.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 86224.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8480]
>[ 86224.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8480] width 2880 pitch 11520 (/4 2880)
>[ 86224.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19f00]
>[ 86224.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19f00] width 2880 pitch 11520 (/4 2880)
>[ 86224.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa284628]
>[ 86224.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa284628] width 2880 pitch 11520 (/4 2880)
>[ 86224.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa364620]
>[ 86224.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa364620] width 2880 pitch 11520 (/4 2880)
>[ 86224.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa284628]
>[ 86224.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa284628] width 2880 pitch 11520 (/4 2880)
>[ 86224.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11aad8]
>[ 86224.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11aad8] width 2880 pitch 11520 (/4 2880)
>[ 86224.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa020fe0]
>[ 86224.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa020fe0] width 2880 pitch 11520 (/4 2880)
>[ 86238.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 86238.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 86238.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 86238.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 86238.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8480]
>[ 86238.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8480] width 2880 pitch 11520 (/4 2880)
>[ 86238.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 86238.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 86238.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8480]
>[ 86238.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8480] width 2880 pitch 11520 (/4 2880)
>[ 86238.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 86238.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 86238.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a8480]
>[ 86238.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a8480] width 2880 pitch 11520 (/4 2880)
>[ 86238.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 86238.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 86238.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11aad8]
>[ 86238.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11aad8] width 2880 pitch 11520 (/4 2880)
>[ 86238.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa364620]
>[ 86238.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa364620] width 2880 pitch 11520 (/4 2880)
>[ 86244.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86244.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86244.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 86244.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 86244.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86244.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86244.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 86244.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 86244.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 86244.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 86244.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 86244.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 86244.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96b8038]
>[ 86244.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96b8038] width 2880 pitch 11520 (/4 2880)
>[ 86244.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1962e0]
>[ 86244.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1962e0] width 2880 pitch 11520 (/4 2880)
>[ 86245.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02cd20]
>[ 86245.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02cd20] width 2880 pitch 11520 (/4 2880)
>[ 86247.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633248]
>[ 86247.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633248] width 2880 pitch 11520 (/4 2880)
>[ 86247.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86247.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86247.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633248]
>[ 86247.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633248] width 2880 pitch 11520 (/4 2880)
>[ 86247.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86247.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86247.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0baac8]
>[ 86247.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0baac8] width 2880 pitch 11520 (/4 2880)
>[ 86247.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86248.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86248.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0baac8]
>[ 86248.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0baac8] width 2880 pitch 11520 (/4 2880)
>[ 86248.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86248.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86248.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0baac8]
>[ 86248.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0baac8] width 2880 pitch 11520 (/4 2880)
>[ 86248.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa145598]
>[ 86248.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa145598] width 2880 pitch 11520 (/4 2880)
>[ 86248.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7e0]
>[ 86248.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7e0] width 2880 pitch 11520 (/4 2880)
>[ 86261.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970c5a0]
>[ 86261.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970c5a0] width 2880 pitch 11520 (/4 2880)
>[ 86261.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9638168]
>[ 86261.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9638168] width 2880 pitch 11520 (/4 2880)
>[ 86261.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e1320]
>[ 86261.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e1320] width 2880 pitch 11520 (/4 2880)
>[ 86261.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3f9f0]
>[ 86261.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3f9f0] width 2880 pitch 11520 (/4 2880)
>[ 86261.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ea58]
>[ 86261.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ea58] width 2880 pitch 11520 (/4 2880)
>[ 86261.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b7f80]
>[ 86261.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b7f80] width 2880 pitch 11520 (/4 2880)
>[ 86261.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772318]
>[ 86262.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772318] width 2880 pitch 11520 (/4 2880)
>[ 86262.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f4c70]
>[ 86262.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f4c70] width 2880 pitch 11520 (/4 2880)
>[ 86262.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa119ee8]
>[ 86262.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa119ee8] width 2880 pitch 11520 (/4 2880)
>[ 86263.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa098608]
>[ 86263.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa098608] width 2880 pitch 11520 (/4 2880)
>[ 86263.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083fe0]
>[ 86263.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083fe0] width 2880 pitch 11520 (/4 2880)
>[ 86264.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050f60]
>[ 86264.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050f60] width 2880 pitch 11520 (/4 2880)
>[ 86264.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050f60]
>[ 86264.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050f60] width 2880 pitch 11520 (/4 2880)
>[ 86264.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86264.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86264.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x967a598]
>[ 86264.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x967a598] width 2880 pitch 11520 (/4 2880)
>[ 86278.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19b800]
>[ 86278.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19b800] width 2880 pitch 11520 (/4 2880)
>[ 86278.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa228e98]
>[ 86278.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa228e98] width 2880 pitch 11520 (/4 2880)
>[ 86278.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa155b90]
>[ 86279.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa155b90] width 2880 pitch 11520 (/4 2880)
>[ 86279.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fa2c8]
>[ 86279.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fa2c8] width 2880 pitch 11520 (/4 2880)
>[ 86279.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a4f70]
>[ 86279.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a4f70] width 2880 pitch 11520 (/4 2880)
>[ 86279.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a3268]
>[ 86279.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a3268] width 2880 pitch 11520 (/4 2880)
>[ 86279.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39d60]
>[ 86279.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39d60] width 2880 pitch 11520 (/4 2880)
>[ 86279.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 86279.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 86279.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86279.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86279.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86279.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86280.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19bb50]
>[ 86280.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19bb50] width 2880 pitch 11520 (/4 2880)
>[ 86281.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97098e0]
>[ 86281.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97098e0] width 2880 pitch 11520 (/4 2880)
>[ 86281.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 86281.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 86281.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19b800]
>[ 86281.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19b800] width 2880 pitch 11520 (/4 2880)
>[ 86281.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9b230]
>[ 86281.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9b230] width 2880 pitch 11520 (/4 2880)
>[ 86281.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd60]
>[ 86281.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd60] width 2880 pitch 11520 (/4 2880)
>[ 86281.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 86281.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 86281.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97abd60]
>[ 86281.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97abd60] width 2880 pitch 11520 (/4 2880)
>[ 86281.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9b230]
>[ 86281.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9b230] width 2880 pitch 11520 (/4 2880)
>[ 86281.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a43b0]
>[ 86281.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a43b0] width 2880 pitch 11520 (/4 2880)
>[ 86281.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9b230]
>[ 86281.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9b230] width 2880 pitch 11520 (/4 2880)
>[ 86281.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a43b0]
>[ 86281.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a43b0] width 2880 pitch 11520 (/4 2880)
>[ 86282.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff7f0]
>[ 86282.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff7f0] width 2880 pitch 11520 (/4 2880)
>[ 86294.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978be00]
>[ 86294.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978be00] width 2880 pitch 11520 (/4 2880)
>[ 86434.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1918]
>[ 86434.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1918] width 2880 pitch 11520 (/4 2880)
>[ 86434.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86434.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86435.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86435.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86435.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86435.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86435.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86435.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86435.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86435.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86435.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86435.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86435.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86435.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86435.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86435.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86435.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86435.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86435.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86435.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86437.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86437.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86437.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86437.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86437.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86437.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86437.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86437.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86437.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86437.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86437.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86438.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86438.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9fa30]
>[ 86438.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9fa30] width 2880 pitch 11520 (/4 2880)
>[ 86438.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1918]
>[ 86438.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1918] width 2880 pitch 11520 (/4 2880)
>[ 86438.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca4b0]
>[ 86438.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca4b0] width 2880 pitch 11520 (/4 2880)
>[ 86438.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86438.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86438.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86438.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86439.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1918]
>[ 86439.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1918] width 2880 pitch 11520 (/4 2880)
>[ 86439.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ae50]
>[ 86439.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ae50] width 2880 pitch 11520 (/4 2880)
>[ 86439.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1918]
>[ 86439.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1918] width 2880 pitch 11520 (/4 2880)
>[ 86440.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959ad8]
>[ 86440.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959ad8] width 2880 pitch 11520 (/4 2880)
>[ 86440.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 86440.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 86440.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9959ad8]
>[ 86440.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9959ad8] width 2880 pitch 11520 (/4 2880)
>[ 86440.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2b3c0]
>[ 86440.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86443.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa16a260]
>[ 86443.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa16a260] width 2880 pitch 11520 (/4 2880)
>[ 86553.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86553.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86553.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86553.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86553.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86554.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86554.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86554.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86554.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86554.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86556.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86556.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86556.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86556.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86557.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86557.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86557.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86557.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86558.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86558.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86558.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a058]
>[ 86558.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a058] width 2880 pitch 11520 (/4 2880)
>[ 86559.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86559.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa133dc0]
>[ 86572.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa133dc0] width 2880 pitch 11520 (/4 2880)
>[ 86572.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa133dc0]
>[ 86572.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa133dc0] width 2880 pitch 11520 (/4 2880)
>[ 86572.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efd70]
>[ 86572.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efd70] width 2880 pitch 11520 (/4 2880)
>[ 86572.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efd70]
>[ 86572.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efd70] width 2880 pitch 11520 (/4 2880)
>[ 86572.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96efd70]
>[ 86572.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96efd70] width 2880 pitch 11520 (/4 2880)
>[ 86572.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af3aa0]
>[ 86572.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af3aa0] width 2880 pitch 11520 (/4 2880)
>[ 86572.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ff38]
>[ 86572.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ff38] width 2880 pitch 11520 (/4 2880)
>[ 86573.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 86573.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 86576.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cbb90]
>[ 86576.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cbb90] width 2880 pitch 11520 (/4 2880)
>[ 86576.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29cd8]
>[ 86576.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29cd8] width 2880 pitch 11520 (/4 2880)
>[ 86576.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29c48]
>[ 86576.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29c48] width 2880 pitch 11520 (/4 2880)
>[ 86576.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a7c0]
>[ 86577.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a7c0] width 2880 pitch 11520 (/4 2880)
>[ 86577.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cbb90]
>[ 86577.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cbb90] width 2880 pitch 11520 (/4 2880)
>[ 86577.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 86577.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 86577.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97cbb90]
>[ 86577.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97cbb90] width 2880 pitch 11520 (/4 2880)
>[ 86577.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c90580]
>[ 86577.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c90580] width 2880 pitch 11520 (/4 2880)
>[ 86582.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4b028]
>[ 86582.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4b028] width 2880 pitch 11520 (/4 2880)
>[ 86666.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9775398]
>[ 86667.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9775398] width 2880 pitch 11520 (/4 2880)
>[ 86667.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 86667.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 86671.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 86671.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 86671.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b950]
>[ 86671.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b950] width 2880 pitch 11520 (/4 2880)
>[ 86672.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86672.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86672.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 86672.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 86673.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 86673.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 86673.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b950]
>[ 86673.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b950] width 2880 pitch 11520 (/4 2880)
>[ 86673.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86673.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86674.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 86674.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 86675.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b950]
>[ 86675.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b950] width 2880 pitch 11520 (/4 2880)
>[ 86675.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86675.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86675.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 86675.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 86675.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950eaa0]
>[ 86675.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950eaa0] width 2880 pitch 11520 (/4 2880)
>[ 86675.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370cb8]
>[ 86675.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370cb8] width 2880 pitch 11520 (/4 2880)
>[ 86686.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a50a0]
>[ 86686.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a50a0] width 2880 pitch 11520 (/4 2880)
>[ 86835.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14dcb8]
>[ 86835.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14dcb8] width 2880 pitch 11520 (/4 2880)
>[ 86836.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86836.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86836.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86836.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86837.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86837.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86837.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86837.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86837.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86837.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86837.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86838.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86838.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86838.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86838.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86838.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86838.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86838.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86838.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86838.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86839.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86839.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86840.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 86840.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 86847.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 86847.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 86847.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86848.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86853.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86853.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86856.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1963d0]
>[ 86856.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1963d0] width 2880 pitch 11520 (/4 2880)
>[ 86856.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86856.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86858.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1ee78]
>[ 86858.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1ee78] width 2880 pitch 11520 (/4 2880)
>[ 86858.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86858.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86858.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99b91d0]
>[ 86858.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99b91d0] width 2880 pitch 11520 (/4 2880)
>[ 86858.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083fe0]
>[ 86858.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083fe0] width 2880 pitch 11520 (/4 2880)
>[ 86858.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9772318]
>[ 86858.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9772318] width 2880 pitch 11520 (/4 2880)
>[ 86859.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86859.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86859.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86859.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86859.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86859.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86859.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86859.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86859.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86860.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86860.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 86860.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 86860.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86860.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86860.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 86860.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 86861.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86861.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86861.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86861.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86861.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 86861.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 86861.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768d80]
>[ 86861.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768d80] width 2880 pitch 11520 (/4 2880)
>[ 86862.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 86862.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 86862.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768d80]
>[ 86862.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768d80] width 2880 pitch 11520 (/4 2880)
>[ 86862.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 86862.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 86863.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768d80]
>[ 86863.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768d80] width 2880 pitch 11520 (/4 2880)
>[ 86864.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 86864.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 86864.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86864.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86887.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 86887.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 86888.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 86888.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 86888.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a87d0]
>[ 86888.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a87d0] width 2880 pitch 11520 (/4 2880)
>[ 86888.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86888.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86888.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86888.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86888.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86888.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86888.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86888.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86888.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86888.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86900.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86900.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86910.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 86910.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 86934.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 86934.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 86945.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86945.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86950.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a87d0]
>[ 86950.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a87d0] width 2880 pitch 11520 (/4 2880)
>[ 86953.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 86953.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 86965.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 86965.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 86966.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 86966.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 86966.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 86966.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 86966.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 86966.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 86967.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 86967.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 86967.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 86967.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 86967.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 86967.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 86968.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86968.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86968.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86968.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86968.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86968.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86968.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 86968.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 86968.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 86968.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 86968.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 86968.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87000.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87000.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87000.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87000.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87000.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 87000.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 87000.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87000.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87004.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87004.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87004.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87004.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87004.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87004.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87004.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87004.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87004.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 87004.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 87004.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87004.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87004.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87004.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87004.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87004.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87004.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87004.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87004.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 87004.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 87004.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87004.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87004.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87004.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87004.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87004.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87004.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87004.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87005.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87005.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87005.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87005.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87005.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87005.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87005.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 87005.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 87005.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87005.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87005.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87005.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87005.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87005.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87005.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87005.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87005.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87005.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87005.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87005.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87005.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87005.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87005.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87005.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87036.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87036.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87036.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 87036.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 87036.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87036.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87036.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 87036.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 87036.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87036.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87036.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87036.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87036.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87036.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87036.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 87036.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 87036.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 87036.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 87036.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87036.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87036.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87036.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87036.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87036.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87040.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87040.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87040.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87040.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87040.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87040.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87040.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 87040.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 87040.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87040.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87040.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87040.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87040.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87040.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87040.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87040.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87040.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87040.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87040.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87040.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87040.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87040.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87040.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87040.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87040.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87040.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87045.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87045.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87063.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87063.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87063.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87064.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87064.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87064.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87064.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87064.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87067.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87067.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87067.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87067.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87067.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87067.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87067.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87067.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87067.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87067.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87068.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87068.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87068.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87068.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87068.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87068.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87068.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87068.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87068.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87068.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87069.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87069.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87069.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3f9f0]
>[ 87069.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3f9f0] width 2880 pitch 11520 (/4 2880)
>[ 87069.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4cdb8]
>[ 87069.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4cdb8] width 2880 pitch 11520 (/4 2880)
>[ 87069.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa155f48]
>[ 87069.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa155f48] width 2880 pitch 11520 (/4 2880)
>[ 87069.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ea58]
>[ 87069.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ea58] width 2880 pitch 11520 (/4 2880)
>[ 87102.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87102.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87102.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87102.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87102.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87102.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87102.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87102.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87102.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87102.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87102.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87102.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87102.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87102.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87102.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87103.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87103.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87103.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87103.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87103.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87103.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87103.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87103.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87103.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87103.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 87103.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 87108.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 87108.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 87115.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b1990]
>[ 87115.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b1990] width 2880 pitch 11520 (/4 2880)
>[ 87128.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 87128.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 87134.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87134.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87134.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034460]
>[ 87134.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034460] width 2880 pitch 11520 (/4 2880)
>[ 87134.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1274b0]
>[ 87134.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1274b0] width 2880 pitch 11520 (/4 2880)
>[ 87136.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87136.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87136.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87136.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87137.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ea58]
>[ 87137.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ea58] width 2880 pitch 11520 (/4 2880)
>[ 87137.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1918]
>[ 87137.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1918] width 2880 pitch 11520 (/4 2880)
>[ 87138.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6080]
>[ 87138.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6080] width 2880 pitch 11520 (/4 2880)
>[ 87138.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87138.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87138.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87138.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87138.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x945f348]
>[ 87138.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x945f348] width 2880 pitch 11520 (/4 2880)
>[ 87139.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034460]
>[ 87139.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034460] width 2880 pitch 11520 (/4 2880)
>[ 87139.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa034460]
>[ 87139.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa034460] width 2880 pitch 11520 (/4 2880)
>[ 87152.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87152.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87152.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87152.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87152.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87152.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87152.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87152.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87152.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87153.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87153.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87153.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87153.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87153.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87154.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 87154.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 87154.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87155.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87155.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87155.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87155.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87155.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87155.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87155.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87155.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87155.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87164.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87164.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87165.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3238]
>[ 87165.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3238] width 2880 pitch 11520 (/4 2880)
>[ 87165.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87165.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87165.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 87165.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 87166.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87166.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87166.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 87166.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 87166.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87166.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87166.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 87166.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 87173.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87173.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87173.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87173.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87173.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87173.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87173.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87174.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87174.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0088]
>[ 87174.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0088] width 2880 pitch 11520 (/4 2880)
>[ 87174.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d471a0]
>[ 87174.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d471a0] width 2880 pitch 11520 (/4 2880)
>[ 87174.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0088]
>[ 87174.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0088] width 2880 pitch 11520 (/4 2880)
>[ 87348.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e6270]
>[ 87349.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e6270] width 2880 pitch 11520 (/4 2880)
>[ 87366.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da1440]
>[ 87366.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da1440] width 2880 pitch 11520 (/4 2880)
>[ 87404.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af2db8]
>[ 87404.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af2db8] width 2880 pitch 11520 (/4 2880)
>[ 87442.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962d6f8]
>[ 87442.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962d6f8] width 2880 pitch 11520 (/4 2880)
>[ 87447.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b601b0]
>[ 87447.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b601b0] width 2880 pitch 11520 (/4 2880)
>[ 87588.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 87588.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 87598.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87598.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87601.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 87601.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 87616.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984218]
>[ 87616.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984218] width 2880 pitch 11520 (/4 2880)
>[ 87616.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 87616.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 87617.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96183f8]
>[ 87617.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96183f8] width 2880 pitch 11520 (/4 2880)
>[ 87617.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 87617.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 87617.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96183f8]
>[ 87617.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96183f8] width 2880 pitch 11520 (/4 2880)
>[ 87617.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 87617.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 87617.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 87618.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 87618.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 87618.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 87618.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 87618.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 87618.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 87618.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 87618.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ea58]
>[ 87618.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ea58] width 2880 pitch 11520 (/4 2880)
>[ 87618.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87618.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87618.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 87618.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 87618.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 87618.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 87625.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 87625.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 87625.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 87625.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 87625.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87625.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87625.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87625.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87625.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87626.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87626.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87626.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87626.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87626.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87626.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87626.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87627.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87627.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87627.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87627.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87627.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87627.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87630.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 87630.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 87640.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87640.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87679.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87679.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87679.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87679.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87679.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87679.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87679.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87679.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87680.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87680.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87680.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87680.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87681.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87681.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87682.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87682.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87683.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87683.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87683.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87684.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87687.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87687.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87687.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87688.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87688.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87688.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87688.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87688.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87688.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87688.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87689.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87689.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87689.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87689.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87689.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87689.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87689.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87689.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87691.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87691.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87691.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87691.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87691.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87691.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87691.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87691.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87691.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87691.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87692.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87692.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87692.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87692.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87692.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87692.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87692.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87692.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87692.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87693.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87693.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87693.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87694.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87694.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87694.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87695.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87695.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87695.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87695.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87695.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87695.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87695.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87696.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87696.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87696.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87696.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87696.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87696.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87698.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 87698.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 87698.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39ca8]
>[ 87698.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39ca8] width 2880 pitch 11520 (/4 2880)
>[ 87698.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0458]
>[ 87698.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0458] width 2880 pitch 11520 (/4 2880)
>[ 87698.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39ca8]
>[ 87698.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39ca8] width 2880 pitch 11520 (/4 2880)
>[ 87786.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281af0]
>[ 87786.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281af0] width 2880 pitch 11520 (/4 2880)
>[ 87786.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 87786.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 87786.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a12a0]
>[ 87786.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a12a0] width 2880 pitch 11520 (/4 2880)
>[ 87786.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af1f10]
>[ 87787.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af1f10] width 2880 pitch 11520 (/4 2880)
>[ 87787.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a12a0]
>[ 87787.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a12a0] width 2880 pitch 11520 (/4 2880)
>[ 87787.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 87787.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 87787.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a12a0]
>[ 87787.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a12a0] width 2880 pitch 11520 (/4 2880)
>[ 87787.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 87787.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 87787.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a12a0]
>[ 87787.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a12a0] width 2880 pitch 11520 (/4 2880)
>[ 87788.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 87788.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 87788.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a12a0]
>[ 87788.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a12a0] width 2880 pitch 11520 (/4 2880)
>[ 87789.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 87789.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 87790.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2113d0]
>[ 87790.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2113d0] width 2880 pitch 11520 (/4 2880)
>[ 87790.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281af0]
>[ 87790.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281af0] width 2880 pitch 11520 (/4 2880)
>[ 87790.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2113d0]
>[ 87790.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2113d0] width 2880 pitch 11520 (/4 2880)
>[ 87790.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281af0]
>[ 87790.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281af0] width 2880 pitch 11520 (/4 2880)
>[ 87790.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 87790.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 87790.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367c58]
>[ 87790.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367c58] width 2880 pitch 11520 (/4 2880)
>[ 87790.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 87790.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 87814.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 87814.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 87832.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2070]
>[ 87832.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2070] width 2880 pitch 11520 (/4 2880)
>[ 88080.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88080.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88080.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88080.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88080.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88080.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88080.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88080.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88080.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88080.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88080.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 88080.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 88080.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88080.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88080.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88080.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88080.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88080.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88080.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88080.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88080.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 88080.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 88080.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88080.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88080.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88080.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88084.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88084.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88084.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 88084.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 88084.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88084.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88084.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 88084.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 88084.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 88084.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 88085.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195970]
>[ 88085.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195970] width 2880 pitch 11520 (/4 2880)
>[ 88085.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f28e80]
>[ 88085.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f28e80] width 2880 pitch 11520 (/4 2880)
>[ 88085.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195970]
>[ 88085.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195970] width 2880 pitch 11520 (/4 2880)
>[ 88085.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f28e80]
>[ 88085.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f28e80] width 2880 pitch 11520 (/4 2880)
>[ 88085.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195970]
>[ 88085.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195970] width 2880 pitch 11520 (/4 2880)
>[ 88085.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f28e80]
>[ 88085.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f28e80] width 2880 pitch 11520 (/4 2880)
>[ 88085.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195970]
>[ 88085.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195970] width 2880 pitch 11520 (/4 2880)
>[ 88086.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 88086.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 88086.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 88086.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 88087.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88087.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88087.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f28e80]
>[ 88087.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f28e80] width 2880 pitch 11520 (/4 2880)
>[ 88087.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88087.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88087.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88087.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88087.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 88087.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 88088.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88088.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88088.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 88088.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 88088.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88088.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88088.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 88088.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 88088.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88088.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88088.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88088.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88089.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88089.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88089.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88089.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88089.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88089.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88089.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88090.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88090.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88090.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88090.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88090.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88090.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88090.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88090.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 88090.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 88090.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88090.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88090.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b65c0]
>[ 88090.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b65c0] width 2880 pitch 11520 (/4 2880)
>[ 88090.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 88090.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 88091.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 88091.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 88091.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 88091.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 88097.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88097.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88099.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 88099.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 88099.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88099.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88099.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 88099.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 88099.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88099.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88099.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 88099.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 88099.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f058]
>[ 88099.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f058] width 2880 pitch 11520 (/4 2880)
>[ 88099.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88099.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88099.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88099.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88099.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 88099.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 88099.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 88099.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 88099.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f058]
>[ 88099.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f058] width 2880 pitch 11520 (/4 2880)
>[ 88099.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88099.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88099.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88099.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88099.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 88099.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 88100.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2113d0]
>[ 88100.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2113d0] width 2880 pitch 11520 (/4 2880)
>[ 88100.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88100.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88100.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88100.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88100.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88100.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88100.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88100.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88100.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88100.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88100.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88100.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88100.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88100.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88101.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d27c00]
>[ 88101.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d27c00] width 2880 pitch 11520 (/4 2880)
>[ 88103.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88103.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88107.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88107.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88108.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88108.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88108.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88108.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88113.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88113.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88121.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88121.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88121.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88121.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88122.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88122.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88125.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88125.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88130.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88130.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88139.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88139.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88139.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88139.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88139.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88139.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88139.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88139.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88139.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88139.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88139.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88139.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88139.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 88139.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 88139.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88139.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88139.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5748]
>[ 88139.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5748] width 2880 pitch 11520 (/4 2880)
>[ 88139.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88139.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88139.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f28e80]
>[ 88139.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f28e80] width 2880 pitch 11520 (/4 2880)
>[ 88144.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88144.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5748]
>[ 88144.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5748] width 2880 pitch 11520 (/4 2880)
>[ 88144.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88144.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88144.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f519f8]
>[ 88144.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f519f8] width 2880 pitch 11520 (/4 2880)
>[ 88144.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88144.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88144.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88144.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88144.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88144.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88144.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88144.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88144.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88144.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88144.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88144.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88144.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88144.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88144.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88144.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88148.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5748]
>[ 88148.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5748] width 2880 pitch 11520 (/4 2880)
>[ 88149.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88149.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88149.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88149.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88150.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2113d0]
>[ 88150.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2113d0] width 2880 pitch 11520 (/4 2880)
>[ 88154.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88154.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88155.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88155.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88155.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b545f8]
>[ 88155.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b545f8] width 2880 pitch 11520 (/4 2880)
>[ 88156.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88156.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88156.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b545f8]
>[ 88156.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b545f8] width 2880 pitch 11520 (/4 2880)
>[ 88157.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88157.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88157.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88157.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88157.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88158.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88158.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88158.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88158.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88158.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88165.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633e18]
>[ 88165.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633e18] width 2880 pitch 11520 (/4 2880)
>[ 88179.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88179.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88179.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88179.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88179.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88179.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88179.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88179.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88179.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54d68]
>[ 88179.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54d68] width 2880 pitch 11520 (/4 2880)
>[ 88179.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88179.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88179.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88179.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88179.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88179.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88179.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88179.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88179.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88179.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88180.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88180.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88180.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88180.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88180.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88180.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88180.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88180.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88180.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88180.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88180.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88180.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88180.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88180.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88180.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88180.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88180.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88181.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88181.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88181.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88181.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88182.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d17f70]
>[ 88182.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d17f70] width 2880 pitch 11520 (/4 2880)
>[ 88182.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88182.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88186.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88186.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88188.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88188.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88192.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88192.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88192.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88192.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88192.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88192.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88192.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88197.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88197.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88197.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88197.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88197.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88197.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88197.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88197.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88197.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88197.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88197.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88197.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88197.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88197.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88197.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88197.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88197.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88198.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88198.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88198.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88198.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88198.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88198.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88198.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88199.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88199.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88199.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88199.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88199.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88199.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88199.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88199.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88199.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88199.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88199.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88199.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88199.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88199.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88199.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88199.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88199.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88199.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88199.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88199.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88199.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88200.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88202.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88202.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88202.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88202.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88202.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88202.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88203.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88203.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88203.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88203.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88203.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88203.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88203.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88203.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88203.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88203.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88203.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88203.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88203.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88203.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88203.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88203.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88203.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88203.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88203.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88203.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88203.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88203.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88203.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88203.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88203.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88204.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88204.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88209.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88209.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88210.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88210.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88210.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88210.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88210.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88210.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88210.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88210.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88210.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88210.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88210.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88210.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88210.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88210.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88210.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88210.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88210.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f519f8]
>[ 88210.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f519f8] width 2880 pitch 11520 (/4 2880)
>[ 88210.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88210.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88210.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88210.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88210.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[ 88210.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[ 88210.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88210.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88212.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88212.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88213.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88213.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88214.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88214.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88214.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88214.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88215.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f519f8]
>[ 88215.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f519f8] width 2880 pitch 11520 (/4 2880)
>[ 88216.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88216.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88216.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88216.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88216.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88216.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88216.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b48]
>[ 88216.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b48] width 2880 pitch 11520 (/4 2880)
>[ 88216.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88216.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88216.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88216.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88232.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88232.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88261.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88261.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88261.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88261.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88262.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88262.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88262.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88262.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88262.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88262.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88263.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6c960]
>[ 88263.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6c960] width 2880 pitch 11520 (/4 2880)
>[ 88263.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23bfb0]
>[ 88263.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23bfb0] width 2880 pitch 11520 (/4 2880)
>[ 88263.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce0bb8]
>[ 88263.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce0bb8] width 2880 pitch 11520 (/4 2880)
>[ 88263.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88263.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88264.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88264.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88264.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88264.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88264.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9affa48]
>[ 88264.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9affa48] width 2880 pitch 11520 (/4 2880)
>[ 88264.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9985da8]
>[ 88264.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9985da8] width 2880 pitch 11520 (/4 2880)
>[ 88264.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88264.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88276.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88276.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88277.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157920]
>[ 88277.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157920] width 2880 pitch 11520 (/4 2880)
>[ 88277.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c78ca0]
>[ 88277.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c78ca0] width 2880 pitch 11520 (/4 2880)
>[ 88277.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157920]
>[ 88277.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157920] width 2880 pitch 11520 (/4 2880)
>[ 88277.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c78ca0]
>[ 88277.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c78ca0] width 2880 pitch 11520 (/4 2880)
>[ 88277.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 88278.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 88278.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88278.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88278.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88278.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88278.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88278.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88278.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88278.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88290.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88290.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88297.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88297.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88301.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88301.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88303.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88303.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88305.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88305.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88306.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88306.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88309.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88309.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88313.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88313.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88313.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88313.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88313.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88313.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88314.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4108]
>[ 88314.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4108] width 2880 pitch 11520 (/4 2880)
>[ 88314.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88314.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88314.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4108]
>[ 88314.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4108] width 2880 pitch 11520 (/4 2880)
>[ 88314.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88314.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88314.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88314.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88314.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88315.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88315.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88315.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88315.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88315.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88316.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88316.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88316.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88316.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88316.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4108]
>[ 88316.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4108] width 2880 pitch 11520 (/4 2880)
>[ 88316.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88316.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88316.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88316.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88318.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88318.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88318.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88318.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88318.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88318.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88318.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88318.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88318.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88318.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88318.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc26b8]
>[ 88318.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc26b8] width 2880 pitch 11520 (/4 2880)
>[ 88318.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 88318.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 88318.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88318.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88318.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88318.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88318.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88318.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88318.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88318.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88321.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984218]
>[ 88321.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984218] width 2880 pitch 11520 (/4 2880)
>[ 88321.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88321.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88322.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c78ca0]
>[ 88322.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c78ca0] width 2880 pitch 11520 (/4 2880)
>[ 88322.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9984218]
>[ 88322.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9984218] width 2880 pitch 11520 (/4 2880)
>[ 88323.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88323.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88323.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88323.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88323.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88323.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88323.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 88323.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 88323.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88323.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88323.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88323.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88323.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88323.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88323.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88323.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88323.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 88323.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 88323.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88323.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88323.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88323.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88324.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88324.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88324.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88324.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88325.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88325.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88325.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88325.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88325.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 88325.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 88326.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88326.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88326.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88326.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88326.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88326.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88326.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88326.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88327.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88327.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88327.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88327.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88327.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88327.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88327.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88327.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88327.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88327.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88327.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88328.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88332.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88332.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88332.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88332.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88332.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88332.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88332.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88332.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88332.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 88332.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 88332.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88332.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88332.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 88332.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 88332.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88332.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88332.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88332.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88332.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88332.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88332.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88332.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88332.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 88332.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 88332.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88332.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88335.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88335.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88335.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88335.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88335.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0dd7c8]
>[ 88335.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0dd7c8] width 2880 pitch 11520 (/4 2880)
>[ 88336.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88336.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88336.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88336.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88336.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09e4c0]
>[ 88336.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09e4c0] width 2880 pitch 11520 (/4 2880)
>[ 88336.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88336.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88338.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc77e8]
>[ 88338.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc77e8] width 2880 pitch 11520 (/4 2880)
>[ 88338.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88338.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88340.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88340.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88340.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88340.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88340.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88340.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88340.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88340.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88341.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88341.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88341.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c78ca0]
>[ 88341.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c78ca0] width 2880 pitch 11520 (/4 2880)
>[ 88341.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88341.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88341.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c78ca0]
>[ 88341.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c78ca0] width 2880 pitch 11520 (/4 2880)
>[ 88401.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 88401.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 88407.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88407.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88409.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88409.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88416.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2843b8]
>[ 88416.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2843b8] width 2880 pitch 11520 (/4 2880)
>[ 88442.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88442.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88449.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88449.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88449.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88449.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88449.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88449.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88449.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88449.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88449.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88449.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88449.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa091f68]
>[ 88449.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa091f68] width 2880 pitch 11520 (/4 2880)
>[ 88449.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9736488]
>[ 88449.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9736488] width 2880 pitch 11520 (/4 2880)
>[ 88449.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88449.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88449.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88449.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88449.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 88449.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 88449.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa091f68]
>[ 88449.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa091f68] width 2880 pitch 11520 (/4 2880)
>[ 88449.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88449.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88449.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88449.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88449.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88449.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88454.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88455.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88456.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88456.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88456.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88456.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88456.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88456.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88456.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88456.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88456.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88456.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88456.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88456.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88456.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88456.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88456.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88456.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88456.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88456.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88456.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88456.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88456.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88456.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88456.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88456.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88456.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88456.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88465.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa091f68]
>[ 88465.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa091f68] width 2880 pitch 11520 (/4 2880)
>[ 88507.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88507.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88507.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 88507.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 88507.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88507.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88507.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 88507.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 88507.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88507.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88507.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88507.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88507.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88507.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88507.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 88507.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 88507.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88507.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88508.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88508.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88508.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88508.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88508.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88510.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88510.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88510.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88510.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88510.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88510.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88510.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88511.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88511.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 88511.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 88511.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88511.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88511.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88511.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88511.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88511.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88511.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88511.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88511.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88511.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88511.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88511.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88511.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88511.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88511.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa153f10]
>[ 88511.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa153f10] width 2880 pitch 11520 (/4 2880)
>[ 88511.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88511.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88511.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88511.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88511.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afb030]
>[ 88511.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afb030] width 2880 pitch 11520 (/4 2880)
>[ 88513.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e8e8]
>[ 88513.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e8e8] width 2880 pitch 11520 (/4 2880)
>[ 88517.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88517.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88722.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88722.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88723.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88723.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88723.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88723.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88723.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88723.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88723.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88723.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88724.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88724.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88724.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 88724.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 88724.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94ed810]
>[ 88724.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94ed810] width 2880 pitch 11520 (/4 2880)
>[ 88724.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4850]
>[ 88724.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4850] width 2880 pitch 11520 (/4 2880)
>[ 88725.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a719e8]
>[ 88725.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a719e8] width 2880 pitch 11520 (/4 2880)
>[ 88725.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88725.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88725.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88725.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88725.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1a878]
>[ 88726.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1a878] width 2880 pitch 11520 (/4 2880)
>[ 88726.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e0e8]
>[ 88726.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e0e8] width 2880 pitch 11520 (/4 2880)
>[ 88726.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 88726.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 88734.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88734.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88747.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88747.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88747.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88747.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88747.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88747.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88747.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88747.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88747.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88747.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88747.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88747.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88747.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88747.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88747.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88747.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88747.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769688]
>[ 88748.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769688] width 2880 pitch 11520 (/4 2880)
>[ 88748.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88748.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88748.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x942d1a0]
>[ 88748.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x942d1a0] width 2880 pitch 11520 (/4 2880)
>[ 88749.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88749.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88749.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88749.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88749.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 88749.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 88749.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88749.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88749.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88749.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88749.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88749.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88749.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88749.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88749.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88749.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88749.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88749.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88749.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88749.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88749.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88750.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88750.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88750.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88750.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88750.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88750.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88750.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88750.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88750.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88754.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88754.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88756.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88756.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88772.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769540]
>[ 88772.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769540] width 2880 pitch 11520 (/4 2880)
>[ 88772.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88772.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88773.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88773.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88773.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88773.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88773.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 88773.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 88773.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88773.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88774.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88774.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88774.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88774.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88774.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88774.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88774.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88774.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88782.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 88782.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 88792.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88792.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88799.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88799.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88799.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88799.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88799.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88799.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88799.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88799.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88799.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9911c80]
>[ 88799.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9911c80] width 2880 pitch 11520 (/4 2880)
>[ 88799.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88799.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88800.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9911c80]
>[ 88800.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9911c80] width 2880 pitch 11520 (/4 2880)
>[ 88800.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88800.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88800.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9751358]
>[ 88800.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9751358] width 2880 pitch 11520 (/4 2880)
>[ 88800.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88800.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88800.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c808]
>[ 88800.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c808] width 2880 pitch 11520 (/4 2880)
>[ 88801.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3aa68]
>[ 88801.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3aa68] width 2880 pitch 11520 (/4 2880)
>[ 88801.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa282040]
>[ 88801.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa282040] width 2880 pitch 11520 (/4 2880)
>[ 88801.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bff0]
>[ 88801.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bff0] width 2880 pitch 11520 (/4 2880)
>[ 88801.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912f40]
>[ 88801.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912f40] width 2880 pitch 11520 (/4 2880)
>[ 88801.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bff0]
>[ 88801.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bff0] width 2880 pitch 11520 (/4 2880)
>[ 88805.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88805.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88805.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bff0]
>[ 88805.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bff0] width 2880 pitch 11520 (/4 2880)
>[ 88805.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88805.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88805.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9911c80]
>[ 88805.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9911c80] width 2880 pitch 11520 (/4 2880)
>[ 88806.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f43e50]
>[ 88806.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f43e50] width 2880 pitch 11520 (/4 2880)
>[ 88806.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b320c0]
>[ 88806.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b320c0] width 2880 pitch 11520 (/4 2880)
>[ 88806.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c808]
>[ 88806.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c808] width 2880 pitch 11520 (/4 2880)
>[ 88806.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88806.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88806.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c808]
>[ 88806.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c808] width 2880 pitch 11520 (/4 2880)
>[ 88807.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88807.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88808.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bff0]
>[ 88808.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bff0] width 2880 pitch 11520 (/4 2880)
>[ 88808.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88808.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88808.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bff0]
>[ 88808.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bff0] width 2880 pitch 11520 (/4 2880)
>[ 88808.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88808.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88902.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88902.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88903.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4f78]
>[ 88903.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4f78] width 2880 pitch 11520 (/4 2880)
>[ 88903.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88903.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88903.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88903.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88903.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88903.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88904.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88904.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88904.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88904.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88904.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88904.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88904.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88904.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88904.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 88904.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 88904.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa217390]
>[ 88904.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa217390] width 2880 pitch 11520 (/4 2880)
>[ 88905.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88905.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88905.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18f2b8]
>[ 88905.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18f2b8] width 2880 pitch 11520 (/4 2880)
>[ 88905.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0c918]
>[ 88905.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0c918] width 2880 pitch 11520 (/4 2880)
>[ 88911.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88911.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88911.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 88911.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 88912.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 88912.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 88912.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 88912.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 88912.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88912.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88912.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 88912.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 88912.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88912.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88912.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b31fb8]
>[ 88913.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b31fb8] width 2880 pitch 11520 (/4 2880)
>[ 88913.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88913.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88913.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88913.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88913.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88913.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88913.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88913.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88914.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 88914.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 88914.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 88914.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 88914.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88914.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88914.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88914.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88914.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88914.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88914.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88914.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88919.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88919.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88919.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88919.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88919.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88919.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88919.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88919.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88919.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88919.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88920.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88920.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88920.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88920.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88920.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88920.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88922.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 88922.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 88924.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 88924.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 88924.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88924.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88924.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88924.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88924.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 88924.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 88924.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88924.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 88925.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769540]
>[ 88925.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769540] width 2880 pitch 11520 (/4 2880)
>[ 88927.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769540]
>[ 88927.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769540] width 2880 pitch 11520 (/4 2880)
>[ 88951.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88951.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88956.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 88956.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 88956.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134150]
>[ 88956.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134150] width 2880 pitch 11520 (/4 2880)
>[ 89007.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769540]
>[ 89007.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769540] width 2880 pitch 11520 (/4 2880)
>[ 89007.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89007.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89007.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89007.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89007.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89007.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89008.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89008.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89008.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89008.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89008.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89008.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89008.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89009.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89009.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89009.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89009.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89009.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89009.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89009.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89009.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89009.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89009.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89009.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89009.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa158b98]
>[ 89009.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa158b98] width 2880 pitch 11520 (/4 2880)
>[ 89009.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89009.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89011.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89011.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89011.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89011.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89012.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89012.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89012.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa158b98]
>[ 89012.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa158b98] width 2880 pitch 11520 (/4 2880)
>[ 89012.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769540]
>[ 89012.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769540] width 2880 pitch 11520 (/4 2880)
>[ 89012.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d000b0]
>[ 89012.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d000b0] width 2880 pitch 11520 (/4 2880)
>[ 89012.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89012.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89012.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89012.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89012.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89012.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89012.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89012.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89017.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d000b0]
>[ 89017.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d000b0] width 2880 pitch 11520 (/4 2880)
>[ 89030.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c15cc8]
>[ 89031.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c15cc8] width 2880 pitch 11520 (/4 2880)
>[ 89031.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89031.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89031.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa158b98]
>[ 89031.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa158b98] width 2880 pitch 11520 (/4 2880)
>[ 89031.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c20148]
>[ 89031.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c20148] width 2880 pitch 11520 (/4 2880)
>[ 89032.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89032.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89032.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89032.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89032.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa158b98]
>[ 89032.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa158b98] width 2880 pitch 11520 (/4 2880)
>[ 89032.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89033.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89033.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa158b98]
>[ 89033.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa158b98] width 2880 pitch 11520 (/4 2880)
>[ 89033.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99114d0]
>[ 89033.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99114d0] width 2880 pitch 11520 (/4 2880)
>[ 89033.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89033.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89033.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99114d0]
>[ 89033.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99114d0] width 2880 pitch 11520 (/4 2880)
>[ 89033.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89033.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89033.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99114d0]
>[ 89034.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99114d0] width 2880 pitch 11520 (/4 2880)
>[ 89034.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89034.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89034.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99114d0]
>[ 89034.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99114d0] width 2880 pitch 11520 (/4 2880)
>[ 89034.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89034.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89038.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89039.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89039.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89039.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89039.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89039.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89039.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89039.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89039.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa091770]
>[ 89039.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa091770] width 2880 pitch 11520 (/4 2880)
>[ 89039.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa091770]
>[ 89039.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa091770] width 2880 pitch 11520 (/4 2880)
>[ 89039.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e1320]
>[ 89039.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e1320] width 2880 pitch 11520 (/4 2880)
>[ 89043.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b50b0]
>[ 89043.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b50b0] width 2880 pitch 11520 (/4 2880)
>[ 89043.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdee8]
>[ 89043.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdee8] width 2880 pitch 11520 (/4 2880)
>[ 89043.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89043.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89043.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89043.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89043.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c91e80]
>[ 89043.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c91e80] width 2880 pitch 11520 (/4 2880)
>[ 89043.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b50b0]
>[ 89043.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b50b0] width 2880 pitch 11520 (/4 2880)
>[ 89043.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89043.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89043.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89043.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89043.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89043.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89043.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 89043.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 89043.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89043.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89044.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89044.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89044.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89044.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89044.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89044.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89044.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89044.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89044.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89044.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89044.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89044.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89044.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89044.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89044.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89044.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89044.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89044.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89044.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89044.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89044.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89044.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89044.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c570a8]
>[ 89044.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c570a8] width 2880 pitch 11520 (/4 2880)
>[ 89098.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89098.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89098.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89098.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89098.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89098.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89098.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89098.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89098.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89098.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89098.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89098.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89098.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89098.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89098.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89098.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89098.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa080270]
>[ 89098.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa080270] width 2880 pitch 11520 (/4 2880)
>[ 89098.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89098.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89098.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89098.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89098.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89098.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89100.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89100.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89102.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa149dc0]
>[ 89102.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa149dc0] width 2880 pitch 11520 (/4 2880)
>[ 89102.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa149dc0]
>[ 89102.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa149dc0] width 2880 pitch 11520 (/4 2880)
>[ 89102.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9d9e8]
>[ 89102.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9d9e8] width 2880 pitch 11520 (/4 2880)
>[ 89102.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9759698]
>[ 89102.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9759698] width 2880 pitch 11520 (/4 2880)
>[ 89102.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa149dc0]
>[ 89102.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa149dc0] width 2880 pitch 11520 (/4 2880)
>[ 89102.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85068]
>[ 89102.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85068] width 2880 pitch 11520 (/4 2880)
>[ 89102.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85068]
>[ 89102.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85068] width 2880 pitch 11520 (/4 2880)
>[ 89102.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9759698]
>[ 89102.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9759698] width 2880 pitch 11520 (/4 2880)
>[ 89102.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa149dc0]
>[ 89102.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa149dc0] width 2880 pitch 11520 (/4 2880)
>[ 89102.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85068]
>[ 89102.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85068] width 2880 pitch 11520 (/4 2880)
>[ 89102.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a85068]
>[ 89102.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a85068] width 2880 pitch 11520 (/4 2880)
>[ 89102.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051ea8]
>[ 89102.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051ea8] width 2880 pitch 11520 (/4 2880)
>[ 89102.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89102.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051ea8]
>[ 89102.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051ea8] width 2880 pitch 11520 (/4 2880)
>[ 89102.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa281df0]
>[ 89102.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa281df0] width 2880 pitch 11520 (/4 2880)
>[ 89114.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89114.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89115.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f050]
>[ 89115.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f050] width 2880 pitch 11520 (/4 2880)
>[ 89115.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89115.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89115.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f050]
>[ 89115.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f050] width 2880 pitch 11520 (/4 2880)
>[ 89116.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89116.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89116.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89116.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89116.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89116.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89116.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89116.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89117.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa7a8]
>[ 89117.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa7a8] width 2880 pitch 11520 (/4 2880)
>[ 89117.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa7a8]
>[ 89117.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa7a8] width 2880 pitch 11520 (/4 2880)
>[ 89117.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89117.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89117.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa7a8]
>[ 89117.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa7a8] width 2880 pitch 11520 (/4 2880)
>[ 89125.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa7a8]
>[ 89125.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa7a8] width 2880 pitch 11520 (/4 2880)
>[ 89137.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89137.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89140.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89140.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89140.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89140.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89140.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89140.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89140.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89140.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89140.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89140.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89140.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89141.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89141.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89141.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89141.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89141.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89141.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89141.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89141.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89141.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89141.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89141.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89142.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89142.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89142.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89142.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89142.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89142.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89142.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89142.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89143.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89143.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89144.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118af0]
>[ 89144.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118af0] width 2880 pitch 11520 (/4 2880)
>[ 89144.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89144.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89144.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89144.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89144.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89144.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89145.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89145.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89145.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89145.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89145.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89145.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89145.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89145.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89146.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89146.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89146.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89146.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89146.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89146.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89146.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89146.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89146.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89146.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89147.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89147.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89147.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e91748]
>[ 89147.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e91748] width 2880 pitch 11520 (/4 2880)
>[ 89147.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89147.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89147.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89147.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89147.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 89147.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 89161.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89161.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89162.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89162.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89162.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89162.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89162.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19e30]
>[ 89162.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19e30] width 2880 pitch 11520 (/4 2880)
>[ 89167.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89167.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89168.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89168.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89168.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89168.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89168.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89168.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89168.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89168.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89169.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89169.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89170.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89170.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89170.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd82f8]
>[ 89170.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd82f8] width 2880 pitch 11520 (/4 2880)
>[ 89170.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b16e8]
>[ 89170.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b16e8] width 2880 pitch 11520 (/4 2880)
>[ 89170.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 89171.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 89171.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89171.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89172.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89172.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89172.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89172.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89172.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89173.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89173.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89173.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89173.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201f90]
>[ 89173.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201f90] width 2880 pitch 11520 (/4 2880)
>[ 89175.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b16e8]
>[ 89175.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b16e8] width 2880 pitch 11520 (/4 2880)
>[ 89181.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b16e8]
>[ 89181.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b16e8] width 2880 pitch 11520 (/4 2880)
>[ 89185.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99113f0]
>[ 89185.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99113f0] width 2880 pitch 11520 (/4 2880)
>[ 89226.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd82f8]
>[ 89226.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd82f8] width 2880 pitch 11520 (/4 2880)
>[ 89232.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19e30]
>[ 89232.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19e30] width 2880 pitch 11520 (/4 2880)
>[ 89237.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89237.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89250.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19e30]
>[ 89250.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19e30] width 2880 pitch 11520 (/4 2880)
>[ 89254.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89254.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89254.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89255.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89255.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd82f8]
>[ 89255.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd82f8] width 2880 pitch 11520 (/4 2880)
>[ 89255.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89255.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89255.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89255.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89255.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89255.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89256.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89256.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89256.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89256.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89256.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89256.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89259.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd82f8]
>[ 89259.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd82f8] width 2880 pitch 11520 (/4 2880)
>[ 89264.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89264.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89265.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89265.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89265.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89265.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89265.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89266.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89266.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89266.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89266.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89266.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89266.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89266.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89277.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19e30]
>[ 89277.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19e30] width 2880 pitch 11520 (/4 2880)
>[ 89277.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89277.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89277.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 89277.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 89278.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89278.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89278.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89278.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89278.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[ 89278.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[ 89278.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89278.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89279.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89279.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89279.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97612e8]
>[ 89279.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97612e8] width 2880 pitch 11520 (/4 2880)
>[ 89279.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89279.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89279.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89279.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89279.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89279.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89279.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197540]
>[ 89279.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197540] width 2880 pitch 11520 (/4 2880)
>[ 89282.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89282.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89282.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89282.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89282.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197640]
>[ 89282.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197640] width 2880 pitch 11520 (/4 2880)
>[ 89282.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a741f0]
>[ 89282.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a741f0] width 2880 pitch 11520 (/4 2880)
>[ 89282.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912040]
>[ 89283.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912040] width 2880 pitch 11520 (/4 2880)
>[ 89283.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89283.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89283.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89283.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89283.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89283.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89284.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197640]
>[ 89284.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197640] width 2880 pitch 11520 (/4 2880)
>[ 89339.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89339.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89339.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89339.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89399.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89399.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89399.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ece8]
>[ 89399.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ece8] width 2880 pitch 11520 (/4 2880)
>[ 89399.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89399.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89400.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223908]
>[ 89400.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223908] width 2880 pitch 11520 (/4 2880)
>[ 89400.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89400.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89400.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89400.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89400.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89400.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89400.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa231940]
>[ 89400.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa231940] width 2880 pitch 11520 (/4 2880)
>[ 89400.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4ece8]
>[ 89400.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4ece8] width 2880 pitch 11520 (/4 2880)
>[ 89405.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89405.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89408.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89408.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89418.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89418.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89422.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e258]
>[ 89422.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e258] width 2880 pitch 11520 (/4 2880)
>[ 89422.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9c020]
>[ 89422.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9c020] width 2880 pitch 11520 (/4 2880)
>[ 89423.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9e258]
>[ 89423.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9e258] width 2880 pitch 11520 (/4 2880)
>[ 89423.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9c020]
>[ 89423.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9c020] width 2880 pitch 11520 (/4 2880)
>[ 89423.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89423.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89423.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89423.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89424.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89424.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89424.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89424.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89424.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89424.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89424.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1216e8]
>[ 89424.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1216e8] width 2880 pitch 11520 (/4 2880)
>[ 89425.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[ 89425.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[ 89427.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1d88]
>[ 89427.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1d88] width 2880 pitch 11520 (/4 2880)
>[ 89428.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89428.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89428.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0558]
>[ 89428.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0558] width 2880 pitch 11520 (/4 2880)
>[ 89429.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89429.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89429.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c8aa8]
>[ 89429.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c8aa8] width 2880 pitch 11520 (/4 2880)
>[ 89429.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9c020]
>[ 89429.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9c020] width 2880 pitch 11520 (/4 2880)
>[ 89429.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 89429.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 89442.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[ 89442.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[ 89459.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63748]
>[ 89459.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63748] width 2880 pitch 11520 (/4 2880)
>[ 89462.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89462.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89463.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 89463.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 89463.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 89463.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 89463.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf598]
>[ 89463.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf598] width 2880 pitch 11520 (/4 2880)
>[ 89463.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c9478]
>[ 89463.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c9478] width 2880 pitch 11520 (/4 2880)
>[ 89467.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89467.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89468.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96be8f0]
>[ 89468.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96be8f0] width 2880 pitch 11520 (/4 2880)
>[ 89468.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89468.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89468.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96be8f0]
>[ 89468.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96be8f0] width 2880 pitch 11520 (/4 2880)
>[ 89468.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962bab8]
>[ 89468.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962bab8] width 2880 pitch 11520 (/4 2880)
>[ 89480.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89480.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89488.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671cd8]
>[ 89488.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671cd8] width 2880 pitch 11520 (/4 2880)
>[ 89492.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671cd8]
>[ 89492.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671cd8] width 2880 pitch 11520 (/4 2880)
>[ 89492.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367ca0]
>[ 89492.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367ca0] width 2880 pitch 11520 (/4 2880)
>[ 89492.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757878]
>[ 89492.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757878] width 2880 pitch 11520 (/4 2880)
>[ 89494.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671cd8]
>[ 89494.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671cd8] width 2880 pitch 11520 (/4 2880)
>[ 89495.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ddf8]
>[ 89495.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ddf8] width 2880 pitch 11520 (/4 2880)
>[ 89496.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167860]
>[ 89496.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167860] width 2880 pitch 11520 (/4 2880)
>[ 89496.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97446d0]
>[ 89496.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97446d0] width 2880 pitch 11520 (/4 2880)
>[ 89497.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97937b8]
>[ 89497.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97937b8] width 2880 pitch 11520 (/4 2880)
>[ 89498.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89499.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89499.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89499.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89500.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89500.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89500.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f48680]
>[ 89500.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f48680] width 2880 pitch 11520 (/4 2880)
>[ 89502.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89502.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89502.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89502.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89502.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137120]
>[ 89502.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137120] width 2880 pitch 11520 (/4 2880)
>[ 89503.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b362c0]
>[ 89503.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b362c0] width 2880 pitch 11520 (/4 2880)
>[ 89503.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89503.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89504.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96be8f0]
>[ 89504.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96be8f0] width 2880 pitch 11520 (/4 2880)
>[ 89504.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137120]
>[ 89504.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137120] width 2880 pitch 11520 (/4 2880)
>[ 89505.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89505.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89505.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137120]
>[ 89505.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137120] width 2880 pitch 11520 (/4 2880)
>[ 89505.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b362c0]
>[ 89505.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b362c0] width 2880 pitch 11520 (/4 2880)
>[ 89509.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19ab70]
>[ 89509.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19ab70] width 2880 pitch 11520 (/4 2880)
>[ 89512.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137120]
>[ 89512.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137120] width 2880 pitch 11520 (/4 2880)
>[ 89533.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63748]
>[ 89533.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63748] width 2880 pitch 11520 (/4 2880)
>[ 89583.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367ca0]
>[ 89584.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367ca0] width 2880 pitch 11520 (/4 2880)
>[ 89584.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137120]
>[ 89584.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137120] width 2880 pitch 11520 (/4 2880)
>[ 89587.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89587.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89587.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19ab70]
>[ 89587.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19ab70] width 2880 pitch 11520 (/4 2880)
>[ 89588.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89588.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89588.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89588.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89589.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89589.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89589.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ddf8]
>[ 89589.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ddf8] width 2880 pitch 11520 (/4 2880)
>[ 89590.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89590.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89590.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89590.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89590.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89590.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89590.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89590.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89590.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c284e0]
>[ 89590.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c284e0] width 2880 pitch 11520 (/4 2880)
>[ 89599.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aaaa8]
>[ 89599.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aaaa8] width 2880 pitch 11520 (/4 2880)
>[ 89599.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935d078]
>[ 89599.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935d078] width 2880 pitch 11520 (/4 2880)
>[ 89599.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935d078]
>[ 89599.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935d078] width 2880 pitch 11520 (/4 2880)
>[ 89599.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x935d078]
>[ 89599.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x935d078] width 2880 pitch 11520 (/4 2880)
>[ 89599.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be3a8]
>[ 89599.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be3a8] width 2880 pitch 11520 (/4 2880)
>[ 89599.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be3a8]
>[ 89599.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be3a8] width 2880 pitch 11520 (/4 2880)
>[ 89599.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be3a8]
>[ 89599.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be3a8] width 2880 pitch 11520 (/4 2880)
>[ 89599.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89599.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89599.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be3a8]
>[ 89599.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be3a8] width 2880 pitch 11520 (/4 2880)
>[ 89603.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89603.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89603.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ab568]
>[ 89603.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ab568] width 2880 pitch 11520 (/4 2880)
>[ 89603.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89603.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89603.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89604.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89604.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89604.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89604.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89604.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89604.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89604.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89604.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89604.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89604.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89604.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89604.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89604.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89604.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89604.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89604.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89604.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89604.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89604.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89608.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89608.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89608.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89608.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89608.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89608.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89608.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89608.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89608.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89608.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89608.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89608.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89609.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89609.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89609.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89609.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89609.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89609.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89609.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 89609.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 89609.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89610.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89610.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 89610.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 89612.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 89612.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 89613.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89613.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89613.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75d68]
>[ 89613.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75d68] width 2880 pitch 11520 (/4 2880)
>[ 89613.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89613.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89613.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89613.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89613.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a1460]
>[ 89613.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a1460] width 2880 pitch 11520 (/4 2880)
>[ 89614.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89614.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89615.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3a228]
>[ 89615.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3a228] width 2880 pitch 11520 (/4 2880)
>[ 89615.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 89615.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 89615.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 89616.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 89616.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 89616.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 89616.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75d68]
>[ 89616.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75d68] width 2880 pitch 11520 (/4 2880)
>[ 89616.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 89616.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 89626.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 89626.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 89627.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4c6d0]
>[ 89627.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4c6d0] width 2880 pitch 11520 (/4 2880)
>[ 89627.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 89627.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 89628.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89628.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89628.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979918]
>[ 89628.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979918] width 2880 pitch 11520 (/4 2880)
>[ 89628.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89628.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89629.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 89629.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 89629.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89629.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89629.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 89629.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 89629.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89629.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89678.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89678.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89678.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b362c0]
>[ 89678.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b362c0] width 2880 pitch 11520 (/4 2880)
>[ 89679.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19ab70]
>[ 89679.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19ab70] width 2880 pitch 11520 (/4 2880)
>[ 89679.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367ca0]
>[ 89679.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367ca0] width 2880 pitch 11520 (/4 2880)
>[ 89679.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b362c0]
>[ 89679.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b362c0] width 2880 pitch 11520 (/4 2880)
>[ 89679.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19ab70]
>[ 89679.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19ab70] width 2880 pitch 11520 (/4 2880)
>[ 89680.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89680.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89680.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89680.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89680.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89680.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89681.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b362c0]
>[ 89681.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b362c0] width 2880 pitch 11520 (/4 2880)
>[ 89681.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ddf8]
>[ 89681.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ddf8] width 2880 pitch 11520 (/4 2880)
>[ 89682.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89682.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89682.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367ca0]
>[ 89682.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367ca0] width 2880 pitch 11520 (/4 2880)
>[ 89683.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89683.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89683.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89683.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89683.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c69030]
>[ 89683.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c69030] width 2880 pitch 11520 (/4 2880)
>[ 89683.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f48680]
>[ 89683.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f48680] width 2880 pitch 11520 (/4 2880)
>[ 89683.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03a350]
>[ 89683.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03a350] width 2880 pitch 11520 (/4 2880)
>[ 89699.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367ca0]
>[ 89699.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367ca0] width 2880 pitch 11520 (/4 2880)
>[ 89699.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5b3c0]
>[ 89699.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5b3c0] width 2880 pitch 11520 (/4 2880)
>[ 89700.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89700.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89700.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4ebc8]
>[ 89700.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4ebc8] width 2880 pitch 11520 (/4 2880)
>[ 89701.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89701.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89701.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 89701.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 89701.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89701.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89701.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbbe20]
>[ 89701.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbbe20] width 2880 pitch 11520 (/4 2880)
>[ 89701.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b65f10]
>[ 89701.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b65f10] width 2880 pitch 11520 (/4 2880)
>[ 89705.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a3c30]
>[ 89705.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a3c30] width 2880 pitch 11520 (/4 2880)
>[ 89705.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ad3c8]
>[ 89705.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ad3c8] width 2880 pitch 11520 (/4 2880)
>[ 89705.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27740]
>[ 89705.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27740] width 2880 pitch 11520 (/4 2880)
>[ 89705.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95645f0]
>[ 89705.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95645f0] width 2880 pitch 11520 (/4 2880)
>[ 89705.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a0790]
>[ 89705.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a0790] width 2880 pitch 11520 (/4 2880)
>[ 89705.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9d510]
>[ 89705.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9d510] width 2880 pitch 11520 (/4 2880)
>[ 89705.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a991a0]
>[ 89705.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a991a0] width 2880 pitch 11520 (/4 2880)
>[ 89705.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157bf8]
>[ 89705.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157bf8] width 2880 pitch 11520 (/4 2880)
>[ 89705.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f48898]
>[ 89705.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f48898] width 2880 pitch 11520 (/4 2880)
>[ 89707.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ad3c8]
>[ 89707.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ad3c8] width 2880 pitch 11520 (/4 2880)
>[ 89710.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0558]
>[ 89710.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0558] width 2880 pitch 11520 (/4 2880)
>[ 89710.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9739f68]
>[ 89710.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9739f68] width 2880 pitch 11520 (/4 2880)
>[ 89710.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89710.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89710.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97446d0]
>[ 89710.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97446d0] width 2880 pitch 11520 (/4 2880)
>[ 89710.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89710.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89710.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97446d0]
>[ 89710.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97446d0] width 2880 pitch 11520 (/4 2880)
>[ 89710.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89710.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89710.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97446d0]
>[ 89710.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97446d0] width 2880 pitch 11520 (/4 2880)
>[ 89710.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211a00]
>[ 89710.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211a00] width 2880 pitch 11520 (/4 2880)
>[ 89724.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22bf20]
>[ 89724.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22bf20] width 2880 pitch 11520 (/4 2880)
>[ 89767.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89767.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89767.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 89767.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 89768.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb5590]
>[ 89768.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb5590] width 2880 pitch 11520 (/4 2880)
>[ 89768.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89768.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89770.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb5590]
>[ 89770.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb5590] width 2880 pitch 11520 (/4 2880)
>[ 89774.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[ 89774.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[ 89774.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[ 89774.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[ 89776.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89776.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89776.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb5590]
>[ 89777.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb5590] width 2880 pitch 11520 (/4 2880)
>[ 89777.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89777.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89778.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb5590]
>[ 89778.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb5590] width 2880 pitch 11520 (/4 2880)
>[ 89779.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89779.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89795.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89798.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89798.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89798.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89802.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89802.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89802.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89802.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89802.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89802.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89803.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89803.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89803.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89803.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89803.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89803.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89804.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89815.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89815.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89815.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89815.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89815.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89815.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89815.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89815.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89815.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89815.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89815.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89815.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89816.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89816.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89816.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89816.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[ 89816.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[ 89818.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89818.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89874.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89874.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89875.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89875.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89875.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89875.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89877.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95df8]
>[ 89877.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95df8] width 2880 pitch 11520 (/4 2880)
>[ 89877.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89877.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89877.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95df8]
>[ 89877.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95df8] width 2880 pitch 11520 (/4 2880)
>[ 89880.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 89880.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 89880.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89880.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89881.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 89881.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 89881.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[ 89881.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[ 89881.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 89881.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 89881.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[ 89881.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[ 89881.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 89881.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 89883.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 89883.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 89883.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[ 89883.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[ 89883.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 89884.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 89884.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[ 89884.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[ 89884.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 89884.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 89885.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104a60]
>[ 89885.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104a60] width 2880 pitch 11520 (/4 2880)
>[ 89885.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[ 89885.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[ 89885.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[ 89885.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[ 89885.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[ 89885.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[ 89885.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[ 89886.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[ 89886.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[ 89886.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[ 89925.001] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 89925.009] (II) RADEON(0): Using hsync ranges from config file
>[ 89925.009] (II) RADEON(0): Using vrefresh ranges from config file
>[ 89925.009] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 89925.009] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 89925.009] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 89925.009] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 90155.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a5140]
>[ 90155.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a5140] width 2880 pitch 11520 (/4 2880)
>[ 90284.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996a7e8]
>[ 90284.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996a7e8] width 2880 pitch 11520 (/4 2880)
>[ 90287.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90287.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90288.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90288.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90288.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e770]
>[ 90288.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e770] width 2880 pitch 11520 (/4 2880)
>[ 90289.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90289.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90289.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e770]
>[ 90289.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e770] width 2880 pitch 11520 (/4 2880)
>[ 90290.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90290.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90290.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962de30]
>[ 90290.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962de30] width 2880 pitch 11520 (/4 2880)
>[ 90293.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90293.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90294.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a5310]
>[ 90294.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a5310] width 2880 pitch 11520 (/4 2880)
>[ 90296.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90296.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90299.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90299.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90302.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757878]
>[ 90302.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757878] width 2880 pitch 11520 (/4 2880)
>[ 90303.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90303.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90306.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90306.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90308.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90308.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90308.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1415d8]
>[ 90308.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1415d8] width 2880 pitch 11520 (/4 2880)
>[ 90311.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11d2c8]
>[ 90311.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11d2c8] width 2880 pitch 11520 (/4 2880)
>[ 90311.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90311.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90311.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9963090]
>[ 90311.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9963090] width 2880 pitch 11520 (/4 2880)
>[ 90311.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822670]
>[ 90311.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822670] width 2880 pitch 11520 (/4 2880)
>[ 90311.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9963090]
>[ 90311.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9963090] width 2880 pitch 11520 (/4 2880)
>[ 90311.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822670]
>[ 90311.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822670] width 2880 pitch 11520 (/4 2880)
>[ 90311.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9963090]
>[ 90311.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9963090] width 2880 pitch 11520 (/4 2880)
>[ 90311.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822670]
>[ 90311.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822670] width 2880 pitch 11520 (/4 2880)
>[ 90311.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8f068]
>[ 90311.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8f068] width 2880 pitch 11520 (/4 2880)
>[ 90311.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9822670]
>[ 90311.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9822670] width 2880 pitch 11520 (/4 2880)
>[ 90320.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90320.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90320.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90320.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90321.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90321.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90322.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 90322.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 90322.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90322.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90322.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95df8]
>[ 90322.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95df8] width 2880 pitch 11520 (/4 2880)
>[ 90322.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90322.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90322.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90322.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90324.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95df8]
>[ 90324.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95df8] width 2880 pitch 11520 (/4 2880)
>[ 90325.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90325.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90326.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90326.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90327.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90327.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90327.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c77918]
>[ 90327.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c77918] width 2880 pitch 11520 (/4 2880)
>[ 90337.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90337.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90337.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90337.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90337.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90337.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90337.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90337.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90337.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90337.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90337.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90337.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90337.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90337.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90337.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90337.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90337.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90337.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90337.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90337.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90337.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90337.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90337.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90337.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90338.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90338.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90338.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90338.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90338.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90338.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90338.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90339.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90339.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90339.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90339.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90339.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90339.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90339.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90339.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90339.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90339.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90339.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90339.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90339.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90340.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90340.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90340.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90340.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90340.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90340.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90341.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90341.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90341.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975dd8]
>[ 90341.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975dd8] width 2880 pitch 11520 (/4 2880)
>[ 90342.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90342.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90342.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2590]
>[ 90343.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2590] width 2880 pitch 11520 (/4 2880)
>[ 90343.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c19370]
>[ 90343.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c19370] width 2880 pitch 11520 (/4 2880)
>[ 90343.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90343.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90343.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90343.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90343.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90343.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90360.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90360.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90360.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90360.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90360.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90360.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90360.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90360.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90360.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90360.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90360.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90360.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90360.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90360.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90360.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90360.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90360.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90360.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90360.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90360.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90364.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90364.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90364.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90364.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90364.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90364.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90364.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90364.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90364.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90364.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90364.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90364.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90364.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90364.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90364.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90364.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90364.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90364.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90364.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90364.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90364.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90364.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90364.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90364.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90364.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90364.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90365.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90365.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90365.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90365.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90365.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90365.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90365.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90365.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90365.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90365.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90365.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90365.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90365.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90365.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90365.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90365.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90365.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90365.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90365.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90365.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90365.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90415.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90415.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90416.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90416.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90416.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90416.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90416.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90416.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90416.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90416.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90416.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90416.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90416.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90416.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90416.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196ee0]
>[ 90416.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196ee0] width 2880 pitch 11520 (/4 2880)
>[ 90416.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90416.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90416.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90416.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90416.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90416.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90416.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90416.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90416.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196ee0]
>[ 90416.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196ee0] width 2880 pitch 11520 (/4 2880)
>[ 90416.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90416.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90416.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90416.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90420.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90420.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90424.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90424.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90424.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90424.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90424.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90424.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90424.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90424.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90424.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90424.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90424.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90424.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90424.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90424.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90424.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90424.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90424.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90425.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90425.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90425.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90425.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90425.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90425.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90425.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90425.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90425.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90425.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90425.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90425.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90425.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90425.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90425.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90425.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90425.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90425.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90426.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90426.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90426.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90426.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90426.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90426.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90426.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90426.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90426.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90426.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90426.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90426.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90426.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90426.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90426.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90427.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90427.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90427.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90427.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90427.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90427.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90427.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90427.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90427.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90427.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90427.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90427.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90427.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90427.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3649b8]
>[ 90427.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3649b8] width 2880 pitch 11520 (/4 2880)
>[ 90428.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90428.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90428.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90428.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90429.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90429.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90429.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90429.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90429.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90429.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90429.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90429.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90429.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90429.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90429.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90429.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90429.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90429.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90429.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90429.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90429.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90429.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90429.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90430.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90430.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90430.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90430.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90430.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90430.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90430.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90430.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90430.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90430.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90430.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90430.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90430.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90430.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90430.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90430.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90430.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90430.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90430.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90430.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90431.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90431.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90431.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90431.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90432.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90432.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90432.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90432.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90432.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90433.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90438.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90438.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90438.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90438.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90438.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90438.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90438.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90438.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90438.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90438.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90438.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90438.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90439.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90439.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90439.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90439.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90439.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90439.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90439.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90439.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90439.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90439.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90439.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90439.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90439.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90439.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90439.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90439.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90439.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90439.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90439.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90439.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90439.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90439.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90439.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90439.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90439.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90440.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90440.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90440.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90440.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90440.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90440.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90440.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90440.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90440.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90440.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90440.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90441.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce2388]
>[ 90441.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce2388] width 2880 pitch 11520 (/4 2880)
>[ 90441.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90441.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90441.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e0a8]
>[ 90441.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e0a8] width 2880 pitch 11520 (/4 2880)
>[ 90443.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869a0]
>[ 90443.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869a0] width 2880 pitch 11520 (/4 2880)
>[ 90443.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90443.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90443.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90443.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90443.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90443.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90443.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90443.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90443.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90443.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90443.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90443.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90443.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90443.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90443.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90443.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90443.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90443.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90443.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90443.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90443.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90446.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90446.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90446.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90446.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90446.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90446.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90446.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90446.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90447.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90447.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90447.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e36e0]
>[ 90447.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e36e0] width 2880 pitch 11520 (/4 2880)
>[ 90447.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90447.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90447.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90447.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90447.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90447.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90448.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90448.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90448.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90448.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90448.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 90448.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 90448.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90448.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90448.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90448.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90449.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90449.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90449.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90449.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90449.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90449.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90449.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90449.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90450.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90450.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90450.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95ca8]
>[ 90450.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95ca8] width 2880 pitch 11520 (/4 2880)
>[ 90450.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90450.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90450.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c40]
>[ 90450.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c40] width 2880 pitch 11520 (/4 2880)
>[ 90450.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7e8d8]
>[ 90450.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7e8d8] width 2880 pitch 11520 (/4 2880)
>[ 90543.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c40]
>[ 90543.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c40] width 2880 pitch 11520 (/4 2880)
>[ 90543.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90544.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90544.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90544.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90544.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9764ba0]
>[ 90544.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9764ba0] width 2880 pitch 11520 (/4 2880)
>[ 90544.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90544.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90545.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90545.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90545.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c40]
>[ 90545.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c40] width 2880 pitch 11520 (/4 2880)
>[ 90545.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90545.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90545.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90545.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90545.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90545.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90546.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90546.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90547.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca20]
>[ 90547.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca20] width 2880 pitch 11520 (/4 2880)
>[ 90548.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90548.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90548.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90549.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90549.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90549.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90571.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90571.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90571.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 90571.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 90571.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90571.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90572.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c40]
>[ 90572.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c40] width 2880 pitch 11520 (/4 2880)
>[ 90572.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 90572.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 90572.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971e2f8]
>[ 90572.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971e2f8] width 2880 pitch 11520 (/4 2880)
>[ 90573.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d2a90]
>[ 90573.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d2a90] width 2880 pitch 11520 (/4 2880)
>[ 90574.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca20]
>[ 90574.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca20] width 2880 pitch 11520 (/4 2880)
>[ 90574.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90574.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90574.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833c40]
>[ 90575.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833c40] width 2880 pitch 11520 (/4 2880)
>[ 90575.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90575.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90577.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d2a90]
>[ 90577.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d2a90] width 2880 pitch 11520 (/4 2880)
>[ 90577.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08a280]
>[ 90577.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08a280] width 2880 pitch 11520 (/4 2880)
>[ 90577.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9892f48]
>[ 90577.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9892f48] width 2880 pitch 11520 (/4 2880)
>[ 90578.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050620]
>[ 90578.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050620] width 2880 pitch 11520 (/4 2880)
>[ 90578.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90578.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90578.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975ca20]
>[ 90578.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975ca20] width 2880 pitch 11520 (/4 2880)
>[ 90579.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90579.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90579.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90579.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90579.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90579.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90579.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eabb8]
>[ 90579.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eabb8] width 2880 pitch 11520 (/4 2880)
>[ 90579.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22eb08]
>[ 90579.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22eb08] width 2880 pitch 11520 (/4 2880)
>[ 90601.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 90601.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 90780.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a822d0]
>[ 90780.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a822d0] width 2880 pitch 11520 (/4 2880)
>[ 90780.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90780.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90780.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90780.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90781.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1415d8]
>[ 90781.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1415d8] width 2880 pitch 11520 (/4 2880)
>[ 90785.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1415d8]
>[ 90785.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1415d8] width 2880 pitch 11520 (/4 2880)
>[ 90785.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90785.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90785.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eabb8]
>[ 90785.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eabb8] width 2880 pitch 11520 (/4 2880)
>[ 90785.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90785.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90785.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90785.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90785.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1415d8]
>[ 90785.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1415d8] width 2880 pitch 11520 (/4 2880)
>[ 90785.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90785.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90785.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eabb8]
>[ 90785.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eabb8] width 2880 pitch 11520 (/4 2880)
>[ 90785.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90785.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90785.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90785.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90785.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1415d8]
>[ 90785.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1415d8] width 2880 pitch 11520 (/4 2880)
>[ 90785.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90785.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90785.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94eabb8]
>[ 90785.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94eabb8] width 2880 pitch 11520 (/4 2880)
>[ 90786.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 90786.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 90786.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90786.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90786.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90786.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90786.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90786.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90786.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90786.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90786.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90786.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90786.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90786.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90786.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90786.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90838.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90838.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90838.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90838.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90838.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90838.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90838.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90838.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90838.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90838.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90838.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbf368]
>[ 90839.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbf368] width 2880 pitch 11520 (/4 2880)
>[ 90839.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90839.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90839.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90839.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90839.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90839.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90839.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972d3c0]
>[ 90839.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972d3c0] width 2880 pitch 11520 (/4 2880)
>[ 90839.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90839.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90843.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90843.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90843.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90843.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90843.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959b060]
>[ 90843.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959b060] width 2880 pitch 11520 (/4 2880)
>[ 90843.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90843.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90843.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90843.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90843.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90843.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90843.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90843.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90843.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90843.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90843.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90843.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90843.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90843.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90843.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90843.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90843.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0869e0]
>[ 90843.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0869e0] width 2880 pitch 11520 (/4 2880)
>[ 90843.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90843.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90844.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90844.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90844.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29cda0]
>[ 90844.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29cda0] width 2880 pitch 11520 (/4 2880)
>[ 90844.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90844.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90844.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29cda0]
>[ 90844.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29cda0] width 2880 pitch 11520 (/4 2880)
>[ 90844.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90844.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90844.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90844.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90844.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90844.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90844.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29cda0]
>[ 90844.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29cda0] width 2880 pitch 11520 (/4 2880)
>[ 90844.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90844.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90844.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90844.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90844.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90844.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90844.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29cda0]
>[ 90844.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29cda0] width 2880 pitch 11520 (/4 2880)
>[ 90844.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769140]
>[ 90844.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769140] width 2880 pitch 11520 (/4 2880)
>[ 90848.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90848.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90848.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90848.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90848.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29cda0]
>[ 90848.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29cda0] width 2880 pitch 11520 (/4 2880)
>[ 90848.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972d3c0]
>[ 90848.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972d3c0] width 2880 pitch 11520 (/4 2880)
>[ 90848.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90848.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90848.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90848.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90848.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90848.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90848.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90848.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90848.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90848.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90848.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90848.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90848.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90848.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90848.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975a328]
>[ 90848.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975a328] width 2880 pitch 11520 (/4 2880)
>[ 90918.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1280a0]
>[ 90918.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1280a0] width 2880 pitch 11520 (/4 2880)
>[ 90921.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90921.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90921.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 90921.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 90922.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9417490]
>[ 90922.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9417490] width 2880 pitch 11520 (/4 2880)
>[ 90943.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0704f0]
>[ 90943.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0704f0] width 2880 pitch 11520 (/4 2880)
>[ 90999.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa128160]
>[ 90999.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa128160] width 2880 pitch 11520 (/4 2880)
>[ 90999.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b91f80]
>[ 90999.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b91f80] width 2880 pitch 11520 (/4 2880)
>[ 91000.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91000.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91000.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[ 91000.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[ 91000.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91000.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91000.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[ 91001.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[ 91001.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91001.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91001.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccfd00]
>[ 91001.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccfd00] width 2880 pitch 11520 (/4 2880)
>[ 91001.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91001.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91001.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91001.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91001.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccfd00]
>[ 91001.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccfd00] width 2880 pitch 11520 (/4 2880)
>[ 91001.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 91001.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 91001.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccfd00]
>[ 91001.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccfd00] width 2880 pitch 11520 (/4 2880)
>[ 91001.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccfd00]
>[ 91001.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccfd00] width 2880 pitch 11520 (/4 2880)
>[ 91001.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccfd00]
>[ 91001.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccfd00] width 2880 pitch 11520 (/4 2880)
>[ 91120.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa219f48]
>[ 91120.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa219f48] width 2880 pitch 11520 (/4 2880)
>[ 91123.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c98]
>[ 91123.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c98] width 2880 pitch 11520 (/4 2880)
>[ 91125.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f51570]
>[ 91125.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f51570] width 2880 pitch 11520 (/4 2880)
>[ 91127.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91127.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91309.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91309.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91309.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91309.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91309.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91309.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91310.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91310.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91310.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91310.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91310.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91310.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91310.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91310.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91310.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91311.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91311.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91311.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91311.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91311.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91312.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91312.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91312.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e4f28]
>[ 91312.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e4f28] width 2880 pitch 11520 (/4 2880)
>[ 91313.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e4f28]
>[ 91313.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e4f28] width 2880 pitch 11520 (/4 2880)
>[ 91313.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91313.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91313.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91313.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91313.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91313.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91314.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91314.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91323.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91323.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91323.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4c6d0]
>[ 91323.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4c6d0] width 2880 pitch 11520 (/4 2880)
>[ 91324.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 91324.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 91324.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 91324.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 91324.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4a728]
>[ 91324.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4a728] width 2880 pitch 11520 (/4 2880)
>[ 91324.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 91324.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 91324.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4a728]
>[ 91324.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4a728] width 2880 pitch 11520 (/4 2880)
>[ 91325.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 91325.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 91325.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 91325.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 91325.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 91325.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 91326.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4c6d0]
>[ 91326.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4c6d0] width 2880 pitch 11520 (/4 2880)
>[ 91326.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 91326.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 91326.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91326.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91326.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 91326.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 91326.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91326.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91497.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91497.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91497.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 91497.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 91497.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943c4a8]
>[ 91497.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943c4a8] width 2880 pitch 11520 (/4 2880)
>[ 91497.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 91498.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 91498.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943c4a8]
>[ 91498.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943c4a8] width 2880 pitch 11520 (/4 2880)
>[ 91498.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 91498.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 91499.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91499.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91499.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91499.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91499.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91499.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91499.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91499.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91499.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 91499.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 91499.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91499.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91499.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 91499.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 91499.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91499.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91499.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 91500.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 91500.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91500.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91500.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91500.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91500.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 91501.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 91501.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 91501.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 91501.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769620]
>[ 91501.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769620] width 2880 pitch 11520 (/4 2880)
>[ 91501.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 91501.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 91502.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91502.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91502.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91502.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91502.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91502.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91503.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1052a8]
>[ 91503.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1052a8] width 2880 pitch 11520 (/4 2880)
>[ 91503.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91503.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91503.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91503.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91503.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050b28]
>[ 91503.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050b28] width 2880 pitch 11520 (/4 2880)
>[ 91503.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 91503.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 91503.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 91503.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 91504.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 91504.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 91504.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 91504.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 91504.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 91504.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 91504.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91504.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91504.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91504.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91504.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c410]
>[ 91504.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c410] width 2880 pitch 11520 (/4 2880)
>[ 91504.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91504.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91504.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c410]
>[ 91504.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c410] width 2880 pitch 11520 (/4 2880)
>[ 91504.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 91504.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 91505.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91505.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91505.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91505.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91505.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91505.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91506.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 91506.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 91512.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91512.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91513.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91513.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91515.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c410]
>[ 91515.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c410] width 2880 pitch 11520 (/4 2880)
>[ 91515.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a1be0]
>[ 91515.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a1be0] width 2880 pitch 11520 (/4 2880)
>[ 91516.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91516.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91516.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91516.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91516.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050b28]
>[ 91516.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050b28] width 2880 pitch 11520 (/4 2880)
>[ 91516.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91516.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91517.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c45e70]
>[ 91517.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c45e70] width 2880 pitch 11520 (/4 2880)
>[ 91517.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769620]
>[ 91517.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769620] width 2880 pitch 11520 (/4 2880)
>[ 91517.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91517.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91517.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 91517.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 91518.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91518.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91518.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 91518.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 91518.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91518.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91518.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91519.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91519.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c45e70]
>[ 91519.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c45e70] width 2880 pitch 11520 (/4 2880)
>[ 91519.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769620]
>[ 91519.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769620] width 2880 pitch 11520 (/4 2880)
>[ 91525.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769620]
>[ 91525.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769620] width 2880 pitch 11520 (/4 2880)
>[ 91532.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75d68]
>[ 91532.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75d68] width 2880 pitch 11520 (/4 2880)
>[ 91532.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 91532.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 91532.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 91532.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 91532.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c410]
>[ 91532.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c410] width 2880 pitch 11520 (/4 2880)
>[ 91532.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c95c28]
>[ 91532.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c95c28] width 2880 pitch 11520 (/4 2880)
>[ 91532.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 91532.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 91533.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1052a8]
>[ 91533.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1052a8] width 2880 pitch 11520 (/4 2880)
>[ 91533.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 91533.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 91533.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91533.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91538.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 91538.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 91539.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66ac8]
>[ 91539.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66ac8] width 2880 pitch 11520 (/4 2880)
>[ 91539.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91539.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91539.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91539.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91539.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91539.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91539.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1560d8]
>[ 91539.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1560d8] width 2880 pitch 11520 (/4 2880)
>[ 91539.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050b28]
>[ 91539.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050b28] width 2880 pitch 11520 (/4 2880)
>[ 91539.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97da408]
>[ 91539.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97da408] width 2880 pitch 11520 (/4 2880)
>[ 91539.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 91539.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 91539.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 91539.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 91543.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 91543.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 91543.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050b28]
>[ 91543.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050b28] width 2880 pitch 11520 (/4 2880)
>[ 91543.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 91543.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 91543.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 91543.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 91543.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 91543.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 91543.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 91543.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 91543.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050b28]
>[ 91543.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050b28] width 2880 pitch 11520 (/4 2880)
>[ 91543.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 91543.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 91543.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977f140]
>[ 91543.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977f140] width 2880 pitch 11520 (/4 2880)
>[ 91543.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 91543.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 91545.441] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 91545.441] (II) RADEON(0): Using hsync ranges from config file
>[ 91545.441] (II) RADEON(0): Using vrefresh ranges from config file
>[ 91545.441] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 91545.441] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 91545.441] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 91545.441] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 91545.442] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 91545.442] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 91545.442] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 91545.442] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 91545.442] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 92235.732] (II) RADEON(0): RADEONSaveScreen(2)
>[ 92235.736] (II) RADEON(0): RADEONSaveScreen(0)
>[ 93134.251] (II) RADEON(0): RADEONSaveScreen(1)
>[ 93144.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 93144.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 93145.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 93145.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 93145.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93145.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93145.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93145.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93145.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9bb8]
>[ 93145.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9bb8] width 2880 pitch 11520 (/4 2880)
>[ 93145.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 93145.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 93145.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9769620]
>[ 93145.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9769620] width 2880 pitch 11520 (/4 2880)
>[ 93145.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9438d28]
>[ 93145.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9438d28] width 2880 pitch 11520 (/4 2880)
>[ 93147.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 93147.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 93147.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcc58]
>[ 93147.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcc58] width 2880 pitch 11520 (/4 2880)
>[ 93147.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833ab0]
>[ 93147.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833ab0] width 2880 pitch 11520 (/4 2880)
>[ 93148.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 93148.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 93148.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93148.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93148.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21bec0]
>[ 93148.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21bec0] width 2880 pitch 11520 (/4 2880)
>[ 93148.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93148.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93150.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 93150.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 93150.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93150.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93151.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93151.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93151.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9833ab0]
>[ 93151.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9833ab0] width 2880 pitch 11520 (/4 2880)
>[ 93152.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93152.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93152.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 93152.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 93152.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93152.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93152.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cce018]
>[ 93152.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cce018] width 2880 pitch 11520 (/4 2880)
>[ 93152.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93152.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93152.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1052a8]
>[ 93152.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1052a8] width 2880 pitch 11520 (/4 2880)
>[ 93167.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93167.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93171.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93171.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93179.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93179.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93179.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93179.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93179.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93179.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93179.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f8ec0]
>[ 93179.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f8ec0] width 2880 pitch 11520 (/4 2880)
>[ 93179.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93179.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93183.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93183.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93183.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa35f308]
>[ 93183.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa35f308] width 2880 pitch 11520 (/4 2880)
>[ 93183.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93183.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93183.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 93183.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 93183.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 93183.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 93183.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93183.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93183.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93183.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93183.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93183.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93183.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93183.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93183.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d21f0]
>[ 93183.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d21f0] width 2880 pitch 11520 (/4 2880)
>[ 93183.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93183.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93183.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93183.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93183.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93183.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93184.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93184.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93184.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93184.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93184.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93184.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93184.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93184.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93184.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93184.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93184.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93184.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93184.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93184.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93184.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93184.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93184.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f8ec0]
>[ 93184.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f8ec0] width 2880 pitch 11520 (/4 2880)
>[ 93184.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93184.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f8ec0]
>[ 93184.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f8ec0] width 2880 pitch 11520 (/4 2880)
>[ 93184.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93184.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93191.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af0688]
>[ 93191.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af0688] width 2880 pitch 11520 (/4 2880)
>[ 93193.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f8ec0]
>[ 93193.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f8ec0] width 2880 pitch 11520 (/4 2880)
>[ 93199.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f8ec0]
>[ 93199.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f8ec0] width 2880 pitch 11520 (/4 2880)
>[ 93204.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0df6e0]
>[ 93204.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0df6e0] width 2880 pitch 11520 (/4 2880)
>[ 93239.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93239.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93239.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93239.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93239.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93239.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93239.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93239.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93239.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93239.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93239.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93239.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93239.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93239.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93239.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93239.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93239.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93239.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93239.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93239.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93239.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93239.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93239.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93239.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93239.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93239.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93240.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93240.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93240.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93240.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93240.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93240.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93240.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93240.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93240.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93240.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93240.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93240.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93240.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93240.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93240.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93240.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93240.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93240.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93240.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93240.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93240.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93240.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93240.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93241.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93241.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93241.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93243.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93243.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93243.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93243.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93243.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93243.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93243.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93243.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93243.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93243.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93243.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93243.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93243.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93243.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93243.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93243.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93243.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93243.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93243.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93243.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93243.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93243.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93243.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93243.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93243.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93243.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93243.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93243.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93243.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93243.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93243.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93243.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93244.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93244.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93244.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93244.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93244.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93244.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93244.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93244.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93244.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93244.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93244.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93244.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93244.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93244.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93244.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93244.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93244.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93244.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93244.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93244.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93244.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93244.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93244.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93244.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93244.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93244.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93244.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93244.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93244.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93244.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93244.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93244.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93244.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93244.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93244.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93244.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93244.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93244.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93244.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93244.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93245.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93245.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93245.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a95490]
>[ 93245.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a95490] width 2880 pitch 11520 (/4 2880)
>[ 93245.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93245.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93245.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93245.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93246.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93246.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93246.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93246.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93246.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93246.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93248.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93248.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93248.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93248.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93248.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93248.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93248.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93248.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93248.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93248.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93248.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93248.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93248.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93248.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93251.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93251.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93253.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93253.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93253.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93253.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93253.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93253.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93261.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93261.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93263.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93263.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93273.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93273.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93275.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93275.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93275.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93275.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93276.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93276.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93276.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93276.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93276.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93276.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93276.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93276.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93276.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93276.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93277.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93277.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93277.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93277.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93277.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93277.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93277.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93277.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93277.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93277.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93278.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93278.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93278.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93278.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93278.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93278.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93278.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93278.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93279.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93279.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93314.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93314.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93315.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93315.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93315.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93315.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93315.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93315.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93315.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93315.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93315.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93315.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93315.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93315.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93315.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93315.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93315.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93315.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93315.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93315.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93315.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93316.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93316.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93316.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93316.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93316.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93316.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93316.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93324.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93324.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93324.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93324.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93324.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93324.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93324.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93324.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93324.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93324.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93324.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ca08]
>[ 93324.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ca08] width 2880 pitch 11520 (/4 2880)
>[ 93324.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93324.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93324.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ca08]
>[ 93324.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ca08] width 2880 pitch 11520 (/4 2880)
>[ 93324.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93324.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93324.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93324.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93324.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93324.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93341.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93341.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93341.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93341.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93341.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93341.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93341.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93341.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93341.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93341.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93341.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93341.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93341.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93341.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93341.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93341.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93341.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93341.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93341.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93341.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93341.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93341.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93341.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93341.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93341.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93341.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93341.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c808]
>[ 93342.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c808] width 2880 pitch 11520 (/4 2880)
>[ 93342.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93342.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93342.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93342.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93342.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ca08]
>[ 93342.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ca08] width 2880 pitch 11520 (/4 2880)
>[ 93342.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93342.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93347.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93347.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93347.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93347.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93347.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93347.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93347.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93347.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93347.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93347.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93347.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93347.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93347.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93347.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93347.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93347.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93347.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93348.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93348.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93348.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93348.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93348.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93348.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93348.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93348.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93348.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93348.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93348.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93348.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93348.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93348.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ca08]
>[ 93348.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ca08] width 2880 pitch 11520 (/4 2880)
>[ 93348.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93348.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93348.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c490]
>[ 93348.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c490] width 2880 pitch 11520 (/4 2880)
>[ 93348.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93348.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93348.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93348.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93348.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93348.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93348.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93348.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93348.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93348.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93348.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f41ee0]
>[ 93348.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f41ee0] width 2880 pitch 11520 (/4 2880)
>[ 93349.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93349.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93358.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93358.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93358.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971160]
>[ 93358.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971160] width 2880 pitch 11520 (/4 2880)
>[ 93358.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93358.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93358.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93358.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93358.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93358.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93358.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93358.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93358.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93358.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93358.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154890]
>[ 93358.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154890] width 2880 pitch 11520 (/4 2880)
>[ 93362.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93362.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93362.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93362.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93362.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93362.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93363.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93363.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93363.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93363.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93363.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93363.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93363.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93363.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93363.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93363.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93363.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93363.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93364.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93364.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93364.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93364.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93364.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93364.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93364.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93364.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93364.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93365.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93365.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93365.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93365.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93365.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93365.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93365.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93366.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93366.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93366.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93366.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93366.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93366.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93366.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93366.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93366.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93366.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93366.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93366.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93367.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93367.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93368.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b9820]
>[ 93368.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b9820] width 2880 pitch 11520 (/4 2880)
>[ 93368.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93368.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93368.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93368.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93368.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93368.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93368.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93368.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93368.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93368.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93368.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93368.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93368.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93368.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93368.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93368.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93368.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93368.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93368.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93368.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93368.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 93368.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 93368.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93368.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93368.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93368.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93368.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93368.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93368.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93368.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93368.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93368.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93368.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93368.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93368.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93369.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93369.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93369.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93369.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93369.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93369.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93369.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93369.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93369.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93388.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93388.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93388.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961300]
>[ 93388.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961300] width 2880 pitch 11520 (/4 2880)
>[ 93389.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93389.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93389.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93389.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93389.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21ca08]
>[ 93389.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21ca08] width 2880 pitch 11520 (/4 2880)
>[ 93390.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93390.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93390.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93390.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93390.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93390.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93390.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93390.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93390.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93390.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93390.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae89e0]
>[ 93390.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae89e0] width 2880 pitch 11520 (/4 2880)
>[ 93391.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93391.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93391.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93391.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93391.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93391.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93396.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93396.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93396.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93396.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93396.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93396.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93396.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93396.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93397.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d61350]
>[ 93397.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d61350] width 2880 pitch 11520 (/4 2880)
>[ 93397.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93397.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93397.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93397.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93397.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93397.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93397.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93397.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93397.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93398.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93398.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93398.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93398.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bdd40]
>[ 93398.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bdd40] width 2880 pitch 11520 (/4 2880)
>[ 93401.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93401.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93401.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93401.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93402.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93402.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93403.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93403.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93403.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961300]
>[ 93403.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961300] width 2880 pitch 11520 (/4 2880)
>[ 93403.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93403.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93403.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c0d0]
>[ 93403.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c0d0] width 2880 pitch 11520 (/4 2880)
>[ 93403.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9961300]
>[ 93403.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9961300] width 2880 pitch 11520 (/4 2880)
>[ 93419.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204a40]
>[ 93419.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204a40] width 2880 pitch 11520 (/4 2880)
>[ 93419.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcb290]
>[ 93419.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcb290] width 2880 pitch 11520 (/4 2880)
>[ 93420.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93420.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93420.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93420.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93420.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93420.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93420.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcb290]
>[ 93420.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcb290] width 2880 pitch 11520 (/4 2880)
>[ 93420.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93421.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93421.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c490]
>[ 93421.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c490] width 2880 pitch 11520 (/4 2880)
>[ 93421.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcb290]
>[ 93421.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcb290] width 2880 pitch 11520 (/4 2880)
>[ 93421.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c490]
>[ 93422.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c490] width 2880 pitch 11520 (/4 2880)
>[ 93424.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bfa8]
>[ 93424.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bfa8] width 2880 pitch 11520 (/4 2880)
>[ 93424.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a6e58]
>[ 93424.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a6e58] width 2880 pitch 11520 (/4 2880)
>[ 93425.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1885e8]
>[ 93425.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1885e8] width 2880 pitch 11520 (/4 2880)
>[ 93425.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365930]
>[ 93425.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365930] width 2880 pitch 11520 (/4 2880)
>[ 93426.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bfa8]
>[ 93426.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bfa8] width 2880 pitch 11520 (/4 2880)
>[ 93427.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93427.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93427.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7dc98]
>[ 93428.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7dc98] width 2880 pitch 11520 (/4 2880)
>[ 93428.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 93428.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 93432.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a6e58]
>[ 93432.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a6e58] width 2880 pitch 11520 (/4 2880)
>[ 93432.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5c490]
>[ 93432.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5c490] width 2880 pitch 11520 (/4 2880)
>[ 93433.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bfa8]
>[ 93433.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bfa8] width 2880 pitch 11520 (/4 2880)
>[ 93435.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcb290]
>[ 93435.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcb290] width 2880 pitch 11520 (/4 2880)
>[ 93442.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204a40]
>[ 93442.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204a40] width 2880 pitch 11520 (/4 2880)
>[ 93442.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bfa8]
>[ 93442.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bfa8] width 2880 pitch 11520 (/4 2880)
>[ 93442.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204a40]
>[ 93443.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204a40] width 2880 pitch 11520 (/4 2880)
>[ 93443.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4bfa8]
>[ 93443.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4bfa8] width 2880 pitch 11520 (/4 2880)
>[ 93443.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa204a40]
>[ 93443.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa204a40] width 2880 pitch 11520 (/4 2880)
>[ 93443.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8e348]
>[ 93443.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8e348] width 2880 pitch 11520 (/4 2880)
>[ 93479.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9e200]
>[ 93479.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9e200] width 2880 pitch 11520 (/4 2880)
>[ 93509.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f728]
>[ 93509.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f728] width 2880 pitch 11520 (/4 2880)
>[ 93509.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f9c0]
>[ 93509.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f9c0] width 2880 pitch 11520 (/4 2880)
>[ 93510.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f728]
>[ 93510.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f728] width 2880 pitch 11520 (/4 2880)
>[ 93510.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14f9c0]
>[ 93510.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14f9c0] width 2880 pitch 11520 (/4 2880)
>[ 93510.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f728]
>[ 93510.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f728] width 2880 pitch 11520 (/4 2880)
>[ 93510.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74da0]
>[ 93511.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74da0] width 2880 pitch 11520 (/4 2880)
>[ 93511.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324840]
>[ 93511.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324840] width 2880 pitch 11520 (/4 2880)
>[ 93511.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f728]
>[ 93511.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f728] width 2880 pitch 11520 (/4 2880)
>[ 93511.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa128160]
>[ 93511.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa128160] width 2880 pitch 11520 (/4 2880)
>[ 93511.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f728]
>[ 93511.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f728] width 2880 pitch 11520 (/4 2880)
>[ 93511.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa128160]
>[ 93511.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa128160] width 2880 pitch 11520 (/4 2880)
>[ 93512.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f040]
>[ 93512.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f040] width 2880 pitch 11520 (/4 2880)
>[ 93512.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d12930]
>[ 93512.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d12930] width 2880 pitch 11520 (/4 2880)
>[ 93513.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324840]
>[ 93513.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324840] width 2880 pitch 11520 (/4 2880)
>[ 93513.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 93513.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 93513.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93513.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93515.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93515.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93515.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93515.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93516.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93516.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93516.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93516.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93516.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93516.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93516.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93517.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93517.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93517.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93517.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93517.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93517.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93517.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93517.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93518.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93518.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93518.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93518.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93518.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93519.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93519.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93519.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93519.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93519.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93519.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93520.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93520.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93521.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93521.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93521.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93521.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93521.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[ 93521.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[ 93521.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93521.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93528.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93528.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93546.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031e88]
>[ 93546.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031e88] width 2880 pitch 11520 (/4 2880)
>[ 93556.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93556.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93560.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93560.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93560.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c5f8]
>[ 93560.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c5f8] width 2880 pitch 11520 (/4 2880)
>[ 93560.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93560.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93560.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93560.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93560.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93560.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93560.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93561.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93561.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93561.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93561.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93561.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93561.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93561.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93561.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93561.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93561.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93561.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93607.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93607.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93607.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93607.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93607.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93607.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93607.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93607.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93607.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93607.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93608.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93608.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93608.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93608.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93608.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93608.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93609.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93609.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93609.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93609.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93609.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93610.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93610.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93610.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93610.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93610.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93610.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93610.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93615.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93615.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93617.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93617.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93624.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93624.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93625.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93625.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93625.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93625.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93625.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93625.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93625.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93625.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93625.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93625.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93626.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93626.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93626.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93626.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93626.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93626.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93626.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93626.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93626.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93626.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93627.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93627.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93628.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93628.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93628.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93628.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93628.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93628.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93628.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93628.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93628.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93629.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93646.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93646.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93646.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93646.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93647.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93647.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93647.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93647.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93647.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93647.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93647.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93647.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93647.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93647.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93647.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93648.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93648.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93648.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93648.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93648.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93648.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93648.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93648.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93648.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93648.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93649.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93649.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93649.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93649.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93649.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93649.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93649.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93649.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93649.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93649.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93649.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93651.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3247d0]
>[ 93651.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3247d0] width 2880 pitch 11520 (/4 2880)
>[ 93651.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159648]
>[ 93651.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159648] width 2880 pitch 11520 (/4 2880)
>[ 93651.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93651.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93651.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93652.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93652.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93652.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93652.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93652.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93652.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93652.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93652.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bd040]
>[ 93652.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bd040] width 2880 pitch 11520 (/4 2880)
>[ 93653.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93653.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93653.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93653.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93653.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93653.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93653.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93653.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93653.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93653.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93660.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93660.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93660.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93660.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93660.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95d5658]
>[ 93660.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95d5658] width 2880 pitch 11520 (/4 2880)
>[ 93660.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93660.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93660.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93660.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93661.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 93661.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 93661.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93661.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93661.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93661.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93661.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93661.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93661.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de99e8]
>[ 93661.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de99e8] width 2880 pitch 11520 (/4 2880)
>[ 93661.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93661.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93663.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93663.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93665.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93665.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93665.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b476e0]
>[ 93665.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b476e0] width 2880 pitch 11520 (/4 2880)
>[ 93666.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93666.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93666.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93666.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93666.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93666.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93666.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93666.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93667.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93667.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93667.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93667.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93668.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93668.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93668.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93668.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93668.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93668.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93668.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93668.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93668.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93668.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93675.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93675.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93676.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93676.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93694.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bb7a0]
>[ 93694.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bb7a0] width 2880 pitch 11520 (/4 2880)
>[ 93694.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93694.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93694.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93694.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93694.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93694.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93694.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1169d8]
>[ 93694.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1169d8] width 2880 pitch 11520 (/4 2880)
>[ 93694.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93695.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93695.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93695.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93695.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93695.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93696.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa159b38]
>[ 93696.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa159b38] width 2880 pitch 11520 (/4 2880)
>[ 93696.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93696.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93696.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93696.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93696.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93696.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93696.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9768b00]
>[ 93697.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9768b00] width 2880 pitch 11520 (/4 2880)
>[ 93697.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a69e0]
>[ 93697.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a69e0] width 2880 pitch 11520 (/4 2880)
>[ 93721.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9580d28]
>[ 93721.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9580d28] width 2880 pitch 11520 (/4 2880)
>[ 93721.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9668218]
>[ 93721.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9668218] width 2880 pitch 11520 (/4 2880)
>[ 93721.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c498c0]
>[ 93721.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c498c0] width 2880 pitch 11520 (/4 2880)
>[ 93721.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c498c0]
>[ 93721.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c498c0] width 2880 pitch 11520 (/4 2880)
>[ 93724.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210778]
>[ 93724.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210778] width 2880 pitch 11520 (/4 2880)
>[ 93724.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22e6b0]
>[ 93724.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22e6b0] width 2880 pitch 11520 (/4 2880)
>[ 93724.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14c3c0]
>[ 93724.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14c3c0] width 2880 pitch 11520 (/4 2880)
>[ 93724.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93724.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93724.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93724.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93726.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93726.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93726.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36b3f0]
>[ 93726.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36b3f0] width 2880 pitch 11520 (/4 2880)
>[ 93727.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36b3f0]
>[ 93727.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36b3f0] width 2880 pitch 11520 (/4 2880)
>[ 93727.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93727.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93727.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93727.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93727.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93728.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93728.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93728.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93728.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93728.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93729.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93729.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93729.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93729.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93729.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93729.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93729.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93729.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93729.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93729.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93729.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93729.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93729.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93730.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93730.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93730.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93730.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93730.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93731.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93731.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93731.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f048]
>[ 93731.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f048] width 2880 pitch 11520 (/4 2880)
>[ 93731.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93731.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93731.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93731.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93737.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f048]
>[ 93737.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f048] width 2880 pitch 11520 (/4 2880)
>[ 93739.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22e190]
>[ 93740.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22e190] width 2880 pitch 11520 (/4 2880)
>[ 93751.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93751.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93751.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93751.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93751.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93751.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93751.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f048]
>[ 93751.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f048] width 2880 pitch 11520 (/4 2880)
>[ 93751.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93751.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93751.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56e48]
>[ 93751.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56e48] width 2880 pitch 11520 (/4 2880)
>[ 93752.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93752.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93752.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93752.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93752.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93752.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93752.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93752.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93753.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 93753.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 93753.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f048]
>[ 93753.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f048] width 2880 pitch 11520 (/4 2880)
>[ 93753.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93753.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93753.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f048]
>[ 93753.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f048] width 2880 pitch 11520 (/4 2880)
>[ 93753.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cadce0]
>[ 93753.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cadce0] width 2880 pitch 11520 (/4 2880)
>[ 93781.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99559a0]
>[ 93781.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99559a0] width 2880 pitch 11520 (/4 2880)
>[ 93781.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93781.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93781.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99fe490]
>[ 93781.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99fe490] width 2880 pitch 11520 (/4 2880)
>[ 93784.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa48]
>[ 93784.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa48] width 2880 pitch 11520 (/4 2880)
>[ 93784.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324b08]
>[ 93784.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324b08] width 2880 pitch 11520 (/4 2880)
>[ 93784.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93784.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93784.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324b08]
>[ 93784.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324b08] width 2880 pitch 11520 (/4 2880)
>[ 93784.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa154608]
>[ 93784.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa154608] width 2880 pitch 11520 (/4 2880)
>[ 93840.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa166510]
>[ 93840.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa166510] width 2880 pitch 11520 (/4 2880)
>[ 93840.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95810b8]
>[ 93840.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95810b8] width 2880 pitch 11520 (/4 2880)
>[ 93840.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1647e0]
>[ 93840.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1647e0] width 2880 pitch 11520 (/4 2880)
>[ 93840.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210610]
>[ 93840.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210610] width 2880 pitch 11520 (/4 2880)
>[ 93841.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93841.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93841.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93841.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 93845.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 93845.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56dc0]
>[ 93845.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56dc0] width 2880 pitch 11520 (/4 2880)
>[ 93845.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95981b8]
>[ 93845.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95981b8] width 2880 pitch 11520 (/4 2880)
>[ 93845.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56dc0]
>[ 93845.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56dc0] width 2880 pitch 11520 (/4 2880)
>[ 93845.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56dc0]
>[ 93845.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56dc0] width 2880 pitch 11520 (/4 2880)
>[ 93845.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93845.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93845.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97689f8]
>[ 93845.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97689f8] width 2880 pitch 11520 (/4 2880)
>[ 93845.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa210610]
>[ 93846.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa210610] width 2880 pitch 11520 (/4 2880)
>[ 93846.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83a10]
>[ 93846.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83a10] width 2880 pitch 11520 (/4 2880)
>[ 93867.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f718]
>[ 93867.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f718] width 2880 pitch 11520 (/4 2880)
>[ 93867.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f718]
>[ 93867.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f718] width 2880 pitch 11520 (/4 2880)
>[ 93869.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9970e50]
>[ 93869.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9970e50] width 2880 pitch 11520 (/4 2880)
>[ 93881.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcadc8]
>[ 93881.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcadc8] width 2880 pitch 11520 (/4 2880)
>[ 93882.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc7288]
>[ 93882.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc7288] width 2880 pitch 11520 (/4 2880)
>[ 93882.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93882.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93882.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096890]
>[ 93882.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096890] width 2880 pitch 11520 (/4 2880)
>[ 93882.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93882.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93883.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096890]
>[ 93883.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096890] width 2880 pitch 11520 (/4 2880)
>[ 93883.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93883.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93883.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93883.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93883.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 93883.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 93883.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93883.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93883.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 93883.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 93883.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93883.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93883.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93884.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93884.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93884.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93884.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93884.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93884.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93884.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93884.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297ba8]
>[ 93884.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297ba8] width 2880 pitch 11520 (/4 2880)
>[ 93884.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93884.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93884.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297ba8]
>[ 93884.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297ba8] width 2880 pitch 11520 (/4 2880)
>[ 93884.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961c9e0]
>[ 93884.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961c9e0] width 2880 pitch 11520 (/4 2880)
>[ 93885.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31e0d8]
>[ 93885.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31e0d8] width 2880 pitch 11520 (/4 2880)
>[ 93885.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 93885.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 93885.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 93885.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 93886.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93886.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93886.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93886.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93886.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93886.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93886.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93886.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93886.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93886.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93886.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31e0d8]
>[ 93886.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31e0d8] width 2880 pitch 11520 (/4 2880)
>[ 93886.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93886.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9572d78]
>[ 93887.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9572d78] width 2880 pitch 11520 (/4 2880)
>[ 93887.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e83ac0]
>[ 93887.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e83ac0] width 2880 pitch 11520 (/4 2880)
>[ 93887.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d882f0]
>[ 93887.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d882f0] width 2880 pitch 11520 (/4 2880)
>[ 93887.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93887.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93887.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dcaa18]
>[ 93887.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dcaa18] width 2880 pitch 11520 (/4 2880)
>[ 93887.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9572d78]
>[ 93887.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9572d78] width 2880 pitch 11520 (/4 2880)
>[ 93887.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9deb4d8]
>[ 93887.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9deb4d8] width 2880 pitch 11520 (/4 2880)
>[ 93887.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93887.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93887.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93887.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93887.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93887.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93887.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f25170]
>[ 93887.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f25170] width 2880 pitch 11520 (/4 2880)
>[ 93887.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 93887.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 93887.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93887.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d2970]
>[ 93887.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d2970] width 2880 pitch 11520 (/4 2880)
>[ 93887.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9986990]
>[ 93887.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9986990] width 2880 pitch 11520 (/4 2880)
>[ 93899.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93da4b8]
>[ 93899.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93da4b8] width 2880 pitch 11520 (/4 2880)
>[ 93899.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93899.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93899.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23170]
>[ 93900.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23170] width 2880 pitch 11520 (/4 2880)
>[ 93900.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167828]
>[ 93900.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167828] width 2880 pitch 11520 (/4 2880)
>[ 93904.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x985a860]
>[ 93904.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x985a860] width 2880 pitch 11520 (/4 2880)
>[ 93904.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48778]
>[ 93904.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48778] width 2880 pitch 11520 (/4 2880)
>[ 93904.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93904.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93904.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[ 93904.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[ 93904.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292a80]
>[ 93904.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292a80] width 2880 pitch 11520 (/4 2880)
>[ 93904.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b91950]
>[ 93904.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b91950] width 2880 pitch 11520 (/4 2880)
>[ 93904.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93904.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93904.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[ 93904.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[ 93904.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292a80]
>[ 93904.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292a80] width 2880 pitch 11520 (/4 2880)
>[ 93904.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa181210]
>[ 93904.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa181210] width 2880 pitch 11520 (/4 2880)
>[ 93904.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x985a860]
>[ 93904.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x985a860] width 2880 pitch 11520 (/4 2880)
>[ 93904.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819840]
>[ 93904.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819840] width 2880 pitch 11520 (/4 2880)
>[ 93904.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819840]
>[ 93904.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819840] width 2880 pitch 11520 (/4 2880)
>[ 93905.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1642e8]
>[ 93905.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1642e8] width 2880 pitch 11520 (/4 2880)
>[ 93905.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b91950]
>[ 93905.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b91950] width 2880 pitch 11520 (/4 2880)
>[ 93905.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93905.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93905.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa325a60]
>[ 93905.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa325a60] width 2880 pitch 11520 (/4 2880)
>[ 93905.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1642e8]
>[ 93905.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1642e8] width 2880 pitch 11520 (/4 2880)
>[ 93905.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b91950]
>[ 93905.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b91950] width 2880 pitch 11520 (/4 2880)
>[ 93905.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1642e8]
>[ 93905.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1642e8] width 2880 pitch 11520 (/4 2880)
>[ 93905.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b91950]
>[ 93905.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b91950] width 2880 pitch 11520 (/4 2880)
>[ 93934.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297a20]
>[ 93934.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297a20] width 2880 pitch 11520 (/4 2880)
>[ 93935.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93935.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93935.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 93935.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 93936.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93936.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93936.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 93936.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 93936.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197288]
>[ 93936.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197288] width 2880 pitch 11520 (/4 2880)
>[ 93936.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 93936.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 93937.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197288]
>[ 93937.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197288] width 2880 pitch 11520 (/4 2880)
>[ 93937.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297a20]
>[ 93937.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297a20] width 2880 pitch 11520 (/4 2880)
>[ 93937.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa197288]
>[ 93937.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa197288] width 2880 pitch 11520 (/4 2880)
>[ 93937.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 93937.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 93937.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 93937.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 93937.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93937.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93938.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 93938.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 93938.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93938.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93938.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 93938.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 93938.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[ 93938.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[ 93953.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef7e0]
>[ 93953.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef7e0] width 2880 pitch 11520 (/4 2880)
>[ 93960.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 93960.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 93960.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93960.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93960.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a90]
>[ 93960.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a90] width 2880 pitch 11520 (/4 2880)
>[ 93960.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 93960.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 93960.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd498]
>[ 93960.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd498] width 2880 pitch 11520 (/4 2880)
>[ 93960.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93960.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93960.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28deb0]
>[ 93960.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28deb0] width 2880 pitch 11520 (/4 2880)
>[ 93961.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa18a600]
>[ 93961.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa18a600] width 2880 pitch 11520 (/4 2880)
>[ 93961.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28deb0]
>[ 93961.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28deb0] width 2880 pitch 11520 (/4 2880)
>[ 93961.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041f68]
>[ 93961.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041f68] width 2880 pitch 11520 (/4 2880)
>[ 93961.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef7e0]
>[ 93961.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef7e0] width 2880 pitch 11520 (/4 2880)
>[ 93961.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93961.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93967.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93967.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93967.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9554dd0]
>[ 93967.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9554dd0] width 2880 pitch 11520 (/4 2880)
>[ 93967.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93967.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93967.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a90]
>[ 93967.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a90] width 2880 pitch 11520 (/4 2880)
>[ 93967.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 93967.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 93970.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1df848]
>[ 93970.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1df848] width 2880 pitch 11520 (/4 2880)
>[ 93975.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93975.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93975.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93975.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93975.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93975.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93976.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93976.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93976.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93976.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93976.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93976.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93976.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370788]
>[ 93976.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370788] width 2880 pitch 11520 (/4 2880)
>[ 93976.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93976.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93976.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93976.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93976.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93976.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93976.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93976.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93976.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93976.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93976.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93976.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93976.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 93976.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 93976.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93976.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93976.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 93976.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 93976.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93976.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93976.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93976.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93976.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 93976.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 93976.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93976.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93976.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93976.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93976.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93976.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93976.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93976.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93976.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93976.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93976.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93976.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93976.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93976.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93977.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93977.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93977.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93977.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93977.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93977.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93977.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93977.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93977.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93977.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93977.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93977.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93977.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93977.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93977.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93977.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93977.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93977.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93977.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93977.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93977.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93977.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93977.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 93977.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 93977.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93977.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93977.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93977.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93977.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 93977.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 93977.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93977.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93977.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 93977.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 93977.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93977.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93977.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93977.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93977.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93977.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93977.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93977.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93977.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93977.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93977.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93977.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93977.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93977.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93977.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29a510]
>[ 93977.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29a510] width 2880 pitch 11520 (/4 2880)
>[ 93977.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cac8]
>[ 93977.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cac8] width 2880 pitch 11520 (/4 2880)
>[ 93977.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93977.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93982.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93982.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93983.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93983.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93983.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d84b8]
>[ 93983.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d84b8] width 2880 pitch 11520 (/4 2880)
>[ 93984.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 93984.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 93984.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93984.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93984.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 93984.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 93984.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 93984.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 93986.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93986.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93986.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 93986.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 93986.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93986.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93986.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93987.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93987.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa292ac0]
>[ 93987.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa292ac0] width 2880 pitch 11520 (/4 2880)
>[ 93987.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93987.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93987.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93987.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 93997.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 93997.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94001.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 94001.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 94010.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94010.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94010.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a320]
>[ 94010.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a320] width 2880 pitch 11520 (/4 2880)
>[ 94010.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b808]
>[ 94010.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b808] width 2880 pitch 11520 (/4 2880)
>[ 94011.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94011.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94011.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94011.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94011.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94011.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94018.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94018.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94020.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa370a80]
>[ 94020.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa370a80] width 2880 pitch 11520 (/4 2880)
>[ 94020.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94020.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94020.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6a320]
>[ 94021.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6a320] width 2880 pitch 11520 (/4 2880)
>[ 94021.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94021.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94021.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94021.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94021.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94021.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94021.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94021.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94021.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94021.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94021.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94022.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94023.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94023.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94024.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94024.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94025.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94025.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94026.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94026.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94026.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94026.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94026.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94026.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94026.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94026.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94026.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94026.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94027.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94027.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94029.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94029.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94031.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94031.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94031.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94031.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94032.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94032.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94032.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94032.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94032.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94032.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94032.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94032.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94032.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a98900]
>[ 94032.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a98900] width 2880 pitch 11520 (/4 2880)
>[ 94032.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0940]
>[ 94032.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0940] width 2880 pitch 11520 (/4 2880)
>[ 94032.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94032.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eefb0]
>[ 94033.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eefb0] width 2880 pitch 11520 (/4 2880)
>[ 94033.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eefb0]
>[ 94033.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eefb0] width 2880 pitch 11520 (/4 2880)
>[ 94033.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94033.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94033.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95b48]
>[ 94033.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95b48] width 2880 pitch 11520 (/4 2880)
>[ 94033.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eefb0]
>[ 94033.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eefb0] width 2880 pitch 11520 (/4 2880)
>[ 94033.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95b48]
>[ 94033.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95b48] width 2880 pitch 11520 (/4 2880)
>[ 94033.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94033.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa294518]
>[ 94033.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa294518] width 2880 pitch 11520 (/4 2880)
>[ 94033.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94033.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94034.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98eefb0]
>[ 94034.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98eefb0] width 2880 pitch 11520 (/4 2880)
>[ 94037.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94037.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94037.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94037.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94037.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94037.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94037.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94037.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94037.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa00]
>[ 94037.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa00] width 2880 pitch 11520 (/4 2880)
>[ 94037.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94037.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94037.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761208]
>[ 94037.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761208] width 2880 pitch 11520 (/4 2880)
>[ 94037.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94037.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94037.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa00]
>[ 94037.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa00] width 2880 pitch 11520 (/4 2880)
>[ 94037.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94037.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94037.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa00]
>[ 94037.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa00] width 2880 pitch 11520 (/4 2880)
>[ 94037.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94037.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94037.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa00]
>[ 94037.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa00] width 2880 pitch 11520 (/4 2880)
>[ 94037.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c497f0]
>[ 94037.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c497f0] width 2880 pitch 11520 (/4 2880)
>[ 94038.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582a68]
>[ 94038.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582a68] width 2880 pitch 11520 (/4 2880)
>[ 94038.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582a68]
>[ 94038.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582a68] width 2880 pitch 11520 (/4 2880)
>[ 94038.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582a68]
>[ 94038.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582a68] width 2880 pitch 11520 (/4 2880)
>[ 94038.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94038.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94038.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94038.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94038.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94039.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94039.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94039.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94039.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94039.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94039.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94039.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94039.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94039.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94039.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94039.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94039.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94039.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaa88]
>[ 94039.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaa88] width 2880 pitch 11520 (/4 2880)
>[ 94039.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa239bb0]
>[ 94039.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa239bb0] width 2880 pitch 11520 (/4 2880)
>[ 94040.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94040.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94041.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94041.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94041.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94041.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94041.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94041.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94041.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94041.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94041.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94041.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94041.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94041.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94041.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94041.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94044.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94044.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94051.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94051.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94060.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94060.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94068.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a7d0]
>[ 94068.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a7d0] width 2880 pitch 11520 (/4 2880)
>[ 94068.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94068.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94068.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a7d0]
>[ 94068.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a7d0] width 2880 pitch 11520 (/4 2880)
>[ 94068.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94068.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94068.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94069.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94069.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f23278]
>[ 94069.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f23278] width 2880 pitch 11520 (/4 2880)
>[ 94069.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94069.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94069.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94069.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94069.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9966c20]
>[ 94069.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9966c20] width 2880 pitch 11520 (/4 2880)
>[ 94070.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94070.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94070.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94070.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94070.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94070.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94070.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94070.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94070.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94070.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94071.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27d270]
>[ 94071.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27d270] width 2880 pitch 11520 (/4 2880)
>[ 94072.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94072.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94072.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94072.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94072.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94072.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94072.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94072.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94072.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94072.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94072.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 94072.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 94072.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94072.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94073.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94073.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94073.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94073.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94073.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293788]
>[ 94073.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293788] width 2880 pitch 11520 (/4 2880)
>[ 94073.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94073.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94073.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94073.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94073.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94073.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94073.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bc08]
>[ 94073.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bc08] width 2880 pitch 11520 (/4 2880)
>[ 94074.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94074.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94080.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94080.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94081.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9e3c8]
>[ 94081.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9e3c8] width 2880 pitch 11520 (/4 2880)
>[ 94081.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94081.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94081.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94081.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94085.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94085.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94085.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94085.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94085.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374ec0]
>[ 94085.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374ec0] width 2880 pitch 11520 (/4 2880)
>[ 94085.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94085.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94085.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b810]
>[ 94085.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b810] width 2880 pitch 11520 (/4 2880)
>[ 94085.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5528]
>[ 94085.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5528] width 2880 pitch 11520 (/4 2880)
>[ 94085.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9caaa70]
>[ 94085.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9caaa70] width 2880 pitch 11520 (/4 2880)
>[ 94085.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582a68]
>[ 94085.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582a68] width 2880 pitch 11520 (/4 2880)
>[ 94085.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94085.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94085.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cdd8]
>[ 94085.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cdd8] width 2880 pitch 11520 (/4 2880)
>[ 94085.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 94085.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 94085.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943aa00]
>[ 94085.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943aa00] width 2880 pitch 11520 (/4 2880)
>[ 94085.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9582a68]
>[ 94085.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9582a68] width 2880 pitch 11520 (/4 2880)
>[ 94086.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94086.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94086.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0268a8]
>[ 94086.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0268a8] width 2880 pitch 11520 (/4 2880)
>[ 94086.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94086.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94086.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be660]
>[ 94086.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be660] width 2880 pitch 11520 (/4 2880)
>[ 94086.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94086.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94086.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be660]
>[ 94086.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be660] width 2880 pitch 11520 (/4 2880)
>[ 94086.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2984a8]
>[ 94086.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2984a8] width 2880 pitch 11520 (/4 2880)
>[ 94087.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374ec0]
>[ 94087.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374ec0] width 2880 pitch 11520 (/4 2880)
>[ 94087.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22d880]
>[ 94087.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22d880] width 2880 pitch 11520 (/4 2880)
>[ 94087.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1fda8]
>[ 94087.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1fda8] width 2880 pitch 11520 (/4 2880)
>[ 94087.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc4d60]
>[ 94087.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc4d60] width 2880 pitch 11520 (/4 2880)
>[ 94088.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94088.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94088.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94088.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94088.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94088.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94088.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94088.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94088.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94088.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94089.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa299a20]
>[ 94089.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa299a20] width 2880 pitch 11520 (/4 2880)
>[ 94089.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1928c0]
>[ 94089.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1928c0] width 2880 pitch 11520 (/4 2880)
>[ 94096.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94096.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94097.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94097.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94097.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94097.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94097.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94097.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94097.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9427b08]
>[ 94097.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9427b08] width 2880 pitch 11520 (/4 2880)
>[ 94097.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94097.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94097.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94097.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94097.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1af78]
>[ 94097.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1af78] width 2880 pitch 11520 (/4 2880)
>[ 94097.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5528]
>[ 94097.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5528] width 2880 pitch 11520 (/4 2880)
>[ 94097.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9427b08]
>[ 94097.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9427b08] width 2880 pitch 11520 (/4 2880)
>[ 94097.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94097.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94101.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94101.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94101.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5528]
>[ 94101.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5528] width 2880 pitch 11520 (/4 2880)
>[ 94101.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9427b08]
>[ 94101.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9427b08] width 2880 pitch 11520 (/4 2880)
>[ 94101.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94101.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94101.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5528]
>[ 94101.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5528] width 2880 pitch 11520 (/4 2880)
>[ 94101.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94101.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94101.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abe9b0]
>[ 94101.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abe9b0] width 2880 pitch 11520 (/4 2880)
>[ 94114.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5528]
>[ 94114.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5528] width 2880 pitch 11520 (/4 2880)
>[ 94114.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293790]
>[ 94114.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293790] width 2880 pitch 11520 (/4 2880)
>[ 94120.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94120.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94120.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94120.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94120.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94120.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94120.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94120.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94120.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94120.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94121.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94121.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94121.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94121.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94121.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94121.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94121.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293790]
>[ 94122.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293790] width 2880 pitch 11520 (/4 2880)
>[ 94122.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94122.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94122.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293790]
>[ 94122.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293790] width 2880 pitch 11520 (/4 2880)
>[ 94122.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94122.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94123.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94123.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94123.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94123.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94124.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5b70]
>[ 94124.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5b70] width 2880 pitch 11520 (/4 2880)
>[ 94124.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94124.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94124.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94124.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94124.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94124.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94128.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0368]
>[ 94128.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0368] width 2880 pitch 11520 (/4 2880)
>[ 94133.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94133.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94170.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94170.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94170.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c5d8]
>[ 94170.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c5d8] width 2880 pitch 11520 (/4 2880)
>[ 94170.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94170.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94170.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef718]
>[ 94170.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef718] width 2880 pitch 11520 (/4 2880)
>[ 94170.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94170.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94170.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94171.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94171.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94171.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94171.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94171.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94171.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94171.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94172.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94172.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94172.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94172.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94172.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94172.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94172.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94173.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94173.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94173.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94173.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94173.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94215.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94215.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94235.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c5af0]
>[ 94235.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c5af0] width 2880 pitch 11520 (/4 2880)
>[ 94235.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94235.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94235.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94235.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94235.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94236.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94236.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94236.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94236.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94236.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94236.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94236.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94236.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94236.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94236.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94236.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94236.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94236.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94237.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd39f0]
>[ 94237.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd39f0] width 2880 pitch 11520 (/4 2880)
>[ 94237.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94237.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94237.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94237.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94238.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a61ae8]
>[ 94238.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a61ae8] width 2880 pitch 11520 (/4 2880)
>[ 94238.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30640]
>[ 94238.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30640] width 2880 pitch 11520 (/4 2880)
>[ 94243.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94243.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94243.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94243.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94243.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94243.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94243.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94243.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94243.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94243.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94243.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94244.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94244.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94244.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94244.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94244.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94245.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94245.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94245.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94245.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94246.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94246.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94246.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f4488]
>[ 94246.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f4488] width 2880 pitch 11520 (/4 2880)
>[ 94246.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94246.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94246.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067ac8]
>[ 94246.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067ac8] width 2880 pitch 11520 (/4 2880)
>[ 94253.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94253.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94254.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94254.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94269.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94269.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94269.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94269.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94269.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94269.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94269.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94269.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94269.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94269.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94269.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94269.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94270.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94270.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94270.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94270.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94270.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94270.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94270.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94270.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94270.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94270.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94271.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94271.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94271.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94271.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94272.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94272.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94291.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94291.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94307.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94307.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94339.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94339.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94340.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94340.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94340.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94340.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94340.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94340.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94341.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94341.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94345.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94345.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94345.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94345.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94345.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94345.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94345.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94345.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94362.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94362.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94362.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94362.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94363.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94363.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94363.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94363.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94363.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94363.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94363.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94363.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94363.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94363.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94363.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94364.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94364.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94364.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94364.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94364.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94364.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94364.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94364.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94364.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94364.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94364.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94371.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94371.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94372.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94372.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94380.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94380.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94382.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94382.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94405.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94405.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94428.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94428.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94428.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94428.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94431.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cd08]
>[ 94431.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cd08] width 2880 pitch 11520 (/4 2880)
>[ 94431.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94431.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94431.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94431.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94437.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94438.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94438.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94438.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94441.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94441.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94441.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3678]
>[ 94441.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3678] width 2880 pitch 11520 (/4 2880)
>[ 94441.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3678]
>[ 94441.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3678] width 2880 pitch 11520 (/4 2880)
>[ 94441.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94441.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94441.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94441.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94441.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94441.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94441.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94441.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94441.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94441.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94441.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94441.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53668]
>[ 94441.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53668] width 2880 pitch 11520 (/4 2880)
>[ 94465.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94465.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94476.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94476.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94477.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94477.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94477.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94477.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94477.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94477.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94477.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94477.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94478.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94478.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94478.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94479.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94479.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9787e50]
>[ 94479.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9787e50] width 2880 pitch 11520 (/4 2880)
>[ 94479.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94479.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94479.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94479.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94479.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94479.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94479.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0cb0]
>[ 94479.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0cb0] width 2880 pitch 11520 (/4 2880)
>[ 94482.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94482.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94482.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94482.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94482.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0cb0]
>[ 94482.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0cb0] width 2880 pitch 11520 (/4 2880)
>[ 94482.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94482.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94482.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0cb0]
>[ 94482.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0cb0] width 2880 pitch 11520 (/4 2880)
>[ 94483.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94483.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94483.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0cb0]
>[ 94483.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0cb0] width 2880 pitch 11520 (/4 2880)
>[ 94484.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94484.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94484.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94484.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94484.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94484.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94484.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94484.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94500.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94500.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94500.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94500.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94500.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3d80]
>[ 94500.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3d80] width 2880 pitch 11520 (/4 2880)
>[ 94500.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94500.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94500.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0690]
>[ 94500.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0690] width 2880 pitch 11520 (/4 2880)
>[ 94500.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99661a0]
>[ 94500.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99661a0] width 2880 pitch 11520 (/4 2880)
>[ 94500.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3d80]
>[ 94500.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3d80] width 2880 pitch 11520 (/4 2880)
>[ 94500.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94500.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94500.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb7838]
>[ 94500.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb7838] width 2880 pitch 11520 (/4 2880)
>[ 94500.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297618]
>[ 94500.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297618] width 2880 pitch 11520 (/4 2880)
>[ 94500.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99661a0]
>[ 94500.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99661a0] width 2880 pitch 11520 (/4 2880)
>[ 94500.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3d80]
>[ 94500.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3d80] width 2880 pitch 11520 (/4 2880)
>[ 94500.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94500.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94502.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db57f0]
>[ 94502.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db57f0] width 2880 pitch 11520 (/4 2880)
>[ 94503.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3d80]
>[ 94503.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3d80] width 2880 pitch 11520 (/4 2880)
>[ 94503.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c46d0]
>[ 94503.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c46d0] width 2880 pitch 11520 (/4 2880)
>[ 94503.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd8cd0]
>[ 94503.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd8cd0] width 2880 pitch 11520 (/4 2880)
>[ 94503.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a2b810]
>[ 94503.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a2b810] width 2880 pitch 11520 (/4 2880)
>[ 94503.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94503.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94503.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3d80]
>[ 94503.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3d80] width 2880 pitch 11520 (/4 2880)
>[ 94505.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94505.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94505.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94505.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94505.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94505.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94506.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94506.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94506.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94506.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94506.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94506.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3b58]
>[ 94506.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3b58] width 2880 pitch 11520 (/4 2880)
>[ 94506.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94506.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94506.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94506.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94506.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94507.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94507.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94507.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94507.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94507.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94507.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94507.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94507.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94507.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94507.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94508.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94508.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94508.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94508.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94508.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94508.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94508.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94508.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94508.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94508.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94509.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94509.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94509.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94510.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94510.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94510.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94511.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94511.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94512.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94512.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94512.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943d000]
>[ 94512.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943d000] width 2880 pitch 11520 (/4 2880)
>[ 94512.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04d648]
>[ 94512.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04d648] width 2880 pitch 11520 (/4 2880)
>[ 94512.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94513.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94530.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef5c0]
>[ 94530.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef5c0] width 2880 pitch 11520 (/4 2880)
>[ 94530.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f28]
>[ 94530.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f28] width 2880 pitch 11520 (/4 2880)
>[ 94531.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94531.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94531.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94531.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94531.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94531.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94531.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94531.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94532.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94532.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94532.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d884a8]
>[ 94532.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d884a8] width 2880 pitch 11520 (/4 2880)
>[ 94532.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94532.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94532.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d884a8]
>[ 94532.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d884a8] width 2880 pitch 11520 (/4 2880)
>[ 94532.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94532.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94560.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f28]
>[ 94560.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f28] width 2880 pitch 11520 (/4 2880)
>[ 94560.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d884a8]
>[ 94560.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d884a8] width 2880 pitch 11520 (/4 2880)
>[ 94560.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94560.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94560.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d884a8]
>[ 94560.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d884a8] width 2880 pitch 11520 (/4 2880)
>[ 94560.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36f9d8]
>[ 94560.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36f9d8] width 2880 pitch 11520 (/4 2880)
>[ 94561.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97068d0]
>[ 94561.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97068d0] width 2880 pitch 11520 (/4 2880)
>[ 94561.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1be60]
>[ 94561.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1be60] width 2880 pitch 11520 (/4 2880)
>[ 94561.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1be60]
>[ 94561.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1be60] width 2880 pitch 11520 (/4 2880)
>[ 94562.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722bb8]
>[ 94562.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722bb8] width 2880 pitch 11520 (/4 2880)
>[ 94563.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722bb8]
>[ 94563.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722bb8] width 2880 pitch 11520 (/4 2880)
>[ 94564.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5100]
>[ 94564.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5100] width 2880 pitch 11520 (/4 2880)
>[ 94564.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94564.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94564.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9430f78]
>[ 94564.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9430f78] width 2880 pitch 11520 (/4 2880)
>[ 94564.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1be60]
>[ 94564.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1be60] width 2880 pitch 11520 (/4 2880)
>[ 94564.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5100]
>[ 94564.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5100] width 2880 pitch 11520 (/4 2880)
>[ 94564.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9722bb8]
>[ 94564.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9722bb8] width 2880 pitch 11520 (/4 2880)
>[ 94564.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d6c60]
>[ 94564.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d6c60] width 2880 pitch 11520 (/4 2880)
>[ 94579.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94579.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94580.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94580.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94580.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94580.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94580.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94580.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94580.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94580.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94581.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94581.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94581.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94581.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94581.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94581.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94582.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94582.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94582.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa287d70]
>[ 94582.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa287d70] width 2880 pitch 11520 (/4 2880)
>[ 94582.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94582.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94582.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94582.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94620.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94620.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94620.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94620.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94623.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d08a8]
>[ 94623.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d08a8] width 2880 pitch 11520 (/4 2880)
>[ 94623.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94623.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94624.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94624.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94624.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94624.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94624.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94624.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94624.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94624.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94624.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 94624.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 94624.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94624.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94624.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 94625.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 94625.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94625.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94625.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 94625.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 94625.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eec80]
>[ 94625.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eec80] width 2880 pitch 11520 (/4 2880)
>[ 94625.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 94625.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 94625.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94625.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94625.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94625.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94625.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94625.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94630.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e6c08]
>[ 94630.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e6c08] width 2880 pitch 11520 (/4 2880)
>[ 94630.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d08a8]
>[ 94630.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d08a8] width 2880 pitch 11520 (/4 2880)
>[ 94631.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94631.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94631.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94631.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94631.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94631.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94631.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94631.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94631.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94631.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94631.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94632.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94632.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94632.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94632.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94632.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94632.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94632.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94632.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7d0]
>[ 94633.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7d0] width 2880 pitch 11520 (/4 2880)
>[ 94633.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94633.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94633.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7d0]
>[ 94633.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7d0] width 2880 pitch 11520 (/4 2880)
>[ 94634.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94634.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94634.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94634.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94634.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94634.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94634.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94634.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94634.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94634.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94634.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94634.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94634.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94634.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94634.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94634.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94634.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eec80]
>[ 94634.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eec80] width 2880 pitch 11520 (/4 2880)
>[ 94635.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94635.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94635.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7d0]
>[ 94635.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7d0] width 2880 pitch 11520 (/4 2880)
>[ 94635.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94635.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94635.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eec80]
>[ 94635.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eec80] width 2880 pitch 11520 (/4 2880)
>[ 94635.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 94635.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 94635.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7d0]
>[ 94635.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7d0] width 2880 pitch 11520 (/4 2880)
>[ 94635.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94398e8]
>[ 94635.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94398e8] width 2880 pitch 11520 (/4 2880)
>[ 94635.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7d0]
>[ 94635.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7d0] width 2880 pitch 11520 (/4 2880)
>[ 94635.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94635.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94635.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94635.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94635.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94635.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94635.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94635.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94635.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94635.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94635.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94635.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94635.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94635.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94635.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94635.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[ 94635.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[ 94637.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b330]
>[ 94637.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b330] width 2880 pitch 11520 (/4 2880)
>[ 94641.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94641.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94643.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d08a8]
>[ 94643.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d08a8] width 2880 pitch 11520 (/4 2880)
>[ 94666.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94666.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94666.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94666.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94666.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94666.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94666.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94666.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94666.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca8f8]
>[ 94666.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca8f8] width 2880 pitch 11520 (/4 2880)
>[ 94667.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94667.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94668.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94668.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94669.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f788]
>[ 94669.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f788] width 2880 pitch 11520 (/4 2880)
>[ 94669.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1181e0]
>[ 94670.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1181e0] width 2880 pitch 11520 (/4 2880)
>[ 94672.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1a80]
>[ 94672.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1a80] width 2880 pitch 11520 (/4 2880)
>[ 94672.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94672.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94672.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 94672.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 94673.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94673.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94673.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 94673.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 94710.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 94710.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 94710.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b740]
>[ 94710.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b740] width 2880 pitch 11520 (/4 2880)
>[ 94710.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 94710.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 94710.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b740]
>[ 94710.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b740] width 2880 pitch 11520 (/4 2880)
>[ 94710.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 94710.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 94710.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1de8f8]
>[ 94710.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1de8f8] width 2880 pitch 11520 (/4 2880)
>[ 94710.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94711.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94711.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f788]
>[ 94711.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f788] width 2880 pitch 11520 (/4 2880)
>[ 94711.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94711.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94712.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1a80]
>[ 94712.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1a80] width 2880 pitch 11520 (/4 2880)
>[ 94712.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94712.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94712.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 94712.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 94712.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94712.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94712.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94712.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94713.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f788]
>[ 94713.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f788] width 2880 pitch 11520 (/4 2880)
>[ 94713.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 94713.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 94713.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94713.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94713.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 94713.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 94713.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94713.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94713.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94713.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94714.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94714.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94714.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94714.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94714.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94714.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94714.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ebf0]
>[ 94714.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ebf0] width 2880 pitch 11520 (/4 2880)
>[ 94715.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94715.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94715.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94715.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94715.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94715.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94715.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 94715.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 94740.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 94740.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 94740.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37b740]
>[ 94740.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37b740] width 2880 pitch 11520 (/4 2880)
>[ 94740.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f788]
>[ 94740.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f788] width 2880 pitch 11520 (/4 2880)
>[ 94740.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 94740.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 94740.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94740.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94740.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94740.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94740.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94740.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94740.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f788]
>[ 94740.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f788] width 2880 pitch 11520 (/4 2880)
>[ 94740.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95be6c8]
>[ 94740.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95be6c8] width 2880 pitch 11520 (/4 2880)
>[ 94744.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94744.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94744.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94744.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94744.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94744.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94744.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94744.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94744.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 94744.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 94744.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94744.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94744.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94744.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94744.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94744.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94744.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1022a8]
>[ 94744.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1022a8] width 2880 pitch 11520 (/4 2880)
>[ 94744.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1a80]
>[ 94744.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1a80] width 2880 pitch 11520 (/4 2880)
>[ 94744.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 94744.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 94744.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94744.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94744.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 94744.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 94745.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94745.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94745.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 94745.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 94745.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94745.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94745.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1022a8]
>[ 94745.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1022a8] width 2880 pitch 11520 (/4 2880)
>[ 94745.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94745.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94745.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1022a8]
>[ 94745.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1022a8] width 2880 pitch 11520 (/4 2880)
>[ 94799.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 94799.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 94799.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367e58]
>[ 94799.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367e58] width 2880 pitch 11520 (/4 2880)
>[ 94799.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 94799.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 94800.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1022a8]
>[ 94800.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1022a8] width 2880 pitch 11520 (/4 2880)
>[ 94800.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94800.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94800.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94800.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94800.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94800.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94801.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94801.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94802.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94802.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94802.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e3ee0]
>[ 94802.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e3ee0] width 2880 pitch 11520 (/4 2880)
>[ 94802.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94802.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94802.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 94802.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 94802.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94802.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94802.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1a80]
>[ 94802.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1a80] width 2880 pitch 11520 (/4 2880)
>[ 94802.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 94802.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 94802.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1a80]
>[ 94802.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1a80] width 2880 pitch 11520 (/4 2880)
>[ 94802.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 94802.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 94802.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94802.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94809.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94809.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94860.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e6c08]
>[ 94860.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e6c08] width 2880 pitch 11520 (/4 2880)
>[ 94860.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 94860.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 94860.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e6c08]
>[ 94861.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e6c08] width 2880 pitch 11520 (/4 2880)
>[ 94861.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 94861.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 94861.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94861.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 94861.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94861.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94861.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 94861.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 94861.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 94861.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 94861.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 94861.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 94861.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2940]
>[ 94861.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2940] width 2880 pitch 11520 (/4 2880)
>[ 94864.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1022a8]
>[ 94864.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1022a8] width 2880 pitch 11520 (/4 2880)
>[ 94864.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8c98]
>[ 94864.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8c98] width 2880 pitch 11520 (/4 2880)
>[ 94864.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94864.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94865.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94865.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94865.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2940]
>[ 94865.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2940] width 2880 pitch 11520 (/4 2880)
>[ 94865.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94865.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94921.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 94921.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 94921.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db57f0]
>[ 94921.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db57f0] width 2880 pitch 11520 (/4 2880)
>[ 94921.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 94921.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 94921.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94921.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94921.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b540]
>[ 94921.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b540] width 2880 pitch 11520 (/4 2880)
>[ 94921.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94921.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94921.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a4888]
>[ 94921.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a4888] width 2880 pitch 11520 (/4 2880)
>[ 94925.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca840]
>[ 94925.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca840] width 2880 pitch 11520 (/4 2880)
>[ 94925.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 94925.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 94925.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 94925.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 94925.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 94925.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 94925.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 94925.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 94925.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 94925.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 94925.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 94925.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 94925.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 94925.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 94925.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94925.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94925.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 94925.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 94925.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca780]
>[ 94925.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca780] width 2880 pitch 11520 (/4 2880)
>[ 94925.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2450d8]
>[ 94925.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2450d8] width 2880 pitch 11520 (/4 2880)
>[ 94926.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 94926.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 94926.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 94926.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 94926.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e6c08]
>[ 94926.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e6c08] width 2880 pitch 11520 (/4 2880)
>[ 94926.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94926.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94926.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 94926.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 94926.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 94926.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 94926.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2450d8]
>[ 94926.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2450d8] width 2880 pitch 11520 (/4 2880)
>[ 94926.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 94926.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 94926.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca840]
>[ 94926.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca840] width 2880 pitch 11520 (/4 2880)
>[ 94926.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 94926.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 94926.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca840]
>[ 94926.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca840] width 2880 pitch 11520 (/4 2880)
>[ 94926.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 94926.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 94926.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca840]
>[ 94926.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca840] width 2880 pitch 11520 (/4 2880)
>[ 94926.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 94926.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 95038.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95038.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95077.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95077.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95078.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95078.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95078.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95078.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95078.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95078.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95079.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95079.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95079.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 95079.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 95079.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95079.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95079.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95079.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95080.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95080.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95080.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4496b8]
>[ 95080.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4496b8] width 2880 pitch 11520 (/4 2880)
>[ 95081.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 95081.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 95081.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95081.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95082.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1070]
>[ 95082.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1070] width 2880 pitch 11520 (/4 2880)
>[ 95083.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95083.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95083.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95083.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95083.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95083.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95084.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95084.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95084.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95084.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95084.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95084.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95084.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95084.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95085.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95085.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95086.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95086.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95086.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95086.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95086.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95086.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95086.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95086.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95086.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95086.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95089.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eca780]
>[ 95089.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eca780] width 2880 pitch 11520 (/4 2880)
>[ 95097.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8c98]
>[ 95097.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8c98] width 2880 pitch 11520 (/4 2880)
>[ 95097.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95098.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95098.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95098.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95098.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 95098.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 95098.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95098.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95098.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95098.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95099.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95099.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95099.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95099.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95099.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95099.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95099.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95099.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95099.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4496b8]
>[ 95099.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4496b8] width 2880 pitch 11520 (/4 2880)
>[ 95099.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95100.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95100.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95100.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95100.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95100.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95100.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95100.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95100.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8c98]
>[ 95100.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8c98] width 2880 pitch 11520 (/4 2880)
>[ 95100.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95100.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95101.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95101.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95101.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95101.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95101.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95102.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95102.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95102.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95102.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95102.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95102.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f28]
>[ 95102.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f28] width 2880 pitch 11520 (/4 2880)
>[ 95102.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95102.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95102.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f28]
>[ 95102.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f28] width 2880 pitch 11520 (/4 2880)
>[ 95102.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95102.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95102.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f28]
>[ 95102.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f28] width 2880 pitch 11520 (/4 2880)
>[ 95102.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95102.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95109.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067680]
>[ 95109.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067680] width 2880 pitch 11520 (/4 2880)
>[ 95112.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95112.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95153.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95153.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95153.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4496b8]
>[ 95153.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4496b8] width 2880 pitch 11520 (/4 2880)
>[ 95154.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95154.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95154.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95154.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95154.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 95154.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 95154.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95154.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95155.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 95155.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 95155.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95155.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95155.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa318968]
>[ 95155.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa318968] width 2880 pitch 11520 (/4 2880)
>[ 95172.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8c98]
>[ 95172.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8c98] width 2880 pitch 11520 (/4 2880)
>[ 95173.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f2c0]
>[ 95173.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f2c0] width 2880 pitch 11520 (/4 2880)
>[ 95173.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95173.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95173.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f2c0]
>[ 95173.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f2c0] width 2880 pitch 11520 (/4 2880)
>[ 95173.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95173.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95192.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95192.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95192.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8c98]
>[ 95192.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8c98] width 2880 pitch 11520 (/4 2880)
>[ 95193.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95193.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95196.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95196.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95196.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95196.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95196.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95196.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95197.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95197.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95197.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95197.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95197.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac910]
>[ 95197.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac910] width 2880 pitch 11520 (/4 2880)
>[ 95197.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95197.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95204.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95204.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95204.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95204.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95205.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95205.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95205.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac910]
>[ 95205.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac910] width 2880 pitch 11520 (/4 2880)
>[ 95205.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95205.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95206.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95206.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95206.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95206.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95206.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95206.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95206.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 95206.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 95206.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ac910]
>[ 95206.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ac910] width 2880 pitch 11520 (/4 2880)
>[ 95207.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95207.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95209.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95209.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95209.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d08a8]
>[ 95209.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d08a8] width 2880 pitch 11520 (/4 2880)
>[ 95209.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d0f0]
>[ 95209.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d0f0] width 2880 pitch 11520 (/4 2880)
>[ 95209.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95209.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95262.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95262.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95262.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa173ce0]
>[ 95262.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa173ce0] width 2880 pitch 11520 (/4 2880)
>[ 95262.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a49e8]
>[ 95262.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a49e8] width 2880 pitch 11520 (/4 2880)
>[ 95262.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95262.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95262.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0088]
>[ 95262.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0088] width 2880 pitch 11520 (/4 2880)
>[ 95262.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0088]
>[ 95262.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0088] width 2880 pitch 11520 (/4 2880)
>[ 95262.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95262.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95262.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f260]
>[ 95262.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f260] width 2880 pitch 11520 (/4 2880)
>[ 95262.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95262.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95262.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e0f0]
>[ 95262.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e0f0] width 2880 pitch 11520 (/4 2880)
>[ 95262.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d40ff8]
>[ 95262.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d40ff8] width 2880 pitch 11520 (/4 2880)
>[ 95262.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e22d8]
>[ 95262.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e22d8] width 2880 pitch 11520 (/4 2880)
>[ 95262.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d40ff8]
>[ 95262.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d40ff8] width 2880 pitch 11520 (/4 2880)
>[ 95262.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95262.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95262.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e0f0]
>[ 95262.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e0f0] width 2880 pitch 11520 (/4 2880)
>[ 95262.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95262.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95262.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95262.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95262.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d60740]
>[ 95262.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d60740] width 2880 pitch 11520 (/4 2880)
>[ 95262.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e0f0]
>[ 95262.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e0f0] width 2880 pitch 11520 (/4 2880)
>[ 95262.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95262.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95262.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95262.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95263.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95263.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95263.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95263.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95263.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95263.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95263.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95263.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95263.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0088]
>[ 95263.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0088] width 2880 pitch 11520 (/4 2880)
>[ 95263.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95263.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95264.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95264.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95264.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0088]
>[ 95264.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0088] width 2880 pitch 11520 (/4 2880)
>[ 95264.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95264.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95264.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1e0f0]
>[ 95264.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1e0f0] width 2880 pitch 11520 (/4 2880)
>[ 95264.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95264.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95264.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95265.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95265.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0620]
>[ 95265.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0620] width 2880 pitch 11520 (/4 2880)
>[ 95265.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401dc8]
>[ 95265.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401dc8] width 2880 pitch 11520 (/4 2880)
>[ 95265.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95265.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95267.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95267.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95267.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95267.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95267.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95267.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95267.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95267.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95268.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95268.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95268.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95268.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95268.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95268.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95269.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95269.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95269.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401dc8]
>[ 95269.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401dc8] width 2880 pitch 11520 (/4 2880)
>[ 95269.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95270.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95270.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95270.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95270.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95270.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95270.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95270.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95272.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f26a0]
>[ 95272.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f26a0] width 2880 pitch 11520 (/4 2880)
>[ 95272.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95272.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95272.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95272.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95272.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401dc8]
>[ 95272.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401dc8] width 2880 pitch 11520 (/4 2880)
>[ 95279.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95279.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95279.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95279.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95279.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95279.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95279.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95279.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95279.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95279.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95279.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95279.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95279.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95279.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95279.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95279.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95279.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95279.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95279.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0629b8]
>[ 95279.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0629b8] width 2880 pitch 11520 (/4 2880)
>[ 95279.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95279.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95279.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95279.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95279.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95279.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95279.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2728]
>[ 95279.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2728] width 2880 pitch 11520 (/4 2880)
>[ 95283.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2538]
>[ 95283.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2538] width 2880 pitch 11520 (/4 2880)
>[ 95283.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95283.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95283.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4488]
>[ 95283.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4488] width 2880 pitch 11520 (/4 2880)
>[ 95283.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95283.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95283.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2538]
>[ 95283.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2538] width 2880 pitch 11520 (/4 2880)
>[ 95283.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95283.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95283.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4488]
>[ 95283.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4488] width 2880 pitch 11520 (/4 2880)
>[ 95283.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95283.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95283.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2538]
>[ 95283.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2538] width 2880 pitch 11520 (/4 2880)
>[ 95283.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95283.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95283.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4488]
>[ 95284.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4488] width 2880 pitch 11520 (/4 2880)
>[ 95284.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95284.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95285.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95285.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95285.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95285.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95285.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f0190]
>[ 95285.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f0190] width 2880 pitch 11520 (/4 2880)
>[ 95285.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c7c8]
>[ 95285.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c7c8] width 2880 pitch 11520 (/4 2880)
>[ 95285.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271918]
>[ 95285.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271918] width 2880 pitch 11520 (/4 2880)
>[ 95285.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95285.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95285.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95285.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95285.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95285.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95285.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95285.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95285.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95285.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95285.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95285.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95285.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95285.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95285.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95285.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95285.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e95e28]
>[ 95285.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e95e28] width 2880 pitch 11520 (/4 2880)
>[ 95289.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95289.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95291.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95291.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95291.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95291.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95291.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2728]
>[ 95291.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2728] width 2880 pitch 11520 (/4 2880)
>[ 95291.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95291.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95292.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95292.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95292.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95292.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95292.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95292.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95292.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95292.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95293.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95293.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95293.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95293.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95293.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95293.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95293.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95293.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95293.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95293.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95293.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95293.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95293.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95293.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95293.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95293.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95301.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4024b0]
>[ 95301.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4024b0] width 2880 pitch 11520 (/4 2880)
>[ 95301.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95301.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95301.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4024b0]
>[ 95301.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4024b0] width 2880 pitch 11520 (/4 2880)
>[ 95301.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95301.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95301.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4024b0]
>[ 95301.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4024b0] width 2880 pitch 11520 (/4 2880)
>[ 95301.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95301.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95301.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4024b0]
>[ 95301.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4024b0] width 2880 pitch 11520 (/4 2880)
>[ 95301.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95301.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95301.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95301.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95301.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95302.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95302.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95302.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95302.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95302.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95302.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95302.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95302.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95302.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95302.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95302.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95302.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95302.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95302.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95302.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95302.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95302.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95302.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95302.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95302.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95302.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95302.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95302.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95302.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95302.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95302.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95302.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95302.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95303.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95303.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95303.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95303.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95303.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95303.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95303.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95303.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95303.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95303.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95303.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95303.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95303.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95303.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95303.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95303.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95303.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95303.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95303.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3ad0]
>[ 95304.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3ad0] width 2880 pitch 11520 (/4 2880)
>[ 95304.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4496b8]
>[ 95304.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4496b8] width 2880 pitch 11520 (/4 2880)
>[ 95304.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95304.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95304.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95304.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95305.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2728]
>[ 95305.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2728] width 2880 pitch 11520 (/4 2880)
>[ 95305.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95305.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95305.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95305.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95307.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa242920]
>[ 95307.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa242920] width 2880 pitch 11520 (/4 2880)
>[ 95319.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95319.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95325.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95325.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95325.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95325.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95325.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95325.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95325.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95325.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95325.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95325.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95325.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95326.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95326.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95326.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95326.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95326.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95326.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95326.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95326.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95326.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95326.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95326.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95327.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95327.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95327.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95327.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95328.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95328.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95328.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4496b8]
>[ 95329.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4496b8] width 2880 pitch 11520 (/4 2880)
>[ 95329.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95329.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95329.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95329.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95329.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95329.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95333.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95333.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95333.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95333.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95333.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13aad8]
>[ 95333.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13aad8] width 2880 pitch 11520 (/4 2880)
>[ 95334.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95334.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95334.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13aad8]
>[ 95334.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13aad8] width 2880 pitch 11520 (/4 2880)
>[ 95334.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95334.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95334.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95335.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95335.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88248]
>[ 95335.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88248] width 2880 pitch 11520 (/4 2880)
>[ 95335.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95335.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95335.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13aad8]
>[ 95335.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13aad8] width 2880 pitch 11520 (/4 2880)
>[ 95335.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95335.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95335.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95335.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95335.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95335.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95445.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eab60]
>[ 95445.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eab60] width 2880 pitch 11520 (/4 2880)
>[ 95446.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95446.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95446.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ead90]
>[ 95446.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ead90] width 2880 pitch 11520 (/4 2880)
>[ 95446.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95446.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95446.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ead90]
>[ 95446.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ead90] width 2880 pitch 11520 (/4 2880)
>[ 95446.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95446.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95446.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eab60]
>[ 95446.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eab60] width 2880 pitch 11520 (/4 2880)
>[ 95446.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ead90]
>[ 95446.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ead90] width 2880 pitch 11520 (/4 2880)
>[ 95446.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95446.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95446.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95446.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95446.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95446.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95447.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201b88]
>[ 95447.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201b88] width 2880 pitch 11520 (/4 2880)
>[ 95447.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95447.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95448.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95448.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95448.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95448.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95448.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95448.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95451.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95451.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95459.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2728]
>[ 95459.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2728] width 2880 pitch 11520 (/4 2880)
>[ 95459.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95459.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95459.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fb1e0]
>[ 95459.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fb1e0] width 2880 pitch 11520 (/4 2880)
>[ 95459.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95459.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95463.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95463.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95463.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95463.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95463.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95463.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95463.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95463.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95463.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95464.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95464.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95464.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95464.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237a10]
>[ 95464.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237a10] width 2880 pitch 11520 (/4 2880)
>[ 95464.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95464.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95464.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95464.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95464.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95464.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95464.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95464.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95464.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95464.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95483.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95483.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95483.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95483.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95483.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95483.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95484.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95484.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95484.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95484.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95484.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95484.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95484.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95484.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95484.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95484.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95484.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa14c088]
>[ 95484.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa14c088] width 2880 pitch 11520 (/4 2880)
>[ 95485.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95485.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95485.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95485.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95486.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95486.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95486.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95486.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95487.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95487.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95487.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95487.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95487.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95487.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95487.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95487.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95487.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95487.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95487.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95487.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95487.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95487.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95487.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95487.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95487.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95487.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95487.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95487.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95493.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fc1c0]
>[ 95493.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fc1c0] width 2880 pitch 11520 (/4 2880)
>[ 95508.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95508.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95508.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95508.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95510.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95510.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95524.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95524.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95524.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95524.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95526.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95526.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95526.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95526.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95526.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95526.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95526.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95526.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95526.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95526.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95526.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95526.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95526.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95526.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95526.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95526.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95526.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95526.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95526.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95526.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95531.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95531.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95531.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95531.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95531.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95531.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95531.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95531.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95531.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95531.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95531.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95531.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95531.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95531.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95532.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95532.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95544.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95544.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95544.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95544.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95562.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95562.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95562.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95562.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95562.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95562.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95562.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95562.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95562.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95562.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95562.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95562.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95563.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95563.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95563.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95563.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95563.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95563.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95563.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95563.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95563.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95564.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95564.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95564.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95564.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95564.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95564.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95564.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95564.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95564.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95564.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95564.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95564.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fc1c0]
>[ 95564.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fc1c0] width 2880 pitch 11520 (/4 2880)
>[ 95579.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95579.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95579.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95579.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95579.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 95579.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 95579.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95580.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95580.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95580.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95580.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95580.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95580.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95580.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95580.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95580.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95580.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95580.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95580.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95580.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95584.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95584.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95584.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95584.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95584.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95584.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95584.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95584.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95584.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95584.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95584.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95584.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95584.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95584.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95584.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95584.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95596.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95596.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95597.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95597.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95597.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95597.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95597.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95597.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95597.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95597.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95597.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95597.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95597.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95597.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95601.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95601.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95601.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95601.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95601.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95601.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95601.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfa230]
>[ 95601.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfa230] width 2880 pitch 11520 (/4 2880)
>[ 95601.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95601.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95601.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95601.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95601.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95601.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95601.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95601.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95607.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95607.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95607.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95607.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95607.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95607.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95607.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95607.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95607.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95607.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95607.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95607.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95607.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95607.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95607.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95607.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95607.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95607.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95607.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95607.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95607.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95607.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95607.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 95607.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 95607.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95607.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95607.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95607.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95610.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95610.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95610.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95610.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95619.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95619.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95619.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95619.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95619.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95619.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95619.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95619.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95619.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95619.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95619.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95619.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95619.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95619.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95619.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95619.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95619.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95619.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95619.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95619.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95620.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95620.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95620.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95620.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95620.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95620.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95620.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95620.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95620.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95620.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95621.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95621.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95621.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95621.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95621.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95621.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95621.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95621.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95621.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95621.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95621.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95621.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95621.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95621.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95621.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95621.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95621.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95621.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95622.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95622.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95622.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95622.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95622.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95622.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95622.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95622.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95622.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0502e0]
>[ 95622.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0502e0] width 2880 pitch 11520 (/4 2880)
>[ 95622.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95623.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95623.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95623.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95623.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 95623.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 95623.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95623.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95626.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95626.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95626.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fc1c0]
>[ 95626.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fc1c0] width 2880 pitch 11520 (/4 2880)
>[ 95626.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95626.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95626.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95626.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95626.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95627.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95627.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95627.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95627.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95627.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95627.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95627.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95627.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95627.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95627.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95628.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95628.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95628.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95628.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95628.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95628.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95628.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95637.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95637.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95637.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95637.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95637.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa449390]
>[ 95637.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa449390] width 2880 pitch 11520 (/4 2880)
>[ 95637.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95637.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95637.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 95637.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 95637.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95637.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fc1c0]
>[ 95637.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fc1c0] width 2880 pitch 11520 (/4 2880)
>[ 95637.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95637.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95637.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95637.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95637.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95637.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95637.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95637.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95638.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95638.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95638.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95638.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95638.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95638.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95638.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95638.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95638.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95638.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95638.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95639.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fa5b0]
>[ 95639.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fa5b0] width 2880 pitch 11520 (/4 2880)
>[ 95639.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95639.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95639.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95639.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95639.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95639.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95639.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95639.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95639.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fc1c0]
>[ 95639.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fc1c0] width 2880 pitch 11520 (/4 2880)
>[ 95640.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95640.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95643.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95643.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95669.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95669.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95669.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95669.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95669.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 95669.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 95669.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95669.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95670.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95670.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95670.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95670.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95670.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95670.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95671.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95671.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95671.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95671.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95671.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95671.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95671.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95671.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95671.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95671.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95671.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95671.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95671.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 95671.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 95685.840] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 95685.840] (II) RADEON(0): Using hsync ranges from config file
>[ 95685.840] (II) RADEON(0): Using vrefresh ranges from config file
>[ 95685.840] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 95685.840] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 95685.840] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 95685.840] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 95799.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 95799.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 95800.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95800.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95800.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95800.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95800.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c197a0]
>[ 95800.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c197a0] width 2880 pitch 11520 (/4 2880)
>[ 95800.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95800.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95800.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95800.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95800.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95800.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95800.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95800.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95800.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95800.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95800.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95800.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95800.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95800.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95800.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95800.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95800.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa066288]
>[ 95800.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa066288] width 2880 pitch 11520 (/4 2880)
>[ 95800.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95800.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95803.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 95803.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 95803.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95803.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95803.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0130]
>[ 95803.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0130] width 2880 pitch 11520 (/4 2880)
>[ 95803.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95803.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95803.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95803.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95803.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95803.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 95803.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95803.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95804.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95804.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95804.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 95804.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 95804.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95804.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95804.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 95804.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 95804.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95804.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95805.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95805.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95805.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bc8a00]
>[ 95805.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bc8a00] width 2880 pitch 11520 (/4 2880)
>[ 95805.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95805.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95805.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 95805.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 95805.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 95805.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 95805.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 95805.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 95814.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996eaf0]
>[ 95814.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996eaf0] width 2880 pitch 11520 (/4 2880)
>[ 95814.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 95814.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 95814.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 95814.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 95814.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 95814.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 95815.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 95815.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 95816.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 95816.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 95816.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95816.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95834.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[ 95834.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[ 95939.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95939.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95939.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 95939.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 95939.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 95939.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 95939.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa246c48]
>[ 95939.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa246c48] width 2880 pitch 11520 (/4 2880)
>[ 95939.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 95939.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 95939.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 95939.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 95939.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 95939.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 95942.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95942.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95942.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 95942.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 95942.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 95942.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 95942.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ab08]
>[ 95942.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ab08] width 2880 pitch 11520 (/4 2880)
>[ 95942.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0670]
>[ 95942.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0670] width 2880 pitch 11520 (/4 2880)
>[ 95942.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 95942.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 95942.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 95942.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 95942.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40eb8]
>[ 95942.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40eb8] width 2880 pitch 11520 (/4 2880)
>[ 95942.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c4710]
>[ 95942.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c4710] width 2880 pitch 11520 (/4 2880)
>[ 95957.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 95957.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 96001.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 96001.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 96001.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 96001.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 96001.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 96001.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 96001.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96001.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96001.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 96001.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 96001.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 96001.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 96001.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96001.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96001.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96001.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96005.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96005.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96005.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0130]
>[ 96005.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0130] width 2880 pitch 11520 (/4 2880)
>[ 96005.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 96005.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 96005.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 96005.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 96005.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96005.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96005.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0130]
>[ 96005.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0130] width 2880 pitch 11520 (/4 2880)
>[ 96005.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 96005.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 96005.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a75c10]
>[ 96006.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a75c10] width 2880 pitch 11520 (/4 2880)
>[ 96006.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96006.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96006.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96006.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96007.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 96007.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 96007.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40eb8]
>[ 96007.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40eb8] width 2880 pitch 11520 (/4 2880)
>[ 96007.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 96007.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 96007.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 96007.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 96007.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 96007.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 96007.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96007.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96007.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0130]
>[ 96007.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0130] width 2880 pitch 11520 (/4 2880)
>[ 96007.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 96007.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 96007.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96007.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96007.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96007.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96103.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 96103.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 96103.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96104.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96104.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 96104.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 96104.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96104.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96104.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 96104.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 96104.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96104.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96104.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 96104.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 96104.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96104.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96104.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 96104.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 96104.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96104.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96104.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 96104.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 96104.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96104.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96104.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 96104.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 96104.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96104.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96104.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 96104.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 96104.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 96104.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 96105.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96105.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96105.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b24da0]
>[ 96105.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b24da0] width 2880 pitch 11520 (/4 2880)
>[ 96105.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96105.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96105.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96105.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96105.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976ec90]
>[ 96105.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976ec90] width 2880 pitch 11520 (/4 2880)
>[ 96105.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96105.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96105.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 96105.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 96106.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f0b38]
>[ 96106.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f0b38] width 2880 pitch 11520 (/4 2880)
>[ 96106.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96106.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96106.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 96106.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 96106.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96106.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96106.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065d88]
>[ 96106.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065d88] width 2880 pitch 11520 (/4 2880)
>[ 96106.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96106.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96111.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f0130]
>[ 96111.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f0130] width 2880 pitch 11520 (/4 2880)
>[ 96112.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8e180]
>[ 96112.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8e180] width 2880 pitch 11520 (/4 2880)
>[ 96112.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 96112.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 96112.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 96112.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 96112.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 96113.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 96113.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 96113.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 96113.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 96113.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 96113.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d470e8]
>[ 96113.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d470e8] width 2880 pitch 11520 (/4 2880)
>[ 96113.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 96113.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 96114.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96114.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96114.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 96114.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 96114.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40eb8]
>[ 96114.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40eb8] width 2880 pitch 11520 (/4 2880)
>[ 96114.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 96114.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 96151.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 96151.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 96179.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c40eb8]
>[ 96179.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c40eb8] width 2880 pitch 11520 (/4 2880)
>[ 96179.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9632910]
>[ 96179.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9632910] width 2880 pitch 11520 (/4 2880)
>[ 96179.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e915f8]
>[ 96179.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e915f8] width 2880 pitch 11520 (/4 2880)
>[ 96179.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4f0]
>[ 96179.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4f0] width 2880 pitch 11520 (/4 2880)
>[ 96179.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e915f8]
>[ 96179.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e915f8] width 2880 pitch 11520 (/4 2880)
>[ 96179.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5d8c0]
>[ 96179.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5d8c0] width 2880 pitch 11520 (/4 2880)
>[ 96179.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a75c88]
>[ 96179.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a75c88] width 2880 pitch 11520 (/4 2880)
>[ 96179.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97852d0]
>[ 96179.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97852d0] width 2880 pitch 11520 (/4 2880)
>[ 96179.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96179.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96179.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96179.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96179.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96179.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96183.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f058]
>[ 96183.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f058] width 2880 pitch 11520 (/4 2880)
>[ 96183.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aafb0]
>[ 96183.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aafb0] width 2880 pitch 11520 (/4 2880)
>[ 96183.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f44b8]
>[ 96183.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f44b8] width 2880 pitch 11520 (/4 2880)
>[ 96183.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297c48]
>[ 96183.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297c48] width 2880 pitch 11520 (/4 2880)
>[ 96183.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf48]
>[ 96183.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf48] width 2880 pitch 11520 (/4 2880)
>[ 96184.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f058]
>[ 96184.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f058] width 2880 pitch 11520 (/4 2880)
>[ 96184.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96184.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96184.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f14a8]
>[ 96184.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f14a8] width 2880 pitch 11520 (/4 2880)
>[ 96184.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa211070]
>[ 96184.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa211070] width 2880 pitch 11520 (/4 2880)
>[ 96184.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4898f8]
>[ 96184.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4898f8] width 2880 pitch 11520 (/4 2880)
>[ 96184.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f058]
>[ 96184.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f058] width 2880 pitch 11520 (/4 2880)
>[ 96184.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96184.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96184.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 96184.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 96184.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974bdd8]
>[ 96184.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974bdd8] width 2880 pitch 11520 (/4 2880)
>[ 96185.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64620]
>[ 96185.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64620] width 2880 pitch 11520 (/4 2880)
>[ 96185.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b14c0]
>[ 96185.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b14c0] width 2880 pitch 11520 (/4 2880)
>[ 96185.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96185.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96185.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96185.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96185.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96185.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96185.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96185.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96185.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96185.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96185.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97700f0]
>[ 96185.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97700f0] width 2880 pitch 11520 (/4 2880)
>[ 96185.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 96185.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 96217.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164578]
>[ 96217.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164578] width 2880 pitch 11520 (/4 2880)
>[ 96220.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4d50]
>[ 96220.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4d50] width 2880 pitch 11520 (/4 2880)
>[ 96223.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a37060]
>[ 96223.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a37060] width 2880 pitch 11520 (/4 2880)
>[ 96241.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a75c88]
>[ 96241.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a75c88] width 2880 pitch 11520 (/4 2880)
>[ 96241.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186068]
>[ 96241.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186068] width 2880 pitch 11520 (/4 2880)
>[ 96241.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ef9c8]
>[ 96241.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ef9c8] width 2880 pitch 11520 (/4 2880)
>[ 96241.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfeca8]
>[ 96241.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfeca8] width 2880 pitch 11520 (/4 2880)
>[ 96241.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065228]
>[ 96241.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065228] width 2880 pitch 11520 (/4 2880)
>[ 96241.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 96241.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 96243.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974bdd8]
>[ 96243.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974bdd8] width 2880 pitch 11520 (/4 2880)
>[ 96243.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f14a8]
>[ 96243.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f14a8] width 2880 pitch 11520 (/4 2880)
>[ 96243.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa038e18]
>[ 96243.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa038e18] width 2880 pitch 11520 (/4 2880)
>[ 96243.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce4ff8]
>[ 96243.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce4ff8] width 2880 pitch 11520 (/4 2880)
>[ 96243.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974bdd8]
>[ 96243.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974bdd8] width 2880 pitch 11520 (/4 2880)
>[ 96243.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 96243.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 96243.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974bdd8]
>[ 96243.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974bdd8] width 2880 pitch 11520 (/4 2880)
>[ 96243.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89540]
>[ 96243.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89540] width 2880 pitch 11520 (/4 2880)
>[ 96243.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c18490]
>[ 96243.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c18490] width 2880 pitch 11520 (/4 2880)
>[ 96243.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cf7b90]
>[ 96243.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cf7b90] width 2880 pitch 11520 (/4 2880)
>[ 96299.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96299.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96299.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96299.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96299.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104920]
>[ 96299.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104920] width 2880 pitch 11520 (/4 2880)
>[ 96299.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96299.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96299.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104920]
>[ 96299.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104920] width 2880 pitch 11520 (/4 2880)
>[ 96299.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 96299.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 96299.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371ae8]
>[ 96299.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371ae8] width 2880 pitch 11520 (/4 2880)
>[ 96299.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96299.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96299.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f690]
>[ 96299.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f690] width 2880 pitch 11520 (/4 2880)
>[ 96299.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b251a8]
>[ 96299.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b251a8] width 2880 pitch 11520 (/4 2880)
>[ 96299.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96300.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96300.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96300.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96300.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96300.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96304.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fbd08]
>[ 96304.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fbd08] width 2880 pitch 11520 (/4 2880)
>[ 96304.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186068]
>[ 96304.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186068] width 2880 pitch 11520 (/4 2880)
>[ 96304.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96304.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96304.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965c68]
>[ 96304.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965c68] width 2880 pitch 11520 (/4 2880)
>[ 96304.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fbd08]
>[ 96304.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fbd08] width 2880 pitch 11520 (/4 2880)
>[ 96304.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186068]
>[ 96304.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186068] width 2880 pitch 11520 (/4 2880)
>[ 96304.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f690]
>[ 96304.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f690] width 2880 pitch 11520 (/4 2880)
>[ 96304.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965c68]
>[ 96304.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965c68] width 2880 pitch 11520 (/4 2880)
>[ 96304.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fbd08]
>[ 96304.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fbd08] width 2880 pitch 11520 (/4 2880)
>[ 96304.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96304.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96304.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b251a8]
>[ 96304.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b251a8] width 2880 pitch 11520 (/4 2880)
>[ 96304.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96304.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96305.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96305.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96305.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96305.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96305.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965c68]
>[ 96305.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965c68] width 2880 pitch 11520 (/4 2880)
>[ 96305.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1c6c8]
>[ 96305.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1c6c8] width 2880 pitch 11520 (/4 2880)
>[ 96305.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96305.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96305.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96305.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96305.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96305.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96305.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96305.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96305.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96305.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96305.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96305.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96305.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96305.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96305.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96305.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96305.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96305.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96329.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b251a8]
>[ 96329.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b251a8] width 2880 pitch 11520 (/4 2880)
>[ 96329.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e915f8]
>[ 96329.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e915f8] width 2880 pitch 11520 (/4 2880)
>[ 96329.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96329.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96329.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f690]
>[ 96329.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f690] width 2880 pitch 11520 (/4 2880)
>[ 96329.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa142bc8]
>[ 96329.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa142bc8] width 2880 pitch 11520 (/4 2880)
>[ 96329.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e915f8]
>[ 96329.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e915f8] width 2880 pitch 11520 (/4 2880)
>[ 96329.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96329.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96329.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f690]
>[ 96329.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f690] width 2880 pitch 11520 (/4 2880)
>[ 96329.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c6e0]
>[ 96329.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c6e0] width 2880 pitch 11520 (/4 2880)
>[ 96329.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96329.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96330.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f8a0]
>[ 96330.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f8a0] width 2880 pitch 11520 (/4 2880)
>[ 96333.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96333.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96333.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa400bd8]
>[ 96333.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa400bd8] width 2880 pitch 11520 (/4 2880)
>[ 96333.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96333.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96333.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96333.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96333.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e3690]
>[ 96333.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e3690] width 2880 pitch 11520 (/4 2880)
>[ 96333.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96333.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96333.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa400bd8]
>[ 96333.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa400bd8] width 2880 pitch 11520 (/4 2880)
>[ 96333.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96334.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96334.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa400bd8]
>[ 96334.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa400bd8] width 2880 pitch 11520 (/4 2880)
>[ 96334.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96334.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96334.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa400bd8]
>[ 96334.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa400bd8] width 2880 pitch 11520 (/4 2880)
>[ 96334.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96334.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96334.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa400bd8]
>[ 96334.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa400bd8] width 2880 pitch 11520 (/4 2880)
>[ 96334.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96334.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96360.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c6e0]
>[ 96360.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c6e0] width 2880 pitch 11520 (/4 2880)
>[ 96360.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96360.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96360.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96360.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96360.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ebfbe0]
>[ 96360.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ebfbe0] width 2880 pitch 11520 (/4 2880)
>[ 96360.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96360.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96360.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974c2e0]
>[ 96360.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96360.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104920]
>[ 96360.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104920] width 2880 pitch 11520 (/4 2880)
>[ 96360.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104920]
>[ 96360.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104920] width 2880 pitch 11520 (/4 2880)
>[ 96363.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96363.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96363.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c6e0]
>[ 96363.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c6e0] width 2880 pitch 11520 (/4 2880)
>[ 96363.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c6e0]
>[ 96363.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c6e0] width 2880 pitch 11520 (/4 2880)
>[ 96363.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96363.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96363.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065520]
>[ 96363.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065520] width 2880 pitch 11520 (/4 2880)
>[ 96363.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa378438]
>[ 96363.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa378438] width 2880 pitch 11520 (/4 2880)
>[ 96363.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96363.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96363.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96363.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96363.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28c6e0]
>[ 96363.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28c6e0] width 2880 pitch 11520 (/4 2880)
>[ 96363.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa065520]
>[ 96363.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa065520] width 2880 pitch 11520 (/4 2880)
>[ 96367.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2140f0]
>[ 96367.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2140f0] width 2880 pitch 11520 (/4 2880)
>[ 96370.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96370.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96373.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96373.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96377.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19f700]
>[ 96377.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19f700] width 2880 pitch 11520 (/4 2880)
>[ 96396.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c46e0]
>[ 96396.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c46e0] width 2880 pitch 11520 (/4 2880)
>[ 96397.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83de8]
>[ 96397.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83de8] width 2880 pitch 11520 (/4 2880)
>[ 96413.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96413.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96438.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b1fda8]
>[ 96438.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b1fda8] width 2880 pitch 11520 (/4 2880)
>[ 96438.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f4e28]
>[ 96438.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f4e28] width 2880 pitch 11520 (/4 2880)
>[ 96438.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f58f8]
>[ 96438.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f58f8] width 2880 pitch 11520 (/4 2880)
>[ 96438.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f4e28]
>[ 96438.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f4e28] width 2880 pitch 11520 (/4 2880)
>[ 96438.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f58f8]
>[ 96438.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f58f8] width 2880 pitch 11520 (/4 2880)
>[ 96438.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5838]
>[ 96438.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5838] width 2880 pitch 11520 (/4 2880)
>[ 96438.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f58f8]
>[ 96438.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f58f8] width 2880 pitch 11520 (/4 2880)
>[ 96438.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96438.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96438.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96438.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96438.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f270]
>[ 96438.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f270] width 2880 pitch 11520 (/4 2880)
>[ 96438.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96438.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96438.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96438.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96438.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96438.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96451.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96451.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f270]
>[ 96451.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f270] width 2880 pitch 11520 (/4 2880)
>[ 96451.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96451.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96451.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f270]
>[ 96451.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f270] width 2880 pitch 11520 (/4 2880)
>[ 96451.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96451.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96451.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96451.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96451.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96451.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96451.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96452.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96452.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96452.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f270]
>[ 96452.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f270] width 2880 pitch 11520 (/4 2880)
>[ 96452.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96452.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96452.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96452.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96452.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4898f8]
>[ 96452.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4898f8] width 2880 pitch 11520 (/4 2880)
>[ 96453.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96453.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96453.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96453.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96453.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96453.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96453.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4898f8]
>[ 96453.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4898f8] width 2880 pitch 11520 (/4 2880)
>[ 96453.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96453.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96456.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96456.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96460.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96460.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96461.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4898f8]
>[ 96461.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4898f8] width 2880 pitch 11520 (/4 2880)
>[ 96461.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96461.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96463.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b758]
>[ 96463.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b758] width 2880 pitch 11520 (/4 2880)
>[ 96463.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a718]
>[ 96463.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a718] width 2880 pitch 11520 (/4 2880)
>[ 96463.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d36ee8]
>[ 96463.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d36ee8] width 2880 pitch 11520 (/4 2880)
>[ 96463.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4898f8]
>[ 96463.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4898f8] width 2880 pitch 11520 (/4 2880)
>[ 96468.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96468.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96471.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96471.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96482.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565920]
>[ 96482.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565920] width 2880 pitch 11520 (/4 2880)
>[ 96483.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96483.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96484.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa184888]
>[ 96484.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa184888] width 2880 pitch 11520 (/4 2880)
>[ 96539.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724b8]
>[ 96539.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724b8] width 2880 pitch 11520 (/4 2880)
>[ 96539.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa373dc8]
>[ 96539.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa373dc8] width 2880 pitch 11520 (/4 2880)
>[ 96539.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724b8]
>[ 96539.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724b8] width 2880 pitch 11520 (/4 2880)
>[ 96539.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96539.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96539.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724b8]
>[ 96539.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724b8] width 2880 pitch 11520 (/4 2880)
>[ 96539.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa196128]
>[ 96539.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa196128] width 2880 pitch 11520 (/4 2880)
>[ 96539.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fda38]
>[ 96540.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fda38] width 2880 pitch 11520 (/4 2880)
>[ 96540.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa373dc8]
>[ 96540.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa373dc8] width 2880 pitch 11520 (/4 2880)
>[ 96540.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b788]
>[ 96540.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b788] width 2880 pitch 11520 (/4 2880)
>[ 96544.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995ec00]
>[ 96544.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995ec00] width 2880 pitch 11520 (/4 2880)
>[ 96544.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96544.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96544.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96544.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96544.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4488]
>[ 96544.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4488] width 2880 pitch 11520 (/4 2880)
>[ 96544.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96544.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96544.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96544.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96544.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 96544.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 96544.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96544.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96544.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e4488]
>[ 96544.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e4488] width 2880 pitch 11520 (/4 2880)
>[ 96544.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96544.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96544.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96544.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96544.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 96544.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 96544.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96544.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96545.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 96545.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 96545.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96545.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96545.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96545.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96545.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96545.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96545.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 96545.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 96545.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96545.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96545.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 96545.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 96545.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96545.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96545.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 96545.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 96545.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96545.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96545.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4c88]
>[ 96545.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4c88] width 2880 pitch 11520 (/4 2880)
>[ 96545.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96545.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96545.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4c88]
>[ 96545.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4c88] width 2880 pitch 11520 (/4 2880)
>[ 96585.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96585.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96585.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96585.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96585.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96585.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96585.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96585.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96585.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96585.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96585.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401018]
>[ 96585.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401018] width 2880 pitch 11520 (/4 2880)
>[ 96585.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96585.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96585.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96585.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96585.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96585.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96585.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401018]
>[ 96585.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401018] width 2880 pitch 11520 (/4 2880)
>[ 96585.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96585.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96585.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96585.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96585.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5868]
>[ 96585.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5868] width 2880 pitch 11520 (/4 2880)
>[ 96589.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96590.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96590.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96590.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96590.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96590.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96590.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96590.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96590.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96590.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96590.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96590.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96590.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96590.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96590.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96590.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96590.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96590.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96590.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96590.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96590.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96590.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96590.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96590.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96590.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374a58]
>[ 96590.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374a58] width 2880 pitch 11520 (/4 2880)
>[ 96599.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784f08]
>[ 96599.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784f08] width 2880 pitch 11520 (/4 2880)
>[ 96599.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374a58]
>[ 96599.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374a58] width 2880 pitch 11520 (/4 2880)
>[ 96599.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96599.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96599.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374a58]
>[ 96599.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374a58] width 2880 pitch 11520 (/4 2880)
>[ 96599.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96599.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96599.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96599.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96599.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d3590]
>[ 96599.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d3590] width 2880 pitch 11520 (/4 2880)
>[ 96599.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a10]
>[ 96599.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a10] width 2880 pitch 11520 (/4 2880)
>[ 96599.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ab840]
>[ 96599.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ab840] width 2880 pitch 11520 (/4 2880)
>[ 96599.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565920]
>[ 96599.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565920] width 2880 pitch 11520 (/4 2880)
>[ 96599.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96599.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96599.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248790]
>[ 96599.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248790] width 2880 pitch 11520 (/4 2880)
>[ 96600.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f3f0]
>[ 96600.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f3f0] width 2880 pitch 11520 (/4 2880)
>[ 96601.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169b0]
>[ 96601.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169b0] width 2880 pitch 11520 (/4 2880)
>[ 96601.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 96601.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 96601.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 96601.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 96601.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96601.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96601.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 96601.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 96601.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96601.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96601.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96601.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96601.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96601.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96603.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96603.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96603.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96603.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96603.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96603.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96603.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96603.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96603.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d4700]
>[ 96604.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d4700] width 2880 pitch 11520 (/4 2880)
>[ 96604.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96604.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96604.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d4700]
>[ 96604.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d4700] width 2880 pitch 11520 (/4 2880)
>[ 96604.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96604.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96604.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d4700]
>[ 96604.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d4700] width 2880 pitch 11520 (/4 2880)
>[ 96604.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa271fe8]
>[ 96604.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa271fe8] width 2880 pitch 11520 (/4 2880)
>[ 96604.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d4700]
>[ 96604.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d4700] width 2880 pitch 11520 (/4 2880)
>[ 96604.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b432b8]
>[ 96604.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b432b8] width 2880 pitch 11520 (/4 2880)
>[ 96604.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96604.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96604.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96604.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96604.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96604.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96604.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a73b90]
>[ 96604.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a73b90] width 2880 pitch 11520 (/4 2880)
>[ 96604.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96604.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96604.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248470]
>[ 96604.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248470] width 2880 pitch 11520 (/4 2880)
>[ 96604.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96604.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96604.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2482f0]
>[ 96604.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2482f0] width 2880 pitch 11520 (/4 2880)
>[ 96604.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96604.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96604.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2482f0]
>[ 96604.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2482f0] width 2880 pitch 11520 (/4 2880)
>[ 96604.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f4c20]
>[ 96604.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f4c20] width 2880 pitch 11520 (/4 2880)
>[ 96604.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2482f0]
>[ 96604.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2482f0] width 2880 pitch 11520 (/4 2880)
>[ 96604.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93fd438]
>[ 96604.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93fd438] width 2880 pitch 11520 (/4 2880)
>[ 96604.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa245490]
>[ 96604.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa245490] width 2880 pitch 11520 (/4 2880)
>[ 96604.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2482f0]
>[ 96605.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2482f0] width 2880 pitch 11520 (/4 2880)
>[ 96605.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24c9e8]
>[ 96605.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24c9e8] width 2880 pitch 11520 (/4 2880)
>[ 96605.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784ef8]
>[ 96605.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784ef8] width 2880 pitch 11520 (/4 2880)
>[ 96605.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784ef8]
>[ 96605.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784ef8] width 2880 pitch 11520 (/4 2880)
>[ 96605.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784ef8]
>[ 96605.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784ef8] width 2880 pitch 11520 (/4 2880)
>[ 96606.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96606.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96609.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006b98]
>[ 96609.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006b98] width 2880 pitch 11520 (/4 2880)
>[ 96620.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1142d8]
>[ 96620.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1142d8] width 2880 pitch 11520 (/4 2880)
>[ 96620.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96621.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96621.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114198]
>[ 96621.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114198] width 2880 pitch 11520 (/4 2880)
>[ 96621.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c978]
>[ 96621.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c978] width 2880 pitch 11520 (/4 2880)
>[ 96621.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96621.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96621.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00cdd8]
>[ 96621.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00cdd8] width 2880 pitch 11520 (/4 2880)
>[ 96621.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa519c18]
>[ 96621.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa519c18] width 2880 pitch 11520 (/4 2880)
>[ 96621.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96621.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96621.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969eb28]
>[ 96621.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969eb28] width 2880 pitch 11520 (/4 2880)
>[ 96621.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114198]
>[ 96621.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114198] width 2880 pitch 11520 (/4 2880)
>[ 96621.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96621.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96621.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00cdd8]
>[ 96621.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00cdd8] width 2880 pitch 11520 (/4 2880)
>[ 96661.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13aac8]
>[ 96661.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13aac8] width 2880 pitch 11520 (/4 2880)
>[ 96661.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96661.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96661.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00cc98]
>[ 96661.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00cc98] width 2880 pitch 11520 (/4 2880)
>[ 96661.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96661.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96661.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96661.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96661.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2b9d8]
>[ 96661.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2b9d8] width 2880 pitch 11520 (/4 2880)
>[ 96661.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96661.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96665.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2b9d0]
>[ 96665.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2b9d0] width 2880 pitch 11520 (/4 2880)
>[ 96665.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 96665.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 96665.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965cf0]
>[ 96665.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965cf0] width 2880 pitch 11520 (/4 2880)
>[ 96665.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96665.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96665.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96665.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96665.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b2b9d0]
>[ 96665.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b2b9d0] width 2880 pitch 11520 (/4 2880)
>[ 96665.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965cf0]
>[ 96665.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965cf0] width 2880 pitch 11520 (/4 2880)
>[ 96665.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 96665.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 96665.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96665.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96665.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96665.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96666.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96666.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96666.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96666.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96666.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96666.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96666.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96666.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96666.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96666.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96666.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96666.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96666.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9a20]
>[ 96666.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9a20] width 2880 pitch 11520 (/4 2880)
>[ 96666.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 96666.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 96666.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96666.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96682.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96682.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96683.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96683.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96683.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96683.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96683.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96683.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96683.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5970]
>[ 96683.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5970] width 2880 pitch 11520 (/4 2880)
>[ 96683.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96683.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96683.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96683.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96683.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9761548]
>[ 96683.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9761548] width 2880 pitch 11520 (/4 2880)
>[ 96683.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af2c88]
>[ 96683.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af2c88] width 2880 pitch 11520 (/4 2880)
>[ 96683.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96683.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96683.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96683.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96683.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965cf0]
>[ 96683.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965cf0] width 2880 pitch 11520 (/4 2880)
>[ 96687.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371ae8]
>[ 96687.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371ae8] width 2880 pitch 11520 (/4 2880)
>[ 96687.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96687.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96687.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96687.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa371ae8]
>[ 96687.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa371ae8] width 2880 pitch 11520 (/4 2880)
>[ 96687.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2483e0]
>[ 96687.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2483e0] width 2880 pitch 11520 (/4 2880)
>[ 96687.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96687.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96687.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96687.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96687.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96687.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96687.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96687.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96687.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96687.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b641e8]
>[ 96687.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b641e8] width 2880 pitch 11520 (/4 2880)
>[ 96687.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96687.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa367f48]
>[ 96687.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa367f48] width 2880 pitch 11520 (/4 2880)
>[ 96739.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2492e8]
>[ 96739.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2492e8] width 2880 pitch 11520 (/4 2880)
>[ 96739.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2492e8]
>[ 96739.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2492e8] width 2880 pitch 11520 (/4 2880)
>[ 96739.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 96739.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 96740.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2492e8]
>[ 96740.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2492e8] width 2880 pitch 11520 (/4 2880)
>[ 96741.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51af28]
>[ 96741.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51af28] width 2880 pitch 11520 (/4 2880)
>[ 96741.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 96741.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 96742.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565920]
>[ 96742.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565920] width 2880 pitch 11520 (/4 2880)
>[ 96744.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 96744.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 96745.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96745.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96745.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[ 96745.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[ 96745.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[ 96745.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[ 96745.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[ 96745.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[ 96779.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 96779.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 96779.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f260]
>[ 96779.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f260] width 2880 pitch 11520 (/4 2880)
>[ 96779.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 96780.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 96780.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06f260]
>[ 96780.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06f260] width 2880 pitch 11520 (/4 2880)
>[ 96780.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b530]
>[ 96780.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b530] width 2880 pitch 11520 (/4 2880)
>[ 96780.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 96780.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 96780.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4c88]
>[ 96780.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4c88] width 2880 pitch 11520 (/4 2880)
>[ 96780.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ab840]
>[ 96780.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ab840] width 2880 pitch 11520 (/4 2880)
>[ 96780.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 96780.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 96780.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fe070]
>[ 96780.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fe070] width 2880 pitch 11520 (/4 2880)
>[ 96780.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 96780.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 96784.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 96784.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 96784.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a4398]
>[ 96784.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a4398] width 2880 pitch 11520 (/4 2880)
>[ 96784.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5970]
>[ 96784.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5970] width 2880 pitch 11520 (/4 2880)
>[ 96784.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96784.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96784.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b530]
>[ 96784.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b530] width 2880 pitch 11520 (/4 2880)
>[ 96784.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96784.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96784.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a4398]
>[ 96784.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a4398] width 2880 pitch 11520 (/4 2880)
>[ 96784.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5970]
>[ 96784.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5970] width 2880 pitch 11520 (/4 2880)
>[ 96784.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 96784.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 96784.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b530]
>[ 96784.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b530] width 2880 pitch 11520 (/4 2880)
>[ 96784.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96784.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96784.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a4398]
>[ 96784.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a4398] width 2880 pitch 11520 (/4 2880)
>[ 96784.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5970]
>[ 96784.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5970] width 2880 pitch 11520 (/4 2880)
>[ 96785.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96785.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96785.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94a4398]
>[ 96785.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94a4398] width 2880 pitch 11520 (/4 2880)
>[ 96785.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 96785.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 96785.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96785.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96785.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96785.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96785.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96785.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96785.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96785.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96785.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96785.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96785.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 96785.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 96899.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519270]
>[ 96899.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519270] width 2880 pitch 11520 (/4 2880)
>[ 96899.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x990a4b0]
>[ 96899.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x990a4b0] width 2880 pitch 11520 (/4 2880)
>[ 96899.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519270]
>[ 96899.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519270] width 2880 pitch 11520 (/4 2880)
>[ 96899.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x990a4b0]
>[ 96899.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x990a4b0] width 2880 pitch 11520 (/4 2880)
>[ 96899.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519270]
>[ 96899.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519270] width 2880 pitch 11520 (/4 2880)
>[ 96899.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 96899.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 96899.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f44f68]
>[ 96899.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f44f68] width 2880 pitch 11520 (/4 2880)
>[ 96899.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519270]
>[ 96899.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519270] width 2880 pitch 11520 (/4 2880)
>[ 96899.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17de60]
>[ 96899.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17de60] width 2880 pitch 11520 (/4 2880)
>[ 96899.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5eae8]
>[ 96899.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5eae8] width 2880 pitch 11520 (/4 2880)
>[ 96899.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1030]
>[ 96899.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1030] width 2880 pitch 11520 (/4 2880)
>[ 96899.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 96900.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 96904.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96904.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5eae8]
>[ 96904.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5eae8] width 2880 pitch 11520 (/4 2880)
>[ 96904.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db1030]
>[ 96904.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db1030] width 2880 pitch 11520 (/4 2880)
>[ 96904.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 96904.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 96904.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96904.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96904.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96904.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96904.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96904.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96904.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a1c0]
>[ 96904.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ed1c0]
>[ 96904.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ed1c0] width 2880 pitch 11520 (/4 2880)
>[ 96904.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00cc98]
>[ 96904.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00cc98] width 2880 pitch 11520 (/4 2880)
>[ 97019.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fb98]
>[ 97019.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fb98] width 2880 pitch 11520 (/4 2880)
>[ 97019.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fe8]
>[ 97019.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fe8] width 2880 pitch 11520 (/4 2880)
>[ 97019.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fb98]
>[ 97019.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fb98] width 2880 pitch 11520 (/4 2880)
>[ 97019.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fe8]
>[ 97019.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fe8] width 2880 pitch 11520 (/4 2880)
>[ 97019.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fb98]
>[ 97019.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fb98] width 2880 pitch 11520 (/4 2880)
>[ 97019.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519270]
>[ 97019.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519270] width 2880 pitch 11520 (/4 2880)
>[ 97019.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c692c0]
>[ 97019.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c692c0] width 2880 pitch 11520 (/4 2880)
>[ 97019.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fe8]
>[ 97019.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fe8] width 2880 pitch 11520 (/4 2880)
>[ 97019.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1fb98]
>[ 97020.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1fb98] width 2880 pitch 11520 (/4 2880)
>[ 97020.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97020.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97020.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 97020.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 97020.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97020.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97024.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97024.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d00c0]
>[ 97024.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d00c0] width 2880 pitch 11520 (/4 2880)
>[ 97024.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97024.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7eab0]
>[ 97024.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7eab0] width 2880 pitch 11520 (/4 2880)
>[ 97024.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d95f60]
>[ 97024.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d95f60] width 2880 pitch 11520 (/4 2880)
>[ 97024.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb40]
>[ 97024.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb40] width 2880 pitch 11520 (/4 2880)
>[ 97024.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97024.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb40]
>[ 97024.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb40] width 2880 pitch 11520 (/4 2880)
>[ 97024.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97024.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb40]
>[ 97024.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb40] width 2880 pitch 11520 (/4 2880)
>[ 97024.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97024.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb40]
>[ 97024.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb40] width 2880 pitch 11520 (/4 2880)
>[ 97024.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971730]
>[ 97024.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971730] width 2880 pitch 11520 (/4 2880)
>[ 97024.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bfb40]
>[ 97024.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bfb40] width 2880 pitch 11520 (/4 2880)
>[ 97200.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6eba8]
>[ 97200.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6eba8] width 2880 pitch 11520 (/4 2880)
>[ 97200.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97200.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97200.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157a68]
>[ 97200.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157a68] width 2880 pitch 11520 (/4 2880)
>[ 97200.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6eba8]
>[ 97200.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6eba8] width 2880 pitch 11520 (/4 2880)
>[ 97200.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157a68]
>[ 97200.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157a68] width 2880 pitch 11520 (/4 2880)
>[ 97200.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x973adc0]
>[ 97200.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x973adc0] width 2880 pitch 11520 (/4 2880)
>[ 97200.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e700]
>[ 97200.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e700] width 2880 pitch 11520 (/4 2880)
>[ 97200.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 97200.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 97200.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d29b48]
>[ 97200.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d29b48] width 2880 pitch 11520 (/4 2880)
>[ 97200.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157a68]
>[ 97200.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157a68] width 2880 pitch 11520 (/4 2880)
>[ 97200.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 97200.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 97200.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e700]
>[ 97200.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e700] width 2880 pitch 11520 (/4 2880)
>[ 97200.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa117730]
>[ 97200.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa117730] width 2880 pitch 11520 (/4 2880)
>[ 97204.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ab840]
>[ 97204.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ab840] width 2880 pitch 11520 (/4 2880)
>[ 97204.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e700]
>[ 97204.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e700] width 2880 pitch 11520 (/4 2880)
>[ 97204.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 97204.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 97204.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7af50]
>[ 97204.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7af50] width 2880 pitch 11520 (/4 2880)
>[ 97204.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10b530]
>[ 97204.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10b530] width 2880 pitch 11520 (/4 2880)
>[ 97204.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7af50]
>[ 97204.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7af50] width 2880 pitch 11520 (/4 2880)
>[ 97204.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 97204.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 97204.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7af50]
>[ 97204.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7af50] width 2880 pitch 11520 (/4 2880)
>[ 97204.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 97204.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 97204.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7af50]
>[ 97204.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7af50] width 2880 pitch 11520 (/4 2880)
>[ 97204.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d00c0]
>[ 97204.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d00c0] width 2880 pitch 11520 (/4 2880)
>[ 97204.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa375780]
>[ 97204.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa375780] width 2880 pitch 11520 (/4 2880)
>[ 97259.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c4100]
>[ 97259.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c4100] width 2880 pitch 11520 (/4 2880)
>[ 97259.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e85e0]
>[ 97259.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e85e0] width 2880 pitch 11520 (/4 2880)
>[ 97259.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95c4100]
>[ 97259.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95c4100] width 2880 pitch 11520 (/4 2880)
>[ 97259.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e85e0]
>[ 97259.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e85e0] width 2880 pitch 11520 (/4 2880)
>[ 97259.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa375780]
>[ 97259.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa375780] width 2880 pitch 11520 (/4 2880)
>[ 97260.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5eae8]
>[ 97260.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5eae8] width 2880 pitch 11520 (/4 2880)
>[ 97260.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5eae8]
>[ 97260.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5eae8] width 2880 pitch 11520 (/4 2880)
>[ 97260.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af2c88]
>[ 97260.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af2c88] width 2880 pitch 11520 (/4 2880)
>[ 97260.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97260.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97260.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b3d8]
>[ 97260.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b3d8] width 2880 pitch 11520 (/4 2880)
>[ 97260.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97260.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97264.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97264.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b749e0]
>[ 97264.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b749e0] width 2880 pitch 11520 (/4 2880)
>[ 97264.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5b3d8]
>[ 97264.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5b3d8] width 2880 pitch 11520 (/4 2880)
>[ 97264.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 97264.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 97264.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ea60]
>[ 97264.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ea60] width 2880 pitch 11520 (/4 2880)
>[ 97264.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97264.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ea60]
>[ 97264.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ea60] width 2880 pitch 11520 (/4 2880)
>[ 97264.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97264.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ea60]
>[ 97264.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ea60] width 2880 pitch 11520 (/4 2880)
>[ 97264.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97264.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ea60]
>[ 97264.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ea60] width 2880 pitch 11520 (/4 2880)
>[ 97264.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97264.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ea60]
>[ 97264.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ea60] width 2880 pitch 11520 (/4 2880)
>[ 97264.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb48]
>[ 97264.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb48] width 2880 pitch 11520 (/4 2880)
>[ 97350.020] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[ 97350.020] (II) RADEON(0): Using hsync ranges from config file
>[ 97350.020] (II) RADEON(0): Using vrefresh ranges from config file
>[ 97350.020] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 97350.020] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[ 97350.020] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 97350.020] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 97352.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97352.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97352.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97352.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97352.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97352.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97352.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd770]
>[ 97352.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd770] width 2880 pitch 11520 (/4 2880)
>[ 97352.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97352.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97352.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97352.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97352.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97352.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97352.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd770]
>[ 97352.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd770] width 2880 pitch 11520 (/4 2880)
>[ 97352.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97352.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97352.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97352.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97356.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97356.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516d48]
>[ 97356.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516d48] width 2880 pitch 11520 (/4 2880)
>[ 97356.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97356.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97356.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d4700]
>[ 97356.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d4700] width 2880 pitch 11520 (/4 2880)
>[ 97356.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97356.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97356.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97356.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97356.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97356.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97356.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97356.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97356.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97356.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97356.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97356.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97356.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97356.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97439.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97439.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97439.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97439.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97439.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97439.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97439.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d96140]
>[ 97439.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d96140] width 2880 pitch 11520 (/4 2880)
>[ 97439.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97439.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97439.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97439.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97439.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00d668]
>[ 97439.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00d668] width 2880 pitch 11520 (/4 2880)
>[ 97439.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516d48]
>[ 97439.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516d48] width 2880 pitch 11520 (/4 2880)
>[ 97439.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 97439.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 97439.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516d48]
>[ 97439.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516d48] width 2880 pitch 11520 (/4 2880)
>[ 97439.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97439.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97443.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97443.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97443.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00d668]
>[ 97443.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00d668] width 2880 pitch 11520 (/4 2880)
>[ 97443.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516d48]
>[ 97443.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516d48] width 2880 pitch 11520 (/4 2880)
>[ 97443.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa244f68]
>[ 97443.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa244f68] width 2880 pitch 11520 (/4 2880)
>[ 97443.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97443.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97443.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97443.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97443.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97443.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97443.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97443.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97443.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97443.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97443.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97443.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97443.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97444.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97444.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97444.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97444.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97444.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97474.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97474.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97474.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97474.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97474.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97474.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97474.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97474.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97474.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97474.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97474.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97474.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97474.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97474.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97474.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8b830]
>[ 97474.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8b830] width 2880 pitch 11520 (/4 2880)
>[ 97474.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0a8]
>[ 97474.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0a8] width 2880 pitch 11520 (/4 2880)
>[ 97474.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401ac0]
>[ 97474.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401ac0] width 2880 pitch 11520 (/4 2880)
>[ 97474.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97474.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97474.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97474.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97474.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97474.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97474.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401ac0]
>[ 97474.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401ac0] width 2880 pitch 11520 (/4 2880)
>[ 97474.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97474.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97474.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97474.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97474.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97474.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97475.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97475.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97475.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97475.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97475.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97475.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97475.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97475.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97476.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97476.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97476.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97476.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97476.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97476.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97476.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 97476.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 97477.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97477.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97477.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97477.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97477.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97477.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97477.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa062978]
>[ 97477.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa062978] width 2880 pitch 11520 (/4 2880)
>[ 97478.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ad6098]
>[ 97478.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ad6098] width 2880 pitch 11520 (/4 2880)
>[ 97478.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d86e70]
>[ 97478.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d86e70] width 2880 pitch 11520 (/4 2880)
>[ 97478.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516d48]
>[ 97478.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516d48] width 2880 pitch 11520 (/4 2880)
>[ 97478.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00d668]
>[ 97478.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00d668] width 2880 pitch 11520 (/4 2880)
>[ 97478.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 97478.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 97478.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97478.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97478.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 97478.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 97478.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97478.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97478.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 97478.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 97478.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97478.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97478.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a87b50]
>[ 97478.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a87b50] width 2880 pitch 11520 (/4 2880)
>[ 97478.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97478.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97478.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97478.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97479.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97479.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97493.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 97493.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 97500.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0085a0]
>[ 97500.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0085a0] width 2880 pitch 11520 (/4 2880)
>[ 97500.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97500.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97500.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97500.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97500.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97500.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97500.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97500.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97500.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97500.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97500.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97500.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97500.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97500.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97500.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97500.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97500.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97501.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97501.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97501.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97501.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97501.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97501.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7e58]
>[ 97501.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7e58] width 2880 pitch 11520 (/4 2880)
>[ 97501.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97501.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97501.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 97501.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 97501.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97501.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97501.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 97501.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 97501.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 97501.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 97512.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd510]
>[ 97512.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd510] width 2880 pitch 11520 (/4 2880)
>[ 97520.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e7550]
>[ 97520.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e7550] width 2880 pitch 11520 (/4 2880)
>[ 97520.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc188]
>[ 97520.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc188] width 2880 pitch 11520 (/4 2880)
>[ 97520.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e7550]
>[ 97520.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e7550] width 2880 pitch 11520 (/4 2880)
>[ 97521.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd4f8]
>[ 97521.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd4f8] width 2880 pitch 11520 (/4 2880)
>[ 97521.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc188]
>[ 97521.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc188] width 2880 pitch 11520 (/4 2880)
>[ 97521.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74118]
>[ 97521.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74118] width 2880 pitch 11520 (/4 2880)
>[ 97521.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74118]
>[ 97521.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74118] width 2880 pitch 11520 (/4 2880)
>[ 97521.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74118]
>[ 97521.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74118] width 2880 pitch 11520 (/4 2880)
>[ 97521.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffcd18]
>[ 97521.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffcd18] width 2880 pitch 11520 (/4 2880)
>[ 97521.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a74118]
>[ 97521.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a74118] width 2880 pitch 11520 (/4 2880)
>[ 97536.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97536.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97556.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97556.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97566.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972ab20]
>[ 97566.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972ab20] width 2880 pitch 11520 (/4 2880)
>[ 97566.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7f60]
>[ 97566.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7f60] width 2880 pitch 11520 (/4 2880)
>[ 97566.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac3a00]
>[ 97566.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac3a00] width 2880 pitch 11520 (/4 2880)
>[ 97566.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e758]
>[ 97566.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e758] width 2880 pitch 11520 (/4 2880)
>[ 97566.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519630]
>[ 97566.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519630] width 2880 pitch 11520 (/4 2880)
>[ 97566.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1322c8]
>[ 97566.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1322c8] width 2880 pitch 11520 (/4 2880)
>[ 97566.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97566.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97566.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97566.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97566.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa252308]
>[ 97566.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa252308] width 2880 pitch 11520 (/4 2880)
>[ 97566.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97566.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa252308]
>[ 97566.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa252308] width 2880 pitch 11520 (/4 2880)
>[ 97566.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97566.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa252308]
>[ 97566.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa252308] width 2880 pitch 11520 (/4 2880)
>[ 97566.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97566.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa252308]
>[ 97566.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa252308] width 2880 pitch 11520 (/4 2880)
>[ 97566.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 97566.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 97567.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97567.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97567.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97567.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97567.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97567.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97567.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97567.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5828]
>[ 97567.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5828] width 2880 pitch 11520 (/4 2880)
>[ 97567.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97567.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97568.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97568.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97568.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97568.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97568.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97568.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97568.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97568.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97568.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97568.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97568.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97568.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97568.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97568.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97573.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97573.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97574.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97574.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97616.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97616.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97616.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97616.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97616.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97616.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97616.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffce40]
>[ 97616.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffce40] width 2880 pitch 11520 (/4 2880)
>[ 97616.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97616.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97616.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97616.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97616.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97616.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97616.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffce40]
>[ 97616.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffce40] width 2880 pitch 11520 (/4 2880)
>[ 97616.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97616.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97616.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffce40]
>[ 97616.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffce40] width 2880 pitch 11520 (/4 2880)
>[ 97616.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97616.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97616.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffce40]
>[ 97616.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffce40] width 2880 pitch 11520 (/4 2880)
>[ 97616.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97616.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97618.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97618.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97619.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97619.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97619.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97619.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97619.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97619.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97619.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97619.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97619.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97619.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97619.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97619.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97620.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97620.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97620.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97620.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97620.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97620.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97620.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97620.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97620.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[ 97620.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[ 97621.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffce40]
>[ 97621.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffce40] width 2880 pitch 11520 (/4 2880)
>[ 97621.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118138]
>[ 97621.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118138] width 2880 pitch 11520 (/4 2880)
>[ 97621.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f369a8]
>[ 97621.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f369a8] width 2880 pitch 11520 (/4 2880)
>[ 97621.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d59d98]
>[ 97621.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d59d98] width 2880 pitch 11520 (/4 2880)
>[ 97621.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05cb88]
>[ 97621.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05cb88] width 2880 pitch 11520 (/4 2880)
>[ 97670.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7f60]
>[ 97670.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7f60] width 2880 pitch 11520 (/4 2880)
>[ 97670.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb2c8]
>[ 97670.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb2c8] width 2880 pitch 11520 (/4 2880)
>[ 97670.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7f60]
>[ 97670.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7f60] width 2880 pitch 11520 (/4 2880)
>[ 97670.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96faec0]
>[ 97670.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96faec0] width 2880 pitch 11520 (/4 2880)
>[ 97671.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2c00]
>[ 97671.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2c00] width 2880 pitch 11520 (/4 2880)
>[ 97671.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb2c8]
>[ 97671.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb2c8] width 2880 pitch 11520 (/4 2880)
>[ 97671.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f5b490]
>[ 97672.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f5b490] width 2880 pitch 11520 (/4 2880)
>[ 97673.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da7f60]
>[ 97673.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da7f60] width 2880 pitch 11520 (/4 2880)
>[ 97674.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96faec0]
>[ 97674.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96faec0] width 2880 pitch 11520 (/4 2880)
>[ 97674.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d2c00]
>[ 97674.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d2c00] width 2880 pitch 11520 (/4 2880)
>[ 97675.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96faec0]
>[ 97675.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96faec0] width 2880 pitch 11520 (/4 2880)
>[ 97676.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96faec0]
>[ 97676.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96faec0] width 2880 pitch 11520 (/4 2880)
>[ 97677.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66008]
>[ 97677.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66008] width 2880 pitch 11520 (/4 2880)
>[ 97677.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97677.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97677.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97677.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97677.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97677.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97677.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97677.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97677.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97677.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97682.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97682.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97682.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97682.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97682.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f2b58]
>[ 97682.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f2b58] width 2880 pitch 11520 (/4 2880)
>[ 97682.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d1d0]
>[ 97682.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d1d0] width 2880 pitch 11520 (/4 2880)
>[ 97682.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97682.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97682.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fe248]
>[ 97682.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fe248] width 2880 pitch 11520 (/4 2880)
>[ 97685.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97685.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97685.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97685.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97685.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97685.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97685.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97685.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97685.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97685.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97685.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa014f18]
>[ 97685.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa014f18] width 2880 pitch 11520 (/4 2880)
>[ 97685.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10c0e8]
>[ 97685.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10c0e8] width 2880 pitch 11520 (/4 2880)
>[ 97685.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97685.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10c0e8]
>[ 97685.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10c0e8] width 2880 pitch 11520 (/4 2880)
>[ 97685.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20f918]
>[ 97685.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20f918] width 2880 pitch 11520 (/4 2880)
>[ 97686.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa013968]
>[ 97686.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa013968] width 2880 pitch 11520 (/4 2880)
>[ 97686.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97686.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97686.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd878]
>[ 97686.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd878] width 2880 pitch 11520 (/4 2880)
>[ 97686.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef780]
>[ 97686.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef780] width 2880 pitch 11520 (/4 2880)
>[ 97686.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97686.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97686.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa013968]
>[ 97686.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa013968] width 2880 pitch 11520 (/4 2880)
>[ 97686.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97686.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97686.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd878]
>[ 97686.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd878] width 2880 pitch 11520 (/4 2880)
>[ 97686.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 97686.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 97686.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97686.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97686.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa013968]
>[ 97686.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa013968] width 2880 pitch 11520 (/4 2880)
>[ 97686.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97686.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97686.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd878]
>[ 97686.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd878] width 2880 pitch 11520 (/4 2880)
>[ 97687.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248a08]
>[ 97687.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248a08] width 2880 pitch 11520 (/4 2880)
>[ 97687.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa013968]
>[ 97687.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa013968] width 2880 pitch 11520 (/4 2880)
>[ 97687.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97687.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97687.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa014f18]
>[ 97687.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa014f18] width 2880 pitch 11520 (/4 2880)
>[ 97687.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248a08]
>[ 97687.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248a08] width 2880 pitch 11520 (/4 2880)
>[ 97688.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0e50]
>[ 97688.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0e50] width 2880 pitch 11520 (/4 2880)
>[ 97688.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248a08]
>[ 97688.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248a08] width 2880 pitch 11520 (/4 2880)
>[ 97688.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffb90]
>[ 97688.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffb90] width 2880 pitch 11520 (/4 2880)
>[ 97692.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97692.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97692.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97692.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97692.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97704.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9142de8]
>[ 97704.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9142de8] width 2880 pitch 11520 (/4 2880)
>[ 97711.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97711.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97714.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97714.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97739.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97739.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97739.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97739.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97739.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97739.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97739.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97739.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97739.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97739.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97739.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 97739.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 97743.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97743.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97743.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97744.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97744.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97744.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97744.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97744.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97744.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97744.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97744.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612df8]
>[ 97744.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612df8] width 2880 pitch 11520 (/4 2880)
>[ 97744.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97744.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97793.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97793.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97793.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97793.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97793.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97793.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97793.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97793.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97793.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972ab20]
>[ 97793.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972ab20] width 2880 pitch 11520 (/4 2880)
>[ 97793.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ba748]
>[ 97793.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ba748] width 2880 pitch 11520 (/4 2880)
>[ 97793.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f0]
>[ 97793.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f0] width 2880 pitch 11520 (/4 2880)
>[ 97793.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519630]
>[ 97793.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519630] width 2880 pitch 11520 (/4 2880)
>[ 97793.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e7500]
>[ 97793.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e7500] width 2880 pitch 11520 (/4 2880)
>[ 97793.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47a40]
>[ 97793.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47a40] width 2880 pitch 11520 (/4 2880)
>[ 97797.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97797.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97797.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97797.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97797.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97797.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97797.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97797.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97797.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97797.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97798.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97798.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97798.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97798.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97798.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97798.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97859.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc5a8]
>[ 97859.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc5a8] width 2880 pitch 11520 (/4 2880)
>[ 97860.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96faec0]
>[ 97860.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96faec0] width 2880 pitch 11520 (/4 2880)
>[ 97860.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2520f8]
>[ 97860.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2520f8] width 2880 pitch 11520 (/4 2880)
>[ 97860.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104920]
>[ 97860.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104920] width 2880 pitch 11520 (/4 2880)
>[ 97860.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97860.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97864.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97864.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97864.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97864.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97864.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97864.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97864.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97864.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97864.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97864.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97864.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97864.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97864.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97864.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97864.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97864.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97873.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97873.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97873.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97873.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97873.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97873.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97873.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97873.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97873.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97873.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97873.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97873.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97877.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97877.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97877.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 97877.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 97877.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97877.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97877.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97877.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97877.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f9b00]
>[ 97878.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f9b00] width 2880 pitch 11520 (/4 2880)
>[ 97878.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 97878.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 97878.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97878.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97878.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97878.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97901.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97901.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97901.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97901.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97901.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97901.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97901.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97901.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97901.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97901.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97901.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97901.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97901.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97901.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97902.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97902.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97902.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97902.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97902.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97902.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97902.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97903.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97903.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97903.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97903.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97903.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97903.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97903.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97903.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97903.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97903.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97903.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97903.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 97903.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 97903.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97903.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97913.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c018]
>[ 97913.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c018] width 2880 pitch 11520 (/4 2880)
>[ 97913.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c018]
>[ 97913.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c018] width 2880 pitch 11520 (/4 2880)
>[ 97913.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c018]
>[ 97913.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c018] width 2880 pitch 11520 (/4 2880)
>[ 97913.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c018]
>[ 97913.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c018] width 2880 pitch 11520 (/4 2880)
>[ 97913.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c018]
>[ 97913.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c018] width 2880 pitch 11520 (/4 2880)
>[ 97913.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97913.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97913.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97913.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97913.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97914.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97914.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97914.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97914.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97914.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97914.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01de18]
>[ 97914.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01de18] width 2880 pitch 11520 (/4 2880)
>[ 97916.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97916.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97916.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97916.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97916.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97916.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97916.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97919.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97919.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97919.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97919.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97919.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97919.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97919.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97919.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97919.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffea8]
>[ 97919.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffea8] width 2880 pitch 11520 (/4 2880)
>[ 97919.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972ab20]
>[ 97919.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972ab20] width 2880 pitch 11520 (/4 2880)
>[ 97919.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401018]
>[ 97919.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401018] width 2880 pitch 11520 (/4 2880)
>[ 97919.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc4b00]
>[ 97919.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc4b00] width 2880 pitch 11520 (/4 2880)
>[ 97922.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97922.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97922.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97922.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97922.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97922.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97922.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97922.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97922.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97922.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97922.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97922.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97922.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97922.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97922.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97922.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97922.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97922.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97923.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97923.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97923.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97923.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97923.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 97923.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 97923.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01cd60]
>[ 97923.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01cd60] width 2880 pitch 11520 (/4 2880)
>[ 97923.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51aa38]
>[ 97923.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51aa38] width 2880 pitch 11520 (/4 2880)
>[ 97923.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97923.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97923.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51aa38]
>[ 97923.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51aa38] width 2880 pitch 11520 (/4 2880)
>[ 97923.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97923.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97923.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51aa38]
>[ 97923.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51aa38] width 2880 pitch 11520 (/4 2880)
>[ 97923.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f90]
>[ 97923.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f90] width 2880 pitch 11520 (/4 2880)
>[ 97923.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97923.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97924.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f5660]
>[ 97924.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f5660] width 2880 pitch 11520 (/4 2880)
>[ 97924.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99807e0]
>[ 97924.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99807e0] width 2880 pitch 11520 (/4 2880)
>[ 97924.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ef840]
>[ 97924.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ef840] width 2880 pitch 11520 (/4 2880)
>[ 97924.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97589a0]
>[ 97924.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97589a0] width 2880 pitch 11520 (/4 2880)
>[ 97924.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97924.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97924.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97924.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97924.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97924.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97924.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97924.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97924.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66008]
>[ 97924.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66008] width 2880 pitch 11520 (/4 2880)
>[ 97925.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25a950]
>[ 97925.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25a950] width 2880 pitch 11520 (/4 2880)
>[ 97925.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97925.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97925.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66008]
>[ 97925.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66008] width 2880 pitch 11520 (/4 2880)
>[ 97926.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97926.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97928.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97928.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97932.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97932.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97936.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97936.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97936.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97936.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97936.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97936.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97936.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97936.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97936.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97937.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97937.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97937.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97937.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97937.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97937.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97937.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97937.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97937.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97937.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97937.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97937.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97937.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97938.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97938.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97938.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97939.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97939.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97939.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97939.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97939.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97939.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97939.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97939.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97939.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97939.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97939.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97940.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97940.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97940.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 97940.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 97941.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97941.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97942.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 97942.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 97943.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 97943.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 97943.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97943.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97944.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffa4f0]
>[ 97944.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffa4f0] width 2880 pitch 11520 (/4 2880)
>[ 97944.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97944.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97944.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eafc8]
>[ 97944.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eafc8] width 2880 pitch 11520 (/4 2880)
>[ 97949.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99604d8]
>[ 97949.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99604d8] width 2880 pitch 11520 (/4 2880)
>[ 97949.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97589a0]
>[ 97949.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97589a0] width 2880 pitch 11520 (/4 2880)
>[ 97974.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97974.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97974.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97974.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97974.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97979.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa036720]
>[ 97979.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa036720] width 2880 pitch 11520 (/4 2880)
>[ 97979.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97979.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97979.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9519630]
>[ 97979.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9519630] width 2880 pitch 11520 (/4 2880)
>[ 97983.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6ee68]
>[ 97983.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6ee68] width 2880 pitch 11520 (/4 2880)
>[ 97983.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97983.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97983.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97983.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97983.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97983.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97983.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01cc10]
>[ 97983.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01cc10] width 2880 pitch 11520 (/4 2880)
>[ 97983.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6ee68]
>[ 97983.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6ee68] width 2880 pitch 11520 (/4 2880)
>[ 97983.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 97983.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 97983.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97984.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97984.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97984.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97984.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943ae48]
>[ 97984.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943ae48] width 2880 pitch 11520 (/4 2880)
>[ 97984.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc8f40]
>[ 97984.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc8f40] width 2880 pitch 11520 (/4 2880)
>[ 97984.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 97984.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 97984.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97984.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97984.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 97984.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 97985.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97589a0]
>[ 97985.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97589a0] width 2880 pitch 11520 (/4 2880)
>[ 97985.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97589a0]
>[ 97985.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97589a0] width 2880 pitch 11520 (/4 2880)
>[ 97985.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97985.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97985.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97985.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962aea8]
>[ 97985.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962aea8] width 2880 pitch 11520 (/4 2880)
>[ 97988.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ce0]
>[ 97988.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ce0] width 2880 pitch 11520 (/4 2880)
>[ 97988.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 97988.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 97988.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 97988.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 97988.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9565b70]
>[ 97988.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9565b70] width 2880 pitch 11520 (/4 2880)
>[ 97988.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ce0]
>[ 97988.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ce0] width 2880 pitch 11520 (/4 2880)
>[ 97988.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 97988.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 97988.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ce0]
>[ 97988.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ce0] width 2880 pitch 11520 (/4 2880)
>[ 97988.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 97988.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 97992.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 97992.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 97994.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bbd8]
>[ 97994.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bbd8] width 2880 pitch 11520 (/4 2880)
>[ 97994.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d048]
>[ 97994.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d048] width 2880 pitch 11520 (/4 2880)
>[ 98014.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98014.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98017.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 98017.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 98018.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 98018.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 98038.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 98038.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 98038.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98038.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2624c8]
>[ 98038.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2624c8] width 2880 pitch 11520 (/4 2880)
>[ 98038.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00de68]
>[ 98038.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00de68] width 2880 pitch 11520 (/4 2880)
>[ 98043.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01cf58]
>[ 98043.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01cf58] width 2880 pitch 11520 (/4 2880)
>[ 98044.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98044.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98044.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b7020]
>[ 98044.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b7020] width 2880 pitch 11520 (/4 2880)
>[ 98044.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e4a18]
>[ 98044.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e4a18] width 2880 pitch 11520 (/4 2880)
>[ 98044.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98044.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98044.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98044.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98044.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e4a18]
>[ 98044.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e4a18] width 2880 pitch 11520 (/4 2880)
>[ 98044.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98044.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98044.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 98044.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 98044.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98044.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98045.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b69178]
>[ 98046.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b69178] width 2880 pitch 11520 (/4 2880)
>[ 98047.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b7020]
>[ 98047.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b7020] width 2880 pitch 11520 (/4 2880)
>[ 98047.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98047.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98047.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f120]
>[ 98047.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f120] width 2880 pitch 11520 (/4 2880)
>[ 98049.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98049.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98049.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98049.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98049.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98049.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98049.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98049.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98050.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98050.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98050.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 98050.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 98050.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98050.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98050.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 98050.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 98050.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 98051.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 98051.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1bba8]
>[ 98051.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1bba8] width 2880 pitch 11520 (/4 2880)
>[ 98051.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98051.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98051.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98051.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98051.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98051.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98051.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98051.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98051.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98051.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02ae00]
>[ 98051.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02ae00] width 2880 pitch 11520 (/4 2880)
>[ 98052.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98052.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98065.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 98065.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 98065.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98065.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98065.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98065.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98065.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176670]
>[ 98065.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176670] width 2880 pitch 11520 (/4 2880)
>[ 98065.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 98065.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 98066.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa176670]
>[ 98066.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa176670] width 2880 pitch 11520 (/4 2880)
>[ 98066.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98066.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98066.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66430]
>[ 98066.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66430] width 2880 pitch 11520 (/4 2880)
>[ 98066.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98066.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98067.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98067.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98071.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98071.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98071.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa113cb0]
>[ 98072.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa113cb0] width 2880 pitch 11520 (/4 2880)
>[ 98072.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66dc0]
>[ 98072.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66dc0] width 2880 pitch 11520 (/4 2880)
>[ 98072.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66430]
>[ 98072.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66430] width 2880 pitch 11520 (/4 2880)
>[ 98072.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 98072.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 98072.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010668]
>[ 98072.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010668] width 2880 pitch 11520 (/4 2880)
>[ 98101.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010698]
>[ 98101.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010698] width 2880 pitch 11520 (/4 2880)
>[ 98108.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 98108.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 98109.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010638]
>[ 98109.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010638] width 2880 pitch 11520 (/4 2880)
>[ 98110.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010638]
>[ 98110.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010638] width 2880 pitch 11520 (/4 2880)
>[ 98113.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa201368]
>[ 98113.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa201368] width 2880 pitch 11520 (/4 2880)
>[ 98114.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007a50]
>[ 98114.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007a50] width 2880 pitch 11520 (/4 2880)
>[ 98123.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47a40]
>[ 98123.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47a40] width 2880 pitch 11520 (/4 2880)
>[ 98124.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa019e50]
>[ 98124.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa019e50] width 2880 pitch 11520 (/4 2880)
>[ 98126.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47a40]
>[ 98126.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47a40] width 2880 pitch 11520 (/4 2880)
>[ 98127.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f44f68]
>[ 98127.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f44f68] width 2880 pitch 11520 (/4 2880)
>[ 98149.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b6e0]
>[ 98149.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b6e0] width 2880 pitch 11520 (/4 2880)
>[ 98149.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010638]
>[ 98149.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010638] width 2880 pitch 11520 (/4 2880)
>[ 98149.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61158]
>[ 98149.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61158] width 2880 pitch 11520 (/4 2880)
>[ 98149.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010638]
>[ 98149.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010638] width 2880 pitch 11520 (/4 2880)
>[ 98150.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61158]
>[ 98150.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61158] width 2880 pitch 11520 (/4 2880)
>[ 98150.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e9900]
>[ 98150.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e9900] width 2880 pitch 11520 (/4 2880)
>[ 98150.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00f9f0]
>[ 98150.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00f9f0] width 2880 pitch 11520 (/4 2880)
>[ 98150.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e9900]
>[ 98150.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e9900] width 2880 pitch 11520 (/4 2880)
>[ 98150.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[ 98150.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[ 98151.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd30d8]
>[ 98151.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd30d8] width 2880 pitch 11520 (/4 2880)
>[ 98151.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[ 98151.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[ 98151.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98151.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98151.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 98151.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 98151.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[ 98151.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[ 98152.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 98152.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 98152.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98152.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98152.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98152.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98152.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98152.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98152.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98152.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98152.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98152.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98153.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98153.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98153.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 98153.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 98153.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516ed8]
>[ 98153.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516ed8] width 2880 pitch 11520 (/4 2880)
>[ 98153.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98153.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98156.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 98156.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 98156.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98156.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98157.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 98157.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 98157.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98157.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98157.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 98157.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 98157.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 98157.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 98157.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd660]
>[ 98157.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd660] width 2880 pitch 11520 (/4 2880)
>[ 98157.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 98158.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 98158.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c71a40]
>[ 98158.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c71a40] width 2880 pitch 11520 (/4 2880)
>[ 98158.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010638]
>[ 98158.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010638] width 2880 pitch 11520 (/4 2880)
>[ 98158.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98158.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98158.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98158.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98158.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98158.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98159.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b6e0]
>[ 98159.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b6e0] width 2880 pitch 11520 (/4 2880)
>[ 98159.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248538]
>[ 98159.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248538] width 2880 pitch 11520 (/4 2880)
>[ 98159.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4ba8]
>[ 98159.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4ba8] width 2880 pitch 11520 (/4 2880)
>[ 98159.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 98159.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 98159.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd30d8]
>[ 98159.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd30d8] width 2880 pitch 11520 (/4 2880)
>[ 98159.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98160.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98160.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd30d8]
>[ 98160.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd30d8] width 2880 pitch 11520 (/4 2880)
>[ 98160.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[ 98160.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[ 98160.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa51ada8]
>[ 98160.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa51ada8] width 2880 pitch 11520 (/4 2880)
>[ 98160.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 98160.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 98160.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 98160.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 98160.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 98160.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 98161.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd508]
>[ 98161.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd508] width 2880 pitch 11520 (/4 2880)
>[ 98162.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e94d0]
>[ 98162.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e94d0] width 2880 pitch 11520 (/4 2880)
>[ 98162.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98162.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98162.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e94d0]
>[ 98162.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e94d0] width 2880 pitch 11520 (/4 2880)
>[ 98162.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc538]
>[ 98162.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc538] width 2880 pitch 11520 (/4 2880)
>[ 98163.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8d0b0]
>[ 98163.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8d0b0] width 2880 pitch 11520 (/4 2880)
>[ 98163.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc538]
>[ 98163.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc538] width 2880 pitch 11520 (/4 2880)
>[ 98163.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa261d68]
>[ 98163.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa261d68] width 2880 pitch 11520 (/4 2880)
>[ 98164.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e94d0]
>[ 98164.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e94d0] width 2880 pitch 11520 (/4 2880)
>[ 98164.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bb40]
>[ 98164.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bb40] width 2880 pitch 11520 (/4 2880)
>[ 98165.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa123610]
>[ 98165.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa123610] width 2880 pitch 11520 (/4 2880)
>[ 98165.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96c20]
>[ 98165.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96c20] width 2880 pitch 11520 (/4 2880)
>[ 98165.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724c8]
>[ 98165.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724c8] width 2880 pitch 11520 (/4 2880)
>[ 98165.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b840]
>[ 98165.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b840] width 2880 pitch 11520 (/4 2880)
>[ 98165.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b70e68]
>[ 98165.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b70e68] width 2880 pitch 11520 (/4 2880)
>[ 98165.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25d310]
>[ 98165.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25d310] width 2880 pitch 11520 (/4 2880)
>[ 98165.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a96c20]
>[ 98165.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a96c20] width 2880 pitch 11520 (/4 2880)
>[ 98165.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724c8]
>[ 98165.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724c8] width 2880 pitch 11520 (/4 2880)
>[ 98165.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b840]
>[ 98166.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b840] width 2880 pitch 11520 (/4 2880)
>[ 98166.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b70e68]
>[ 98166.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b70e68] width 2880 pitch 11520 (/4 2880)
>[ 98166.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 98166.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 98166.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 98166.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 98166.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724c8]
>[ 98166.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724c8] width 2880 pitch 11520 (/4 2880)
>[ 98166.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b840]
>[ 98166.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b840] width 2880 pitch 11520 (/4 2880)
>[ 98167.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ef678]
>[ 98167.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ef678] width 2880 pitch 11520 (/4 2880)
>[ 98167.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 98167.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 98167.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3724c8]
>[ 98167.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3724c8] width 2880 pitch 11520 (/4 2880)
>[ 98167.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 98167.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 98167.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ef678]
>[ 98167.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ef678] width 2880 pitch 11520 (/4 2880)
>[ 98167.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e8b78]
>[ 98167.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e8b78] width 2880 pitch 11520 (/4 2880)
>[ 98167.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[ 98167.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[ 98223.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa181010]
>[ 98223.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa181010] width 2880 pitch 11520 (/4 2880)
>[ 98223.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010668]
>[ 98223.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010668] width 2880 pitch 11520 (/4 2880)
>[ 98223.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 98223.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 98223.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03fe58]
>[ 98223.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03fe58] width 2880 pitch 11520 (/4 2880)
>[ 98223.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517818]
>[ 98223.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517818] width 2880 pitch 11520 (/4 2880)
>[ 98226.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa261fb0]
>[ 98226.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa261fb0] width 2880 pitch 11520 (/4 2880)
>[ 98227.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa366030]
>[ 98227.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa366030] width 2880 pitch 11520 (/4 2880)
>[ 98227.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bfb38]
>[ 98227.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bfb38] width 2880 pitch 11520 (/4 2880)
>[ 98227.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa366030]
>[ 98227.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa366030] width 2880 pitch 11520 (/4 2880)
>[ 98227.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bfb38]
>[ 98227.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bfb38] width 2880 pitch 11520 (/4 2880)
>[ 98227.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa366030]
>[ 98227.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa366030] width 2880 pitch 11520 (/4 2880)
>[ 98227.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bfb38]
>[ 98227.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bfb38] width 2880 pitch 11520 (/4 2880)
>[ 98227.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa366030]
>[ 98227.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa366030] width 2880 pitch 11520 (/4 2880)
>[ 98227.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bfb38]
>[ 98227.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bfb38] width 2880 pitch 11520 (/4 2880)
>[ 98227.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bf798]
>[ 98227.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bf798] width 2880 pitch 11520 (/4 2880)
>[ 98227.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bf630]
>[ 98227.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bf630] width 2880 pitch 11520 (/4 2880)
>[ 98227.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007eb0]
>[ 98227.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007eb0] width 2880 pitch 11520 (/4 2880)
>[ 98227.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bf798]
>[ 98228.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bf798] width 2880 pitch 11520 (/4 2880)
>[ 98228.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007eb0]
>[ 98228.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007eb0] width 2880 pitch 11520 (/4 2880)
>[ 98228.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3bf798]
>[ 98228.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3bf798] width 2880 pitch 11520 (/4 2880)
>[ 98228.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99521f8]
>[ 98228.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99521f8] width 2880 pitch 11520 (/4 2880)
>[ 98228.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa257510]
>[ 98228.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa257510] width 2880 pitch 11520 (/4 2880)
>[ 98228.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa257510]
>[ 98228.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa257510] width 2880 pitch 11520 (/4 2880)
>[ 98228.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010668]
>[ 98228.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010668] width 2880 pitch 11520 (/4 2880)
>[ 98228.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98228.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009768]
>[ 98228.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009768] width 2880 pitch 11520 (/4 2880)
>[ 98228.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3260b0]
>[ 98228.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3260b0] width 2880 pitch 11520 (/4 2880)
>[ 98251.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f890]
>[ 98251.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f890] width 2880 pitch 11520 (/4 2880)
>[ 98254.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010668]
>[ 98254.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010668] width 2880 pitch 11520 (/4 2880)
>[ 98278.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98278.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98278.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98278.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98279.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98279.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98279.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98279.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98279.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2574c0]
>[ 98279.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2574c0] width 2880 pitch 11520 (/4 2880)
>[ 98279.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb80]
>[ 98279.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb80] width 2880 pitch 11520 (/4 2880)
>[ 98279.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009b28]
>[ 98279.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009b28] width 2880 pitch 11520 (/4 2880)
>[ 98280.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2b0]
>[ 98280.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2b0] width 2880 pitch 11520 (/4 2880)
>[ 98280.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2e8]
>[ 98280.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2e8] width 2880 pitch 11520 (/4 2880)
>[ 98280.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c51b68]
>[ 98280.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c51b68] width 2880 pitch 11520 (/4 2880)
>[ 98280.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 98280.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 98280.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c51b68]
>[ 98280.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c51b68] width 2880 pitch 11520 (/4 2880)
>[ 98280.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4011e8]
>[ 98280.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4011e8] width 2880 pitch 11520 (/4 2880)
>[ 98283.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c51b68]
>[ 98283.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c51b68] width 2880 pitch 11520 (/4 2880)
>[ 98284.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b4d8]
>[ 98284.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b4d8] width 2880 pitch 11520 (/4 2880)
>[ 98294.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98294.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98294.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa009b28]
>[ 98294.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa009b28] width 2880 pitch 11520 (/4 2880)
>[ 98295.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979a4b0]
>[ 98295.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979a4b0] width 2880 pitch 11520 (/4 2880)
>[ 98295.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa35ecc0]
>[ 98295.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa35ecc0] width 2880 pitch 11520 (/4 2880)
>[ 98295.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98295.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98295.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b4d8]
>[ 98295.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b4d8] width 2880 pitch 11520 (/4 2880)
>[ 98295.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98295.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98296.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2386d0]
>[ 98296.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2386d0] width 2880 pitch 11520 (/4 2880)
>[ 98296.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98296.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98296.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b4d8]
>[ 98296.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b4d8] width 2880 pitch 11520 (/4 2880)
>[ 98296.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ee038]
>[ 98296.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ee038] width 2880 pitch 11520 (/4 2880)
>[ 98305.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9819660]
>[ 98305.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9819660] width 2880 pitch 11520 (/4 2880)
>[ 98305.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98305.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98305.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98305.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98305.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98305.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98306.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98306.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98306.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98306.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98306.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98306.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98307.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98307.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98307.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258d60]
>[ 98307.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258d60] width 2880 pitch 11520 (/4 2880)
>[ 98308.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98308.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98308.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258d60]
>[ 98309.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258d60] width 2880 pitch 11520 (/4 2880)
>[ 98309.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98309.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98312.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98312.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98312.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98312.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98312.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258d60]
>[ 98312.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258d60] width 2880 pitch 11520 (/4 2880)
>[ 98312.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98313.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98313.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98313.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98313.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98313.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98313.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98313.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98313.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98313.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98313.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258d60]
>[ 98313.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258d60] width 2880 pitch 11520 (/4 2880)
>[ 98318.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dffe0]
>[ 98318.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dffe0] width 2880 pitch 11520 (/4 2880)
>[ 98344.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98344.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98344.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c18]
>[ 98344.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c18] width 2880 pitch 11520 (/4 2880)
>[ 98344.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98344.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98349.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c18]
>[ 98349.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c18] width 2880 pitch 11520 (/4 2880)
>[ 98349.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94311b8]
>[ 98349.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94311b8] width 2880 pitch 11520 (/4 2880)
>[ 98349.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98349.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98349.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98349.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98350.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98350.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98350.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401fc8]
>[ 98350.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401fc8] width 2880 pitch 11520 (/4 2880)
>[ 98350.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98350.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98355.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98355.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98355.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98355.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98355.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98355.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98355.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3619e8]
>[ 98355.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3619e8] width 2880 pitch 11520 (/4 2880)
>[ 98356.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98356.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98356.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98356.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98356.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98356.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98358.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98358.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98358.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98358.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98358.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98358.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98358.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98359.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98359.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98359.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98359.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98359.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98368.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98368.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98369.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98369.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98408.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98408.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98408.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98408.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98408.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98408.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98408.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98408.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98408.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98409.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98409.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98409.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98409.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98409.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98410.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98410.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98410.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98410.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98411.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98411.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98411.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98411.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98411.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2576c8]
>[ 98411.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2576c8] width 2880 pitch 11520 (/4 2880)
>[ 98411.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98411.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98411.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 98411.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 98411.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98411.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98411.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 98411.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 98412.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98412.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98412.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 98412.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 98412.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144630]
>[ 98412.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144630] width 2880 pitch 11520 (/4 2880)
>[ 98412.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfee88]
>[ 98412.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfee88] width 2880 pitch 11520 (/4 2880)
>[ 98488.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98488.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98488.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98488.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98488.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98488.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98488.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98488.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98488.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98489.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98489.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98489.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98489.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98489.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98489.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98489.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98489.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98489.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98489.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98489.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98490.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0075e8]
>[ 98490.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0075e8] width 2880 pitch 11520 (/4 2880)
>[ 98490.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98490.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98490.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d51230]
>[ 98491.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d51230] width 2880 pitch 11520 (/4 2880)
>[ 98491.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98491.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98491.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19b800]
>[ 98491.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19b800] width 2880 pitch 11520 (/4 2880)
>[ 98491.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b710]
>[ 98491.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b710] width 2880 pitch 11520 (/4 2880)
>[ 98491.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19b800]
>[ 98491.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19b800] width 2880 pitch 11520 (/4 2880)
>[ 98502.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa29f640]
>[ 98502.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa29f640] width 2880 pitch 11520 (/4 2880)
>[ 98502.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d89cf0]
>[ 98502.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d89cf0] width 2880 pitch 11520 (/4 2880)
>[ 98502.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd538]
>[ 98502.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd538] width 2880 pitch 11520 (/4 2880)
>[ 98502.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c210]
>[ 98502.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c210] width 2880 pitch 11520 (/4 2880)
>[ 98503.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c210]
>[ 98503.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c210] width 2880 pitch 11520 (/4 2880)
>[ 98503.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd538]
>[ 98503.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd538] width 2880 pitch 11520 (/4 2880)
>[ 98503.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d89cf0]
>[ 98503.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d89cf0] width 2880 pitch 11520 (/4 2880)
>[ 98504.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7d98]
>[ 98504.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7d98] width 2880 pitch 11520 (/4 2880)
>[ 98505.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5270]
>[ 98505.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5270] width 2880 pitch 11520 (/4 2880)
>[ 98506.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7d98]
>[ 98506.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7d98] width 2880 pitch 11520 (/4 2880)
>[ 98506.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a0270]
>[ 98506.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a0270] width 2880 pitch 11520 (/4 2880)
>[ 98506.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7d98]
>[ 98506.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7d98] width 2880 pitch 11520 (/4 2880)
>[ 98506.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238750]
>[ 98506.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238750] width 2880 pitch 11520 (/4 2880)
>[ 98506.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac5270]
>[ 98506.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac5270] width 2880 pitch 11520 (/4 2880)
>[ 98507.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98507.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98507.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c18]
>[ 98507.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c18] width 2880 pitch 11520 (/4 2880)
>[ 98507.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98507.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98507.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3c18]
>[ 98507.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3c18] width 2880 pitch 11520 (/4 2880)
>[ 98515.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98515.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98520.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dcda8]
>[ 98520.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dcda8] width 2880 pitch 11520 (/4 2880)
>[ 98523.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dcda8]
>[ 98523.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dcda8] width 2880 pitch 11520 (/4 2880)
>[ 98523.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa30eb30]
>[ 98523.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa30eb30] width 2880 pitch 11520 (/4 2880)
>[ 98523.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98523.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98523.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98523.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98523.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98523.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98523.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98523.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98523.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98523.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98523.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97dcda8]
>[ 98523.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97dcda8] width 2880 pitch 11520 (/4 2880)
>[ 98527.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98527.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98527.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98527.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98527.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a02b8]
>[ 98527.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a02b8] width 2880 pitch 11520 (/4 2880)
>[ 98527.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98527.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98527.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98527.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98527.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98527.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98527.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98527.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98527.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98527.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98538.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98538.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98538.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98538.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98540.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98540.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98548.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98548.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98603.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a8b58]
>[ 98603.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a8b58] width 2880 pitch 11520 (/4 2880)
>[ 98609.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98609.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98609.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98609.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98609.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98609.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98609.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98609.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98609.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98609.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98609.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98609.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98609.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98609.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98609.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98615.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a9f30]
>[ 98615.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a9f30] width 2880 pitch 11520 (/4 2880)
>[ 98617.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98617.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98617.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98617.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98617.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98617.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98617.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98631.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d5658]
>[ 98631.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d5658] width 2880 pitch 11520 (/4 2880)
>[ 98632.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98632.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98632.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98632.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98632.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98632.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98632.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98632.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98632.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98632.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98632.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98632.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98633.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98633.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98633.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98633.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98633.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98633.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98633.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98633.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98633.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1cd9a8]
>[ 98633.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1cd9a8] width 2880 pitch 11520 (/4 2880)
>[ 98633.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3140e8]
>[ 98633.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3140e8] width 2880 pitch 11520 (/4 2880)
>[ 98635.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98635.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98635.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b4820]
>[ 98635.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b4820] width 2880 pitch 11520 (/4 2880)
>[ 98635.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98635.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98635.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b4820]
>[ 98635.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b4820] width 2880 pitch 11520 (/4 2880)
>[ 98635.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98635.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98635.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b4820]
>[ 98635.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b4820] width 2880 pitch 11520 (/4 2880)
>[ 98635.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98635.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98635.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b4820]
>[ 98635.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b4820] width 2880 pitch 11520 (/4 2880)
>[ 98635.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98635.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98635.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b4820]
>[ 98635.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b4820] width 2880 pitch 11520 (/4 2880)
>[ 98635.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98635.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98635.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98635.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98635.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98635.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98635.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98635.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98635.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98635.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98635.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98635.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98635.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98635.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98635.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6fb8]
>[ 98635.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6fb8] width 2880 pitch 11520 (/4 2880)
>[ 98638.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b230]
>[ 98638.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b230] width 2880 pitch 11520 (/4 2880)
>[ 98641.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98641.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98641.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98641.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98641.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98641.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98641.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98641.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98641.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98641.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98641.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98641.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98641.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98641.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98641.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98641.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98641.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98641.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98641.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98641.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98641.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98642.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98642.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98642.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98642.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98642.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98642.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98642.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98642.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c29ef8]
>[ 98642.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c29ef8] width 2880 pitch 11520 (/4 2880)
>[ 98642.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2593c8]
>[ 98642.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2593c8] width 2880 pitch 11520 (/4 2880)
>[ 98642.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa076a98]
>[ 98642.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa076a98] width 2880 pitch 11520 (/4 2880)
>[ 98643.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa050148]
>[ 98643.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa050148] width 2880 pitch 11520 (/4 2880)
>[ 98643.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab138]
>[ 98643.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab138] width 2880 pitch 11520 (/4 2880)
>[ 98643.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98643.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab168]
>[ 98643.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab168] width 2880 pitch 11520 (/4 2880)
>[ 98643.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab1c8]
>[ 98643.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab1c8] width 2880 pitch 11520 (/4 2880)
>[ 98645.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98645.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98645.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa30ecd0]
>[ 98645.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa30ecd0] width 2880 pitch 11520 (/4 2880)
>[ 98645.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98646.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98646.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa30ecd0]
>[ 98646.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa30ecd0] width 2880 pitch 11520 (/4 2880)
>[ 98646.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98646.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98646.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98646.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98646.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98646.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98646.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98646.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98646.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98646.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98646.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98646.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98646.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98646.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98646.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98646.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98646.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98646.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98646.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98646.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98646.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98646.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98646.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98646.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98646.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98646.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98646.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98646.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98648.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98648.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98648.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2574c0]
>[ 98648.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2574c0] width 2880 pitch 11520 (/4 2880)
>[ 98648.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab198]
>[ 98648.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab198] width 2880 pitch 11520 (/4 2880)
>[ 98648.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98648.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98648.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98648.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98648.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98648.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98648.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98648.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98653.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de9778]
>[ 98653.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de9778] width 2880 pitch 11520 (/4 2880)
>[ 98654.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d6a98]
>[ 98654.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d6a98] width 2880 pitch 11520 (/4 2880)
>[ 98654.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9671cd8]
>[ 98654.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9671cd8] width 2880 pitch 11520 (/4 2880)
>[ 98654.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98654.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2060]
>[ 98654.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2060] width 2880 pitch 11520 (/4 2880)
>[ 98654.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c2e0]
>[ 98654.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c2e0] width 2880 pitch 11520 (/4 2880)
>[ 98661.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2090]
>[ 98661.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2090] width 2880 pitch 11520 (/4 2880)
>[ 98664.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe68]
>[ 98664.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe68] width 2880 pitch 11520 (/4 2880)
>[ 98664.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa063970]
>[ 98664.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa063970] width 2880 pitch 11520 (/4 2880)
>[ 98664.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004708]
>[ 98664.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004708] width 2880 pitch 11520 (/4 2880)
>[ 98665.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98665.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98665.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98665.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98665.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98665.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98665.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98665.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98665.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98665.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98665.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98665.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98666.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98666.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98666.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98666.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98666.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98666.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98666.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98666.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98666.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98666.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98666.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98666.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98685.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abe98]
>[ 98685.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abe98] width 2880 pitch 11520 (/4 2880)
>[ 98688.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98688.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63208]
>[ 98688.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63208] width 2880 pitch 11520 (/4 2880)
>[ 98688.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abf28]
>[ 98688.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abf28] width 2880 pitch 11520 (/4 2880)
>[ 98689.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98689.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98689.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98689.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98689.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98689.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98689.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98689.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98689.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98689.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98689.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98689.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98689.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98690.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98690.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98690.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98690.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98690.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 98690.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 98690.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98690.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98703.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a7328]
>[ 98703.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a7328] width 2880 pitch 11520 (/4 2880)
>[ 98705.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3640]
>[ 98705.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3640] width 2880 pitch 11520 (/4 2880)
>[ 98705.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3640]
>[ 98705.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3640] width 2880 pitch 11520 (/4 2880)
>[ 98705.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98705.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98705.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98705.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b66ab8]
>[ 98705.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b66ab8] width 2880 pitch 11520 (/4 2880)
>[ 98705.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98705.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3640]
>[ 98705.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3640] width 2880 pitch 11520 (/4 2880)
>[ 98705.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98705.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3640]
>[ 98705.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3640] width 2880 pitch 11520 (/4 2880)
>[ 98705.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e08]
>[ 98705.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e08] width 2880 pitch 11520 (/4 2880)
>[ 98707.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98707.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98707.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98707.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98707.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98707.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98707.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ad8]
>[ 98707.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ad8] width 2880 pitch 11520 (/4 2880)
>[ 98707.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98707.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98707.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98707.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98707.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98707.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98707.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98707.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98707.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98707.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98707.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98707.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98723.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b36d0]
>[ 98723.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b36d0] width 2880 pitch 11520 (/4 2880)
>[ 98725.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98725.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98725.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98725.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98725.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98726.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98726.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98726.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98726.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3700]
>[ 98726.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3700] width 2880 pitch 11520 (/4 2880)
>[ 98726.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b140]
>[ 98726.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b140] width 2880 pitch 11520 (/4 2880)
>[ 98727.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98727.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98727.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98727.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98727.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98727.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98727.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 98727.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 98727.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98727.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98727.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98727.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98728.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98728.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98728.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98728.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98733.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1abaa8]
>[ 98733.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1abaa8] width 2880 pitch 11520 (/4 2880)
>[ 98735.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98735.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98735.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98735.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98735.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98735.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98735.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98735.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98735.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98735.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98735.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98735.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98735.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98735.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98735.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98735.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98735.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98735.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98735.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98736.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98736.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98736.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98736.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98736.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98736.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98736.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98736.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004328]
>[ 98736.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004328] width 2880 pitch 11520 (/4 2880)
>[ 98736.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b1a0]
>[ 98736.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b1a0] width 2880 pitch 11520 (/4 2880)
>[ 98738.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98738.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05f228]
>[ 98738.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05f228] width 2880 pitch 11520 (/4 2880)
>[ 98738.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 98738.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 98741.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa004358]
>[ 98741.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa004358] width 2880 pitch 11520 (/4 2880)
>[ 98743.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad128]
>[ 98743.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad128] width 2880 pitch 11520 (/4 2880)
>[ 98743.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ac8b8]
>[ 98743.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ac8b8] width 2880 pitch 11520 (/4 2880)
>[ 98743.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98743.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ac8b8]
>[ 98743.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ac8b8] width 2880 pitch 11520 (/4 2880)
>[ 98743.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0044f8]
>[ 98743.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0044f8] width 2880 pitch 11520 (/4 2880)
>[ 98745.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98745.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98745.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98745.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98745.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98745.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98745.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98745.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98745.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98745.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98745.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98745.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98745.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98745.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98745.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98745.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98745.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98745.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98745.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98745.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98745.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98745.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98745.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98745.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98750.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ad158]
>[ 98750.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ad158] width 2880 pitch 11520 (/4 2880)
>[ 98753.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b59c0]
>[ 98753.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b59c0] width 2880 pitch 11520 (/4 2880)
>[ 98753.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47a80]
>[ 98753.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47a80] width 2880 pitch 11520 (/4 2880)
>[ 98753.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b59c0]
>[ 98753.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b59c0] width 2880 pitch 11520 (/4 2880)
>[ 98753.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311940]
>[ 98753.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311940] width 2880 pitch 11520 (/4 2880)
>[ 98753.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b59c0]
>[ 98753.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b59c0] width 2880 pitch 11520 (/4 2880)
>[ 98753.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 98753.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 98753.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98753.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98753.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98753.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98753.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98753.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98753.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98753.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 98753.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 98753.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 98753.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 98754.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003690]
>[ 98754.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003690] width 2880 pitch 11520 (/4 2880)
>[ 98756.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98756.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98756.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98756.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98756.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98756.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98756.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98756.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98756.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98756.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98756.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98756.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98756.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98756.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98756.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98756.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa326110]
>[ 98756.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa326110] width 2880 pitch 11520 (/4 2880)
>[ 98756.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1a9f0]
>[ 98756.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1a9f0] width 2880 pitch 11520 (/4 2880)
>[ 98758.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98758.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98758.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98758.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98758.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98758.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98758.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98758.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98759.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98759.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98759.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98759.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98759.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98759.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98759.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98759.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98759.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98759.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98759.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98759.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 98759.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 98759.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[ 98759.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[ 98790.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1afb88]
>[ 98790.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1afb88] width 2880 pitch 11520 (/4 2880)
>[ 98811.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98811.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98811.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98811.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae90]
>[ 98811.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae90] width 2880 pitch 11520 (/4 2880)
>[ 98813.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98813.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98813.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98813.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98813.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b23970]
>[ 98813.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b23970] width 2880 pitch 11520 (/4 2880)
>[ 98813.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98813.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98813.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003c70]
>[ 98813.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003c70] width 2880 pitch 11520 (/4 2880)
>[ 98813.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98813.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98813.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98813.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98813.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98813.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98813.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98813.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 98813.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 98813.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa311a00]
>[ 98813.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa311a00] width 2880 pitch 11520 (/4 2880)
>[ 98869.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98869.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98870.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98870.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98870.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98870.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98870.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98870.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98870.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98870.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98870.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98870.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98870.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98870.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98870.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98870.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98870.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98870.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98870.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98870.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98870.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98871.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98871.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98871.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98871.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98871.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98871.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98871.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98871.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98871.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98871.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 98871.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 98871.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aaec0]
>[ 98871.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aaec0] width 2880 pitch 11520 (/4 2880)
>[ 98873.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98873.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98873.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98873.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98873.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98875.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa261978]
>[ 98875.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa261978] width 2880 pitch 11520 (/4 2880)
>[ 98878.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98878.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ab078]
>[ 98878.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ab078] width 2880 pitch 11520 (/4 2880)
>[ 98878.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98878.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98879.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98879.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98879.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98879.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98879.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98879.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98879.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98879.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98879.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98879.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98879.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98879.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98879.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98880.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98880.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98880.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98880.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98880.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98880.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98880.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98880.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98880.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98880.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98880.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98880.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98880.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 98880.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 98880.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 98880.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 98943.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd988]
>[ 98943.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd988] width 2880 pitch 11520 (/4 2880)
>[ 98943.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2cd8]
>[ 98943.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2cd8] width 2880 pitch 11520 (/4 2880)
>[ 98943.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2dd8]
>[ 98943.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2dd8] width 2880 pitch 11520 (/4 2880)
>[ 98944.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2dd8]
>[ 98944.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2dd8] width 2880 pitch 11520 (/4 2880)
>[ 98944.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa181010]
>[ 98944.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa181010] width 2880 pitch 11520 (/4 2880)
>[ 98944.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd988]
>[ 98944.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd988] width 2880 pitch 11520 (/4 2880)
>[ 98944.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d048]
>[ 98944.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d048] width 2880 pitch 11520 (/4 2880)
>[ 98949.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0420]
>[ 98949.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0420] width 2880 pitch 11520 (/4 2880)
>[ 98949.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa181010]
>[ 98949.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa181010] width 2880 pitch 11520 (/4 2880)
>[ 98949.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a9880]
>[ 98949.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a9880] width 2880 pitch 11520 (/4 2880)
>[ 98949.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3f58]
>[ 98949.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3f58] width 2880 pitch 11520 (/4 2880)
>[ 98949.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517c98]
>[ 98949.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517c98] width 2880 pitch 11520 (/4 2880)
>[ 98949.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0420]
>[ 98949.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0420] width 2880 pitch 11520 (/4 2880)
>[ 98949.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517c98]
>[ 98949.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517c98] width 2880 pitch 11520 (/4 2880)
>[ 98949.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0420]
>[ 98949.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0420] width 2880 pitch 11520 (/4 2880)
>[ 98949.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517c98]
>[ 98949.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517c98] width 2880 pitch 11520 (/4 2880)
>[ 98949.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0420]
>[ 98949.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0420] width 2880 pitch 11520 (/4 2880)
>[ 98962.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfd0]
>[ 98962.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfd0] width 2880 pitch 11520 (/4 2880)
>[ 98962.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98962.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24dfa0]
>[ 98962.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24dfa0] width 2880 pitch 11520 (/4 2880)
>[ 98962.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a9250]
>[ 98962.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a9250] width 2880 pitch 11520 (/4 2880)
>[ 98974.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98975.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af008]
>[ 98975.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af008] width 2880 pitch 11520 (/4 2880)
>[ 98975.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98975.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98977.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98977.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98977.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98977.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98977.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98977.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98977.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98978.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3b40]
>[ 98978.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3b40] width 2880 pitch 11520 (/4 2880)
>[ 98978.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ed8]
>[ 98978.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ed8] width 2880 pitch 11520 (/4 2880)
>[ 98980.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98980.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98980.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98980.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98980.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98980.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98980.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98980.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca3c50]
>[ 98980.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca3c50] width 2880 pitch 11520 (/4 2880)
>[ 98980.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98980.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98981.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd9b8]
>[ 98981.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd9b8] width 2880 pitch 11520 (/4 2880)
>[ 98985.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa016458]
>[ 98985.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa016458] width 2880 pitch 11520 (/4 2880)
>[ 98985.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98985.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98985.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98985.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98985.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98985.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98985.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98985.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98985.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98985.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98985.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98985.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98985.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98985.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98985.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98985.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98985.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98985.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98985.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98985.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98985.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98986.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98986.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98986.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98986.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98986.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98986.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1af120]
>[ 98986.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1af120] width 2880 pitch 11520 (/4 2880)
>[ 98986.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f6d0]
>[ 98986.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f6d0] width 2880 pitch 11520 (/4 2880)
>[ 98987.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98987.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98987.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98987.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98987.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98987.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98987.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98988.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98988.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 98988.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 98988.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98988.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98988.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98988.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98988.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98988.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98988.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98988.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98988.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 98988.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 98988.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 98988.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 98988.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99002.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa25bab0]
>[ 99002.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa25bab0] width 2880 pitch 11520 (/4 2880)
>[ 99002.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 99002.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 99002.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99002.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99002.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08cc60]
>[ 99002.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08cc60] width 2880 pitch 11520 (/4 2880)
>[ 99002.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e98d0]
>[ 99002.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e98d0] width 2880 pitch 11520 (/4 2880)
>[ 99002.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 99002.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 99002.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99002.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99007.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d4518]
>[ 99007.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d4518] width 2880 pitch 11520 (/4 2880)
>[ 99007.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961e9d0]
>[ 99007.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961e9d0] width 2880 pitch 11520 (/4 2880)
>[ 99008.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e4c88]
>[ 99008.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e4c88] width 2880 pitch 11520 (/4 2880)
>[ 99008.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e98d0]
>[ 99008.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e98d0] width 2880 pitch 11520 (/4 2880)
>[ 99008.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 99008.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 99008.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d1d0]
>[ 99008.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d1d0] width 2880 pitch 11520 (/4 2880)
>[ 99008.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007858]
>[ 99008.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007858] width 2880 pitch 11520 (/4 2880)
>[ 99008.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d1d0]
>[ 99008.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d1d0] width 2880 pitch 11520 (/4 2880)
>[ 99008.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007858]
>[ 99008.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007858] width 2880 pitch 11520 (/4 2880)
>[ 99009.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fffa88]
>[ 99009.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fffa88] width 2880 pitch 11520 (/4 2880)
>[ 99009.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 99009.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 99009.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1997c0]
>[ 99009.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1997c0] width 2880 pitch 11520 (/4 2880)
>[ 99010.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 99010.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 99010.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c4a0]
>[ 99010.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c4a0] width 2880 pitch 11520 (/4 2880)
>[ 99011.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982ae8]
>[ 99011.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982ae8] width 2880 pitch 11520 (/4 2880)
>[ 99012.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99012.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99012.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 99013.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 99013.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 99013.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 99013.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99013.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99013.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x953ad20]
>[ 99013.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x953ad20] width 2880 pitch 11520 (/4 2880)
>[ 99014.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 99014.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 99014.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c83de8]
>[ 99014.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c83de8] width 2880 pitch 11520 (/4 2880)
>[ 99014.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f890]
>[ 99014.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f890] width 2880 pitch 11520 (/4 2880)
>[ 99014.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa519fe0]
>[ 99014.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa519fe0] width 2880 pitch 11520 (/4 2880)
>[ 99014.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f890]
>[ 99014.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f890] width 2880 pitch 11520 (/4 2880)
>[ 99048.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f7d0]
>[ 99048.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f7d0] width 2880 pitch 11520 (/4 2880)
>[ 99057.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bea0]
>[ 99057.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bea0] width 2880 pitch 11520 (/4 2880)
>[ 99065.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d51a8]
>[ 99065.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d51a8] width 2880 pitch 11520 (/4 2880)
>[ 99065.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258f20]
>[ 99065.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258f20] width 2880 pitch 11520 (/4 2880)
>[ 99065.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99065.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99065.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 99065.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 99065.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99065.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99065.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 99065.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 99069.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3f0]
>[ 99069.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3f0] width 2880 pitch 11520 (/4 2880)
>[ 99069.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99069.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99069.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 99069.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 99069.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010390]
>[ 99069.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010390] width 2880 pitch 11520 (/4 2880)
>[ 99069.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3c0]
>[ 99069.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3c0] width 2880 pitch 11520 (/4 2880)
>[ 99069.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3f0]
>[ 99069.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3f0] width 2880 pitch 11520 (/4 2880)
>[ 99069.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99069.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99069.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 99069.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 99069.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010390]
>[ 99069.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010390] width 2880 pitch 11520 (/4 2880)
>[ 99069.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3c0]
>[ 99069.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3c0] width 2880 pitch 11520 (/4 2880)
>[ 99069.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3f0]
>[ 99069.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3f0] width 2880 pitch 11520 (/4 2880)
>[ 99069.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99069.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99069.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 99069.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 99070.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738a18]
>[ 99070.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738a18] width 2880 pitch 11520 (/4 2880)
>[ 99070.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed3f0]
>[ 99070.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed3f0] width 2880 pitch 11520 (/4 2880)
>[ 99070.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99070.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99070.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99070.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99070.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010390]
>[ 99070.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010390] width 2880 pitch 11520 (/4 2880)
>[ 99070.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99070.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99070.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 99070.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 99070.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d1c8]
>[ 99070.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d1c8] width 2880 pitch 11520 (/4 2880)
>[ 99072.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99072.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99073.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 99073.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 99078.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b0a08]
>[ 99078.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b0a08] width 2880 pitch 11520 (/4 2880)
>[ 99079.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de1b68]
>[ 99079.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de1b68] width 2880 pitch 11520 (/4 2880)
>[ 99079.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99079.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99079.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b0a08]
>[ 99079.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b0a08] width 2880 pitch 11520 (/4 2880)
>[ 99079.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99079.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99079.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed288]
>[ 99079.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed288] width 2880 pitch 11520 (/4 2880)
>[ 99080.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa128c70]
>[ 99080.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa128c70] width 2880 pitch 11520 (/4 2880)
>[ 99080.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99080.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99080.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa128c70]
>[ 99080.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa128c70] width 2880 pitch 11520 (/4 2880)
>[ 99080.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99080.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99080.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99080.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99081.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99081.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99081.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99081.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99081.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99081.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99081.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99081.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99081.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbea0]
>[ 99081.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbea0] width 2880 pitch 11520 (/4 2880)
>[ 99081.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a03cb0]
>[ 99081.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a03cb0] width 2880 pitch 11520 (/4 2880)
>[ 99081.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa30ec40]
>[ 99081.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa30ec40] width 2880 pitch 11520 (/4 2880)
>[ 99081.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517b40]
>[ 99081.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517b40] width 2880 pitch 11520 (/4 2880)
>[ 99081.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969ee08]
>[ 99081.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969ee08] width 2880 pitch 11520 (/4 2880)
>[ 99081.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa08ad80]
>[ 99081.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa08ad80] width 2880 pitch 11520 (/4 2880)
>[ 99083.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99083.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99086.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99086.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99091.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9812f38]
>[ 99091.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9812f38] width 2880 pitch 11520 (/4 2880)
>[ 99091.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99091.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99092.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b840]
>[ 99092.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b840] width 2880 pitch 11520 (/4 2880)
>[ 99092.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6eba8]
>[ 99092.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6eba8] width 2880 pitch 11520 (/4 2880)
>[ 99092.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b840]
>[ 99092.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b840] width 2880 pitch 11520 (/4 2880)
>[ 99092.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c410]
>[ 99092.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c410] width 2880 pitch 11520 (/4 2880)
>[ 99093.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99093.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99093.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c410]
>[ 99093.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c410] width 2880 pitch 11520 (/4 2880)
>[ 99093.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f39b10]
>[ 99093.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f39b10] width 2880 pitch 11520 (/4 2880)
>[ 99093.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c410]
>[ 99093.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c410] width 2880 pitch 11520 (/4 2880)
>[ 99093.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007798]
>[ 99093.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007798] width 2880 pitch 11520 (/4 2880)
>[ 99105.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15e968]
>[ 99105.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15e968] width 2880 pitch 11520 (/4 2880)
>[ 99106.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9758990]
>[ 99106.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9758990] width 2880 pitch 11520 (/4 2880)
>[ 99122.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1e9900]
>[ 99122.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1e9900] width 2880 pitch 11520 (/4 2880)
>[ 99122.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed288]
>[ 99122.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed288] width 2880 pitch 11520 (/4 2880)
>[ 99125.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99125.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99125.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa519fe0]
>[ 99125.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa519fe0] width 2880 pitch 11520 (/4 2880)
>[ 99125.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc538]
>[ 99125.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc538] width 2880 pitch 11520 (/4 2880)
>[ 99126.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f6320]
>[ 99126.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f6320] width 2880 pitch 11520 (/4 2880)
>[ 99126.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99126.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99128.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa259058]
>[ 99128.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa259058] width 2880 pitch 11520 (/4 2880)
>[ 99129.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f60e8]
>[ 99129.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f60e8] width 2880 pitch 11520 (/4 2880)
>[ 99134.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365c68]
>[ 99134.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365c68] width 2880 pitch 11520 (/4 2880)
>[ 99136.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738958]
>[ 99136.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738958] width 2880 pitch 11520 (/4 2880)
>[ 99136.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5c850]
>[ 99136.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5c850] width 2880 pitch 11520 (/4 2880)
>[ 99139.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed7a0]
>[ 99139.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed7a0] width 2880 pitch 11520 (/4 2880)
>[ 99141.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3c03c8]
>[ 99141.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3c03c8] width 2880 pitch 11520 (/4 2880)
>[ 99149.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed288]
>[ 99149.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed288] width 2880 pitch 11520 (/4 2880)
>[ 99149.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed288]
>[ 99149.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed288] width 2880 pitch 11520 (/4 2880)
>[ 99165.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99165.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99165.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f71b8]
>[ 99165.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f71b8] width 2880 pitch 11520 (/4 2880)
>[ 99165.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f890]
>[ 99165.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f890] width 2880 pitch 11520 (/4 2880)
>[ 99165.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d888]
>[ 99165.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d888] width 2880 pitch 11520 (/4 2880)
>[ 99165.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d39340]
>[ 99165.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d39340] width 2880 pitch 11520 (/4 2880)
>[ 99166.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 99166.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 99166.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99166.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99166.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed58]
>[ 99166.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed58] width 2880 pitch 11520 (/4 2880)
>[ 99166.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ec8]
>[ 99166.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ec8] width 2880 pitch 11520 (/4 2880)
>[ 99166.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ec8]
>[ 99167.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ec8] width 2880 pitch 11520 (/4 2880)
>[ 99167.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067168]
>[ 99167.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067168] width 2880 pitch 11520 (/4 2880)
>[ 99167.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b25c90]
>[ 99167.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b25c90] width 2880 pitch 11520 (/4 2880)
>[ 99167.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c56af0]
>[ 99167.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c56af0] width 2880 pitch 11520 (/4 2880)
>[ 99167.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa257550]
>[ 99168.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa257550] width 2880 pitch 11520 (/4 2880)
>[ 99168.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b2ec8]
>[ 99168.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b2ec8] width 2880 pitch 11520 (/4 2880)
>[ 99168.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b6048]
>[ 99169.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b6048] width 2880 pitch 11520 (/4 2880)
>[ 99169.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99169.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99169.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99169.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99169.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99169.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99169.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99169.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99184.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa251920]
>[ 99184.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa251920] width 2880 pitch 11520 (/4 2880)
>[ 99184.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99184.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99184.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99184.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99184.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067168]
>[ 99184.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067168] width 2880 pitch 11520 (/4 2880)
>[ 99185.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2388]
>[ 99185.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2388] width 2880 pitch 11520 (/4 2880)
>[ 99187.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edc18]
>[ 99187.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edc18] width 2880 pitch 11520 (/4 2880)
>[ 99188.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cacda8]
>[ 99188.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cacda8] width 2880 pitch 11520 (/4 2880)
>[ 99188.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99188.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99188.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa251920]
>[ 99188.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa251920] width 2880 pitch 11520 (/4 2880)
>[ 99188.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1765a0]
>[ 99188.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1765a0] width 2880 pitch 11520 (/4 2880)
>[ 99188.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99188.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99188.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99188.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99188.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa251920]
>[ 99188.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa251920] width 2880 pitch 11520 (/4 2880)
>[ 99188.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1765a0]
>[ 99188.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1765a0] width 2880 pitch 11520 (/4 2880)
>[ 99188.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99188.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99188.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99188.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99188.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa251920]
>[ 99188.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa251920] width 2880 pitch 11520 (/4 2880)
>[ 99188.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99188.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99188.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36d188]
>[ 99188.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36d188] width 2880 pitch 11520 (/4 2880)
>[ 99188.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cacda8]
>[ 99188.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cacda8] width 2880 pitch 11520 (/4 2880)
>[ 99189.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edc18]
>[ 99189.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edc18] width 2880 pitch 11520 (/4 2880)
>[ 99189.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067168]
>[ 99189.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067168] width 2880 pitch 11520 (/4 2880)
>[ 99189.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8af50]
>[ 99189.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8af50] width 2880 pitch 11520 (/4 2880)
>[ 99189.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa134098]
>[ 99189.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa134098] width 2880 pitch 11520 (/4 2880)
>[ 99189.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cacda8]
>[ 99189.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cacda8] width 2880 pitch 11520 (/4 2880)
>[ 99189.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99189.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99189.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99190.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99190.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99190.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99190.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed598]
>[ 99190.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed598] width 2880 pitch 11520 (/4 2880)
>[ 99229.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8af50]
>[ 99229.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8af50] width 2880 pitch 11520 (/4 2880)
>[ 99231.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8e10]
>[ 99231.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8e10] width 2880 pitch 11520 (/4 2880)
>[ 99231.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09eb38]
>[ 99231.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09eb38] width 2880 pitch 11520 (/4 2880)
>[ 99232.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8af50]
>[ 99232.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8af50] width 2880 pitch 11520 (/4 2880)
>[ 99232.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9d498]
>[ 99232.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9d498] width 2880 pitch 11520 (/4 2880)
>[ 99232.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09eb38]
>[ 99232.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09eb38] width 2880 pitch 11520 (/4 2880)
>[ 99232.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8af50]
>[ 99232.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8af50] width 2880 pitch 11520 (/4 2880)
>[ 99233.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09eb38]
>[ 99233.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09eb38] width 2880 pitch 11520 (/4 2880)
>[ 99233.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09eb38]
>[ 99233.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09eb38] width 2880 pitch 11520 (/4 2880)
>[ 99233.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99233.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99233.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd4fe8]
>[ 99233.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd4fe8] width 2880 pitch 11520 (/4 2880)
>[ 99234.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99234.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99234.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bd4fe8]
>[ 99234.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bd4fe8] width 2880 pitch 11520 (/4 2880)
>[ 99234.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa37ba08]
>[ 99234.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa37ba08] width 2880 pitch 11520 (/4 2880)
>[ 99234.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8af50]
>[ 99234.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8af50] width 2880 pitch 11520 (/4 2880)
>[ 99234.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 99234.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 99234.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99234.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99235.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 99235.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 99244.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[ 99244.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[ 99244.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982ae8]
>[ 99244.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982ae8] width 2880 pitch 11520 (/4 2880)
>[ 99244.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 99244.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 99244.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 99244.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 99244.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa014f28]
>[ 99244.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa014f28] width 2880 pitch 11520 (/4 2880)
>[ 99244.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 99244.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 99244.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 99244.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 99248.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9762098]
>[ 99248.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9762098] width 2880 pitch 11520 (/4 2880)
>[ 99248.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995e760]
>[ 99248.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995e760] width 2880 pitch 11520 (/4 2880)
>[ 99248.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d3698]
>[ 99248.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d3698] width 2880 pitch 11520 (/4 2880)
>[ 99248.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09eb38]
>[ 99248.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09eb38] width 2880 pitch 11520 (/4 2880)
>[ 99248.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99248.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99248.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99248.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99248.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17b670]
>[ 99248.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17b670] width 2880 pitch 11520 (/4 2880)
>[ 99248.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d3698]
>[ 99248.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d3698] width 2880 pitch 11520 (/4 2880)
>[ 99248.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c4a0]
>[ 99248.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c4a0] width 2880 pitch 11520 (/4 2880)
>[ 99248.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99248.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99248.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99248.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99248.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 99248.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 99248.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99248.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99249.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d3698]
>[ 99249.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d3698] width 2880 pitch 11520 (/4 2880)
>[ 99249.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99249.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99249.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa014f28]
>[ 99249.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa014f28] width 2880 pitch 11520 (/4 2880)
>[ 99249.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[ 99249.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[ 99249.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99249.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99249.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99249.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99249.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99249.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99249.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c4a0]
>[ 99249.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c4a0] width 2880 pitch 11520 (/4 2880)
>[ 99280.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99280.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99280.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa014f28]
>[ 99280.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa014f28] width 2880 pitch 11520 (/4 2880)
>[ 99280.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa010608]
>[ 99280.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa010608] width 2880 pitch 11520 (/4 2880)
>[ 99280.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99280.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99280.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99280.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99280.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99280.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99280.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c4a0]
>[ 99280.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c4a0] width 2880 pitch 11520 (/4 2880)
>[ 99280.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99280.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99280.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99280.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99280.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99280.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99283.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99283.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99284.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003f60]
>[ 99284.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003f60] width 2880 pitch 11520 (/4 2880)
>[ 99284.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99284.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99284.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99284.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99284.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99284.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99284.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003f60]
>[ 99284.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003f60] width 2880 pitch 11520 (/4 2880)
>[ 99284.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99284.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99284.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99284.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99284.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99284.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99284.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99284.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99289.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99289.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99290.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99290.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99362.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99362.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99362.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003f60]
>[ 99362.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003f60] width 2880 pitch 11520 (/4 2880)
>[ 99362.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003f60]
>[ 99362.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003f60] width 2880 pitch 11520 (/4 2880)
>[ 99362.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99362.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99362.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97620c8]
>[ 99363.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97620c8] width 2880 pitch 11520 (/4 2880)
>[ 99363.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa003f60]
>[ 99363.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa003f60] width 2880 pitch 11520 (/4 2880)
>[ 99363.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99363.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99363.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99363.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99367.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99367.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99367.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 99367.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 99367.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99367.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99367.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa118ab0]
>[ 99367.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa118ab0] width 2880 pitch 11520 (/4 2880)
>[ 99367.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 99367.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 99367.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99367.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99367.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b63218]
>[ 99367.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b63218] width 2880 pitch 11520 (/4 2880)
>[ 99385.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b60228]
>[ 99385.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b60228] width 2880 pitch 11520 (/4 2880)
>[ 99385.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24e4d8]
>[ 99385.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24e4d8] width 2880 pitch 11520 (/4 2880)
>[ 99385.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d3698]
>[ 99385.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d3698] width 2880 pitch 11520 (/4 2880)
>[ 99386.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99386.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99386.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99386.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99387.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99387.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99387.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9647a08]
>[ 99387.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9647a08] width 2880 pitch 11520 (/4 2880)
>[ 99387.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99387.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99387.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99387.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99388.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99388.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99388.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99388.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99388.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99388.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99388.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238b48]
>[ 99388.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238b48] width 2880 pitch 11520 (/4 2880)
>[ 99442.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99442.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99443.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99443.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99443.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99444.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99446.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99446.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99446.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99446.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99446.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99446.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99446.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99446.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99446.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99446.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99447.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99447.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99447.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99447.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99448.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99448.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99448.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99448.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99448.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99448.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99449.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99449.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99449.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99449.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99449.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99449.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99449.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99449.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99449.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99449.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99449.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99450.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99450.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99450.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99450.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1dfb90]
>[ 99450.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1dfb90] width 2880 pitch 11520 (/4 2880)
>[ 99450.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99450.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99450.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99450.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99450.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99450.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99451.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99451.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99451.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99451.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99451.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99451.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99451.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99451.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99451.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99451.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99451.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99452.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99452.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa018818]
>[ 99452.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa018818] width 2880 pitch 11520 (/4 2880)
>[ 99452.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3d48]
>[ 99452.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3d48] width 2880 pitch 11520 (/4 2880)
>[ 99452.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed1b8]
>[ 99452.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed1b8] width 2880 pitch 11520 (/4 2880)
>[ 99452.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed1b8]
>[ 99452.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed1b8] width 2880 pitch 11520 (/4 2880)
>[ 99454.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c61e28]
>[ 99454.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c61e28] width 2880 pitch 11520 (/4 2880)
>[ 99454.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99454.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99459.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99459.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99462.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99462.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99473.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99473.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99474.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99474.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99483.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99483.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99483.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99483.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99483.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c68c0]
>[ 99483.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c68c0] width 2880 pitch 11520 (/4 2880)
>[ 99483.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed580]
>[ 99483.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed580] width 2880 pitch 11520 (/4 2880)
>[ 99483.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517c40]
>[ 99483.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517c40] width 2880 pitch 11520 (/4 2880)
>[ 99483.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c68c0]
>[ 99483.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c68c0] width 2880 pitch 11520 (/4 2880)
>[ 99487.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99487.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99487.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99487.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99487.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99487.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99487.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c68c0]
>[ 99487.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c68c0] width 2880 pitch 11520 (/4 2880)
>[ 99487.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01b568]
>[ 99487.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01b568] width 2880 pitch 11520 (/4 2880)
>[ 99487.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99487.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99487.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99487.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99487.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99487.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99487.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99487.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99496.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b8948]
>[ 99496.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b8948] width 2880 pitch 11520 (/4 2880)
>[ 99496.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa016458]
>[ 99496.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa016458] width 2880 pitch 11520 (/4 2880)
>[ 99497.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99497.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99497.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa016458]
>[ 99497.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa016458] width 2880 pitch 11520 (/4 2880)
>[ 99497.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99497.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99497.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa016458]
>[ 99497.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa016458] width 2880 pitch 11520 (/4 2880)
>[ 99498.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99498.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99498.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99499.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99499.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99499.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99499.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa245c78]
>[ 99499.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa245c78] width 2880 pitch 11520 (/4 2880)
>[ 99499.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99499.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99499.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa245c78]
>[ 99499.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa245c78] width 2880 pitch 11520 (/4 2880)
>[ 99503.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99503.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99503.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99503.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99503.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99503.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99503.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99504.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99504.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99504.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99504.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99504.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99504.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99504.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99504.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99504.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99504.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99504.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99504.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99505.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99505.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99505.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99505.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99505.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99542.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47cf8]
>[ 99542.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47cf8] width 2880 pitch 11520 (/4 2880)
>[ 99542.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99542.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99542.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[ 99542.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[ 99542.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99542.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99542.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[ 99543.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[ 99543.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d4518]
>[ 99543.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d4518] width 2880 pitch 11520 (/4 2880)
>[ 99543.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99543.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99543.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47cf8]
>[ 99543.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47cf8] width 2880 pitch 11520 (/4 2880)
>[ 99543.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed208]
>[ 99543.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed208] width 2880 pitch 11520 (/4 2880)
>[ 99543.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47cf8]
>[ 99543.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47cf8] width 2880 pitch 11520 (/4 2880)
>[ 99544.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99544.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99544.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99544.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99544.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99544.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99544.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99544.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99544.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d4518]
>[ 99544.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d4518] width 2880 pitch 11520 (/4 2880)
>[ 99544.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c2d0]
>[ 99544.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c2d0] width 2880 pitch 11520 (/4 2880)
>[ 99545.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fa8e0]
>[ 99545.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fa8e0] width 2880 pitch 11520 (/4 2880)
>[ 99545.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041f10]
>[ 99545.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041f10] width 2880 pitch 11520 (/4 2880)
>[ 99545.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041f10]
>[ 99545.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041f10] width 2880 pitch 11520 (/4 2880)
>[ 99545.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3fdb88]
>[ 99545.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3fdb88] width 2880 pitch 11520 (/4 2880)
>[ 99545.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99545.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99545.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99545.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99546.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa041f10]
>[ 99546.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa041f10] width 2880 pitch 11520 (/4 2880)
>[ 99546.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99546.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99552.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[ 99553.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[ 99553.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99553.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99553.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[ 99553.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[ 99553.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99553.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99553.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafb8]
>[ 99553.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafb8] width 2880 pitch 11520 (/4 2880)
>[ 99553.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99553.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99553.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafb8]
>[ 99553.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafb8] width 2880 pitch 11520 (/4 2880)
>[ 99554.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99554.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99554.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafb8]
>[ 99554.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafb8] width 2880 pitch 11520 (/4 2880)
>[ 99556.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99556.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99556.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2574d0]
>[ 99556.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2574d0] width 2880 pitch 11520 (/4 2880)
>[ 99556.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99556.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99559.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafa8]
>[ 99559.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafa8] width 2880 pitch 11520 (/4 2880)
>[ 99561.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99561.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99562.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99562.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99568.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99568.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99570.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99570.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99570.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b3f0]
>[ 99570.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b3f0] width 2880 pitch 11520 (/4 2880)
>[ 99571.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99571.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99571.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafa8]
>[ 99571.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafa8] width 2880 pitch 11520 (/4 2880)
>[ 99571.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99571.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99571.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d6a98]
>[ 99571.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d6a98] width 2880 pitch 11520 (/4 2880)
>[ 99571.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99571.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99571.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d6a98]
>[ 99572.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d6a98] width 2880 pitch 11520 (/4 2880)
>[ 99572.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b3f0]
>[ 99572.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b3f0] width 2880 pitch 11520 (/4 2880)
>[ 99572.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b3f0]
>[ 99572.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b3f0] width 2880 pitch 11520 (/4 2880)
>[ 99572.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffafa8]
>[ 99572.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffafa8] width 2880 pitch 11520 (/4 2880)
>[ 99572.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bc678]
>[ 99572.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bc678] width 2880 pitch 11520 (/4 2880)
>[ 99580.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99580.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99580.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99580.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99580.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99580.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99580.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99580.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99580.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99582.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99582.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99583.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa401fc8]
>[ 99583.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa401fc8] width 2880 pitch 11520 (/4 2880)
>[ 99584.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99584.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99584.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[ 99584.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[ 99584.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b730]
>[ 99584.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b730] width 2880 pitch 11520 (/4 2880)
>[ 99584.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[ 99584.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[ 99585.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[ 99585.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[ 99585.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5180a0]
>[ 99585.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5180a0] width 2880 pitch 11520 (/4 2880)
>[ 99585.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00b3f0]
>[ 99585.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00b3f0] width 2880 pitch 11520 (/4 2880)
>[ 99600.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[ 99600.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[ 99600.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99600.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99605.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99605.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99605.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[ 99605.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[ 99605.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99605.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99605.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99605.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99605.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517118]
>[ 99605.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517118] width 2880 pitch 11520 (/4 2880)
>[ 99605.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba568]
>[ 99605.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba568] width 2880 pitch 11520 (/4 2880)
>[ 99609.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98efa28]
>[ 99609.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98efa28] width 2880 pitch 11520 (/4 2880)
>[ 99609.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99609.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99609.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99609.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99609.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99609.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99609.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1cf0]
>[ 99609.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1cf0] width 2880 pitch 11520 (/4 2880)
>[ 99609.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98efa28]
>[ 99609.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98efa28] width 2880 pitch 11520 (/4 2880)
>[ 99609.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99609.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99609.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99609.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99609.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99609.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99609.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1cf0]
>[ 99609.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1cf0] width 2880 pitch 11520 (/4 2880)
>[ 99609.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98efa28]
>[ 99609.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98efa28] width 2880 pitch 11520 (/4 2880)
>[ 99609.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99609.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99609.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99609.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99609.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99609.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99610.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99610.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99610.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99610.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99610.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99610.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99610.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99610.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99610.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99610.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99610.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99610.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99610.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99611.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99611.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99611.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99618.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[ 99624.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[ 99628.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9971740]
>[ 99628.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9971740] width 2880 pitch 11520 (/4 2880)
>[ 99671.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[ 99671.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[ 99672.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ce70]
>[ 99672.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ce70] width 2880 pitch 11520 (/4 2880)
>[ 99672.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818c88]
>[ 99672.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818c88] width 2880 pitch 11520 (/4 2880)
>[ 99673.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[ 99673.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[ 99675.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[ 99675.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[ 99676.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[ 99676.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[ 99676.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[ 99676.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[ 99676.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[ 99676.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[ 99676.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54400]
>[ 99676.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54400] width 2880 pitch 11520 (/4 2880)
>[ 99676.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dbf10]
>[ 99676.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dbf10] width 2880 pitch 11520 (/4 2880)
>[ 99677.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99677.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99677.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65df0]
>[ 99677.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65df0] width 2880 pitch 11520 (/4 2880)
>[ 99677.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99677.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99677.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615940]
>[ 99677.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615940] width 2880 pitch 11520 (/4 2880)
>[ 99677.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99677.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99677.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9615940]
>[ 99677.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9615940] width 2880 pitch 11520 (/4 2880)
>[ 99677.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99678.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99682.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[ 99682.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[ 99696.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d1d0]
>[ 99696.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d1d0] width 2880 pitch 11520 (/4 2880)
>[ 99718.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[ 99718.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[ 99719.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99719.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99719.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[ 99719.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[ 99719.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99719.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99719.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54400]
>[ 99719.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54400] width 2880 pitch 11520 (/4 2880)
>[ 99719.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99719.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99719.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[ 99719.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[ 99719.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[ 99719.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[ 99719.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99719.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99719.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b54400]
>[ 99719.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b54400] width 2880 pitch 11520 (/4 2880)
>[ 99719.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99719.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99721.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4d3698]
>[ 99721.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4d3698] width 2880 pitch 11520 (/4 2880)
>[ 99722.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[ 99722.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[ 99728.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[ 99728.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[ 99729.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[ 99729.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[ 99729.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99729.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99729.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99729.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99729.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[ 99729.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[ 99729.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[ 99729.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[ 99729.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99729.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99729.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99729.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99729.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99729.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99729.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[ 99729.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[ 99729.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99729.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99729.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818c88]
>[ 99729.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818c88] width 2880 pitch 11520 (/4 2880)
>[ 99729.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99729.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99729.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[ 99729.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[ 99730.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99730.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99730.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818c88]
>[ 99730.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818c88] width 2880 pitch 11520 (/4 2880)
>[ 99730.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99730.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99732.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[ 99732.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[ 99732.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[ 99732.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[ 99732.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd560]
>[ 99732.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd560] width 2880 pitch 11520 (/4 2880)
>[ 99734.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[ 99734.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[ 99735.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[ 99735.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[ 99735.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[ 99735.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[ 99735.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[ 99735.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[ 99735.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[ 99735.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[ 99735.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[ 99735.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[ 99735.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[ 99736.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[ 99736.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99736.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99736.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 99736.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 99736.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99736.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99736.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99737.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99737.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b730]
>[ 99737.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b730] width 2880 pitch 11520 (/4 2880)
>[ 99737.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99737.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99737.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b730]
>[ 99737.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b730] width 2880 pitch 11520 (/4 2880)
>[ 99737.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99737.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99737.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982ae8]
>[ 99737.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982ae8] width 2880 pitch 11520 (/4 2880)
>[ 99737.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[ 99737.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[ 99815.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1b50]
>[ 99815.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1b50] width 2880 pitch 11520 (/4 2880)
>[ 99815.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[ 99815.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[ 99844.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[ 99844.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[ 99844.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[ 99844.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[ 99844.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99844.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99844.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[ 99844.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[ 99844.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982ae8]
>[ 99844.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982ae8] width 2880 pitch 11520 (/4 2880)
>[ 99849.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[ 99849.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[ 99849.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99849.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99849.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[ 99849.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[ 99849.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[ 99849.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[ 99849.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[ 99849.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[ 99849.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[ 99849.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[ 99849.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99849.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99849.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[ 99849.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[ 99849.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[ 99849.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[ 99849.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[ 99849.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[ 99849.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[ 99849.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[ 99849.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99849.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99849.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[ 99849.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[ 99849.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[ 99849.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[ 99850.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99850.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99850.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99850.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99850.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[ 99850.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[ 99850.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[ 99850.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[ 99850.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99850.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99851.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99851.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99851.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99851.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99851.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99851.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99854.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818c88]
>[ 99854.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818c88] width 2880 pitch 11520 (/4 2880)
>[ 99855.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99855.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99855.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99855.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99855.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99855.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99855.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99855.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99855.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99855.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99855.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99855.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99855.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99869.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[ 99869.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[ 99878.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99878.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99878.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99878.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99878.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99878.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99878.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99878.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99878.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99878.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99878.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99878.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99878.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99878.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99878.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99878.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99879.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99879.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99879.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99879.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99879.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99879.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99879.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99879.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99879.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[ 99879.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[ 99879.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[ 99879.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[ 99881.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ed190]
>[ 99881.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ed190] width 2880 pitch 11520 (/4 2880)
>[ 99882.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8fed0]
>[ 99882.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8fed0] width 2880 pitch 11520 (/4 2880)
>[ 99882.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[ 99882.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[ 99882.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba568]
>[ 99882.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba568] width 2880 pitch 11520 (/4 2880)
>[ 99883.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[ 99883.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[ 99883.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[ 99883.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[ 99884.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[ 99884.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[ 99884.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67260]
>[ 99884.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67260] width 2880 pitch 11520 (/4 2880)
>[ 99884.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc6688]
>[ 99884.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc6688] width 2880 pitch 11520 (/4 2880)
>[ 99884.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[ 99885.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[ 99885.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc6688]
>[ 99885.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc6688] width 2880 pitch 11520 (/4 2880)
>[ 99885.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99885.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99885.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0d7548]
>[ 99885.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0d7548] width 2880 pitch 11520 (/4 2880)
>[ 99885.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[ 99885.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[ 99886.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99886.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99886.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99886.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99886.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99886.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99886.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99886.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99886.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99886.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[ 99886.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[ 99886.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[ 99886.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[ 99887.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[ 99912.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b32088]
>[ 99912.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b32088] width 2880 pitch 11520 (/4 2880)
>[ 99913.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa036d88]
>[ 99913.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa036d88] width 2880 pitch 11520 (/4 2880)
>[ 99916.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04ef38]
>[ 99916.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04ef38] width 2880 pitch 11520 (/4 2880)
>[ 99926.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1f068]
>[ 99926.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1f068] width 2880 pitch 11520 (/4 2880)
>[ 99926.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a5c78]
>[ 99926.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a5c78] width 2880 pitch 11520 (/4 2880)
>[ 99926.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9673ff0]
>[ 99926.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9673ff0] width 2880 pitch 11520 (/4 2880)
>[ 99926.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ae7c0]
>[ 99927.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ae7c0] width 2880 pitch 11520 (/4 2880)
>[ 99927.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9673ff0]
>[ 99927.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9673ff0] width 2880 pitch 11520 (/4 2880)
>[ 99927.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ae7c0]
>[ 99927.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ae7c0] width 2880 pitch 11520 (/4 2880)
>[ 99927.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9673ff0]
>[ 99927.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9673ff0] width 2880 pitch 11520 (/4 2880)
>[ 99928.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99928.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99928.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99928.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99928.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[ 99929.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[ 99929.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[ 99929.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[ 99947.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8828]
>[ 99947.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8828] width 2880 pitch 11520 (/4 2880)
>[ 99947.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf920]
>[ 99947.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf920] width 2880 pitch 11520 (/4 2880)
>[ 99947.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50110]
>[ 99947.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50110] width 2880 pitch 11520 (/4 2880)
>[ 99947.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991da40]
>[ 99947.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991da40] width 2880 pitch 11520 (/4 2880)
>[ 99947.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95bf358]
>[ 99947.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95bf358] width 2880 pitch 11520 (/4 2880)
>[ 99947.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99947.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99947.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1e78]
>[ 99947.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1e78] width 2880 pitch 11520 (/4 2880)
>[ 99947.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991da40]
>[ 99947.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991da40] width 2880 pitch 11520 (/4 2880)
>[ 99947.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97c1e78]
>[ 99948.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97c1e78] width 2880 pitch 11520 (/4 2880)
>[ 99948.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99948.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99948.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99948.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99948.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99948.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99948.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf920]
>[ 99948.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf920] width 2880 pitch 11520 (/4 2880)
>[ 99948.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99948.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99948.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf920]
>[ 99948.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf920] width 2880 pitch 11520 (/4 2880)
>[ 99948.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e2b38]
>[ 99948.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e2b38] width 2880 pitch 11520 (/4 2880)
>[ 99950.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c64d70]
>[ 99950.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c64d70] width 2880 pitch 11520 (/4 2880)
>[ 99957.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976d378]
>[ 99957.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976d378] width 2880 pitch 11520 (/4 2880)
>[ 99964.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9815b80]
>[ 99964.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9815b80] width 2880 pitch 11520 (/4 2880)
>[ 99964.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997d668]
>[ 99964.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997d668] width 2880 pitch 11520 (/4 2880)
>[ 99964.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[ 99964.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[ 99964.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3c0208]
>[ 99965.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3c0208] width 2880 pitch 11520 (/4 2880)
>[ 99965.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[ 99965.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[ 99965.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3c0208]
>[ 99965.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3c0208] width 2880 pitch 11520 (/4 2880)
>[ 99965.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[ 99965.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[ 99965.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984bd10]
>[ 99965.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984bd10] width 2880 pitch 11520 (/4 2880)
>[ 99965.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[ 99965.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[ 99965.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[ 99965.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[ 99965.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99965.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99965.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[ 99965.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[ 99965.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[ 99965.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[ 99967.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[ 99967.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[ 99967.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[ 99967.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[ 99967.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[ 99967.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[ 99968.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[ 99968.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[ 99968.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[ 99968.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[ 99969.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[ 99969.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[ 99969.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[ 99969.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[ 99969.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[ 99969.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[ 99969.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5bf8]
>[ 99969.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5bf8] width 2880 pitch 11520 (/4 2880)
>[ 99969.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[ 99969.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[ 99969.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984bd10]
>[ 99969.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984bd10] width 2880 pitch 11520 (/4 2880)
>[ 99972.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818c88]
>[ 99972.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818c88] width 2880 pitch 11520 (/4 2880)
>[ 99973.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07a238]
>[ 99973.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07a238] width 2880 pitch 11520 (/4 2880)
>[ 99973.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[ 99973.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[ 99973.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[ 99973.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[ 99973.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[ 99973.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[ 99973.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[ 99973.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[ 99973.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[ 99973.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[ 99974.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[ 99974.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[ 99975.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[ 99975.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[ 99980.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[ 99980.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[ 99984.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[ 99984.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100016.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100016.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100016.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100016.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100016.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100016.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100016.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100017.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100017.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100017.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100017.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100017.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100017.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100017.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100017.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100017.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100017.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100017.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100026.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[100026.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[100026.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d65df0]
>[100026.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d65df0] width 2880 pitch 11520 (/4 2880)
>[100042.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100042.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100043.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100043.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100043.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[100043.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[100055.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[100055.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[100105.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[100105.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[100105.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100105.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100105.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100105.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100105.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100105.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100105.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100105.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100105.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100106.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100106.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[100106.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[100106.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba568]
>[100106.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba568] width 2880 pitch 11520 (/4 2880)
>[100106.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100106.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100106.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100106.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100106.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[100106.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[100106.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[100106.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[100106.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cba568]
>[100106.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cba568] width 2880 pitch 11520 (/4 2880)
>[100106.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100106.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100106.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100106.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100109.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1cf0]
>[100109.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1cf0] width 2880 pitch 11520 (/4 2880)
>[100109.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5080]
>[100109.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5080] width 2880 pitch 11520 (/4 2880)
>[100112.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9471568]
>[100112.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9471568] width 2880 pitch 11520 (/4 2880)
>[100112.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[100112.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[100112.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[100112.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[100112.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[100112.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[100112.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100112.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100113.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100113.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100113.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100113.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100113.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[100113.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100113.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[100113.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[100113.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100113.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100117.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9471568]
>[100117.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9471568] width 2880 pitch 11520 (/4 2880)
>[100117.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100117.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100117.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9982ae8]
>[100117.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9982ae8] width 2880 pitch 11520 (/4 2880)
>[100117.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[100117.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[100117.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9471568]
>[100117.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9471568] width 2880 pitch 11520 (/4 2880)
>[100117.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100117.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100117.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9471568]
>[100117.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9471568] width 2880 pitch 11520 (/4 2880)
>[100117.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100117.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100117.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9471568]
>[100117.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9471568] width 2880 pitch 11520 (/4 2880)
>[100147.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[100147.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[100147.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100147.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100147.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100147.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100147.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100147.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100147.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[100147.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[100147.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100147.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100147.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[100147.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[100147.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100147.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100147.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[100147.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[100147.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100147.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100148.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c5bf8]
>[100148.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c5bf8] width 2880 pitch 11520 (/4 2880)
>[100148.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100148.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100148.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100148.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100148.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100148.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100148.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100148.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100148.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100148.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100148.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100148.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100148.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa518070]
>[100149.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa518070] width 2880 pitch 11520 (/4 2880)
>[100149.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[100149.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[100149.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[100149.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[100149.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[100149.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[100149.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[100150.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[100150.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100150.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100150.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100150.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100150.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100150.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100150.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[100151.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[100151.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100151.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100151.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[100151.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[100151.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100151.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100159.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100159.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100160.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100160.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100169.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100170.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100170.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x960c5e0]
>[100170.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x960c5e0] width 2880 pitch 11520 (/4 2880)
>[100170.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[100170.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[100170.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[100170.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[100170.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100170.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100170.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100170.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100171.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100171.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100171.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100171.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100171.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed68]
>[100171.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed68] width 2880 pitch 11520 (/4 2880)
>[100171.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100171.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100172.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed68]
>[100172.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed68] width 2880 pitch 11520 (/4 2880)
>[100172.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100172.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100208.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed68]
>[100208.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed68] width 2880 pitch 11520 (/4 2880)
>[100208.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100208.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100209.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dfed68]
>[100209.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dfed68] width 2880 pitch 11520 (/4 2880)
>[100209.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100209.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100209.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100209.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100209.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100209.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100209.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100209.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100210.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100210.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100210.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100210.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100210.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100210.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100210.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100210.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100210.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100210.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100210.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100210.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100211.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[100211.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[100211.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[100211.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[100211.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[100211.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[100211.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100211.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100220.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x975dcb0]
>[100220.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x975dcb0] width 2880 pitch 11520 (/4 2880)
>[100220.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100220.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100221.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100221.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100221.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100221.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100221.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100221.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100222.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100222.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100222.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100222.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100222.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100222.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100222.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100222.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100222.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100222.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100223.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[100223.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[100223.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100223.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100223.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9852ed8]
>[100223.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9852ed8] width 2880 pitch 11520 (/4 2880)
>[100223.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a99038]
>[100223.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a99038] width 2880 pitch 11520 (/4 2880)
>[100234.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[100234.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[100237.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fef70]
>[100237.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fef70] width 2880 pitch 11520 (/4 2880)
>[100238.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100238.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100246.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a70920]
>[100246.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a70920] width 2880 pitch 11520 (/4 2880)
>[100246.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd560]
>[100246.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd560] width 2880 pitch 11520 (/4 2880)
>[100246.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd560]
>[100246.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd560] width 2880 pitch 11520 (/4 2880)
>[100246.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100246.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100246.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99dd560]
>[100246.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99dd560] width 2880 pitch 11520 (/4 2880)
>[100247.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d46a28]
>[100247.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d46a28] width 2880 pitch 11520 (/4 2880)
>[100247.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff498]
>[100247.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff498] width 2880 pitch 11520 (/4 2880)
>[100247.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d46a28]
>[100247.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d46a28] width 2880 pitch 11520 (/4 2880)
>[100247.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff498]
>[100247.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff498] width 2880 pitch 11520 (/4 2880)
>[100247.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d46a28]
>[100247.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d46a28] width 2880 pitch 11520 (/4 2880)
>[100247.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cff498]
>[100247.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cff498] width 2880 pitch 11520 (/4 2880)
>[100248.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d46a28]
>[100248.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d46a28] width 2880 pitch 11520 (/4 2880)
>[100248.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9994328]
>[100248.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9994328] width 2880 pitch 11520 (/4 2880)
>[100248.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100248.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100248.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9994328]
>[100249.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9994328] width 2880 pitch 11520 (/4 2880)
>[100249.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100249.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100249.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100249.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100249.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1461b0]
>[100249.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1461b0] width 2880 pitch 11520 (/4 2880)
>[100250.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100250.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100250.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1461b0]
>[100250.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1461b0] width 2880 pitch 11520 (/4 2880)
>[100250.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[100250.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[100250.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1461b0]
>[100250.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1461b0] width 2880 pitch 11520 (/4 2880)
>[100250.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[100250.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[100250.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1461b0]
>[100250.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1461b0] width 2880 pitch 11520 (/4 2880)
>[100255.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100255.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100255.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[100255.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[100255.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1461b0]
>[100255.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1461b0] width 2880 pitch 11520 (/4 2880)
>[100255.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ddf450]
>[100255.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ddf450] width 2880 pitch 11520 (/4 2880)
>[100256.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e788d0]
>[100256.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e788d0] width 2880 pitch 11520 (/4 2880)
>[100256.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa233038]
>[100256.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa233038] width 2880 pitch 11520 (/4 2880)
>[100256.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[100256.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[100256.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100256.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100258.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100258.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100258.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738320]
>[100258.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738320] width 2880 pitch 11520 (/4 2880)
>[100258.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100258.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100259.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ac4b80]
>[100259.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ac4b80] width 2880 pitch 11520 (/4 2880)
>[100259.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100259.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100259.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100259.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100259.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[100259.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[100259.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100259.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100261.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100261.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100261.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[100261.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[100261.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100261.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100261.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[100261.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[100262.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100262.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100262.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[100262.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[100262.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[100262.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[100262.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100262.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100262.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100262.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100263.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100263.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100263.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[100263.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[100263.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100263.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100263.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[100263.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[100263.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100263.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100263.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100263.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100264.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[100264.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[100264.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[100264.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[100264.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9975130]
>[100264.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9975130] width 2880 pitch 11520 (/4 2880)
>[100264.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c750]
>[100264.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c750] width 2880 pitch 11520 (/4 2880)
>[100264.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100264.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100264.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c750]
>[100264.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c750] width 2880 pitch 11520 (/4 2880)
>[100264.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c750]
>[100264.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c750] width 2880 pitch 11520 (/4 2880)
>[100264.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[100264.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[100264.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[100264.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[100266.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738320]
>[100266.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738320] width 2880 pitch 11520 (/4 2880)
>[100266.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[100266.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[100266.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c750]
>[100266.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c750] width 2880 pitch 11520 (/4 2880)
>[100266.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc5b18]
>[100266.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc5b18] width 2880 pitch 11520 (/4 2880)
>[100266.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[100266.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[100291.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[100291.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[100295.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x950c750]
>[100295.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x950c750] width 2880 pitch 11520 (/4 2880)
>[100297.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100297.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100323.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72e08]
>[100323.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72e08] width 2880 pitch 11520 (/4 2880)
>[100323.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbbb40]
>[100323.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbbb40] width 2880 pitch 11520 (/4 2880)
>[100323.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19a3a0]
>[100323.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19a3a0] width 2880 pitch 11520 (/4 2880)
>[100323.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbbb40]
>[100323.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbbb40] width 2880 pitch 11520 (/4 2880)
>[100323.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7f370]
>[100323.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7f370] width 2880 pitch 11520 (/4 2880)
>[100323.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19a3a0]
>[100323.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19a3a0] width 2880 pitch 11520 (/4 2880)
>[100323.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7f370]
>[100323.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7f370] width 2880 pitch 11520 (/4 2880)
>[100328.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98165f8]
>[100328.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98165f8] width 2880 pitch 11520 (/4 2880)
>[100328.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100328.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100328.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa48]
>[100328.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa48] width 2880 pitch 11520 (/4 2880)
>[100328.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100328.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100328.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ace1f8]
>[100328.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ace1f8] width 2880 pitch 11520 (/4 2880)
>[100328.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98165f8]
>[100328.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98165f8] width 2880 pitch 11520 (/4 2880)
>[100328.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100328.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100328.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa48]
>[100328.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa48] width 2880 pitch 11520 (/4 2880)
>[100328.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100328.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100328.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ace1f8]
>[100328.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ace1f8] width 2880 pitch 11520 (/4 2880)
>[100328.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98165f8]
>[100328.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98165f8] width 2880 pitch 11520 (/4 2880)
>[100328.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100328.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100328.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa48]
>[100328.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa48] width 2880 pitch 11520 (/4 2880)
>[100328.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100328.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100329.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100329.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100329.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100329.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100329.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa48]
>[100329.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa48] width 2880 pitch 11520 (/4 2880)
>[100329.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98165f8]
>[100329.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98165f8] width 2880 pitch 11520 (/4 2880)
>[100329.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100329.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100329.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100329.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100329.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100329.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100329.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100329.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100329.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9816688]
>[100329.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9816688] width 2880 pitch 11520 (/4 2880)
>[100329.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28f28]
>[100329.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28f28] width 2880 pitch 11520 (/4 2880)
>[100379.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100379.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100379.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c280]
>[100379.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c280] width 2880 pitch 11520 (/4 2880)
>[100379.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfdb10]
>[100379.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfdb10] width 2880 pitch 11520 (/4 2880)
>[100380.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c280]
>[100380.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c280] width 2880 pitch 11520 (/4 2880)
>[100380.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100380.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100380.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfdb10]
>[100380.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfdb10] width 2880 pitch 11520 (/4 2880)
>[100380.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121a70]
>[100380.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121a70] width 2880 pitch 11520 (/4 2880)
>[100381.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997be30]
>[100381.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997be30] width 2880 pitch 11520 (/4 2880)
>[100382.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb30]
>[100382.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb30] width 2880 pitch 11520 (/4 2880)
>[100382.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100382.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100383.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e55a8]
>[100383.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e55a8] width 2880 pitch 11520 (/4 2880)
>[100383.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100383.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100383.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121a70]
>[100383.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121a70] width 2880 pitch 11520 (/4 2880)
>[100383.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978c280]
>[100383.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978c280] width 2880 pitch 11520 (/4 2880)
>[100383.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100383.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100383.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa121a70]
>[100383.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa121a70] width 2880 pitch 11520 (/4 2880)
>[100383.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100383.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100383.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e55a8]
>[100383.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e55a8] width 2880 pitch 11520 (/4 2880)
>[100384.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfdb10]
>[100384.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfdb10] width 2880 pitch 11520 (/4 2880)
>[100384.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100384.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100384.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfdb10]
>[100384.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfdb10] width 2880 pitch 11520 (/4 2880)
>[100384.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100384.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100384.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1acc0]
>[100384.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1acc0] width 2880 pitch 11520 (/4 2880)
>[100389.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100389.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100389.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eceb08]
>[100389.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eceb08] width 2880 pitch 11520 (/4 2880)
>[100389.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823b10]
>[100389.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823b10] width 2880 pitch 11520 (/4 2880)
>[100389.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100389.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100389.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[100389.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[100389.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100389.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100389.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[100389.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[100390.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100390.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100390.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3edcb8]
>[100390.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3edcb8] width 2880 pitch 11520 (/4 2880)
>[100390.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100390.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100392.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[100392.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100438.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100438.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100446.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100446.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100450.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a4a70]
>[100450.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a4a70] width 2880 pitch 11520 (/4 2880)
>[100469.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96acc78]
>[100469.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96acc78] width 2880 pitch 11520 (/4 2880)
>[100470.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579ca0]
>[100470.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579ca0] width 2880 pitch 11520 (/4 2880)
>[100476.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cf4c8]
>[100476.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cf4c8] width 2880 pitch 11520 (/4 2880)
>[100481.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100481.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100482.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f48680]
>[100482.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f48680] width 2880 pitch 11520 (/4 2880)
>[100482.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100482.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100482.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100482.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100483.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100483.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100492.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100492.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100492.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100492.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100492.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[100492.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[100492.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100492.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100492.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[100492.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[100493.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100493.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100493.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[100493.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[100493.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100493.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100494.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100494.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100494.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[100494.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[100495.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fef70]
>[100495.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fef70] width 2880 pitch 11520 (/4 2880)
>[100496.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100496.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100496.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fef70]
>[100496.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fef70] width 2880 pitch 11520 (/4 2880)
>[100496.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100496.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100496.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fef70]
>[100496.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fef70] width 2880 pitch 11520 (/4 2880)
>[100496.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100496.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100496.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[100496.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[100498.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100498.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100498.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f908]
>[100498.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f908] width 2880 pitch 11520 (/4 2880)
>[100498.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100498.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100498.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100498.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100498.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100498.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100498.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100498.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100498.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100498.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100498.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100498.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100498.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100498.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100498.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100498.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100498.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f158]
>[100498.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f158] width 2880 pitch 11520 (/4 2880)
>[100498.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01bda0]
>[100498.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01bda0] width 2880 pitch 11520 (/4 2880)
>[100498.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00ca08]
>[100498.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00ca08] width 2880 pitch 11520 (/4 2880)
>[100499.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100499.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100502.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100502.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100502.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[100502.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[100502.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968cdb0]
>[100502.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968cdb0] width 2880 pitch 11520 (/4 2880)
>[100502.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b730]
>[100502.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b730] width 2880 pitch 11520 (/4 2880)
>[100502.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100502.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100502.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992b730]
>[100502.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992b730] width 2880 pitch 11520 (/4 2880)
>[100502.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992fc18]
>[100502.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992fc18] width 2880 pitch 11520 (/4 2880)
>[100503.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100503.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100503.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a3e08]
>[100503.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a3e08] width 2880 pitch 11520 (/4 2880)
>[100504.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100504.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100504.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100504.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100505.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64578]
>[100505.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64578] width 2880 pitch 11520 (/4 2880)
>[100505.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100505.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100505.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64578]
>[100505.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64578] width 2880 pitch 11520 (/4 2880)
>[100505.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100505.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100505.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64578]
>[100505.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64578] width 2880 pitch 11520 (/4 2880)
>[100505.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100505.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100505.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f3720]
>[100505.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f3720] width 2880 pitch 11520 (/4 2880)
>[100507.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100507.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100507.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100507.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100507.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100507.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100507.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100507.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100513.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100514.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100515.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100515.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100516.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100516.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100538.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[100538.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[100538.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100538.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100538.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100538.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100538.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100539.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100539.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100539.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100539.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100539.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100539.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100539.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100539.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100539.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100539.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100540.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100540.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100540.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100540.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100540.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100541.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[100541.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[100542.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbff30]
>[100542.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbff30] width 2880 pitch 11520 (/4 2880)
>[100544.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[100544.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[100544.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[100544.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[100544.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100544.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100545.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94523c0]
>[100545.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94523c0] width 2880 pitch 11520 (/4 2880)
>[100562.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc4f8]
>[100562.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc4f8] width 2880 pitch 11520 (/4 2880)
>[100566.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823b10]
>[100566.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823b10] width 2880 pitch 11520 (/4 2880)
>[100570.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa4760]
>[100570.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa4760] width 2880 pitch 11520 (/4 2880)
>[100581.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75150]
>[100581.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75150] width 2880 pitch 11520 (/4 2880)
>[100581.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca8c8]
>[100581.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca8c8] width 2880 pitch 11520 (/4 2880)
>[100582.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100582.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100582.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5fdd0]
>[100582.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5fdd0] width 2880 pitch 11520 (/4 2880)
>[100582.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988088]
>[100582.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988088] width 2880 pitch 11520 (/4 2880)
>[100582.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100582.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100582.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[100582.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[100582.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a3e08]
>[100582.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a3e08] width 2880 pitch 11520 (/4 2880)
>[100582.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100582.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100582.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f908]
>[100582.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f908] width 2880 pitch 11520 (/4 2880)
>[100584.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[100584.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[100586.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[100586.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[100586.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100586.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100586.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100586.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100587.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[100587.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[100587.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[100587.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[100587.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e000]
>[100587.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e000] width 2880 pitch 11520 (/4 2880)
>[100587.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100587.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100588.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100588.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100588.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100588.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100588.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[100588.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[100588.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[100588.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[100588.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb3c30]
>[100588.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb3c30] width 2880 pitch 11520 (/4 2880)
>[100588.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[100588.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[100621.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ca8c8]
>[100621.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ca8c8] width 2880 pitch 11520 (/4 2880)
>[100621.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988088]
>[100621.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988088] width 2880 pitch 11520 (/4 2880)
>[100621.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100621.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100621.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100621.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100623.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100623.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100623.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100623.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100623.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e1128]
>[100623.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e1128] width 2880 pitch 11520 (/4 2880)
>[100623.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100623.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100623.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100623.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100626.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100626.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100626.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100626.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100626.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189b18]
>[100626.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189b18] width 2880 pitch 11520 (/4 2880)
>[100626.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[100626.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[100626.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100626.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100626.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[100626.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100626.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100626.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100628.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100628.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100628.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[100628.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[100628.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100628.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100628.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100628.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100648.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100648.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100672.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100672.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100673.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1cf0]
>[100673.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1cf0] width 2880 pitch 11520 (/4 2880)
>[100673.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100673.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100673.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[100673.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[100673.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100673.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100673.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100673.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100674.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100674.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100674.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100674.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100674.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100674.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100674.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100674.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100674.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100675.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100675.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f908]
>[100675.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f908] width 2880 pitch 11520 (/4 2880)
>[100675.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[100675.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[100675.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f908]
>[100676.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f908] width 2880 pitch 11520 (/4 2880)
>[100676.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[100676.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[100676.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959f908]
>[100676.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959f908] width 2880 pitch 11520 (/4 2880)
>[100683.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa067188]
>[100683.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa067188] width 2880 pitch 11520 (/4 2880)
>[100683.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa136970]
>[100683.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa136970] width 2880 pitch 11520 (/4 2880)
>[100683.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100683.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100683.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[100683.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[100687.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[100687.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[100687.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100687.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100687.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a4190]
>[100687.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a4190] width 2880 pitch 11520 (/4 2880)
>[100687.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf18]
>[100687.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf18] width 2880 pitch 11520 (/4 2880)
>[100687.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297a20]
>[100687.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297a20] width 2880 pitch 11520 (/4 2880)
>[100687.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[100687.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[100687.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100687.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100687.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[100687.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[100687.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06bf18]
>[100687.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06bf18] width 2880 pitch 11520 (/4 2880)
>[100687.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98beb98]
>[100687.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98beb98] width 2880 pitch 11520 (/4 2880)
>[100687.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[100687.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[100687.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100687.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100687.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[100687.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[100688.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100688.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100688.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[100688.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[100688.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[100688.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[100688.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100688.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100688.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100688.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100688.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[100688.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[100688.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a3e08]
>[100688.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a3e08] width 2880 pitch 11520 (/4 2880)
>[100688.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[100688.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[100688.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6c2a0]
>[100688.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6c2a0] width 2880 pitch 11520 (/4 2880)
>[100692.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749b48]
>[100692.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749b48] width 2880 pitch 11520 (/4 2880)
>[100692.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100692.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100692.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f1cf0]
>[100692.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f1cf0] width 2880 pitch 11520 (/4 2880)
>[100693.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100693.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100693.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[100693.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100693.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972d500]
>[100693.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972d500] width 2880 pitch 11520 (/4 2880)
>[100693.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100693.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100693.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100693.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100693.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100693.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100694.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9aca0]
>[100694.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9aca0] width 2880 pitch 11520 (/4 2880)
>[100695.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c401c8]
>[100695.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c401c8] width 2880 pitch 11520 (/4 2880)
>[100695.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04f180]
>[100696.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04f180] width 2880 pitch 11520 (/4 2880)
>[100696.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100696.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100696.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100696.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100696.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100696.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100696.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0de4b0]
>[100696.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0de4b0] width 2880 pitch 11520 (/4 2880)
>[100696.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27d310]
>[100696.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27d310] width 2880 pitch 11520 (/4 2880)
>[100697.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e000]
>[100697.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e000] width 2880 pitch 11520 (/4 2880)
>[100697.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100697.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100709.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[100709.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[100709.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100709.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100710.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[100710.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[100710.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100710.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100710.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100710.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100710.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997a198]
>[100710.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997a198] width 2880 pitch 11520 (/4 2880)
>[100710.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100710.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100711.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100711.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100711.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[100711.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[100711.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100711.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100711.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eead8]
>[100711.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eead8] width 2880 pitch 11520 (/4 2880)
>[100744.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823638]
>[100744.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823638] width 2880 pitch 11520 (/4 2880)
>[100744.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100744.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100744.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa319e58]
>[100744.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa319e58] width 2880 pitch 11520 (/4 2880)
>[100744.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[100744.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[100749.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100749.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100749.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100749.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100749.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a0240]
>[100749.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a0240] width 2880 pitch 11520 (/4 2880)
>[100749.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[100749.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[100749.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297a20]
>[100749.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297a20] width 2880 pitch 11520 (/4 2880)
>[100749.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100749.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100749.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100749.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100749.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98beb98]
>[100750.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98beb98] width 2880 pitch 11520 (/4 2880)
>[100750.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[100750.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[100750.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa297a20]
>[100750.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa297a20] width 2880 pitch 11520 (/4 2880)
>[100750.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100750.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100750.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100750.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100750.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100750.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100751.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1028]
>[100751.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1028] width 2880 pitch 11520 (/4 2880)
>[100751.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100751.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100751.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100751.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100751.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784658]
>[100751.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784658] width 2880 pitch 11520 (/4 2880)
>[100751.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[100751.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[100751.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100751.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100751.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[100751.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[100751.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c7d10]
>[100751.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c7d10] width 2880 pitch 11520 (/4 2880)
>[100751.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[100751.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[100767.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9925788]
>[100767.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9925788] width 2880 pitch 11520 (/4 2880)
>[100769.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100769.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100770.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[100770.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[100770.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d18f50]
>[100770.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d18f50] width 2880 pitch 11520 (/4 2880)
>[100770.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d94208]
>[100770.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d94208] width 2880 pitch 11520 (/4 2880)
>[100770.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100770.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100770.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d56b28]
>[100770.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d56b28] width 2880 pitch 11520 (/4 2880)
>[100770.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100770.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100770.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d56b28]
>[100770.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d56b28] width 2880 pitch 11520 (/4 2880)
>[100770.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100770.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100770.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d56b28]
>[100770.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d56b28] width 2880 pitch 11520 (/4 2880)
>[100770.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03d868]
>[100770.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03d868] width 2880 pitch 11520 (/4 2880)
>[100770.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3ed98]
>[100770.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3ed98] width 2880 pitch 11520 (/4 2880)
>[100770.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9776c00]
>[100770.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9776c00] width 2880 pitch 11520 (/4 2880)
>[100770.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100770.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100770.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[100770.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[100770.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[100770.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[100770.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e000]
>[100770.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e000] width 2880 pitch 11520 (/4 2880)
>[100771.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[100771.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[100771.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d7d8]
>[100771.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d7d8] width 2880 pitch 11520 (/4 2880)
>[100771.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100771.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100771.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100771.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100771.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f4288]
>[100771.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f4288] width 2880 pitch 11520 (/4 2880)
>[100771.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[100771.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[100771.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[100771.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[100772.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100772.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100772.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d56b28]
>[100772.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d56b28] width 2880 pitch 11520 (/4 2880)
>[100772.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784658]
>[100772.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784658] width 2880 pitch 11520 (/4 2880)
>[100772.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab1028]
>[100772.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab1028] width 2880 pitch 11520 (/4 2880)
>[100772.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d398]
>[100772.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d398] width 2880 pitch 11520 (/4 2880)
>[100773.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[100773.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[100773.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238368]
>[100773.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238368] width 2880 pitch 11520 (/4 2880)
>[100774.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[100774.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[100774.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[100774.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[100774.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa087fb8]
>[100774.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa087fb8] width 2880 pitch 11520 (/4 2880)
>[100776.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[100776.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[100776.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e000]
>[100776.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e000] width 2880 pitch 11520 (/4 2880)
>[100777.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[100777.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[100777.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f668]
>[100777.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f668] width 2880 pitch 11520 (/4 2880)
>[100777.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100777.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100777.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100778.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100778.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100778.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100778.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100778.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100778.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[100778.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[100779.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100779.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100779.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[100779.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[100779.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3db78]
>[100779.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3db78] width 2880 pitch 11520 (/4 2880)
>[100779.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288770]
>[100780.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288770] width 2880 pitch 11520 (/4 2880)
>[100780.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa224950]
>[100780.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa224950] width 2880 pitch 11520 (/4 2880)
>[100780.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41b80]
>[100780.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41b80] width 2880 pitch 11520 (/4 2880)
>[100781.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100781.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100782.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa19a900]
>[100782.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa19a900] width 2880 pitch 11520 (/4 2880)
>[100782.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100782.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100782.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971d7d8]
>[100782.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971d7d8] width 2880 pitch 11520 (/4 2880)
>[100782.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[100782.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[100782.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27d310]
>[100782.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27d310] width 2880 pitch 11520 (/4 2880)
>[100782.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100782.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100783.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288770]
>[100783.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288770] width 2880 pitch 11520 (/4 2880)
>[100784.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e5188]
>[100784.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e5188] width 2880 pitch 11520 (/4 2880)
>[100784.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9925788]
>[100784.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9925788] width 2880 pitch 11520 (/4 2880)
>[100784.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[100784.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[100784.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147830]
>[100784.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147830] width 2880 pitch 11520 (/4 2880)
>[100784.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94b3808]
>[100784.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94b3808] width 2880 pitch 11520 (/4 2880)
>[100785.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0c80]
>[100785.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0c80] width 2880 pitch 11520 (/4 2880)
>[100785.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100785.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100785.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1562a8]
>[100785.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1562a8] width 2880 pitch 11520 (/4 2880)
>[100785.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[100785.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[100785.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1562a8]
>[100785.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1562a8] width 2880 pitch 11520 (/4 2880)
>[100785.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[100785.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[100785.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbff30]
>[100785.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbff30] width 2880 pitch 11520 (/4 2880)
>[100785.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[100785.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[100785.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100785.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100785.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa114168]
>[100785.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa114168] width 2880 pitch 11520 (/4 2880)
>[100785.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100786.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100786.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[100786.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[100786.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0b80]
>[100786.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0b80] width 2880 pitch 11520 (/4 2880)
>[100787.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997a198]
>[100787.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997a198] width 2880 pitch 11520 (/4 2880)
>[100787.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f668]
>[100787.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f668] width 2880 pitch 11520 (/4 2880)
>[100787.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100787.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100787.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100787.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100787.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9aca0]
>[100788.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9aca0] width 2880 pitch 11520 (/4 2880)
>[100796.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03d868]
>[100796.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03d868] width 2880 pitch 11520 (/4 2880)
>[100796.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3ed98]
>[100796.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3ed98] width 2880 pitch 11520 (/4 2880)
>[100796.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[100796.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[100796.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[100797.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[100797.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[100797.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[100797.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9776c00]
>[100797.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9776c00] width 2880 pitch 11520 (/4 2880)
>[100797.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9aca0]
>[100797.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9aca0] width 2880 pitch 11520 (/4 2880)
>[100797.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100797.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100797.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774450]
>[100797.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774450] width 2880 pitch 11520 (/4 2880)
>[100797.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962c148]
>[100797.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962c148] width 2880 pitch 11520 (/4 2880)
>[100798.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d18f50]
>[100798.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d18f50] width 2880 pitch 11520 (/4 2880)
>[100798.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa079820]
>[100798.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa079820] width 2880 pitch 11520 (/4 2880)
>[100798.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffbed0]
>[100798.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffbed0] width 2880 pitch 11520 (/4 2880)
>[100799.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0b80]
>[100799.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0b80] width 2880 pitch 11520 (/4 2880)
>[100800.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997a198]
>[100800.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997a198] width 2880 pitch 11520 (/4 2880)
>[100800.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff4330]
>[100800.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff4330] width 2880 pitch 11520 (/4 2880)
>[100800.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100800.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100800.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100800.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100800.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc158]
>[100800.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc158] width 2880 pitch 11520 (/4 2880)
>[100800.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24210]
>[100800.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24210] width 2880 pitch 11520 (/4 2880)
>[100804.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[100804.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[100804.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100804.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100804.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823638]
>[100804.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823638] width 2880 pitch 11520 (/4 2880)
>[100811.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100811.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100811.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100811.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100811.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94523c0]
>[100811.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94523c0] width 2880 pitch 11520 (/4 2880)
>[100811.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100811.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100811.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100811.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100811.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100811.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100811.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100811.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100811.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94523c0]
>[100811.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94523c0] width 2880 pitch 11520 (/4 2880)
>[100811.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100811.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100811.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100811.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100811.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100811.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100811.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100811.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100811.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94523c0]
>[100811.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94523c0] width 2880 pitch 11520 (/4 2880)
>[100811.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100811.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100812.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100812.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100812.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100812.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100812.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94523c0]
>[100812.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94523c0] width 2880 pitch 11520 (/4 2880)
>[100812.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[100812.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[100812.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100812.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100812.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100812.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100812.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288770]
>[100812.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288770] width 2880 pitch 11520 (/4 2880)
>[100813.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cbff30]
>[100813.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cbff30] width 2880 pitch 11520 (/4 2880)
>[100830.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c41b80]
>[100830.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c41b80] width 2880 pitch 11520 (/4 2880)
>[100830.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100830.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100830.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a0240]
>[100830.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a0240] width 2880 pitch 11520 (/4 2880)
>[100830.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100830.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100830.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[100830.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[100830.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823638]
>[100830.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823638] width 2880 pitch 11520 (/4 2880)
>[100830.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100830.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100830.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100830.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100830.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100830.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100830.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100830.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100830.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8bd90]
>[100830.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8bd90] width 2880 pitch 11520 (/4 2880)
>[100852.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0c80]
>[100852.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0c80] width 2880 pitch 11520 (/4 2880)
>[100852.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0c80]
>[100852.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0c80] width 2880 pitch 11520 (/4 2880)
>[100852.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0c80]
>[100852.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0c80] width 2880 pitch 11520 (/4 2880)
>[100852.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa0c80]
>[100852.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa0c80] width 2880 pitch 11520 (/4 2880)
>[100852.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100852.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100852.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100852.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100852.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100852.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100852.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[100852.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[100852.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100852.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100852.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9f668]
>[100852.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9f668] width 2880 pitch 11520 (/4 2880)
>[100852.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24210]
>[100852.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24210] width 2880 pitch 11520 (/4 2880)
>[100852.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100852.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100853.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100853.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100853.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[100853.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[100853.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99cfb10]
>[100853.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99cfb10] width 2880 pitch 11520 (/4 2880)
>[100853.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[100853.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[100853.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100853.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100853.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[100853.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[100853.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100853.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100853.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[100853.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[100853.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100853.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100853.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[100853.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[100853.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[100853.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[100853.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100853.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100853.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[100853.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[100853.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100853.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100853.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[100853.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[100853.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100853.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100853.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[100853.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[100853.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a010]
>[100853.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a010] width 2880 pitch 11520 (/4 2880)
>[100853.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab6338]
>[100853.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab6338] width 2880 pitch 11520 (/4 2880)
>[100854.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100854.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100854.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d3168]
>[100854.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d3168] width 2880 pitch 11520 (/4 2880)
>[100854.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100854.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100854.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[100854.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[100855.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100855.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100855.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4e950]
>[100855.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4e950] width 2880 pitch 11520 (/4 2880)
>[100855.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa224950]
>[100855.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa224950] width 2880 pitch 11520 (/4 2880)
>[100859.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100859.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100860.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[100860.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[100860.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[100860.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[100860.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100860.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100860.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[100860.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[100860.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[100860.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[100863.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[100863.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[100863.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0164b8]
>[100863.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0164b8] width 2880 pitch 11520 (/4 2880)
>[100864.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a0240]
>[100864.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a0240] width 2880 pitch 11520 (/4 2880)
>[100864.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9965f60]
>[100864.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9965f60] width 2880 pitch 11520 (/4 2880)
>[100864.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[100864.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[100864.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288770]
>[100864.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288770] width 2880 pitch 11520 (/4 2880)
>[100864.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[100864.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[100865.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288a60]
>[100865.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288a60] width 2880 pitch 11520 (/4 2880)
>[100865.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24210]
>[100865.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24210] width 2880 pitch 11520 (/4 2880)
>[100865.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[100866.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[100866.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[100866.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[100866.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[100866.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[100866.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9832608]
>[100866.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9832608] width 2880 pitch 11520 (/4 2880)
>[100866.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab6338]
>[100866.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab6338] width 2880 pitch 11520 (/4 2880)
>[100866.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[100866.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[100866.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c1f8]
>[100866.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c1f8] width 2880 pitch 11520 (/4 2880)
>[100866.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aff130]
>[100866.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aff130] width 2880 pitch 11520 (/4 2880)
>[100866.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9784658]
>[100866.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9784658] width 2880 pitch 11520 (/4 2880)
>[100866.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa7658]
>[100866.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa7658] width 2880 pitch 11520 (/4 2880)
>[100867.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959e000]
>[100867.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959e000] width 2880 pitch 11520 (/4 2880)
>[100884.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9617148]
>[100884.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9617148] width 2880 pitch 11520 (/4 2880)
>[100884.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9aca0]
>[100884.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9aca0] width 2880 pitch 11520 (/4 2880)
>[100976.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[100976.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[100976.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa288770]
>[100976.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa288770] width 2880 pitch 11520 (/4 2880)
>[100977.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998f580]
>[100977.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998f580] width 2880 pitch 11520 (/4 2880)
>[100977.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[100977.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[100979.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[100979.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[100979.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100979.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100979.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999d548]
>[100979.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999d548] width 2880 pitch 11520 (/4 2880)
>[100979.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[100979.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[100979.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b6e0]
>[100979.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b6e0] width 2880 pitch 11520 (/4 2880)
>[100979.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f4288]
>[100979.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f4288] width 2880 pitch 11520 (/4 2880)
>[100980.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f401a8]
>[100980.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f401a8] width 2880 pitch 11520 (/4 2880)
>[100980.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c401c8]
>[100980.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c401c8] width 2880 pitch 11520 (/4 2880)
>[100980.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a0740]
>[100980.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a0740] width 2880 pitch 11520 (/4 2880)
>[100980.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c401c8]
>[100980.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c401c8] width 2880 pitch 11520 (/4 2880)
>[100981.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100981.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100982.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0093d8]
>[100982.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0093d8] width 2880 pitch 11520 (/4 2880)
>[100982.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[100982.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[100982.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[100983.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[100983.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9979ff0]
>[100983.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9979ff0] width 2880 pitch 11520 (/4 2880)
>[100983.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[100983.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[100983.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9776c00]
>[100983.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9776c00] width 2880 pitch 11520 (/4 2880)
>[100987.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100987.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100987.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[100987.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[100987.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531618]
>[100987.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531618] width 2880 pitch 11520 (/4 2880)
>[100987.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[100987.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[100987.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[100987.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[100987.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100987.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100987.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[100988.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[100988.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531618]
>[100988.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531618] width 2880 pitch 11520 (/4 2880)
>[100988.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c53120]
>[100988.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c53120] width 2880 pitch 11520 (/4 2880)
>[100988.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c2468]
>[100988.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c2468] width 2880 pitch 11520 (/4 2880)
>[100988.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100988.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100988.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[100988.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[100988.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[100988.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[100989.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24210]
>[100989.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24210] width 2880 pitch 11520 (/4 2880)
>[100989.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100989.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100989.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd790]
>[100989.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd790] width 2880 pitch 11520 (/4 2880)
>[100989.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[100989.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[100989.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24210]
>[100989.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24210] width 2880 pitch 11520 (/4 2880)
>[100989.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[100989.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[100989.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100989.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[100989.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[100989.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[100989.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[100989.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101010.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9631f40]
>[101010.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9631f40] width 2880 pitch 11520 (/4 2880)
>[101042.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c54c8]
>[101042.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c54c8] width 2880 pitch 11520 (/4 2880)
>[101042.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c2468]
>[101042.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c2468] width 2880 pitch 11520 (/4 2880)
>[101042.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101042.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101042.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[101042.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[101042.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f4288]
>[101042.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f4288] width 2880 pitch 11520 (/4 2880)
>[101042.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101042.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101042.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101042.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101042.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b6e0]
>[101042.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b6e0] width 2880 pitch 11520 (/4 2880)
>[101042.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[101042.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[101042.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[101042.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[101046.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823638]
>[101046.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823638] width 2880 pitch 11520 (/4 2880)
>[101046.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb0c58]
>[101046.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb0c58] width 2880 pitch 11520 (/4 2880)
>[101046.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998f580]
>[101046.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998f580] width 2880 pitch 11520 (/4 2880)
>[101046.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[101046.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[101046.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68038]
>[101046.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68038] width 2880 pitch 11520 (/4 2880)
>[101046.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d07c48]
>[101046.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d07c48] width 2880 pitch 11520 (/4 2880)
>[101046.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b86880]
>[101047.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b86880] width 2880 pitch 11520 (/4 2880)
>[101047.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101047.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101047.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[101047.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[101047.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68038]
>[101047.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68038] width 2880 pitch 11520 (/4 2880)
>[101047.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083098]
>[101047.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083098] width 2880 pitch 11520 (/4 2880)
>[101047.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[101047.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[101048.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[101048.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[101051.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206c50]
>[101051.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206c50] width 2880 pitch 11520 (/4 2880)
>[101051.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[101051.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[101051.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75fb0]
>[101051.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75fb0] width 2880 pitch 11520 (/4 2880)
>[101051.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531618]
>[101051.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531618] width 2880 pitch 11520 (/4 2880)
>[101051.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fd6a0]
>[101051.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fd6a0] width 2880 pitch 11520 (/4 2880)
>[101051.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a0740]
>[101051.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a0740] width 2880 pitch 11520 (/4 2880)
>[101053.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101053.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101064.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[101064.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[101070.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101070.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101082.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13d6c8]
>[101082.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13d6c8] width 2880 pitch 11520 (/4 2880)
>[101085.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a4e78]
>[101085.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a4e78] width 2880 pitch 11520 (/4 2880)
>[101086.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa206c50]
>[101086.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa206c50] width 2880 pitch 11520 (/4 2880)
>[101092.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x984bd10]
>[101092.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x984bd10] width 2880 pitch 11520 (/4 2880)
>[101104.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101104.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101104.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27318]
>[101104.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27318] width 2880 pitch 11520 (/4 2880)
>[101104.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[101104.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[101108.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13d6c8]
>[101108.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13d6c8] width 2880 pitch 11520 (/4 2880)
>[101108.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa238368]
>[101108.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa238368] width 2880 pitch 11520 (/4 2880)
>[101108.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101108.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101108.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c2468]
>[101108.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c2468] width 2880 pitch 11520 (/4 2880)
>[101108.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f4288]
>[101108.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f4288] width 2880 pitch 11520 (/4 2880)
>[101108.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101108.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101108.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a0740]
>[101108.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a0740] width 2880 pitch 11520 (/4 2880)
>[101108.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101108.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101108.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b6e0]
>[101108.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b6e0] width 2880 pitch 11520 (/4 2880)
>[101108.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f401a8]
>[101108.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f401a8] width 2880 pitch 11520 (/4 2880)
>[101108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101108.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101108.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a0740]
>[101108.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a0740] width 2880 pitch 11520 (/4 2880)
>[101108.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101108.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101108.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c401c8]
>[101108.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c401c8] width 2880 pitch 11520 (/4 2880)
>[101109.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101109.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101109.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101109.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101109.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a0740]
>[101109.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a0740] width 2880 pitch 11520 (/4 2880)
>[101109.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2f9e8]
>[101109.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2f9e8] width 2880 pitch 11520 (/4 2880)
>[101110.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101110.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101110.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80550]
>[101110.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80550] width 2880 pitch 11520 (/4 2880)
>[101110.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[101110.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[101110.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[101110.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[101194.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962ef80]
>[101194.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962ef80] width 2880 pitch 11520 (/4 2880)
>[101211.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9988088]
>[101211.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9988088] width 2880 pitch 11520 (/4 2880)
>[101211.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[101211.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101211.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[101211.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[101211.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101211.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101212.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbad0]
>[101212.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbad0] width 2880 pitch 11520 (/4 2880)
>[101212.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2f9e8]
>[101212.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2f9e8] width 2880 pitch 11520 (/4 2880)
>[101212.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80550]
>[101212.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80550] width 2880 pitch 11520 (/4 2880)
>[101212.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101212.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101212.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d80550]
>[101212.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d80550] width 2880 pitch 11520 (/4 2880)
>[101212.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101212.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101212.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa224950]
>[101212.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa224950] width 2880 pitch 11520 (/4 2880)
>[101212.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101212.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101212.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa224950]
>[101212.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa224950] width 2880 pitch 11520 (/4 2880)
>[101212.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x983e9f0]
>[101212.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x983e9f0] width 2880 pitch 11520 (/4 2880)
>[101212.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a0240]
>[101212.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a0240] width 2880 pitch 11520 (/4 2880)
>[101212.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28bbf8]
>[101212.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28bbf8] width 2880 pitch 11520 (/4 2880)
>[101212.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0093d8]
>[101212.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0093d8] width 2880 pitch 11520 (/4 2880)
>[101212.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1769c0]
>[101212.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1769c0] width 2880 pitch 11520 (/4 2880)
>[101212.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[101212.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[101212.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa376078]
>[101212.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa376078] width 2880 pitch 11520 (/4 2880)
>[101213.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0093d8]
>[101213.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0093d8] width 2880 pitch 11520 (/4 2880)
>[101213.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101213.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101213.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0093d8]
>[101213.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0093d8] width 2880 pitch 11520 (/4 2880)
>[101213.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101213.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101213.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749b48]
>[101213.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749b48] width 2880 pitch 11520 (/4 2880)
>[101213.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b620]
>[101213.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b620] width 2880 pitch 11520 (/4 2880)
>[101213.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9749b48]
>[101213.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9749b48] width 2880 pitch 11520 (/4 2880)
>[101213.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[101213.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[101213.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75fb0]
>[101213.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75fb0] width 2880 pitch 11520 (/4 2880)
>[101213.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c27318]
>[101213.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c27318] width 2880 pitch 11520 (/4 2880)
>[101213.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101213.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101213.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090fb8]
>[101213.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090fb8] width 2880 pitch 11520 (/4 2880)
>[101213.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[101213.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[101213.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101213.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101219.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[101219.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[101221.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9960d60]
>[101221.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9960d60] width 2880 pitch 11520 (/4 2880)
>[101224.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[101224.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[101224.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1474b0]
>[101224.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1474b0] width 2880 pitch 11520 (/4 2880)
>[101224.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[101224.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[101224.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa055840]
>[101224.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa055840] width 2880 pitch 11520 (/4 2880)
>[101224.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99779c0]
>[101224.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99779c0] width 2880 pitch 11520 (/4 2880)
>[101224.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbcd08]
>[101224.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbcd08] width 2880 pitch 11520 (/4 2880)
>[101228.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101228.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101228.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[101228.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[101228.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b86880]
>[101228.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b86880] width 2880 pitch 11520 (/4 2880)
>[101228.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[101228.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[101228.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[101228.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[101228.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101228.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101228.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[101228.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101228.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101228.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101228.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[101228.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[101228.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97deda0]
>[101228.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97deda0] width 2880 pitch 11520 (/4 2880)
>[101228.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101228.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101228.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[101228.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101228.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101228.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101229.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a280]
>[101229.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a280] width 2880 pitch 11520 (/4 2880)
>[101229.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101229.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101229.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[101229.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101229.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101229.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101229.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101229.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101229.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97000d0]
>[101229.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97000d0] width 2880 pitch 11520 (/4 2880)
>[101229.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101229.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101234.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101234.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101242.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998f580]
>[101242.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998f580] width 2880 pitch 11520 (/4 2880)
>[101242.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[101242.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[101242.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[101242.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[101242.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36fe68]
>[101242.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36fe68] width 2880 pitch 11520 (/4 2880)
>[101242.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101242.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101242.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101242.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101242.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1b3d08]
>[101242.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1b3d08] width 2880 pitch 11520 (/4 2880)
>[101243.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101243.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101243.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6a10]
>[101243.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6a10] width 2880 pitch 11520 (/4 2880)
>[101243.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ead9c0]
>[101243.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ead9c0] width 2880 pitch 11520 (/4 2880)
>[101244.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[101244.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[101245.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[101245.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[101245.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d68038]
>[101245.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d68038] width 2880 pitch 11520 (/4 2880)
>[101247.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101247.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101247.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531778]
>[101247.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531778] width 2880 pitch 11520 (/4 2880)
>[101247.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bc9c0]
>[101247.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bc9c0] width 2880 pitch 11520 (/4 2880)
>[101247.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[101247.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[101247.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa224950]
>[101247.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa224950] width 2880 pitch 11520 (/4 2880)
>[101284.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[101284.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[101303.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[101303.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[101305.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10cfd8]
>[101305.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10cfd8] width 2880 pitch 11520 (/4 2880)
>[101307.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[101307.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[101311.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b86880]
>[101312.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b86880] width 2880 pitch 11520 (/4 2880)
>[101343.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101343.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101343.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101343.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101343.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101343.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101343.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101343.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101343.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101343.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101343.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa155f38]
>[101343.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa155f38] width 2880 pitch 11520 (/4 2880)
>[101343.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101343.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101343.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed1d0]
>[101343.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed1d0] width 2880 pitch 11520 (/4 2880)
>[101343.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083348]
>[101343.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083348] width 2880 pitch 11520 (/4 2880)
>[101343.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101343.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101347.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c53b0]
>[101347.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c53b0] width 2880 pitch 11520 (/4 2880)
>[101347.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101347.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101347.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed1d0]
>[101347.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed1d0] width 2880 pitch 11520 (/4 2880)
>[101347.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[101347.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[101347.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[101347.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[101347.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c53b0]
>[101347.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c53b0] width 2880 pitch 11520 (/4 2880)
>[101347.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccb0f0]
>[101347.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccb0f0] width 2880 pitch 11520 (/4 2880)
>[101347.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed1d0]
>[101347.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed1d0] width 2880 pitch 11520 (/4 2880)
>[101347.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[101347.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[101347.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a27158]
>[101347.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a27158] width 2880 pitch 11520 (/4 2880)
>[101347.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c53b0]
>[101347.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c53b0] width 2880 pitch 11520 (/4 2880)
>[101347.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101347.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101347.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed1d0]
>[101347.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed1d0] width 2880 pitch 11520 (/4 2880)
>[101347.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[101347.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[101348.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157d88]
>[101348.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157d88] width 2880 pitch 11520 (/4 2880)
>[101348.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101348.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101348.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ed1d0]
>[101348.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ed1d0] width 2880 pitch 11520 (/4 2880)
>[101348.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09b998]
>[101348.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09b998] width 2880 pitch 11520 (/4 2880)
>[101348.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157d88]
>[101348.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157d88] width 2880 pitch 11520 (/4 2880)
>[101348.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101348.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101348.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa157d88]
>[101348.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa157d88] width 2880 pitch 11520 (/4 2880)
>[101348.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101348.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101368.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f39c0]
>[101368.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f39c0] width 2880 pitch 11520 (/4 2880)
>[101368.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aadb8]
>[101368.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aadb8] width 2880 pitch 11520 (/4 2880)
>[101369.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa155f38]
>[101369.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa155f38] width 2880 pitch 11520 (/4 2880)
>[101369.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95f4080]
>[101369.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95f4080] width 2880 pitch 11520 (/4 2880)
>[101369.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa155f38]
>[101369.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa155f38] width 2880 pitch 11520 (/4 2880)
>[101369.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[101369.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[101369.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e30]
>[101369.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e30] width 2880 pitch 11520 (/4 2880)
>[101369.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[101369.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[101369.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d30e30]
>[101370.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d30e30] width 2880 pitch 11520 (/4 2880)
>[101370.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f4eba0]
>[101370.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f4eba0] width 2880 pitch 11520 (/4 2880)
>[101370.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978b658]
>[101370.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978b658] width 2880 pitch 11520 (/4 2880)
>[101371.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bdc40]
>[101371.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bdc40] width 2880 pitch 11520 (/4 2880)
>[101371.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[101371.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[101371.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101371.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101371.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101371.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101371.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101371.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101376.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101376.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101381.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998eb90]
>[101381.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998eb90] width 2880 pitch 11520 (/4 2880)
>[101381.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8360]
>[101381.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8360] width 2880 pitch 11520 (/4 2880)
>[101381.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[101381.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[101381.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cafe10]
>[101381.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cafe10] width 2880 pitch 11520 (/4 2880)
>[101381.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101381.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101381.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cafe10]
>[101381.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cafe10] width 2880 pitch 11520 (/4 2880)
>[101381.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[101381.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[101381.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cafe10]
>[101381.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cafe10] width 2880 pitch 11520 (/4 2880)
>[101381.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b17c8]
>[101381.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b17c8] width 2880 pitch 11520 (/4 2880)
>[101381.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[101381.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[101381.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101381.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101381.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbcd08]
>[101381.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbcd08] width 2880 pitch 11520 (/4 2880)
>[101381.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101381.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101381.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbcd08]
>[101381.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbcd08] width 2880 pitch 11520 (/4 2880)
>[101381.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101381.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101383.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[101383.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[101383.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9908f80]
>[101383.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9908f80] width 2880 pitch 11520 (/4 2880)
>[101383.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[101383.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[101383.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101383.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101383.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944c370]
>[101384.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944c370] width 2880 pitch 11520 (/4 2880)
>[101384.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e7db0]
>[101384.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e7db0] width 2880 pitch 11520 (/4 2880)
>[101384.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101384.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101384.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101384.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101384.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101384.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101384.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101384.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101385.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101385.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101385.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101385.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101385.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101385.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101385.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101385.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101385.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101385.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101385.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101385.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101385.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75fb0]
>[101385.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75fb0] width 2880 pitch 11520 (/4 2880)
>[101385.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101386.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101386.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d75fb0]
>[101386.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d75fb0] width 2880 pitch 11520 (/4 2880)
>[101386.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101386.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101396.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7a928]
>[101396.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7a928] width 2880 pitch 11520 (/4 2880)
>[101396.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[101396.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[101396.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[101396.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[101396.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[101396.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[101396.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[101396.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[101396.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ed3f98]
>[101396.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ed3f98] width 2880 pitch 11520 (/4 2880)
>[101399.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f3d98]
>[101399.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f3d98] width 2880 pitch 11520 (/4 2880)
>[101399.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101399.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101400.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101400.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101400.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101400.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101400.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101400.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101400.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101400.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101400.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101400.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101401.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec8388]
>[101401.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec8388] width 2880 pitch 11520 (/4 2880)
>[101401.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa30eb50]
>[101401.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa30eb50] width 2880 pitch 11520 (/4 2880)
>[101401.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101401.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101402.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101402.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101402.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f42430]
>[101402.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f42430] width 2880 pitch 11520 (/4 2880)
>[101402.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[101402.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[101402.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eac148]
>[101402.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eac148] width 2880 pitch 11520 (/4 2880)
>[101402.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006ab8]
>[101402.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006ab8] width 2880 pitch 11520 (/4 2880)
>[101402.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[101402.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[101445.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0c8]
>[101445.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0c8] width 2880 pitch 11520 (/4 2880)
>[101445.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0c8]
>[101445.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0c8] width 2880 pitch 11520 (/4 2880)
>[101445.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101445.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101445.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0c8]
>[101445.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0c8] width 2880 pitch 11520 (/4 2880)
>[101445.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101445.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101445.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101445.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101445.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97723f0]
>[101445.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97723f0] width 2880 pitch 11520 (/4 2880)
>[101445.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101445.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101445.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101445.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101445.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f42430]
>[101445.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f42430] width 2880 pitch 11520 (/4 2880)
>[101445.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27ad38]
>[101445.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27ad38] width 2880 pitch 11520 (/4 2880)
>[101445.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258030]
>[101445.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258030] width 2880 pitch 11520 (/4 2880)
>[101445.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101445.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101445.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101445.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101445.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101445.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101445.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9823d88]
>[101445.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9823d88] width 2880 pitch 11520 (/4 2880)
>[101445.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1f2500]
>[101446.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1f2500] width 2880 pitch 11520 (/4 2880)
>[101446.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101446.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101446.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101446.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101446.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[101446.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[101446.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[101446.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[101446.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[101446.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[101446.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[101446.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[101446.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aaf2b8]
>[101446.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aaf2b8] width 2880 pitch 11520 (/4 2880)
>[101446.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df95c0]
>[101446.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df95c0] width 2880 pitch 11520 (/4 2880)
>[101447.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bd330]
>[101447.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bd330] width 2880 pitch 11520 (/4 2880)
>[101447.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[101447.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[101447.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101447.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101447.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101447.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101447.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101447.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101447.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71160]
>[101447.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71160] width 2880 pitch 11520 (/4 2880)
>[101453.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a200]
>[101453.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a200] width 2880 pitch 11520 (/4 2880)
>[101454.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[101454.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[101454.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a178]
>[101454.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a178] width 2880 pitch 11520 (/4 2880)
>[101454.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09ee58]
>[101454.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09ee58] width 2880 pitch 11520 (/4 2880)
>[101455.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x974a178]
>[101455.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x974a178] width 2880 pitch 11520 (/4 2880)
>[101456.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964adc0]
>[101456.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964adc0] width 2880 pitch 11520 (/4 2880)
>[101460.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba1020]
>[101460.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba1020] width 2880 pitch 11520 (/4 2880)
>[101460.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81ce8]
>[101460.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81ce8] width 2880 pitch 11520 (/4 2880)
>[101460.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cafe10]
>[101460.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cafe10] width 2880 pitch 11520 (/4 2880)
>[101460.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[101460.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[101460.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bd330]
>[101460.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bd330] width 2880 pitch 11520 (/4 2880)
>[101462.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101462.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101462.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101462.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101462.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101462.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101462.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101462.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101462.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101463.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101463.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101463.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101463.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978d7e8]
>[101463.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978d7e8] width 2880 pitch 11520 (/4 2880)
>[101463.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101463.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101463.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2848]
>[101463.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2848] width 2880 pitch 11520 (/4 2880)
>[101463.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x986af50]
>[101463.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x986af50] width 2880 pitch 11520 (/4 2880)
>[101463.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98165f8]
>[101464.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98165f8] width 2880 pitch 11520 (/4 2880)
>[101464.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[101464.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[101464.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98cbad0]
>[101464.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98cbad0] width 2880 pitch 11520 (/4 2880)
>[101464.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995a078]
>[101464.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995a078] width 2880 pitch 11520 (/4 2880)
>[101464.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09b998]
>[101464.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09b998] width 2880 pitch 11520 (/4 2880)
>[101465.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c401c8]
>[101465.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c401c8] width 2880 pitch 11520 (/4 2880)
>[101465.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f39c0]
>[101465.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f39c0] width 2880 pitch 11520 (/4 2880)
>[101465.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed948]
>[101465.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed948] width 2880 pitch 11520 (/4 2880)
>[101466.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b620]
>[101466.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b620] width 2880 pitch 11520 (/4 2880)
>[101466.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090fb8]
>[101466.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090fb8] width 2880 pitch 11520 (/4 2880)
>[101466.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb1ee8]
>[101466.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb1ee8] width 2880 pitch 11520 (/4 2880)
>[101467.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b86880]
>[101467.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b86880] width 2880 pitch 11520 (/4 2880)
>[101467.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c1d0]
>[101467.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c1d0] width 2880 pitch 11520 (/4 2880)
>[101467.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b39e20]
>[101467.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b39e20] width 2880 pitch 11520 (/4 2880)
>[101467.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f39c0]
>[101467.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f39c0] width 2880 pitch 11520 (/4 2880)
>[101467.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c581f8]
>[101467.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c581f8] width 2880 pitch 11520 (/4 2880)
>[101467.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101467.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101467.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f39c0]
>[101467.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f39c0] width 2880 pitch 11520 (/4 2880)
>[101467.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbcd08]
>[101467.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbcd08] width 2880 pitch 11520 (/4 2880)
>[101467.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101467.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101467.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101467.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101467.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101467.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101467.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101467.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101467.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101467.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101467.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b620]
>[101467.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b620] width 2880 pitch 11520 (/4 2880)
>[101471.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x978a9c8]
>[101471.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x978a9c8] width 2880 pitch 11520 (/4 2880)
>[101471.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bed00]
>[101471.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bed00] width 2880 pitch 11520 (/4 2880)
>[101472.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x999d548]
>[101472.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x999d548] width 2880 pitch 11520 (/4 2880)
>[101472.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[101472.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[101472.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aadb8]
>[101472.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aadb8] width 2880 pitch 11520 (/4 2880)
>[101472.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c790]
>[101472.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c790] width 2880 pitch 11520 (/4 2880)
>[101472.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aadb8]
>[101472.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aadb8] width 2880 pitch 11520 (/4 2880)
>[101473.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bd330]
>[101473.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bd330] width 2880 pitch 11520 (/4 2880)
>[101473.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3ed948]
>[101474.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3ed948] width 2880 pitch 11520 (/4 2880)
>[101474.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28bbf8]
>[101474.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28bbf8] width 2880 pitch 11520 (/4 2880)
>[101474.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101474.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101474.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101474.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101474.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101474.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101478.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101478.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101478.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d63f50]
>[101478.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d63f50] width 2880 pitch 11520 (/4 2880)
>[101478.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998eb90]
>[101478.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998eb90] width 2880 pitch 11520 (/4 2880)
>[101478.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d63f50]
>[101478.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d63f50] width 2880 pitch 11520 (/4 2880)
>[101478.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101478.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101478.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101478.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101478.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101478.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101478.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa04ce60]
>[101478.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa04ce60] width 2880 pitch 11520 (/4 2880)
>[101478.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d63f50]
>[101478.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d63f50] width 2880 pitch 11520 (/4 2880)
>[101478.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d63f50]
>[101478.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d63f50] width 2880 pitch 11520 (/4 2880)
>[101478.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d63f50]
>[101478.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d63f50] width 2880 pitch 11520 (/4 2880)
>[101479.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3d70]
>[101479.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3d70] width 2880 pitch 11520 (/4 2880)
>[101479.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3d70]
>[101479.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3d70] width 2880 pitch 11520 (/4 2880)
>[101479.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101479.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101479.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24980]
>[101479.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24980] width 2880 pitch 11520 (/4 2880)
>[101479.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101479.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101479.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101479.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101479.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa208e70]
>[101479.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa208e70] width 2880 pitch 11520 (/4 2880)
>[101479.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dc3d70]
>[101479.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dc3d70] width 2880 pitch 11520 (/4 2880)
>[101479.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101479.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101493.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101493.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101493.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e9f0]
>[101493.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e9f0] width 2880 pitch 11520 (/4 2880)
>[101495.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa21e1c0]
>[101495.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa21e1c0] width 2880 pitch 11520 (/4 2880)
>[101495.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6e9f0]
>[101495.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6e9f0] width 2880 pitch 11520 (/4 2880)
>[101495.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101495.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101495.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101495.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101495.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af8c80]
>[101495.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af8c80] width 2880 pitch 11520 (/4 2880)
>[101495.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101495.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101495.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101495.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101495.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101495.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101495.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101495.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101498.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101498.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101499.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb56a8]
>[101499.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb56a8] width 2880 pitch 11520 (/4 2880)
>[101499.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb56a8]
>[101499.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb56a8] width 2880 pitch 11520 (/4 2880)
>[101499.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101499.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101499.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2650]
>[101499.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2650] width 2880 pitch 11520 (/4 2880)
>[101500.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3a40]
>[101500.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3a40] width 2880 pitch 11520 (/4 2880)
>[101500.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3978]
>[101500.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3978] width 2880 pitch 11520 (/4 2880)
>[101500.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d578]
>[101500.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d578] width 2880 pitch 11520 (/4 2880)
>[101500.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3d548]
>[101500.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3d548] width 2880 pitch 11520 (/4 2880)
>[101500.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9607180]
>[101500.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9607180] width 2880 pitch 11520 (/4 2880)
>[101500.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa087fb8]
>[101500.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa087fb8] width 2880 pitch 11520 (/4 2880)
>[101500.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3978]
>[101500.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3978] width 2880 pitch 11520 (/4 2880)
>[101500.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3978]
>[101500.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3978] width 2880 pitch 11520 (/4 2880)
>[101500.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f58]
>[101500.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f58] width 2880 pitch 11520 (/4 2880)
>[101500.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d64100]
>[101500.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d64100] width 2880 pitch 11520 (/4 2880)
>[101500.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f88]
>[101500.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f88] width 2880 pitch 11520 (/4 2880)
>[101500.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f25c0]
>[101500.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f25c0] width 2880 pitch 11520 (/4 2880)
>[101500.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3978]
>[101500.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3978] width 2880 pitch 11520 (/4 2880)
>[101500.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f58]
>[101500.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f58] width 2880 pitch 11520 (/4 2880)
>[101500.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f88]
>[101500.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f88] width 2880 pitch 11520 (/4 2880)
>[101500.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f58]
>[101500.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f58] width 2880 pitch 11520 (/4 2880)
>[101500.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c7190]
>[101500.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c7190] width 2880 pitch 11520 (/4 2880)
>[101500.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f25b0]
>[101500.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f25b0] width 2880 pitch 11520 (/4 2880)
>[101500.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f58]
>[101500.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f58] width 2880 pitch 11520 (/4 2880)
>[101500.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f25b0]
>[101500.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f25b0] width 2880 pitch 11520 (/4 2880)
>[101500.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d3f58]
>[101500.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d3f58] width 2880 pitch 11520 (/4 2880)
>[101500.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f25b0]
>[101500.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f25b0] width 2880 pitch 11520 (/4 2880)
>[101502.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1ec80]
>[101502.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1ec80] width 2880 pitch 11520 (/4 2880)
>[101513.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24980]
>[101513.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24980] width 2880 pitch 11520 (/4 2880)
>[101515.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101515.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101515.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101515.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101515.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96181a0]
>[101515.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96181a0] width 2880 pitch 11520 (/4 2880)
>[101515.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101515.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101515.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101515.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101531.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101531.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101531.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101531.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101531.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101531.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101531.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101531.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101531.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9932a60]
>[101531.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9932a60] width 2880 pitch 11520 (/4 2880)
>[101531.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101531.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101531.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101531.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101531.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447b98]
>[101531.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447b98] width 2880 pitch 11520 (/4 2880)
>[101531.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f26b0]
>[101531.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f26b0] width 2880 pitch 11520 (/4 2880)
>[101531.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a64a0]
>[101531.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a64a0] width 2880 pitch 11520 (/4 2880)
>[101531.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101531.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101531.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adfc00]
>[101531.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adfc00] width 2880 pitch 11520 (/4 2880)
>[101535.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e5b0]
>[101535.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e5b0] width 2880 pitch 11520 (/4 2880)
>[101535.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101535.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101535.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101535.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101535.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce1d00]
>[101535.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce1d00] width 2880 pitch 11520 (/4 2880)
>[101535.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007818]
>[101535.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007818] width 2880 pitch 11520 (/4 2880)
>[101535.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101535.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101535.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101535.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101535.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101535.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101535.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ce1d00]
>[101535.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ce1d00] width 2880 pitch 11520 (/4 2880)
>[101535.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa007818]
>[101535.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa007818] width 2880 pitch 11520 (/4 2880)
>[101535.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101535.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101535.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101535.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101535.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101535.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101536.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d641e0]
>[101536.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d641e0] width 2880 pitch 11520 (/4 2880)
>[101536.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adfc00]
>[101537.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adfc00] width 2880 pitch 11520 (/4 2880)
>[101537.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24980]
>[101537.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24980] width 2880 pitch 11520 (/4 2880)
>[101537.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aef10]
>[101537.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aef10] width 2880 pitch 11520 (/4 2880)
>[101537.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976e5b0]
>[101537.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976e5b0] width 2880 pitch 11520 (/4 2880)
>[101537.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101537.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101537.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101537.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101537.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101537.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101537.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101537.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101537.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101537.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101537.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101537.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101537.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101537.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101537.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a9aa8]
>[101537.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a9aa8] width 2880 pitch 11520 (/4 2880)
>[101537.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9613088]
>[101537.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9613088] width 2880 pitch 11520 (/4 2880)
>[101539.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c208]
>[101539.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c208] width 2880 pitch 11520 (/4 2880)
>[101539.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28da0]
>[101539.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28da0] width 2880 pitch 11520 (/4 2880)
>[101539.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24980]
>[101539.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24980] width 2880 pitch 11520 (/4 2880)
>[101539.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c28ea0]
>[101539.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c28ea0] width 2880 pitch 11520 (/4 2880)
>[101539.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b64828]
>[101539.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b64828] width 2880 pitch 11520 (/4 2880)
>[101539.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c24980]
>[101539.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c24980] width 2880 pitch 11520 (/4 2880)
>[101543.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa36e298]
>[101543.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa36e298] width 2880 pitch 11520 (/4 2880)
>[101543.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc30c0]
>[101543.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc30c0] width 2880 pitch 11520 (/4 2880)
>[101543.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757d50]
>[101543.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757d50] width 2880 pitch 11520 (/4 2880)
>[101543.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09f668]
>[101543.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09f668] width 2880 pitch 11520 (/4 2880)
>[101543.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574d60]
>[101543.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574d60] width 2880 pitch 11520 (/4 2880)
>[101543.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc30c0]
>[101543.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc30c0] width 2880 pitch 11520 (/4 2880)
>[101543.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757d50]
>[101543.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757d50] width 2880 pitch 11520 (/4 2880)
>[101543.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101543.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101543.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757d50]
>[101543.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757d50] width 2880 pitch 11520 (/4 2880)
>[101543.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101543.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101543.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9757d50]
>[101543.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9757d50] width 2880 pitch 11520 (/4 2880)
>[101543.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101544.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101544.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b64910]
>[101544.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b64910] width 2880 pitch 11520 (/4 2880)
>[101544.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101544.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101544.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101544.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101544.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101544.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101544.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101544.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101544.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101544.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101544.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a72c70]
>[101544.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a72c70] width 2880 pitch 11520 (/4 2880)
>[101544.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b64910]
>[101544.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b64910] width 2880 pitch 11520 (/4 2880)
>[101544.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09f7a8]
>[101544.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09f7a8] width 2880 pitch 11520 (/4 2880)
>[101544.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248af8]
>[101544.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248af8] width 2880 pitch 11520 (/4 2880)
>[101545.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09f7a8]
>[101545.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09f7a8] width 2880 pitch 11520 (/4 2880)
>[101549.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101549.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101549.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa180688]
>[101550.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa180688] width 2880 pitch 11520 (/4 2880)
>[101550.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101550.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101550.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa180688]
>[101550.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa180688] width 2880 pitch 11520 (/4 2880)
>[101550.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9574cd0]
>[101550.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9574cd0] width 2880 pitch 11520 (/4 2880)
>[101550.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4f0]
>[101550.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4f0] width 2880 pitch 11520 (/4 2880)
>[101550.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998408]
>[101550.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998408] width 2880 pitch 11520 (/4 2880)
>[101550.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4f0]
>[101550.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4f0] width 2880 pitch 11520 (/4 2880)
>[101550.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94e2538]
>[101550.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94e2538] width 2880 pitch 11520 (/4 2880)
>[101550.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c1ec80]
>[101550.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c1ec80] width 2880 pitch 11520 (/4 2880)
>[101551.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8a08]
>[101551.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8a08] width 2880 pitch 11520 (/4 2880)
>[101552.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4f0]
>[101552.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4f0] width 2880 pitch 11520 (/4 2880)
>[101552.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4f0]
>[101552.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4f0] width 2880 pitch 11520 (/4 2880)
>[101552.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96afe20]
>[101552.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96afe20] width 2880 pitch 11520 (/4 2880)
>[101552.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4a0]
>[101552.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4a0] width 2880 pitch 11520 (/4 2880)
>[101552.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998408]
>[101552.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998408] width 2880 pitch 11520 (/4 2880)
>[101552.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12c4a0]
>[101552.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12c4a0] width 2880 pitch 11520 (/4 2880)
>[101552.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998408]
>[101552.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998408] width 2880 pitch 11520 (/4 2880)
>[101552.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f8a08]
>[101552.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f8a08] width 2880 pitch 11520 (/4 2880)
>[101552.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d5390]
>[101552.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d5390] width 2880 pitch 11520 (/4 2880)
>[101552.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962e1c8]
>[101552.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962e1c8] width 2880 pitch 11520 (/4 2880)
>[101561.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5a80]
>[101561.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5a80] width 2880 pitch 11520 (/4 2880)
>[101561.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5ab0]
>[101561.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5ab0] width 2880 pitch 11520 (/4 2880)
>[101561.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95a5a80]
>[101561.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95a5a80] width 2880 pitch 11520 (/4 2880)
>[101561.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998410]
>[101561.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998410] width 2880 pitch 11520 (/4 2880)
>[101561.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9af2098]
>[101561.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9af2098] width 2880 pitch 11520 (/4 2880)
>[101561.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa00]
>[101561.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa00] width 2880 pitch 11520 (/4 2880)
>[101561.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d970]
>[101561.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d970] width 2880 pitch 11520 (/4 2880)
>[101561.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecfa00]
>[101561.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecfa00] width 2880 pitch 11520 (/4 2880)
>[101561.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ecf9c0]
>[101561.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ecf9c0] width 2880 pitch 11520 (/4 2880)
>[101568.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101568.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101568.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101568.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101568.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998430]
>[101568.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998430] width 2880 pitch 11520 (/4 2880)
>[101568.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101568.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101568.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998430]
>[101568.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998430] width 2880 pitch 11520 (/4 2880)
>[101568.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248af8]
>[101568.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248af8] width 2880 pitch 11520 (/4 2880)
>[101568.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998430]
>[101568.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998430] width 2880 pitch 11520 (/4 2880)
>[101568.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248af8]
>[101568.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248af8] width 2880 pitch 11520 (/4 2880)
>[101568.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9998430]
>[101569.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9998430] width 2880 pitch 11520 (/4 2880)
>[101569.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa248af8]
>[101569.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa248af8] width 2880 pitch 11520 (/4 2880)
>[101570.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be950]
>[101570.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be950] width 2880 pitch 11520 (/4 2880)
>[101570.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101570.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101570.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97be950]
>[101570.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97be950] width 2880 pitch 11520 (/4 2880)
>[101570.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101570.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101570.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447b98]
>[101570.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447b98] width 2880 pitch 11520 (/4 2880)
>[101570.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101570.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101570.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447b98]
>[101570.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447b98] width 2880 pitch 11520 (/4 2880)
>[101570.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101570.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101570.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9447b98]
>[101570.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9447b98] width 2880 pitch 11520 (/4 2880)
>[101570.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799ee0]
>[101570.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799ee0] width 2880 pitch 11520 (/4 2880)
>[101570.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101570.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101578.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9993350]
>[101578.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9993350] width 2880 pitch 11520 (/4 2880)
>[101578.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101578.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101578.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9993350]
>[101578.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9993350] width 2880 pitch 11520 (/4 2880)
>[101578.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53150]
>[101578.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53150] width 2880 pitch 11520 (/4 2880)
>[101578.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9993350]
>[101578.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9993350] width 2880 pitch 11520 (/4 2880)
>[101578.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53150]
>[101578.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53150] width 2880 pitch 11520 (/4 2880)
>[101578.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9993350]
>[101578.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9993350] width 2880 pitch 11520 (/4 2880)
>[101578.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f53150]
>[101578.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f53150] width 2880 pitch 11520 (/4 2880)
>[101578.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9993350]
>[101578.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9993350] width 2880 pitch 11520 (/4 2880)
>[101579.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101579.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101580.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d970]
>[101580.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d970] width 2880 pitch 11520 (/4 2880)
>[101580.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0bb588]
>[101580.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0bb588] width 2880 pitch 11520 (/4 2880)
>[101580.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1d970]
>[101580.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1d970] width 2880 pitch 11520 (/4 2880)
>[101580.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f86b0]
>[101580.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f86b0] width 2880 pitch 11520 (/4 2880)
>[101580.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101580.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101580.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f86b0]
>[101580.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f86b0] width 2880 pitch 11520 (/4 2880)
>[101580.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101580.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101580.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f86b0]
>[101580.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f86b0] width 2880 pitch 11520 (/4 2880)
>[101580.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563ba0]
>[101580.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563ba0] width 2880 pitch 11520 (/4 2880)
>[101580.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f86b0]
>[101580.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f86b0] width 2880 pitch 11520 (/4 2880)
>[101580.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0038]
>[101580.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0038] width 2880 pitch 11520 (/4 2880)
>[101587.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64190]
>[101587.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64190] width 2880 pitch 11520 (/4 2880)
>[101587.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a3ac8]
>[101587.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a3ac8] width 2880 pitch 11520 (/4 2880)
>[101587.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64190]
>[101587.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64190] width 2880 pitch 11520 (/4 2880)
>[101587.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0068]
>[101587.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0068] width 2880 pitch 11520 (/4 2880)
>[101587.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64190]
>[101587.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64190] width 2880 pitch 11520 (/4 2880)
>[101587.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0068]
>[101587.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0068] width 2880 pitch 11520 (/4 2880)
>[101587.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a64190]
>[101587.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a64190] width 2880 pitch 11520 (/4 2880)
>[101587.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b0068]
>[101587.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b0068] width 2880 pitch 11520 (/4 2880)
>[101587.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06b0d8]
>[101587.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06b0d8] width 2880 pitch 11520 (/4 2880)
>[101592.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbfc8]
>[101592.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbfc8] width 2880 pitch 11520 (/4 2880)
>[101592.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06b0d8]
>[101592.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06b0d8] width 2880 pitch 11520 (/4 2880)
>[101592.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbfc8]
>[101592.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbfc8] width 2880 pitch 11520 (/4 2880)
>[101592.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06b0d8]
>[101592.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06b0d8] width 2880 pitch 11520 (/4 2880)
>[101592.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbfc8]
>[101592.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbfc8] width 2880 pitch 11520 (/4 2880)
>[101592.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970e7d0]
>[101592.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970e7d0] width 2880 pitch 11520 (/4 2880)
>[101592.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbfc8]
>[101592.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbfc8] width 2880 pitch 11520 (/4 2880)
>[101592.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970e7d0]
>[101592.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970e7d0] width 2880 pitch 11520 (/4 2880)
>[101592.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bbfc8]
>[101592.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bbfc8] width 2880 pitch 11520 (/4 2880)
>[101594.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa27b0e8]
>[101594.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa27b0e8] width 2880 pitch 11520 (/4 2880)
>[101595.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1c1d8]
>[101595.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1c1d8] width 2880 pitch 11520 (/4 2880)
>[101595.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[101595.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[101595.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc9988]
>[101595.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc9988] width 2880 pitch 11520 (/4 2880)
>[101595.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc9988]
>[101595.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc9988] width 2880 pitch 11520 (/4 2880)
>[101596.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc9988]
>[101596.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc9988] width 2880 pitch 11520 (/4 2880)
>[101596.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612ea8]
>[101596.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612ea8] width 2880 pitch 11520 (/4 2880)
>[101596.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c238]
>[101596.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c238] width 2880 pitch 11520 (/4 2880)
>[101596.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b77da8]
>[101596.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b77da8] width 2880 pitch 11520 (/4 2880)
>[101596.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962ef80]
>[101597.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962ef80] width 2880 pitch 11520 (/4 2880)
>[101597.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101597.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101638.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101638.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101638.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101638.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101638.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101638.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101638.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101638.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101638.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101639.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101639.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101639.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101639.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101639.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101639.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101639.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101640.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2a3f88]
>[101640.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2a3f88] width 2880 pitch 11520 (/4 2880)
>[101641.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb2ff0]
>[101641.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb2ff0] width 2880 pitch 11520 (/4 2880)
>[101642.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101642.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101643.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101643.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101643.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101643.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101644.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101644.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101644.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101644.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101644.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101644.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101644.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1e50]
>[101644.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1e50] width 2880 pitch 11520 (/4 2880)
>[101645.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101645.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101646.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f3b78]
>[101646.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f3b78] width 2880 pitch 11520 (/4 2880)
>[101646.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df2cc0]
>[101646.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df2cc0] width 2880 pitch 11520 (/4 2880)
>[101646.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c7d0]
>[101646.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c7d0] width 2880 pitch 11520 (/4 2880)
>[101646.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df2cc0]
>[101646.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df2cc0] width 2880 pitch 11520 (/4 2880)
>[101646.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1238e8]
>[101646.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1238e8] width 2880 pitch 11520 (/4 2880)
>[101646.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517b40]
>[101646.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517b40] width 2880 pitch 11520 (/4 2880)
>[101646.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa373130]
>[101646.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa373130] width 2880 pitch 11520 (/4 2880)
>[101646.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c7d0]
>[101646.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c7d0] width 2880 pitch 11520 (/4 2880)
>[101646.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71828]
>[101646.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71828] width 2880 pitch 11520 (/4 2880)
>[101646.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0120]
>[101646.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0120] width 2880 pitch 11520 (/4 2880)
>[101646.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1e50]
>[101646.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1e50] width 2880 pitch 11520 (/4 2880)
>[101646.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9981ff8]
>[101646.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9981ff8] width 2880 pitch 11520 (/4 2880)
>[101646.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1e50]
>[101646.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1e50] width 2880 pitch 11520 (/4 2880)
>[101646.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aa3e0]
>[101646.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aa3e0] width 2880 pitch 11520 (/4 2880)
>[101646.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1e50]
>[101647.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1e50] width 2880 pitch 11520 (/4 2880)
>[101647.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9837388]
>[101647.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9837388] width 2880 pitch 11520 (/4 2880)
>[101647.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1e50]
>[101647.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1e50] width 2880 pitch 11520 (/4 2880)
>[101647.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d71828]
>[101647.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d71828] width 2880 pitch 11520 (/4 2880)
>[101649.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9791de8]
>[101649.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9791de8] width 2880 pitch 11520 (/4 2880)
>[101650.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9791de8]
>[101650.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9791de8] width 2880 pitch 11520 (/4 2880)
>[101651.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b1b88]
>[101651.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b1b88] width 2880 pitch 11520 (/4 2880)
>[101652.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d73088]
>[101652.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d73088] width 2880 pitch 11520 (/4 2880)
>[101653.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa258030]
>[101653.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa258030] width 2880 pitch 11520 (/4 2880)
>[101661.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x968f0c8]
>[101661.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x968f0c8] width 2880 pitch 11520 (/4 2880)
>[101662.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d5260]
>[101662.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d5260] width 2880 pitch 11520 (/4 2880)
>[101670.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f50f78]
>[101670.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f50f78] width 2880 pitch 11520 (/4 2880)
>[101674.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612f88]
>[101674.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612f88] width 2880 pitch 11520 (/4 2880)
>[101675.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e630]
>[101675.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e630] width 2880 pitch 11520 (/4 2880)
>[101682.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x980ed18]
>[101682.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x980ed18] width 2880 pitch 11520 (/4 2880)
>[101682.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516e70]
>[101682.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516e70] width 2880 pitch 11520 (/4 2880)
>[101682.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e2788]
>[101682.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e2788] width 2880 pitch 11520 (/4 2880)
>[101682.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa277af8]
>[101682.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa277af8] width 2880 pitch 11520 (/4 2880)
>[101683.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aef18]
>[101683.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aef18] width 2880 pitch 11520 (/4 2880)
>[101683.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b481c0]
>[101683.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b481c0] width 2880 pitch 11520 (/4 2880)
>[101683.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eba8e8]
>[101683.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eba8e8] width 2880 pitch 11520 (/4 2880)
>[101684.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0c54c8]
>[101684.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0c54c8] width 2880 pitch 11520 (/4 2880)
>[101684.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa6108]
>[101684.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa6108] width 2880 pitch 11520 (/4 2880)
>[101684.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d9e620]
>[101684.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d9e620] width 2880 pitch 11520 (/4 2880)
>[101684.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa090fb8]
>[101684.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa090fb8] width 2880 pitch 11520 (/4 2880)
>[101691.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101691.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101691.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101691.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101691.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101691.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101691.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa362a70]
>[101691.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa362a70] width 2880 pitch 11520 (/4 2880)
>[101691.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4eb98]
>[101691.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4eb98] width 2880 pitch 11520 (/4 2880)
>[101691.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[101691.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[101691.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09a158]
>[101691.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09a158] width 2880 pitch 11520 (/4 2880)
>[101691.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03ab40]
>[101691.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03ab40] width 2880 pitch 11520 (/4 2880)
>[101700.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[101700.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[101700.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101700.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101700.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x992ec38]
>[101700.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x992ec38] width 2880 pitch 11520 (/4 2880)
>[101700.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101700.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101700.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa6108]
>[101700.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa6108] width 2880 pitch 11520 (/4 2880)
>[101700.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101700.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101700.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa6108]
>[101700.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa6108] width 2880 pitch 11520 (/4 2880)
>[101700.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab7728]
>[101700.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab7728] width 2880 pitch 11520 (/4 2880)
>[101700.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9fa6108]
>[101700.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9fa6108] width 2880 pitch 11520 (/4 2880)
>[101700.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15a330]
>[101700.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15a330] width 2880 pitch 11520 (/4 2880)
>[101700.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x977e568]
>[101700.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x977e568] width 2880 pitch 11520 (/4 2880)
>[101702.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf5e8]
>[101702.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf5e8] width 2880 pitch 11520 (/4 2880)
>[101702.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[101702.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[101702.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf5e8]
>[101702.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf5e8] width 2880 pitch 11520 (/4 2880)
>[101702.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a116c0]
>[101702.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a116c0] width 2880 pitch 11520 (/4 2880)
>[101702.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[101702.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[101702.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20c790]
>[101702.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20c790] width 2880 pitch 11520 (/4 2880)
>[101702.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d76290]
>[101702.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d76290] width 2880 pitch 11520 (/4 2880)
>[101702.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20c790]
>[101702.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20c790] width 2880 pitch 11520 (/4 2880)
>[101702.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8360]
>[101702.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8360] width 2880 pitch 11520 (/4 2880)
>[101704.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[101704.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[101704.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101704.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101704.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[101704.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[101704.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101704.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101704.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a3038]
>[101704.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a3038] width 2880 pitch 11520 (/4 2880)
>[101704.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818b58]
>[101704.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818b58] width 2880 pitch 11520 (/4 2880)
>[101704.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101704.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101704.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9818b58]
>[101704.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9818b58] width 2880 pitch 11520 (/4 2880)
>[101704.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101704.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101707.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9612f88]
>[101707.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9612f88] width 2880 pitch 11520 (/4 2880)
>[101707.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bf5e8]
>[101707.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bf5e8] width 2880 pitch 11520 (/4 2880)
>[101707.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0874d8]
>[101707.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0874d8] width 2880 pitch 11520 (/4 2880)
>[101707.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8360]
>[101707.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8360] width 2880 pitch 11520 (/4 2880)
>[101707.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9531618]
>[101707.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9531618] width 2880 pitch 11520 (/4 2880)
>[101708.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101708.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101713.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[101713.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[101713.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c8360]
>[101713.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c8360] width 2880 pitch 11520 (/4 2880)
>[101713.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa055840]
>[101713.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa055840] width 2880 pitch 11520 (/4 2880)
>[101713.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e956e0]
>[101713.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e956e0] width 2880 pitch 11520 (/4 2880)
>[101713.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa055840]
>[101713.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa055840] width 2880 pitch 11520 (/4 2880)
>[101878.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[101878.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[101878.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b74520]
>[101878.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b74520] width 2880 pitch 11520 (/4 2880)
>[101879.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517e00]
>[101880.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517e00] width 2880 pitch 11520 (/4 2880)
>[101882.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa055840]
>[101882.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa055840] width 2880 pitch 11520 (/4 2880)
>[101882.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d0240]
>[101882.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d0240] width 2880 pitch 11520 (/4 2880)
>[101882.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa083998]
>[101882.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa083998] width 2880 pitch 11520 (/4 2880)
>[101883.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101883.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101883.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb830]
>[101883.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb830] width 2880 pitch 11520 (/4 2880)
>[101883.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99936a8]
>[101883.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99936a8] width 2880 pitch 11520 (/4 2880)
>[101887.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97bb830]
>[101887.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97bb830] width 2880 pitch 11520 (/4 2880)
>[101887.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101887.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101887.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101887.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101887.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa108ee8]
>[101887.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa108ee8] width 2880 pitch 11520 (/4 2880)
>[101887.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c608e8]
>[101887.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c608e8] width 2880 pitch 11520 (/4 2880)
>[101887.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ba3a8]
>[101887.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ba3a8] width 2880 pitch 11520 (/4 2880)
>[101887.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x959a488]
>[101887.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x959a488] width 2880 pitch 11520 (/4 2880)
>[101887.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101887.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101887.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101887.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101887.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c608e8]
>[101887.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c608e8] width 2880 pitch 11520 (/4 2880)
>[101887.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ba3a8]
>[101887.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ba3a8] width 2880 pitch 11520 (/4 2880)
>[101888.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ba3a8]
>[101888.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ba3a8] width 2880 pitch 11520 (/4 2880)
>[101888.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101888.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ba3a8]
>[101888.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ba3a8] width 2880 pitch 11520 (/4 2880)
>[101888.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101888.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101888.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101888.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101888.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101888.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101888.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101888.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101888.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101888.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101888.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101888.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101888.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89510]
>[101888.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89510] width 2880 pitch 11520 (/4 2880)
>[101888.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabef0]
>[101888.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabef0] width 2880 pitch 11520 (/4 2880)
>[101898.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc398]
>[101898.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc398] width 2880 pitch 11520 (/4 2880)
>[101898.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9758]
>[101898.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9758] width 2880 pitch 11520 (/4 2880)
>[101898.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc398]
>[101898.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc398] width 2880 pitch 11520 (/4 2880)
>[101898.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9758]
>[101898.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9758] width 2880 pitch 11520 (/4 2880)
>[101898.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc398]
>[101898.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc398] width 2880 pitch 11520 (/4 2880)
>[101898.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2c120]
>[101898.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2c120] width 2880 pitch 11520 (/4 2880)
>[101898.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a0d8]
>[101898.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a0d8] width 2880 pitch 11520 (/4 2880)
>[101898.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101898.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101898.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d2c120]
>[101898.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d2c120] width 2880 pitch 11520 (/4 2880)
>[101898.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ffc90]
>[101898.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ffc90] width 2880 pitch 11520 (/4 2880)
>[101898.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a0d8]
>[101898.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a0d8] width 2880 pitch 11520 (/4 2880)
>[101898.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afc398]
>[101898.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afc398] width 2880 pitch 11520 (/4 2880)
>[101898.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e8c6a8]
>[101898.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e8c6a8] width 2880 pitch 11520 (/4 2880)
>[101898.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d5090]
>[101898.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d5090] width 2880 pitch 11520 (/4 2880)
>[101898.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f51180]
>[101898.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f51180] width 2880 pitch 11520 (/4 2880)
>[101899.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96397b0]
>[101899.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96397b0] width 2880 pitch 11520 (/4 2880)
>[101899.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa144220]
>[101899.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa144220] width 2880 pitch 11520 (/4 2880)
>[101899.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955fed8]
>[101899.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955fed8] width 2880 pitch 11520 (/4 2880)
>[101899.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9817e90]
>[101899.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9817e90] width 2880 pitch 11520 (/4 2880)
>[101899.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afd328]
>[101899.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afd328] width 2880 pitch 11520 (/4 2880)
>[101900.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7e28]
>[101900.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7e28] width 2880 pitch 11520 (/4 2880)
>[101900.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x955fed8]
>[101900.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x955fed8] width 2880 pitch 11520 (/4 2880)
>[101900.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101900.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101907.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9df9758]
>[101908.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9df9758] width 2880 pitch 11520 (/4 2880)
>[101908.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101908.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101908.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744138]
>[101908.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744138] width 2880 pitch 11520 (/4 2880)
>[101908.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc428]
>[101908.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc428] width 2880 pitch 11520 (/4 2880)
>[101908.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9912b50]
>[101908.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9912b50] width 2880 pitch 11520 (/4 2880)
>[101909.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101909.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101910.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99892c0]
>[101910.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99892c0] width 2880 pitch 11520 (/4 2880)
>[101910.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[101910.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[101910.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101910.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101910.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101910.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101914.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[101914.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[101941.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101941.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101941.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f44af0]
>[101941.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f44af0] width 2880 pitch 11520 (/4 2880)
>[101941.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12ccf0]
>[101941.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12ccf0] width 2880 pitch 11520 (/4 2880)
>[101942.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99892c0]
>[101942.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99892c0] width 2880 pitch 11520 (/4 2880)
>[101942.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[101942.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[101942.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4a78]
>[101943.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4a78] width 2880 pitch 11520 (/4 2880)
>[101943.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101943.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101943.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99892c0]
>[101943.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99892c0] width 2880 pitch 11520 (/4 2880)
>[101943.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aedc8]
>[101943.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aedc8] width 2880 pitch 11520 (/4 2880)
>[101944.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[101944.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[101944.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8d10]
>[101944.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8d10] width 2880 pitch 11520 (/4 2880)
>[101944.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99892c0]
>[101944.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99892c0] width 2880 pitch 11520 (/4 2880)
>[101944.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12ccf0]
>[101944.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12ccf0] width 2880 pitch 11520 (/4 2880)
>[101944.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[101944.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[101944.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101944.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101944.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186920]
>[101944.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186920] width 2880 pitch 11520 (/4 2880)
>[101945.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8a38]
>[101945.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8a38] width 2880 pitch 11520 (/4 2880)
>[101945.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa186920]
>[101945.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa186920] width 2880 pitch 11520 (/4 2880)
>[101945.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96d4a78]
>[101945.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96d4a78] width 2880 pitch 11520 (/4 2880)
>[101945.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[101945.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[101945.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[101945.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[101949.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8a38]
>[101949.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8a38] width 2880 pitch 11520 (/4 2880)
>[101949.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[101949.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[101949.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ff58]
>[101949.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ff58] width 2880 pitch 11520 (/4 2880)
>[101949.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aedc8]
>[101949.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aedc8] width 2880 pitch 11520 (/4 2880)
>[101949.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101949.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101949.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[101949.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[101949.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101949.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101949.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[101949.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[101949.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101949.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101949.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[101949.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[101949.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101949.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101949.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8d10]
>[101949.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8d10] width 2880 pitch 11520 (/4 2880)
>[101949.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[101949.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[101962.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[101962.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[101968.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101968.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101975.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24850]
>[101975.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24850] width 2880 pitch 11520 (/4 2880)
>[101983.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8a38]
>[101983.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8a38] width 2880 pitch 11520 (/4 2880)
>[101990.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[101990.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[101995.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101995.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101995.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101995.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101995.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101995.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101995.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f44af0]
>[101995.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f44af0] width 2880 pitch 11520 (/4 2880)
>[101996.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[101996.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[101996.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[101996.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[101996.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[101996.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[101997.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cb3b8]
>[101997.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cb3b8] width 2880 pitch 11520 (/4 2880)
>[101997.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e508]
>[101997.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e508] width 2880 pitch 11520 (/4 2880)
>[101997.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[101997.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[101997.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[101997.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[101997.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0aedc8]
>[101997.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0aedc8] width 2880 pitch 11520 (/4 2880)
>[102016.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[102016.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[102017.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102017.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102017.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102017.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102017.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102017.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102017.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102017.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102022.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102022.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102022.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102022.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102022.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[102022.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[102022.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102022.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102022.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e508]
>[102022.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e508] width 2880 pitch 11520 (/4 2880)
>[102022.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28a2e8]
>[102023.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28a2e8] width 2880 pitch 11520 (/4 2880)
>[102023.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102023.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102031.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102031.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102036.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102036.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102042.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102042.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102042.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102042.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102042.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102042.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102042.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97270a0]
>[102042.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97270a0] width 2880 pitch 11520 (/4 2880)
>[102042.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa324c28]
>[102042.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa324c28] width 2880 pitch 11520 (/4 2880)
>[102043.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102043.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102043.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa142ca0]
>[102043.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa142ca0] width 2880 pitch 11520 (/4 2880)
>[102043.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[102043.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[102043.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102043.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102043.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979ff58]
>[102043.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979ff58] width 2880 pitch 11520 (/4 2880)
>[102043.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102043.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102043.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f44af0]
>[102043.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f44af0] width 2880 pitch 11520 (/4 2880)
>[102043.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102043.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102043.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97270a0]
>[102043.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97270a0] width 2880 pitch 11520 (/4 2880)
>[102043.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102043.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102085.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102085.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102085.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102085.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102087.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102087.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102087.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[102087.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[102087.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa129c78]
>[102087.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa129c78] width 2880 pitch 11520 (/4 2880)
>[102087.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6efd8]
>[102087.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6efd8] width 2880 pitch 11520 (/4 2880)
>[102087.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102087.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102087.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102088.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102088.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[102088.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[102089.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4c60]
>[102089.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4c60] width 2880 pitch 11520 (/4 2880)
>[102090.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102090.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102090.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6efd8]
>[102090.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6efd8] width 2880 pitch 11520 (/4 2880)
>[102090.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb4c60]
>[102090.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb4c60] width 2880 pitch 11520 (/4 2880)
>[102091.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97270a0]
>[102091.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97270a0] width 2880 pitch 11520 (/4 2880)
>[102091.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e508]
>[102091.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e508] width 2880 pitch 11520 (/4 2880)
>[102091.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7b0]
>[102091.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7b0] width 2880 pitch 11520 (/4 2880)
>[102091.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774f00]
>[102091.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774f00] width 2880 pitch 11520 (/4 2880)
>[102105.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102105.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102122.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102122.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102122.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae30]
>[102122.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae30] width 2880 pitch 11520 (/4 2880)
>[102122.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ece8]
>[102122.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ece8] width 2880 pitch 11520 (/4 2880)
>[102122.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aae30]
>[102122.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aae30] width 2880 pitch 11520 (/4 2880)
>[102122.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x996ece8]
>[102122.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x996ece8] width 2880 pitch 11520 (/4 2880)
>[102122.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd318]
>[102122.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd318] width 2880 pitch 11520 (/4 2880)
>[102122.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102122.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102122.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d3658]
>[102122.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d3658] width 2880 pitch 11520 (/4 2880)
>[102122.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24850]
>[102123.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24850] width 2880 pitch 11520 (/4 2880)
>[102123.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102123.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102123.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516e70]
>[102123.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516e70] width 2880 pitch 11520 (/4 2880)
>[102123.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102123.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102123.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102123.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102124.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102124.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102127.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102127.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102127.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa20e508]
>[102127.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa20e508] width 2880 pitch 11520 (/4 2880)
>[102127.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[102127.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[102127.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102127.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102127.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102127.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102127.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102127.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102127.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102127.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102127.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1928]
>[102127.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1928] width 2880 pitch 11520 (/4 2880)
>[102127.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102127.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102127.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[102127.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[102127.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102127.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102127.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[102127.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[102127.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102127.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102128.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102128.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102135.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102135.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102140.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102140.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102149.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f24850]
>[102149.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f24850] width 2880 pitch 11520 (/4 2880)
>[102149.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9db3a00]
>[102149.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9db3a00] width 2880 pitch 11520 (/4 2880)
>[102149.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa277af8]
>[102150.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa277af8] width 2880 pitch 11520 (/4 2880)
>[102150.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b7548]
>[102150.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b7548] width 2880 pitch 11520 (/4 2880)
>[102150.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae170]
>[102150.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae170] width 2880 pitch 11520 (/4 2880)
>[102150.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774f00]
>[102150.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774f00] width 2880 pitch 11520 (/4 2880)
>[102151.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[102151.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[102151.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa516e70]
>[102151.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa516e70] width 2880 pitch 11520 (/4 2880)
>[102153.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7b0]
>[102153.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7b0] width 2880 pitch 11520 (/4 2880)
>[102153.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102153.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102153.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774f00]
>[102153.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774f00] width 2880 pitch 11520 (/4 2880)
>[102154.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[102154.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[102154.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[102154.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[102156.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9774f00]
>[102156.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9774f00] width 2880 pitch 11520 (/4 2880)
>[102156.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23c728]
>[102156.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23c728] width 2880 pitch 11520 (/4 2880)
>[102156.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102156.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102156.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff49a8]
>[102156.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff49a8] width 2880 pitch 11520 (/4 2880)
>[102156.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f2d7b0]
>[102156.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f2d7b0] width 2880 pitch 11520 (/4 2880)
>[102157.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7b160]
>[102157.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7b160] width 2880 pitch 11520 (/4 2880)
>[102157.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a6788]
>[102157.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a6788] width 2880 pitch 11520 (/4 2880)
>[102158.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[102158.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[102158.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102158.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102158.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bb458]
>[102158.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bb458] width 2880 pitch 11520 (/4 2880)
>[102158.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102158.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102158.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97ae170]
>[102158.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97ae170] width 2880 pitch 11520 (/4 2880)
>[102158.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102158.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102170.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff49a8]
>[102170.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff49a8] width 2880 pitch 11520 (/4 2880)
>[102170.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102170.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102170.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[102170.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[102170.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff49a8]
>[102170.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff49a8] width 2880 pitch 11520 (/4 2880)
>[102170.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102170.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102170.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9be8]
>[102170.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9be8] width 2880 pitch 11520 (/4 2880)
>[102171.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[102171.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[102171.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102171.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102171.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102171.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102171.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[102171.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[102171.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102172.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102172.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102172.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102172.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff49a8]
>[102173.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff49a8] width 2880 pitch 11520 (/4 2880)
>[102173.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102173.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102173.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102173.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102173.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102173.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102181.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102181.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102181.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102181.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102181.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102181.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102181.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9be8]
>[102182.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9be8] width 2880 pitch 11520 (/4 2880)
>[102182.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102182.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102182.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102182.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102182.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d72878]
>[102182.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d72878] width 2880 pitch 11520 (/4 2880)
>[102182.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[102182.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[102182.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102182.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102182.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[102182.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[102245.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102245.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102246.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102246.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102246.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9be8]
>[102246.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9be8] width 2880 pitch 11520 (/4 2880)
>[102246.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102246.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102246.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9be8]
>[102246.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9be8] width 2880 pitch 11520 (/4 2880)
>[102247.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969da80]
>[102247.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969da80] width 2880 pitch 11520 (/4 2880)
>[102247.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9821b28]
>[102247.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9821b28] width 2880 pitch 11520 (/4 2880)
>[102247.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102247.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102248.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa031c40]
>[102248.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa031c40] width 2880 pitch 11520 (/4 2880)
>[102248.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a28d0]
>[102248.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a28d0] width 2880 pitch 11520 (/4 2880)
>[102248.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa365030]
>[102248.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa365030] width 2880 pitch 11520 (/4 2880)
>[102248.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d8d20]
>[102248.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d8d20] width 2880 pitch 11520 (/4 2880)
>[102248.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99d9be8]
>[102248.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99d9be8] width 2880 pitch 11520 (/4 2880)
>[102264.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786700]
>[102264.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786700] width 2880 pitch 11520 (/4 2880)
>[102264.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102264.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102265.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bef78]
>[102265.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bef78] width 2880 pitch 11520 (/4 2880)
>[102265.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102265.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102265.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9789080]
>[102265.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9789080] width 2880 pitch 11520 (/4 2880)
>[102265.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c40]
>[102265.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c40] width 2880 pitch 11520 (/4 2880)
>[102265.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102265.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102266.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102266.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102268.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102269.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102269.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3e4e8]
>[102269.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3e4e8] width 2880 pitch 11520 (/4 2880)
>[102269.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7018]
>[102269.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7018] width 2880 pitch 11520 (/4 2880)
>[102269.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102269.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102269.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786700]
>[102269.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786700] width 2880 pitch 11520 (/4 2880)
>[102270.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1fc78]
>[102270.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1fc78] width 2880 pitch 11520 (/4 2880)
>[102270.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102270.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102270.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195070]
>[102270.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195070] width 2880 pitch 11520 (/4 2880)
>[102270.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195070]
>[102270.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195070] width 2880 pitch 11520 (/4 2880)
>[102271.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1fc78]
>[102271.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1fc78] width 2880 pitch 11520 (/4 2880)
>[102271.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102271.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102271.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102271.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102271.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137a88]
>[102272.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137a88] width 2880 pitch 11520 (/4 2880)
>[102272.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3718]
>[102272.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3718] width 2880 pitch 11520 (/4 2880)
>[102272.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786700]
>[102272.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786700] width 2880 pitch 11520 (/4 2880)
>[102272.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39c70]
>[102272.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39c70] width 2880 pitch 11520 (/4 2880)
>[102284.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102284.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102286.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102286.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102289.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102289.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102289.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592ad8]
>[102289.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592ad8] width 2880 pitch 11520 (/4 2880)
>[102290.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592ad8]
>[102290.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592ad8] width 2880 pitch 11520 (/4 2880)
>[102290.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c96320]
>[102290.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c96320] width 2880 pitch 11520 (/4 2880)
>[102290.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102290.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102290.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c96320]
>[102290.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c96320] width 2880 pitch 11520 (/4 2880)
>[102290.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102290.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102291.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c96320]
>[102291.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c96320] width 2880 pitch 11520 (/4 2880)
>[102291.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102291.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102291.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c96320]
>[102291.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c96320] width 2880 pitch 11520 (/4 2880)
>[102291.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102291.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102291.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102291.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102291.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102291.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102292.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102292.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102292.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102292.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102303.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3718]
>[102303.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3718] width 2880 pitch 11520 (/4 2880)
>[102303.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137a88]
>[102303.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137a88] width 2880 pitch 11520 (/4 2880)
>[102303.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9755230]
>[102303.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9755230] width 2880 pitch 11520 (/4 2880)
>[102303.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1789c0]
>[102303.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1789c0] width 2880 pitch 11520 (/4 2880)
>[102303.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1fc78]
>[102303.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1fc78] width 2880 pitch 11520 (/4 2880)
>[102303.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0e728]
>[102303.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0e728] width 2880 pitch 11520 (/4 2880)
>[102303.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102303.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102303.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3580]
>[102303.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3580] width 2880 pitch 11520 (/4 2880)
>[102304.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39c70]
>[102304.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39c70] width 2880 pitch 11520 (/4 2880)
>[102304.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991a5a8]
>[102304.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991a5a8] width 2880 pitch 11520 (/4 2880)
>[102304.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486148]
>[102304.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486148] width 2880 pitch 11520 (/4 2880)
>[102304.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e380]
>[102304.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e380] width 2880 pitch 11520 (/4 2880)
>[102304.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102304.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102304.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07edd8]
>[102304.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07edd8] width 2880 pitch 11520 (/4 2880)
>[102304.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102304.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102304.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07edd8]
>[102304.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07edd8] width 2880 pitch 11520 (/4 2880)
>[102304.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102304.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102304.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e380]
>[102304.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e380] width 2880 pitch 11520 (/4 2880)
>[102304.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102304.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102304.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c9e380]
>[102304.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c9e380] width 2880 pitch 11520 (/4 2880)
>[102305.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102305.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102305.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102305.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102305.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[102305.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[102305.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102305.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102305.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9486148]
>[102305.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9486148] width 2880 pitch 11520 (/4 2880)
>[102305.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[102305.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[102305.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa139d78]
>[102305.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa139d78] width 2880 pitch 11520 (/4 2880)
>[102305.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98bc8b8]
>[102305.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98bc8b8] width 2880 pitch 11520 (/4 2880)
>[102360.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea8958]
>[102360.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea8958] width 2880 pitch 11520 (/4 2880)
>[102361.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102361.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102361.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102361.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102361.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea8958]
>[102361.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea8958] width 2880 pitch 11520 (/4 2880)
>[102361.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c40]
>[102361.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c40] width 2880 pitch 11520 (/4 2880)
>[102361.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786700]
>[102361.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786700] width 2880 pitch 11520 (/4 2880)
>[102361.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3580]
>[102361.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3580] width 2880 pitch 11520 (/4 2880)
>[102362.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137a88]
>[102362.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137a88] width 2880 pitch 11520 (/4 2880)
>[102362.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102362.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102362.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3e4e8]
>[102362.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3e4e8] width 2880 pitch 11520 (/4 2880)
>[102362.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102362.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102362.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102362.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102363.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3e4e8]
>[102363.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3e4e8] width 2880 pitch 11520 (/4 2880)
>[102363.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102363.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102363.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f3e4e8]
>[102363.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f3e4e8] width 2880 pitch 11520 (/4 2880)
>[102363.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104e58]
>[102364.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104e58] width 2880 pitch 11520 (/4 2880)
>[102364.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102364.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102364.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3580]
>[102364.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3580] width 2880 pitch 11520 (/4 2880)
>[102364.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1145e8]
>[102364.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1145e8] width 2880 pitch 11520 (/4 2880)
>[102364.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102365.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102365.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1145e8]
>[102365.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1145e8] width 2880 pitch 11520 (/4 2880)
>[102365.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102365.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102365.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c3580]
>[102365.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c3580] width 2880 pitch 11520 (/4 2880)
>[102365.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c40]
>[102365.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c40] width 2880 pitch 11520 (/4 2880)
>[102365.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102365.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102365.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102365.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102365.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa137a88]
>[102365.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa137a88] width 2880 pitch 11520 (/4 2880)
>[102365.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff3718]
>[102366.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff3718] width 2880 pitch 11520 (/4 2880)
>[102366.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102366.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102366.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102366.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102366.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102366.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102366.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102366.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102366.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102366.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102366.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1145e8]
>[102366.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1145e8] width 2880 pitch 11520 (/4 2880)
>[102366.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102366.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102366.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1145e8]
>[102366.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1145e8] width 2880 pitch 11520 (/4 2880)
>[102366.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102366.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102393.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102393.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102393.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102393.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102393.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102393.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102393.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102393.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102393.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102393.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102394.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102394.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102395.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102395.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102395.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102395.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102395.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102395.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102396.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102396.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102396.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102396.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102396.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dcba0]
>[102397.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dcba0] width 2880 pitch 11520 (/4 2880)
>[102397.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102397.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102398.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102398.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102398.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102398.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102398.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102398.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102398.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102398.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102398.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102398.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102424.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102424.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102424.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102424.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102424.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102424.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102424.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102424.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102424.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102424.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102424.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9786700]
>[102424.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9786700] width 2880 pitch 11520 (/4 2880)
>[102424.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a0c40]
>[102424.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a0c40] width 2880 pitch 11520 (/4 2880)
>[102424.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102424.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102424.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102424.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102425.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f4318]
>[102425.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f4318] width 2880 pitch 11520 (/4 2880)
>[102426.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102426.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102426.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195070]
>[102426.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195070] width 2880 pitch 11520 (/4 2880)
>[102426.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c39c70]
>[102426.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c39c70] width 2880 pitch 11520 (/4 2880)
>[102426.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9799c08]
>[102426.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9799c08] width 2880 pitch 11520 (/4 2880)
>[102426.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102426.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102426.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951b8b8]
>[102426.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951b8b8] width 2880 pitch 11520 (/4 2880)
>[102426.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7018]
>[102426.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7018] width 2880 pitch 11520 (/4 2880)
>[102427.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f4318]
>[102427.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f4318] width 2880 pitch 11520 (/4 2880)
>[102427.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b67ce8]
>[102427.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b67ce8] width 2880 pitch 11520 (/4 2880)
>[102427.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e5290]
>[102427.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e5290] width 2880 pitch 11520 (/4 2880)
>[102427.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d7018]
>[102427.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d7018] width 2880 pitch 11520 (/4 2880)
>[102427.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa178098]
>[102428.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa178098] width 2880 pitch 11520 (/4 2880)
>[102428.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f9140]
>[102428.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f9140] width 2880 pitch 11520 (/4 2880)
>[102428.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f9140]
>[102428.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f9140] width 2880 pitch 11520 (/4 2880)
>[102428.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f9140]
>[102428.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f9140] width 2880 pitch 11520 (/4 2880)
>[102428.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1ef608]
>[102428.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1ef608] width 2880 pitch 11520 (/4 2880)
>[102428.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f9140]
>[102428.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f9140] width 2880 pitch 11520 (/4 2880)
>[102428.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x962b2e8]
>[102428.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x962b2e8] width 2880 pitch 11520 (/4 2880)
>[102435.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102435.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102435.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[102435.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[102436.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102436.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102436.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102436.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102436.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[102436.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[102436.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102436.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102436.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102436.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102436.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102436.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102436.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[102436.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[102437.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102437.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102437.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102437.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102437.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102437.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102437.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[102437.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[102438.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102438.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102438.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99add08]
>[102438.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99add08] width 2880 pitch 11520 (/4 2880)
>[102438.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102438.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102438.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a82ec8]
>[102438.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a82ec8] width 2880 pitch 11520 (/4 2880)
>[102452.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02920]
>[102452.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02920] width 2880 pitch 11520 (/4 2880)
>[102452.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea8958]
>[102452.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea8958] width 2880 pitch 11520 (/4 2880)
>[102452.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa163280]
>[102452.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa163280] width 2880 pitch 11520 (/4 2880)
>[102452.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e4b0]
>[102452.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e4b0] width 2880 pitch 11520 (/4 2880)
>[102452.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02920]
>[102452.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02920] width 2880 pitch 11520 (/4 2880)
>[102452.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4e4b0]
>[102452.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4e4b0] width 2880 pitch 11520 (/4 2880)
>[102452.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d02920]
>[102452.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d02920] width 2880 pitch 11520 (/4 2880)
>[102452.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea8958]
>[102452.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea8958] width 2880 pitch 11520 (/4 2880)
>[102452.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa22d2f8]
>[102452.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa22d2f8] width 2880 pitch 11520 (/4 2880)
>[102452.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ea8958]
>[102452.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ea8958] width 2880 pitch 11520 (/4 2880)
>[102453.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f730]
>[102453.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f730] width 2880 pitch 11520 (/4 2880)
>[102453.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c160]
>[102453.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c160] width 2880 pitch 11520 (/4 2880)
>[102453.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43058]
>[102453.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43058] width 2880 pitch 11520 (/4 2880)
>[102454.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c160]
>[102454.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c160] width 2880 pitch 11520 (/4 2880)
>[102454.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43058]
>[102454.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43058] width 2880 pitch 11520 (/4 2880)
>[102454.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17c160]
>[102454.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17c160] width 2880 pitch 11520 (/4 2880)
>[102454.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c43058]
>[102454.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c43058] width 2880 pitch 11520 (/4 2880)
>[102454.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a1150]
>[102454.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a1150] width 2880 pitch 11520 (/4 2880)
>[102454.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744138]
>[102454.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744138] width 2880 pitch 11520 (/4 2880)
>[102454.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae2178]
>[102454.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae2178] width 2880 pitch 11520 (/4 2880)
>[102459.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998c5c8]
>[102459.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998c5c8] width 2880 pitch 11520 (/4 2880)
>[102459.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1525e8]
>[102459.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1525e8] width 2880 pitch 11520 (/4 2880)
>[102460.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a9f0]
>[102460.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a9f0] width 2880 pitch 11520 (/4 2880)
>[102460.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95253e8]
>[102460.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95253e8] width 2880 pitch 11520 (/4 2880)
>[102460.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a9f0]
>[102460.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a9f0] width 2880 pitch 11520 (/4 2880)
>[102460.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f800]
>[102460.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f800] width 2880 pitch 11520 (/4 2880)
>[102460.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c47d20]
>[102460.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c47d20] width 2880 pitch 11520 (/4 2880)
>[102460.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa24f800]
>[102460.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa24f800] width 2880 pitch 11520 (/4 2880)
>[102460.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c47d20]
>[102460.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c47d20] width 2880 pitch 11520 (/4 2880)
>[102460.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9738268]
>[102460.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9738268] width 2880 pitch 11520 (/4 2880)
>[102463.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1525e8]
>[102463.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1525e8] width 2880 pitch 11520 (/4 2880)
>[102463.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9583f80]
>[102463.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9583f80] width 2880 pitch 11520 (/4 2880)
>[102463.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc2c20]
>[102463.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc2c20] width 2880 pitch 11520 (/4 2880)
>[102463.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x972a9f0]
>[102464.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x972a9f0] width 2880 pitch 11520 (/4 2880)
>[102464.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa078958]
>[102464.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa078958] width 2880 pitch 11520 (/4 2880)
>[102464.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9240]
>[102464.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9240] width 2880 pitch 11520 (/4 2880)
>[102464.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0e0400]
>[102464.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0e0400] width 2880 pitch 11520 (/4 2880)
>[102464.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1525e8]
>[102464.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1525e8] width 2880 pitch 11520 (/4 2880)
>[102464.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa089460]
>[102465.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa089460] width 2880 pitch 11520 (/4 2880)
>[102465.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafed0]
>[102465.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafed0] width 2880 pitch 11520 (/4 2880)
>[102465.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951baf0]
>[102465.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951baf0] width 2880 pitch 11520 (/4 2880)
>[102465.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c96258]
>[102465.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c96258] width 2880 pitch 11520 (/4 2880)
>[102465.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bafed0]
>[102465.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bafed0] width 2880 pitch 11520 (/4 2880)
>[102465.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa517118]
>[102465.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa517118] width 2880 pitch 11520 (/4 2880)
>[102481.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102481.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102481.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb5a8]
>[102481.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb5a8] width 2880 pitch 11520 (/4 2880)
>[102481.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a26b38]
>[102481.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a26b38] width 2880 pitch 11520 (/4 2880)
>[102481.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102481.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102482.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2fc0]
>[102482.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2fc0] width 2880 pitch 11520 (/4 2880)
>[102482.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa277af8]
>[102482.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa277af8] width 2880 pitch 11520 (/4 2880)
>[102482.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102482.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102482.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592ad8]
>[102482.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592ad8] width 2880 pitch 11520 (/4 2880)
>[102483.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102483.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102483.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102483.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102483.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102483.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102483.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102483.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102483.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb5a8]
>[102483.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb5a8] width 2880 pitch 11520 (/4 2880)
>[102516.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102516.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102516.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102516.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102516.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102516.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102517.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102517.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102517.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa102fd0]
>[102517.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa102fd0] width 2880 pitch 11520 (/4 2880)
>[102517.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102517.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102517.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2fc0]
>[102517.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2fc0] width 2880 pitch 11520 (/4 2880)
>[102517.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102517.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102517.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f71c8]
>[102518.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f71c8] width 2880 pitch 11520 (/4 2880)
>[102518.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x961f1e0]
>[102518.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x961f1e0] width 2880 pitch 11520 (/4 2880)
>[102518.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa102fd0]
>[102518.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa102fd0] width 2880 pitch 11520 (/4 2880)
>[102518.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102518.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102518.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102518.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102518.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f71c8]
>[102518.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f71c8] width 2880 pitch 11520 (/4 2880)
>[102518.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102518.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102518.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102519.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102523.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb5a8]
>[102523.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb5a8] width 2880 pitch 11520 (/4 2880)
>[102523.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102523.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102523.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102523.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102523.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a7b0]
>[102523.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a7b0] width 2880 pitch 11520 (/4 2880)
>[102523.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2fc0]
>[102523.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2fc0] width 2880 pitch 11520 (/4 2880)
>[102524.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102524.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102524.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd318]
>[102524.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd318] width 2880 pitch 11520 (/4 2880)
>[102525.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3ec0]
>[102525.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3ec0] width 2880 pitch 11520 (/4 2880)
>[102525.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a7b0]
>[102525.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a7b0] width 2880 pitch 11520 (/4 2880)
>[102525.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102525.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102525.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102525.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102525.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102525.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102525.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd318]
>[102525.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd318] width 2880 pitch 11520 (/4 2880)
>[102529.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c4d58]
>[102529.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c4d58] width 2880 pitch 11520 (/4 2880)
>[102529.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd318]
>[102529.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd318] width 2880 pitch 11520 (/4 2880)
>[102530.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102530.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102530.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102530.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102530.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b66d0]
>[102530.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b66d0] width 2880 pitch 11520 (/4 2880)
>[102531.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102531.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102531.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102531.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102531.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08698]
>[102531.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08698] width 2880 pitch 11520 (/4 2880)
>[102531.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa102fd0]
>[102531.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa102fd0] width 2880 pitch 11520 (/4 2880)
>[102531.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ccd318]
>[102531.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ccd318] width 2880 pitch 11520 (/4 2880)
>[102572.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0930]
>[102572.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0930] width 2880 pitch 11520 (/4 2880)
>[102572.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0b8a38]
>[102572.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0b8a38] width 2880 pitch 11520 (/4 2880)
>[102572.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006878]
>[102572.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006878] width 2880 pitch 11520 (/4 2880)
>[102572.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2fc0]
>[102572.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2fc0] width 2880 pitch 11520 (/4 2880)
>[102572.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102572.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102572.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592ad8]
>[102572.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592ad8] width 2880 pitch 11520 (/4 2880)
>[102572.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102572.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102572.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d2e8]
>[102572.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d2e8] width 2880 pitch 11520 (/4 2880)
>[102572.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102573.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102573.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102573.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102573.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102573.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102574.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102574.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102574.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102574.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102574.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102574.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102574.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f78]
>[102574.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f78] width 2880 pitch 11520 (/4 2880)
>[102600.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102600.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102600.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102600.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102600.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102600.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102600.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102600.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102601.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102601.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102601.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102601.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102601.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102601.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102601.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102601.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102601.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa102fd0]
>[102601.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa102fd0] width 2880 pitch 11520 (/4 2880)
>[102601.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102602.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102602.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102602.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102602.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3f71c8]
>[102602.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3f71c8] width 2880 pitch 11520 (/4 2880)
>[102602.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102602.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102602.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102602.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102603.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f78]
>[102603.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f78] width 2880 pitch 11520 (/4 2880)
>[102603.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102603.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102603.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102603.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102603.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102603.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102615.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3ec0]
>[102615.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3ec0] width 2880 pitch 11520 (/4 2880)
>[102615.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102615.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102615.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cc3ec0]
>[102615.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cc3ec0] width 2880 pitch 11520 (/4 2880)
>[102616.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102616.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102616.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102616.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102616.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102616.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102616.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa31a9a8]
>[102616.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa31a9a8] width 2880 pitch 11520 (/4 2880)
>[102616.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d2e8]
>[102616.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d2e8] width 2880 pitch 11520 (/4 2880)
>[102616.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102616.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102617.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d2e8]
>[102617.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d2e8] width 2880 pitch 11520 (/4 2880)
>[102617.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102617.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102617.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102617.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102617.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102617.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102617.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006878]
>[102617.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006878] width 2880 pitch 11520 (/4 2880)
>[102617.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102617.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102617.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102617.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006878]
>[102666.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006878] width 2880 pitch 11520 (/4 2880)
>[102666.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102666.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006878]
>[102666.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006878] width 2880 pitch 11520 (/4 2880)
>[102666.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102666.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f78]
>[102666.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f78] width 2880 pitch 11520 (/4 2880)
>[102666.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102666.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102666.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102666.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102666.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102666.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fb5a8]
>[102666.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fb5a8] width 2880 pitch 11520 (/4 2880)
>[102666.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102666.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102666.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102666.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102666.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102666.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x995faa8]
>[102666.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x995faa8] width 2880 pitch 11520 (/4 2880)
>[102666.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99874d8]
>[102666.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99874d8] width 2880 pitch 11520 (/4 2880)
>[102667.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b66d0]
>[102667.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b66d0] width 2880 pitch 11520 (/4 2880)
>[102667.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3bd48]
>[102667.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3bd48] width 2880 pitch 11520 (/4 2880)
>[102667.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b66d0]
>[102667.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b66d0] width 2880 pitch 11520 (/4 2880)
>[102667.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa102fd0]
>[102667.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa102fd0] width 2880 pitch 11520 (/4 2880)
>[102667.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa293f78]
>[102667.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa293f78] width 2880 pitch 11520 (/4 2880)
>[102668.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102668.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102668.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102668.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102668.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10a570]
>[102668.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10a570] width 2880 pitch 11520 (/4 2880)
>[102668.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102668.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102668.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102668.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102668.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7a128]
>[102668.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7a128] width 2880 pitch 11520 (/4 2880)
>[102669.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102669.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102669.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d2e8]
>[102670.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d2e8] width 2880 pitch 11520 (/4 2880)
>[102670.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102670.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102670.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1d2e8]
>[102670.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1d2e8] width 2880 pitch 11520 (/4 2880)
>[102670.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102670.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102670.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa006878]
>[102670.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa006878] width 2880 pitch 11520 (/4 2880)
>[102670.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102670.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102670.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102670.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102670.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102670.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102670.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102670.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102677.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06af10]
>[102677.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06af10] width 2880 pitch 11520 (/4 2880)
>[102677.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9592ad8]
>[102677.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9592ad8] width 2880 pitch 11520 (/4 2880)
>[102677.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97fc800]
>[102677.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97fc800] width 2880 pitch 11520 (/4 2880)
>[102678.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a7b0]
>[102678.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a7b0] width 2880 pitch 11520 (/4 2880)
>[102678.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c48a80]
>[102678.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c48a80] width 2880 pitch 11520 (/4 2880)
>[102678.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17a7b0]
>[102678.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17a7b0] width 2880 pitch 11520 (/4 2880)
>[102678.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8d40]
>[102678.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8d40] width 2880 pitch 11520 (/4 2880)
>[102679.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b66d0]
>[102679.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b66d0] width 2880 pitch 11520 (/4 2880)
>[102679.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102679.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102679.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102679.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102679.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102679.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102679.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102679.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[102679.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa096e78]
>[102679.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa096e78] width 2880 pitch 11520 (/4 2880)
>[102679.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa051eb8]
>[102679.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa051eb8] width 2880 pitch 11520 (/4 2880)
>[103024.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96183f8]
>[103024.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96183f8] width 2880 pitch 11520 (/4 2880)
>[103024.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d8d8]
>[103024.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d8d8] width 2880 pitch 11520 (/4 2880)
>[103026.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d8d8]
>[103026.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d8d8] width 2880 pitch 11520 (/4 2880)
>[103027.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c498]
>[103027.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c498] width 2880 pitch 11520 (/4 2880)
>[103029.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d516f8]
>[103029.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d516f8] width 2880 pitch 11520 (/4 2880)
>[103029.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223ad8]
>[103029.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223ad8] width 2880 pitch 11520 (/4 2880)
>[103030.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa00c498]
>[103030.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa00c498] width 2880 pitch 11520 (/4 2880)
>[103030.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103030.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103030.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103030.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103030.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103030.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103031.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08b40]
>[103031.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08b40] width 2880 pitch 11520 (/4 2880)
>[103031.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08b40]
>[103031.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08b40] width 2880 pitch 11520 (/4 2880)
>[103031.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223ad8]
>[103031.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223ad8] width 2880 pitch 11520 (/4 2880)
>[103031.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740ff8]
>[103031.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740ff8] width 2880 pitch 11520 (/4 2880)
>[103031.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9740ff8]
>[103031.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9740ff8] width 2880 pitch 11520 (/4 2880)
>[103032.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa223ad8]
>[103032.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa223ad8] width 2880 pitch 11520 (/4 2880)
>[103032.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8cb18]
>[103032.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8cb18] width 2880 pitch 11520 (/4 2880)
>[103033.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c8cb18]
>[103033.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c8cb18] width 2880 pitch 11520 (/4 2880)
>[103033.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b08b40]
>[103033.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b08b40] width 2880 pitch 11520 (/4 2880)
>[103033.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28ae98]
>[103033.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28ae98] width 2880 pitch 11520 (/4 2880)
>[103033.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103033.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103033.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28ae98]
>[103033.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28ae98] width 2880 pitch 11520 (/4 2880)
>[103041.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103041.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103046.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa039460]
>[103046.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa039460] width 2880 pitch 11520 (/4 2880)
>[103055.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d8d8]
>[103055.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d8d8] width 2880 pitch 11520 (/4 2880)
>[103058.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103058.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103060.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103060.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103061.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103061.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103061.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103061.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103061.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d5cc8]
>[103061.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d5cc8] width 2880 pitch 11520 (/4 2880)
>[103061.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103061.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103061.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x944e420]
>[103061.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x944e420] width 2880 pitch 11520 (/4 2880)
>[103061.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb030]
>[103061.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb030] width 2880 pitch 11520 (/4 2880)
>[103062.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d5cc8]
>[103062.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d5cc8] width 2880 pitch 11520 (/4 2880)
>[103062.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6d8d8]
>[103062.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6d8d8] width 2880 pitch 11520 (/4 2880)
>[103062.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb030]
>[103062.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb030] width 2880 pitch 11520 (/4 2880)
>[103065.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb030]
>[103066.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb030] width 2880 pitch 11520 (/4 2880)
>[103066.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103066.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103066.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb030]
>[103066.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb030] width 2880 pitch 11520 (/4 2880)
>[103066.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9707918]
>[103066.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9707918] width 2880 pitch 11520 (/4 2880)
>[103066.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9acb030]
>[103066.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9acb030] width 2880 pitch 11520 (/4 2880)
>[103066.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9716da0]
>[103066.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9716da0] width 2880 pitch 11520 (/4 2880)
>[103083.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7360]
>[103083.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7360] width 2880 pitch 11520 (/4 2880)
>[103083.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b810]
>[103083.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b810] width 2880 pitch 11520 (/4 2880)
>[103083.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7360]
>[103083.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7360] width 2880 pitch 11520 (/4 2880)
>[103083.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b810]
>[103083.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b810] width 2880 pitch 11520 (/4 2880)
>[103083.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7360]
>[103083.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7360] width 2880 pitch 11520 (/4 2880)
>[103083.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6d40]
>[103083.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6d40] width 2880 pitch 11520 (/4 2880)
>[103083.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c3f4b8]
>[103083.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c3f4b8] width 2880 pitch 11520 (/4 2880)
>[103083.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b810]
>[103083.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b810] width 2880 pitch 11520 (/4 2880)
>[103083.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7360]
>[103083.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7360] width 2880 pitch 11520 (/4 2880)
>[103083.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f8cb8]
>[103083.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f8cb8] width 2880 pitch 11520 (/4 2880)
>[103083.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f6d40]
>[103083.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f6d40] width 2880 pitch 11520 (/4 2880)
>[103083.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0db778]
>[103083.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0db778] width 2880 pitch 11520 (/4 2880)
>[103083.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x969f440]
>[103083.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x969f440] width 2880 pitch 11520 (/4 2880)
>[103087.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a6e8]
>[103087.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a6e8] width 2880 pitch 11520 (/4 2880)
>[103087.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6efc8]
>[103087.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6efc8] width 2880 pitch 11520 (/4 2880)
>[103087.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fc018]
>[103087.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fc018] width 2880 pitch 11520 (/4 2880)
>[103087.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ee58]
>[103087.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ee58] width 2880 pitch 11520 (/4 2880)
>[103087.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b785c8]
>[103088.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b785c8] width 2880 pitch 11520 (/4 2880)
>[103088.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x971a6e8]
>[103088.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x971a6e8] width 2880 pitch 11520 (/4 2880)
>[103088.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103088.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103088.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fc018]
>[103088.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fc018] width 2880 pitch 11520 (/4 2880)
>[103088.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ee58]
>[103088.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ee58] width 2880 pitch 11520 (/4 2880)
>[103088.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6ef80]
>[103088.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6ef80] width 2880 pitch 11520 (/4 2880)
>[103088.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6efc8]
>[103088.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6efc8] width 2880 pitch 11520 (/4 2880)
>[103088.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103088.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103088.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96fc018]
>[103088.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96fc018] width 2880 pitch 11520 (/4 2880)
>[103088.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b6ee58]
>[103088.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b6ee58] width 2880 pitch 11520 (/4 2880)
>[103089.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103089.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103089.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103089.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103089.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6ef80]
>[103089.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6ef80] width 2880 pitch 11520 (/4 2880)
>[103089.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998bdf8]
>[103089.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998bdf8] width 2880 pitch 11520 (/4 2880)
>[103089.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103089.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103089.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103089.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103089.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103089.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103089.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103089.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103089.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103089.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103089.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103089.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103089.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103089.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103089.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1aa2a0]
>[103089.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1aa2a0] width 2880 pitch 11520 (/4 2880)
>[103096.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a30d8]
>[103096.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a30d8] width 2880 pitch 11520 (/4 2880)
>[103096.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103096.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103096.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a30d8]
>[103096.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a30d8] width 2880 pitch 11520 (/4 2880)
>[103096.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103096.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103096.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a30d8]
>[103096.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a30d8] width 2880 pitch 11520 (/4 2880)
>[103096.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc2f0]
>[103096.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc2f0] width 2880 pitch 11520 (/4 2880)
>[103096.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9779b30]
>[103096.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9779b30] width 2880 pitch 11520 (/4 2880)
>[103096.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103096.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103096.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a30d8]
>[103096.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a30d8] width 2880 pitch 11520 (/4 2880)
>[103096.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b785c8]
>[103096.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b785c8] width 2880 pitch 11520 (/4 2880)
>[103096.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffc2f0]
>[103096.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffc2f0] width 2880 pitch 11520 (/4 2880)
>[103096.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103096.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103096.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a30d8]
>[103096.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a30d8] width 2880 pitch 11520 (/4 2880)
>[103100.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189018]
>[103100.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189018] width 2880 pitch 11520 (/4 2880)
>[103100.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b785c8]
>[103100.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b785c8] width 2880 pitch 11520 (/4 2880)
>[103100.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103100.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103100.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9716da0]
>[103100.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9716da0] width 2880 pitch 11520 (/4 2880)
>[103100.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa189018]
>[103100.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa189018] width 2880 pitch 11520 (/4 2880)
>[103100.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6eef8]
>[103100.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6eef8] width 2880 pitch 11520 (/4 2880)
>[103100.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103100.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103100.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6eef8]
>[103100.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6eef8] width 2880 pitch 11520 (/4 2880)
>[103100.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103100.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103100.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6eef8]
>[103100.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6eef8] width 2880 pitch 11520 (/4 2880)
>[103100.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103100.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103100.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6eef8]
>[103100.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6eef8] width 2880 pitch 11520 (/4 2880)
>[103100.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06c770]
>[103100.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06c770] width 2880 pitch 11520 (/4 2880)
>[103100.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c6eef8]
>[103100.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c6eef8] width 2880 pitch 11520 (/4 2880)
>[103163.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9725510]
>[103163.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9725510] width 2880 pitch 11520 (/4 2880)
>[103163.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca4f10]
>[103163.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca4f10] width 2880 pitch 11520 (/4 2880)
>[103163.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b2370]
>[103163.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b2370] width 2880 pitch 11520 (/4 2880)
>[103163.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103163.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103163.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b2370]
>[103163.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b2370] width 2880 pitch 11520 (/4 2880)
>[103163.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca4f10]
>[103164.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca4f10] width 2880 pitch 11520 (/4 2880)
>[103164.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b2370]
>[103164.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b2370] width 2880 pitch 11520 (/4 2880)
>[103164.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca4f10]
>[103164.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca4f10] width 2880 pitch 11520 (/4 2880)
>[103164.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b2370]
>[103164.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b2370] width 2880 pitch 11520 (/4 2880)
>[103164.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca4f10]
>[103164.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca4f10] width 2880 pitch 11520 (/4 2880)
>[103164.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103164.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103164.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52550]
>[103164.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52550] width 2880 pitch 11520 (/4 2880)
>[103164.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103164.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103164.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103164.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103164.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52550]
>[103164.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52550] width 2880 pitch 11520 (/4 2880)
>[103195.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103195.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103195.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103195.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103195.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52550]
>[103195.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52550] width 2880 pitch 11520 (/4 2880)
>[103195.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e92288]
>[103195.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e92288] width 2880 pitch 11520 (/4 2880)
>[103196.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103196.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103197.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e92288]
>[103197.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e92288] width 2880 pitch 11520 (/4 2880)
>[103197.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103197.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103197.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e92288]
>[103197.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e92288] width 2880 pitch 11520 (/4 2880)
>[103197.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103197.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103197.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e92288]
>[103197.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e92288] width 2880 pitch 11520 (/4 2880)
>[103197.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b2370]
>[103197.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b2370] width 2880 pitch 11520 (/4 2880)
>[103216.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103216.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103374.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103374.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103376.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf568]
>[103376.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf568] width 2880 pitch 11520 (/4 2880)
>[103503.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c52550]
>[103503.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c52550] width 2880 pitch 11520 (/4 2880)
>[103503.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103503.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103503.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103503.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103503.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103503.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103503.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103503.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103503.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103503.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103503.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103503.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103503.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9925520]
>[103503.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9925520] width 2880 pitch 11520 (/4 2880)
>[103503.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103503.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103503.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103503.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103503.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[103503.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[103503.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103503.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103503.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15f230]
>[103503.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15f230] width 2880 pitch 11520 (/4 2880)
>[103503.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9633e18]
>[103503.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9633e18] width 2880 pitch 11520 (/4 2880)
>[103508.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103508.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103508.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103508.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103508.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8d10]
>[103508.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8d10] width 2880 pitch 11520 (/4 2880)
>[103508.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103508.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103508.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b867c8]
>[103508.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b867c8] width 2880 pitch 11520 (/4 2880)
>[103508.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103508.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103508.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b867c8]
>[103508.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b867c8] width 2880 pitch 11520 (/4 2880)
>[103508.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103508.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103508.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b867c8]
>[103508.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b867c8] width 2880 pitch 11520 (/4 2880)
>[103508.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103508.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103508.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b867c8]
>[103508.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b867c8] width 2880 pitch 11520 (/4 2880)
>[103508.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103508.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103660.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8d10]
>[103660.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8d10] width 2880 pitch 11520 (/4 2880)
>[103661.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15f230]
>[103661.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15f230] width 2880 pitch 11520 (/4 2880)
>[103669.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb20]
>[103669.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb20] width 2880 pitch 11520 (/4 2880)
>[103670.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103670.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103670.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa2f58]
>[103670.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa2f58] width 2880 pitch 11520 (/4 2880)
>[103670.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103670.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103670.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a93a0]
>[103670.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a93a0] width 2880 pitch 11520 (/4 2880)
>[103670.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103670.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103670.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a93a0]
>[103670.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a93a0] width 2880 pitch 11520 (/4 2880)
>[103672.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05e8a8]
>[103672.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05e8a8] width 2880 pitch 11520 (/4 2880)
>[103672.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa167460]
>[103672.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa167460] width 2880 pitch 11520 (/4 2880)
>[103672.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103673.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103673.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x964bb20]
>[103673.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x964bb20] width 2880 pitch 11520 (/4 2880)
>[103673.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103673.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103673.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103673.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103673.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103674.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103674.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103674.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103674.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103674.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103688.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9acb0]
>[103688.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9acb0] width 2880 pitch 11520 (/4 2880)
>[103688.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103688.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103688.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9acb0]
>[103688.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9acb0] width 2880 pitch 11520 (/4 2880)
>[103689.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103689.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103689.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103689.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103689.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103689.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103689.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103690.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103690.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103690.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103690.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103690.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103690.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103690.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103690.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103690.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103691.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103691.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103691.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073cc8]
>[103691.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073cc8] width 2880 pitch 11520 (/4 2880)
>[103691.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b9acb0]
>[103691.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b9acb0] width 2880 pitch 11520 (/4 2880)
>[103691.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103691.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103775.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e9ca8]
>[103775.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e9ca8] width 2880 pitch 11520 (/4 2880)
>[103780.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99bf568]
>[103780.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99bf568] width 2880 pitch 11520 (/4 2880)
>[103780.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5dfd8]
>[103780.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5dfd8] width 2880 pitch 11520 (/4 2880)
>[103780.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103780.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103780.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5dfd8]
>[103780.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5dfd8] width 2880 pitch 11520 (/4 2880)
>[103780.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103780.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103780.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b5dfd8]
>[103780.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b5dfd8] width 2880 pitch 11520 (/4 2880)
>[103780.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103780.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103781.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103781.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103782.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073cc8]
>[103782.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073cc8] width 2880 pitch 11520 (/4 2880)
>[103782.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103782.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103782.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073cc8]
>[103782.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073cc8] width 2880 pitch 11520 (/4 2880)
>[103782.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a67428]
>[103782.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a67428] width 2880 pitch 11520 (/4 2880)
>[103782.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa073cc8]
>[103782.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa073cc8] width 2880 pitch 11520 (/4 2880)
>[103815.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5c60]
>[103815.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5c60] width 2880 pitch 11520 (/4 2880)
>[103815.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[103815.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[103815.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[103815.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[103816.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103816.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103816.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5c60]
>[103816.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5c60] width 2880 pitch 11520 (/4 2880)
>[103816.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103816.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103816.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[103816.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[103816.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103816.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103816.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[103816.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[103816.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2625d0]
>[103816.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2625d0] width 2880 pitch 11520 (/4 2880)
>[103817.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[103817.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[103817.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103817.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103817.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b70d0]
>[103817.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b70d0] width 2880 pitch 11520 (/4 2880)
>[103817.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103817.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103817.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103817.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103901.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103901.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103901.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103901.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103901.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103901.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103901.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103901.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103901.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103901.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103901.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103901.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103902.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[103902.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[103907.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b650e0]
>[103907.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b650e0] width 2880 pitch 11520 (/4 2880)
>[103911.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103911.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103913.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103913.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103913.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103914.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103914.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103914.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103914.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103914.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103914.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103914.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103914.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x997b7a0]
>[103914.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x997b7a0] width 2880 pitch 11520 (/4 2880)
>[103914.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103914.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103983.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103983.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103983.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103983.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103983.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103983.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103983.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103983.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103983.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103983.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103983.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[103983.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[103983.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103983.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103983.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103983.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103983.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[103983.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[103984.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103984.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103984.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[103984.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[103984.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103984.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103984.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[103984.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[103988.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103988.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103988.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103988.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103988.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103988.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9288]
>[103988.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9288] width 2880 pitch 11520 (/4 2880)
>[103988.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103988.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103988.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103988.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103988.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103988.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103988.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103988.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103988.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103988.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103988.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103988.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103988.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103988.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103988.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103988.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103989.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[103989.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[103989.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103989.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103989.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[103989.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[103989.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[103989.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[103989.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[103989.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[103989.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103989.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103989.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13e790]
>[103989.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13e790] width 2880 pitch 11520 (/4 2880)
>[103989.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147b40]
>[103989.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147b40] width 2880 pitch 11520 (/4 2880)
>[103989.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103989.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103989.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[103989.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[103989.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02b400]
>[103989.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02b400] width 2880 pitch 11520 (/4 2880)
>[103989.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147b40]
>[103989.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147b40] width 2880 pitch 11520 (/4 2880)
>[103989.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[103989.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[103989.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103989.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103993.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103993.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103993.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[103993.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[103993.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[103993.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[103993.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103993.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[103993.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13e790]
>[103993.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13e790] width 2880 pitch 11520 (/4 2880)
>[103993.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[103993.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[103993.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[103993.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[103993.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[103993.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[103993.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9288]
>[103993.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9288] width 2880 pitch 11520 (/4 2880)
>[103993.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[103993.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[103993.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9288]
>[103993.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9288] width 2880 pitch 11520 (/4 2880)
>[103993.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[103993.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[103993.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[103993.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[103993.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[103993.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[104078.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[104078.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[104078.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[104078.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[104078.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[104078.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[104078.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fde60]
>[104078.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fde60] width 2880 pitch 11520 (/4 2880)
>[104079.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[104079.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[104079.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[104079.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[104079.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[104079.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[104079.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[104079.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[104079.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[104079.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[104080.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5c60]
>[104080.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5c60] width 2880 pitch 11520 (/4 2880)
>[104080.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[104080.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[104162.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[104162.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[104162.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[104162.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[104162.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95e9288]
>[104162.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95e9288] width 2880 pitch 11520 (/4 2880)
>[104162.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[104162.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[104162.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[104162.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[104163.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ca6250]
>[104163.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ca6250] width 2880 pitch 11520 (/4 2880)
>[104167.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[104167.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[104167.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[104167.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[104167.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[104167.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[104167.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[104167.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[104167.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[104167.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[104190.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[104191.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[104206.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[104206.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[104266.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[104266.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[104266.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1d7198]
>[104266.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1d7198] width 2880 pitch 11520 (/4 2880)
>[104266.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[104266.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[104266.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[104266.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[104266.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[104267.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[104267.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[104267.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[104267.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c2a4c0]
>[104267.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c2a4c0] width 2880 pitch 11520 (/4 2880)
>[104267.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[104267.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[104337.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98fd550]
>[104337.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98fd550] width 2880 pitch 11520 (/4 2880)
>[104339.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x951ca30]
>[104339.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x951ca30] width 2880 pitch 11520 (/4 2880)
>[104341.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa147b40]
>[104341.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa147b40] width 2880 pitch 11520 (/4 2880)
>[104345.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943cc10]
>[104345.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943cc10] width 2880 pitch 11520 (/4 2880)
>[104975.318] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[104975.318] (II) RADEON(0): Using hsync ranges from config file
>[104975.318] (II) RADEON(0): Using vrefresh ranges from config file
>[104975.318] (II) RADEON(0): Printing DDC gathered Modelines:
>[104975.318] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[104975.318] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[104975.318] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[104975.318] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[104975.318] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[104975.318] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[104975.318] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[104975.318] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[104975.318] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[105030.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0f0930]
>[105030.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0f0930] width 2880 pitch 11520 (/4 2880)
>[105728.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa072838]
>[105728.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa072838] width 2880 pitch 11520 (/4 2880)
>[105756.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96183f8]
>[105756.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96183f8] width 2880 pitch 11520 (/4 2880)
>[106012.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x991fbd8]
>[106012.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x991fbd8] width 2880 pitch 11520 (/4 2880)
>[106012.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b3d398]
>[106012.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b3d398] width 2880 pitch 11520 (/4 2880)
>[106012.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[106012.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[106053.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e00110]
>[106053.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e00110] width 2880 pitch 11520 (/4 2880)
>[106112.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa049d60]
>[106112.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa049d60] width 2880 pitch 11520 (/4 2880)
>[106112.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744be8]
>[106112.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744be8] width 2880 pitch 11520 (/4 2880)
>[106112.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa049d60]
>[106112.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa049d60] width 2880 pitch 11520 (/4 2880)
>[106112.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744be8]
>[106112.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744be8] width 2880 pitch 11520 (/4 2880)
>[106113.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934a1b0]
>[106113.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934a1b0] width 2880 pitch 11520 (/4 2880)
>[106113.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bd88]
>[106113.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bd88] width 2880 pitch 11520 (/4 2880)
>[106115.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[106115.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[106116.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[106116.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[106116.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744be8]
>[106116.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744be8] width 2880 pitch 11520 (/4 2880)
>[106116.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[106116.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[106116.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744be8]
>[106116.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744be8] width 2880 pitch 11520 (/4 2880)
>[106117.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[106117.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[106117.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa049d60]
>[106117.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa049d60] width 2880 pitch 11520 (/4 2880)
>[106117.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa277af8]
>[106117.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa277af8] width 2880 pitch 11520 (/4 2880)
>[106117.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bd88]
>[106117.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bd88] width 2880 pitch 11520 (/4 2880)
>[106117.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[106118.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[106118.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bd88]
>[106118.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bd88] width 2880 pitch 11520 (/4 2880)
>[106118.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[106118.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[106118.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa17bd88]
>[106118.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa17bd88] width 2880 pitch 11520 (/4 2880)
>[106122.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9da35a8]
>[106122.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9da35a8] width 2880 pitch 11520 (/4 2880)
>[106123.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11ab78]
>[106123.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11ab78] width 2880 pitch 11520 (/4 2880)
>[106123.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9991c60]
>[106123.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9991c60] width 2880 pitch 11520 (/4 2880)
>[106199.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88b30]
>[106199.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88b30] width 2880 pitch 11520 (/4 2880)
>[106203.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e9810]
>[106203.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e9810] width 2880 pitch 11520 (/4 2880)
>[106204.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9abec38]
>[106204.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9abec38] width 2880 pitch 11520 (/4 2880)
>[106264.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96a5e70]
>[106264.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96a5e70] width 2880 pitch 11520 (/4 2880)
>[106264.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa06b6d0]
>[106264.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa06b6d0] width 2880 pitch 11520 (/4 2880)
>[106264.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106264.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106264.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b2a0]
>[106264.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b2a0] width 2880 pitch 11520 (/4 2880)
>[106264.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106264.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106264.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963b6d0]
>[106264.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963b6d0] width 2880 pitch 11520 (/4 2880)
>[106264.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d08780]
>[106264.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d08780] width 2880 pitch 11520 (/4 2880)
>[106264.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106264.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106264.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7728]
>[106264.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7728] width 2880 pitch 11520 (/4 2880)
>[106269.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec72f0]
>[106269.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec72f0] width 2880 pitch 11520 (/4 2880)
>[106269.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b2a0]
>[106269.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b2a0] width 2880 pitch 11520 (/4 2880)
>[106269.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec72f0]
>[106269.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec72f0] width 2880 pitch 11520 (/4 2880)
>[106269.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b2a0]
>[106269.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b2a0] width 2880 pitch 11520 (/4 2880)
>[106269.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec72f0]
>[106269.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec72f0] width 2880 pitch 11520 (/4 2880)
>[106269.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a9b2a0]
>[106269.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a9b2a0] width 2880 pitch 11520 (/4 2880)
>[106269.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7728]
>[106269.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7728] width 2880 pitch 11520 (/4 2880)
>[106269.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48d88]
>[106269.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48d88] width 2880 pitch 11520 (/4 2880)
>[106269.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4f558]
>[106269.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4f558] width 2880 pitch 11520 (/4 2880)
>[106269.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a988b0]
>[106269.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a988b0] width 2880 pitch 11520 (/4 2880)
>[106269.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4f558]
>[106269.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4f558] width 2880 pitch 11520 (/4 2880)
>[106269.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a988b0]
>[106269.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a988b0] width 2880 pitch 11520 (/4 2880)
>[106269.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b4f558]
>[106269.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b4f558] width 2880 pitch 11520 (/4 2880)
>[106269.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a988b0]
>[106269.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a988b0] width 2880 pitch 11520 (/4 2880)
>[106341.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d7728]
>[106341.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d7728] width 2880 pitch 11520 (/4 2880)
>[106378.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106378.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106383.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[106383.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[106383.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48d88]
>[106383.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48d88] width 2880 pitch 11520 (/4 2880)
>[106383.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d470]
>[106383.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d470] width 2880 pitch 11520 (/4 2880)
>[106383.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[106383.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[106383.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[106383.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[106383.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0252f0]
>[106383.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0252f0] width 2880 pitch 11520 (/4 2880)
>[106383.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48d88]
>[106383.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48d88] width 2880 pitch 11520 (/4 2880)
>[106383.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[106383.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[106383.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a0198]
>[106383.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a0198] width 2880 pitch 11520 (/4 2880)
>[106383.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[106383.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[106383.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d470]
>[106383.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d470] width 2880 pitch 11520 (/4 2880)
>[106383.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a988b0]
>[106383.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a988b0] width 2880 pitch 11520 (/4 2880)
>[106387.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d470]
>[106387.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d470] width 2880 pitch 11520 (/4 2880)
>[106387.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[106387.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[106387.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[106387.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[106387.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48d88]
>[106387.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48d88] width 2880 pitch 11520 (/4 2880)
>[106387.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a0198]
>[106387.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a0198] width 2880 pitch 11520 (/4 2880)
>[106387.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95aefb8]
>[106387.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95aefb8] width 2880 pitch 11520 (/4 2880)
>[106387.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106387.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106387.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95aefb8]
>[106387.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95aefb8] width 2880 pitch 11520 (/4 2880)
>[106387.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106387.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106387.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95aefb8]
>[106387.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95aefb8] width 2880 pitch 11520 (/4 2880)
>[106387.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106387.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106387.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95aefb8]
>[106387.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95aefb8] width 2880 pitch 11520 (/4 2880)
>[106387.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106387.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106387.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95aefb8]
>[106387.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95aefb8] width 2880 pitch 11520 (/4 2880)
>[106390.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ec0368]
>[106390.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ec0368] width 2880 pitch 11520 (/4 2880)
>[106391.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d6f1a0]
>[106391.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d6f1a0] width 2880 pitch 11520 (/4 2880)
>[106391.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa115e38]
>[106391.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa115e38] width 2880 pitch 11520 (/4 2880)
>[106391.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106391.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa115e38]
>[106391.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa115e38] width 2880 pitch 11520 (/4 2880)
>[106391.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106391.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106391.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106391.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106391.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106391.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106391.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106391.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106391.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106391.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106391.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106391.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106391.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa243670]
>[106391.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa243670] width 2880 pitch 11520 (/4 2880)
>[106404.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7c958]
>[106404.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7c958] width 2880 pitch 11520 (/4 2880)
>[106572.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b3c68]
>[106572.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b3c68] width 2880 pitch 11520 (/4 2880)
>[106572.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106572.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106572.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b3c68]
>[106572.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b3c68] width 2880 pitch 11520 (/4 2880)
>[106572.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106572.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106573.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106573.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106576.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106576.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106576.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[106576.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[106576.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0da5d0]
>[106576.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0da5d0] width 2880 pitch 11520 (/4 2880)
>[106576.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106576.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106576.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0da5d0]
>[106576.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0da5d0] width 2880 pitch 11520 (/4 2880)
>[106576.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106576.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106587.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106587.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106587.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106587.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106587.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106587.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106587.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106587.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106587.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106587.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106587.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106587.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106587.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106587.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106587.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106587.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106588.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106588.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106588.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106588.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106588.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106588.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106589.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106589.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106589.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106589.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106590.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106590.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106590.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef860]
>[106591.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef860] width 2880 pitch 11520 (/4 2880)
>[106591.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161b48]
>[106592.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161b48] width 2880 pitch 11520 (/4 2880)
>[106592.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0de08]
>[106592.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0de08] width 2880 pitch 11520 (/4 2880)
>[106592.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106592.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106593.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0de08]
>[106593.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0de08] width 2880 pitch 11520 (/4 2880)
>[106594.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f870]
>[106594.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f870] width 2880 pitch 11520 (/4 2880)
>[106594.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f870]
>[106594.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f870] width 2880 pitch 11520 (/4 2880)
>[106595.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106595.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106595.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a750]
>[106595.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a750] width 2880 pitch 11520 (/4 2880)
>[106596.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97272c8]
>[106596.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97272c8] width 2880 pitch 11520 (/4 2880)
>[106596.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x92e8528]
>[106596.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x92e8528] width 2880 pitch 11520 (/4 2880)
>[106597.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97272c8]
>[106597.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97272c8] width 2880 pitch 11520 (/4 2880)
>[106597.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106597.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106597.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0738]
>[106597.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0738] width 2880 pitch 11520 (/4 2880)
>[106598.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a750]
>[106598.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a750] width 2880 pitch 11520 (/4 2880)
>[106601.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9eabfa0]
>[106601.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9eabfa0] width 2880 pitch 11520 (/4 2880)
>[106601.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f870]
>[106601.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f870] width 2880 pitch 11520 (/4 2880)
>[106602.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x979f870]
>[106602.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x979f870] width 2880 pitch 11520 (/4 2880)
>[106604.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0738]
>[106604.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0738] width 2880 pitch 11520 (/4 2880)
>[106604.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef860]
>[106604.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef860] width 2880 pitch 11520 (/4 2880)
>[106604.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0de08]
>[106604.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0de08] width 2880 pitch 11520 (/4 2880)
>[106605.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ef860]
>[106605.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ef860] width 2880 pitch 11520 (/4 2880)
>[106605.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0364a0]
>[106605.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0364a0] width 2880 pitch 11520 (/4 2880)
>[106606.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161b48]
>[106606.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161b48] width 2880 pitch 11520 (/4 2880)
>[106608.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106608.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106608.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106608.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106608.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106609.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106609.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106609.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106610.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106610.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106610.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106610.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106611.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106611.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106613.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106613.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106613.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106613.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106613.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106613.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106614.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106614.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106614.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106614.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106614.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106614.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106614.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106614.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106615.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106615.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106615.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106615.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106616.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1409b8]
>[106616.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1409b8] width 2880 pitch 11520 (/4 2880)
>[106616.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106616.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106620.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1f288]
>[106620.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1f288] width 2880 pitch 11520 (/4 2880)
>[106620.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106620.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106620.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2218]
>[106620.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2218] width 2880 pitch 11520 (/4 2880)
>[106620.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c23598]
>[106620.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c23598] width 2880 pitch 11520 (/4 2880)
>[106620.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec58]
>[106620.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec58] width 2880 pitch 11520 (/4 2880)
>[106622.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15fd30]
>[106622.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15fd30] width 2880 pitch 11520 (/4 2880)
>[106622.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9563f20]
>[106622.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9563f20] width 2880 pitch 11520 (/4 2880)
>[106644.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106644.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106644.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106644.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106649.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106649.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106649.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec58]
>[106649.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec58] width 2880 pitch 11520 (/4 2880)
>[106649.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106649.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106650.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106650.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106651.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106651.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106653.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106653.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106653.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106653.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106658.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106658.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106658.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106658.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106742.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec58]
>[106742.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec58] width 2880 pitch 11520 (/4 2880)
>[106742.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106742.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106742.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec58]
>[106742.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec58] width 2880 pitch 11520 (/4 2880)
>[106742.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106742.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106742.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106742.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106742.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106742.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106742.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec58]
>[106742.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec58] width 2880 pitch 11520 (/4 2880)
>[106742.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106742.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106742.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[106742.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[106742.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106742.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106742.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[106742.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[106742.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x970bc08]
>[106742.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x970bc08] width 2880 pitch 11520 (/4 2880)
>[106742.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x956b948]
>[106742.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x956b948] width 2880 pitch 11520 (/4 2880)
>[106746.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e9850]
>[106746.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e9850] width 2880 pitch 11520 (/4 2880)
>[106746.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48d88]
>[106746.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48d88] width 2880 pitch 11520 (/4 2880)
>[106746.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d470]
>[106746.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d470] width 2880 pitch 11520 (/4 2880)
>[106746.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1990a8]
>[106746.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1990a8] width 2880 pitch 11520 (/4 2880)
>[106746.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0fb88]
>[106746.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0fb88] width 2880 pitch 11520 (/4 2880)
>[106746.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106747.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106747.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0fb88]
>[106747.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0fb88] width 2880 pitch 11520 (/4 2880)
>[106747.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106747.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106747.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0fb88]
>[106747.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0fb88] width 2880 pitch 11520 (/4 2880)
>[106747.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106747.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106747.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0fb88]
>[106747.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0fb88] width 2880 pitch 11520 (/4 2880)
>[106747.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106747.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[106747.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c0fb88]
>[106747.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c0fb88] width 2880 pitch 11520 (/4 2880)
>[106747.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0887f0]
>[106747.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0887f0] width 2880 pitch 11520 (/4 2880)
>[107137.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa088900]
>[107137.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa088900] width 2880 pitch 11520 (/4 2880)
>[107189.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d470]
>[107189.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d470] width 2880 pitch 11520 (/4 2880)
>[107343.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1165b0]
>[107343.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1165b0] width 2880 pitch 11520 (/4 2880)
>[107348.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa199130]
>[107348.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa199130] width 2880 pitch 11520 (/4 2880)
>[107349.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa23dae0]
>[107349.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa23dae0] width 2880 pitch 11520 (/4 2880)
>[107349.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1165b0]
>[107349.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1165b0] width 2880 pitch 11520 (/4 2880)
>[107531.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97b3a20]
>[107531.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97b3a20] width 2880 pitch 11520 (/4 2880)
>[107536.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ea48]
>[107536.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ea48] width 2880 pitch 11520 (/4 2880)
>[107537.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a8ea78]
>[107537.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a8ea78] width 2880 pitch 11520 (/4 2880)
>[107539.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107539.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107539.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107539.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107540.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cb04c0]
>[107540.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cb04c0] width 2880 pitch 11520 (/4 2880)
>[107540.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107540.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107542.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94c8778]
>[107542.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94c8778] width 2880 pitch 11520 (/4 2880)
>[107543.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa105d10]
>[107543.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa105d10] width 2880 pitch 11520 (/4 2880)
>[107551.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107551.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107552.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107552.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107555.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107556.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107556.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107556.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107556.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868360]
>[107556.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868360] width 2880 pitch 11520 (/4 2880)
>[107642.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107642.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107642.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107642.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107642.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107642.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107642.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107642.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107642.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868360]
>[107642.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868360] width 2880 pitch 11520 (/4 2880)
>[107642.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107642.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107642.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107642.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107642.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ae8818]
>[107642.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ae8818] width 2880 pitch 11520 (/4 2880)
>[107642.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161848]
>[107642.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161848] width 2880 pitch 11520 (/4 2880)
>[107642.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868360]
>[107642.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868360] width 2880 pitch 11520 (/4 2880)
>[107642.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107642.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107646.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107646.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107646.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107646.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107646.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868360]
>[107646.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868360] width 2880 pitch 11520 (/4 2880)
>[107646.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107647.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107647.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107647.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107647.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107647.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107647.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107647.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107647.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107647.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107647.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107647.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107647.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107647.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107647.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107647.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107647.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa01c028]
>[107647.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa01c028] width 2880 pitch 11520 (/4 2880)
>[107657.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa162700]
>[107657.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa162700] width 2880 pitch 11520 (/4 2880)
>[107657.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107657.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107657.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa162700]
>[107657.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa162700] width 2880 pitch 11520 (/4 2880)
>[107657.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107657.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107657.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa162700]
>[107657.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa162700] width 2880 pitch 11520 (/4 2880)
>[107657.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107657.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107657.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107657.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107657.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7708]
>[107657.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7708] width 2880 pitch 11520 (/4 2880)
>[107657.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f246b0]
>[107657.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f246b0] width 2880 pitch 11520 (/4 2880)
>[107657.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09d170]
>[107657.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09d170] width 2880 pitch 11520 (/4 2880)
>[107657.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa053290]
>[107657.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa053290] width 2880 pitch 11520 (/4 2880)
>[107657.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa162700]
>[107657.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa162700] width 2880 pitch 11520 (/4 2880)
>[107657.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107657.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107657.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107657.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107658.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd288]
>[107658.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd288] width 2880 pitch 11520 (/4 2880)
>[107658.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9710f60]
>[107658.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9710f60] width 2880 pitch 11520 (/4 2880)
>[107661.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9710f60]
>[107661.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9710f60] width 2880 pitch 11520 (/4 2880)
>[107661.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9710f60]
>[107661.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9710f60] width 2880 pitch 11520 (/4 2880)
>[107661.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[107661.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[107661.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[107661.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[107661.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[107661.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[107661.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[107661.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[107661.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e40e0]
>[107661.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e40e0] width 2880 pitch 11520 (/4 2880)
>[107661.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa02a990]
>[107661.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa02a990] width 2880 pitch 11520 (/4 2880)
>[107669.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107669.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107669.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107669.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107669.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107670.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107670.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107670.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107670.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107670.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107670.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107670.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107670.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107670.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107670.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107670.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107671.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107671.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107671.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107671.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107684.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107685.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107685.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107685.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107685.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107685.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107685.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa164780]
>[107685.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa164780] width 2880 pitch 11520 (/4 2880)
>[107685.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99208f0]
>[107685.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99208f0] width 2880 pitch 11520 (/4 2880)
>[107685.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107685.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107690.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107690.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107690.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107690.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107690.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107690.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107690.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107690.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107690.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107690.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107690.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107690.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107690.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107691.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107691.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107691.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107691.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107691.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107691.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107691.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107691.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107691.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107691.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107691.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107691.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107691.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107691.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107691.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107691.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107692.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107692.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107692.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107692.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107692.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107702.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107702.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107702.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107702.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107702.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107702.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107702.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107702.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107702.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adbd30]
>[107702.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adbd30] width 2880 pitch 11520 (/4 2880)
>[107702.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99979f8]
>[107702.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99979f8] width 2880 pitch 11520 (/4 2880)
>[107702.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd288]
>[107702.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd288] width 2880 pitch 11520 (/4 2880)
>[107702.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c4f9e8]
>[107702.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c4f9e8] width 2880 pitch 11520 (/4 2880)
>[107702.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b7708]
>[107702.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b7708] width 2880 pitch 11520 (/4 2880)
>[107702.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107702.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107702.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9adbd30]
>[107702.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9adbd30] width 2880 pitch 11520 (/4 2880)
>[107702.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9710f60]
>[107702.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9710f60] width 2880 pitch 11520 (/4 2880)
>[107707.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107707.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107707.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9571038]
>[107707.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9571038] width 2880 pitch 11520 (/4 2880)
>[107707.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107707.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107707.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9571038]
>[107707.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9571038] width 2880 pitch 11520 (/4 2880)
>[107707.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107707.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107707.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107707.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107707.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107708.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107708.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107708.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107708.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107708.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107708.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107708.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107708.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03feb0]
>[107708.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03feb0] width 2880 pitch 11520 (/4 2880)
>[107708.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97142a0]
>[107708.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97142a0] width 2880 pitch 11520 (/4 2880)
>[107837.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96ce298]
>[107837.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96ce298] width 2880 pitch 11520 (/4 2880)
>[107840.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9460e10]
>[107840.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9460e10] width 2880 pitch 11520 (/4 2880)
>[107847.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa036338]
>[107847.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa036338] width 2880 pitch 11520 (/4 2880)
>[107847.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9457f68]
>[107847.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9457f68] width 2880 pitch 11520 (/4 2880)
>[107847.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf900]
>[107847.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf900] width 2880 pitch 11520 (/4 2880)
>[107847.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94400b8]
>[107847.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94400b8] width 2880 pitch 11520 (/4 2880)
>[107847.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbf900]
>[107847.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbf900] width 2880 pitch 11520 (/4 2880)
>[107847.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107847.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107848.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9464850]
>[107848.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9464850] width 2880 pitch 11520 (/4 2880)
>[107848.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107848.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107848.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x934a390]
>[107848.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x934a390] width 2880 pitch 11520 (/4 2880)
>[107848.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5ba0]
>[107849.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5ba0] width 2880 pitch 11520 (/4 2880)
>[107849.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x93e70c0]
>[107849.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x93e70c0] width 2880 pitch 11520 (/4 2880)
>[107849.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f3c8]
>[107849.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f3c8] width 2880 pitch 11520 (/4 2880)
>[107849.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d47c10]
>[107849.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d47c10] width 2880 pitch 11520 (/4 2880)
>[107849.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa26f6c0]
>[107849.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa26f6c0] width 2880 pitch 11520 (/4 2880)
>[107971.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b628]
>[107971.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b628] width 2880 pitch 11520 (/4 2880)
>[108011.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9868390]
>[108011.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9868390] width 2880 pitch 11520 (/4 2880)
>[108012.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e59f0]
>[108012.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e59f0] width 2880 pitch 11520 (/4 2880)
>[108012.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a040]
>[108012.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a040] width 2880 pitch 11520 (/4 2880)
>[108013.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b5a8]
>[108013.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b5a8] width 2880 pitch 11520 (/4 2880)
>[108013.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f3c8]
>[108013.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f3c8] width 2880 pitch 11520 (/4 2880)
>[108013.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b5a8]
>[108013.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b5a8] width 2880 pitch 11520 (/4 2880)
>[108013.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f3c8]
>[108013.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f3c8] width 2880 pitch 11520 (/4 2880)
>[108014.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b628]
>[108015.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b628] width 2880 pitch 11520 (/4 2880)
>[108015.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828848]
>[108015.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828848] width 2880 pitch 11520 (/4 2880)
>[108015.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a040]
>[108015.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a040] width 2880 pitch 11520 (/4 2880)
>[108015.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f3c8]
>[108016.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f3c8] width 2880 pitch 11520 (/4 2880)
>[108016.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x943a040]
>[108016.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x943a040] width 2880 pitch 11520 (/4 2880)
>[108016.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b628]
>[108016.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b628] width 2880 pitch 11520 (/4 2880)
>[108016.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9828848]
>[108016.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9828848] width 2880 pitch 11520 (/4 2880)
>[108543.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9e4c3c0]
>[108543.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9e4c3c0] width 2880 pitch 11520 (/4 2880)
>[108543.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b830]
>[108543.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b830] width 2880 pitch 11520 (/4 2880)
>[108543.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c63bf0]
>[108543.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c63bf0] width 2880 pitch 11520 (/4 2880)
>[108543.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108543.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108543.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108543.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108543.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf688]
>[108543.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf688] width 2880 pitch 11520 (/4 2880)
>[108543.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95261c8]
>[108543.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95261c8] width 2880 pitch 11520 (/4 2880)
>[108543.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84130]
>[108543.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84130] width 2880 pitch 11520 (/4 2880)
>[108543.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108543.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108547.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61fe8]
>[108547.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61fe8] width 2880 pitch 11520 (/4 2880)
>[108547.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108547.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108547.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95261c8]
>[108547.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95261c8] width 2880 pitch 11520 (/4 2880)
>[108547.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84340]
>[108547.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84340] width 2880 pitch 11520 (/4 2880)
>[108547.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108547.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108547.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bbf688]
>[108547.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bbf688] width 2880 pitch 11520 (/4 2880)
>[108547.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108547.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108547.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95261c8]
>[108547.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95261c8] width 2880 pitch 11520 (/4 2880)
>[108547.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61fe8]
>[108547.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61fe8] width 2880 pitch 11520 (/4 2880)
>[108547.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b830]
>[108547.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b830] width 2880 pitch 11520 (/4 2880)
>[108547.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108547.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108547.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95261c8]
>[108547.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95261c8] width 2880 pitch 11520 (/4 2880)
>[108547.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99f7da0]
>[108547.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99f7da0] width 2880 pitch 11520 (/4 2880)
>[108548.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61fe8]
>[108548.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61fe8] width 2880 pitch 11520 (/4 2880)
>[108548.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1626c8]
>[108548.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1626c8] width 2880 pitch 11520 (/4 2880)
>[108548.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95261c8]
>[108548.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95261c8] width 2880 pitch 11520 (/4 2880)
>[108548.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a3ce0]
>[108548.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a3ce0] width 2880 pitch 11520 (/4 2880)
>[108548.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108548.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108548.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f828]
>[108548.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f828] width 2880 pitch 11520 (/4 2880)
>[108548.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108548.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108548.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f828]
>[108548.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f828] width 2880 pitch 11520 (/4 2880)
>[108548.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108548.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108548.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f828]
>[108548.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f828] width 2880 pitch 11520 (/4 2880)
>[108548.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108548.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108548.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f828]
>[108548.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f828] width 2880 pitch 11520 (/4 2880)
>[108548.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108548.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108548.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a7f828]
>[108548.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a7f828] width 2880 pitch 11520 (/4 2880)
>[108571.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1418]
>[108571.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1418] width 2880 pitch 11520 (/4 2880)
>[108571.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa237958]
>[108571.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa237958] width 2880 pitch 11520 (/4 2880)
>[108575.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b830]
>[108575.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b830] width 2880 pitch 11520 (/4 2880)
>[108575.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108575.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108575.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1418]
>[108575.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1418] width 2880 pitch 11520 (/4 2880)
>[108575.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e59f0]
>[108575.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e59f0] width 2880 pitch 11520 (/4 2880)
>[108575.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108575.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108575.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84130]
>[108575.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84130] width 2880 pitch 11520 (/4 2880)
>[108575.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108575.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108575.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1418]
>[108575.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1418] width 2880 pitch 11520 (/4 2880)
>[108575.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e59f0]
>[108575.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e59f0] width 2880 pitch 11520 (/4 2880)
>[108575.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108575.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108575.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d84130]
>[108575.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d84130] width 2880 pitch 11520 (/4 2880)
>[108575.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108575.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108575.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d1b830]
>[108575.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d1b830] width 2880 pitch 11520 (/4 2880)
>[108575.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61fe8]
>[108575.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61fe8] width 2880 pitch 11520 (/4 2880)
>[108576.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x976b628]
>[108576.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x976b628] width 2880 pitch 11520 (/4 2880)
>[108576.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108576.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108576.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99e59f0]
>[108576.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99e59f0] width 2880 pitch 11520 (/4 2880)
>[108576.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa1418]
>[108576.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa1418] width 2880 pitch 11520 (/4 2880)
>[108576.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108576.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108576.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108576.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108576.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108576.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108576.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108576.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108576.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108576.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108576.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108576.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108576.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108577.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108577.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5169d0]
>[108577.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5169d0] width 2880 pitch 11520 (/4 2880)
>[108577.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c89848]
>[108577.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c89848] width 2880 pitch 11520 (/4 2880)
>[108763.528] (II) RADEON(0): EDID vendor "GSM", prod id 19311
>[108763.528] (II) RADEON(0): Using hsync ranges from config file
>[108763.528] (II) RADEON(0): Using vrefresh ranges from config file
>[108763.528] (II) RADEON(0): Printing DDC gathered Modelines:
>[108763.528] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz eP)
>[108763.528] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[108763.528] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[108763.528] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[108763.528] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[108763.528] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[108763.528] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[108763.528] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1440x900"x0.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[108763.528] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[109033.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff1bd8]
>[109033.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff1bd8] width 2880 pitch 11520 (/4 2880)
>[109035.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b61fe8]
>[109035.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b61fe8] width 2880 pitch 11520 (/4 2880)
>[109038.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109038.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109038.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109038.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109038.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9477fd8]
>[109038.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9477fd8] width 2880 pitch 11520 (/4 2880)
>[109038.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109038.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109038.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedca0]
>[109038.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedca0] width 2880 pitch 11520 (/4 2880)
>[109038.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109038.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109038.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedca0]
>[109038.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedca0] width 2880 pitch 11520 (/4 2880)
>[109038.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109038.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109038.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedca0]
>[109038.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedca0] width 2880 pitch 11520 (/4 2880)
>[109038.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109038.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dedca0]
>[109039.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dedca0] width 2880 pitch 11520 (/4 2880)
>[109039.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035ed8]
>[109039.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035ed8] width 2880 pitch 11520 (/4 2880)
>[109039.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2320]
>[109039.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2320] width 2880 pitch 11520 (/4 2880)
>[109039.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109039.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109039.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035ed8]
>[109039.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035ed8] width 2880 pitch 11520 (/4 2880)
>[109039.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2320]
>[109039.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2320] width 2880 pitch 11520 (/4 2880)
>[109039.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2320]
>[109039.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2320] width 2880 pitch 11520 (/4 2880)
>[109039.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2320]
>[109039.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2320] width 2880 pitch 11520 (/4 2880)
>[109039.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97a2320]
>[109039.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97a2320] width 2880 pitch 11520 (/4 2880)
>[109039.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9477fd8]
>[109039.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9477fd8] width 2880 pitch 11520 (/4 2880)
>[109039.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109039.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109039.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109039.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109039.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109039.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109039.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109039.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109039.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109040.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109040.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109040.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109040.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109040.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109040.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109040.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109040.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d3fb80]
>[109040.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d3fb80] width 2880 pitch 11520 (/4 2880)
>[109040.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109040.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109041.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109041.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109041.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88b30]
>[109041.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88b30] width 2880 pitch 11520 (/4 2880)
>[109041.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109041.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109041.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a88b30]
>[109041.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a88b30] width 2880 pitch 11520 (/4 2880)
>[109041.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109041.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109042.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66778]
>[109042.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66778] width 2880 pitch 11520 (/4 2880)
>[109042.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035ed8]
>[109042.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035ed8] width 2880 pitch 11520 (/4 2880)
>[109042.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a66778]
>[109042.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a66778] width 2880 pitch 11520 (/4 2880)
>[109042.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035ed8]
>[109042.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035ed8] width 2880 pitch 11520 (/4 2880)
>[109043.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109043.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109043.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109043.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109043.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109043.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109043.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109043.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109044.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109044.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109044.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109044.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109044.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109044.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109044.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109044.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109044.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109044.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109045.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d5de60]
>[109045.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d5de60] width 2880 pitch 11520 (/4 2880)
>[109045.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b568]
>[109045.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b568] width 2880 pitch 11520 (/4 2880)
>[109046.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109046.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109046.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109046.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109046.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109046.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109046.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109046.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109046.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98c0648]
>[109046.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98c0648] width 2880 pitch 11520 (/4 2880)
>[109067.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a909a0]
>[109067.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a909a0] width 2880 pitch 11520 (/4 2880)
>[109071.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d870]
>[109071.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d870] width 2880 pitch 11520 (/4 2880)
>[109083.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a909a0]
>[109083.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a909a0] width 2880 pitch 11520 (/4 2880)
>[109092.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b378]
>[109092.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b378] width 2880 pitch 11520 (/4 2880)
>[109092.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa165bc0]
>[109093.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa165bc0] width 2880 pitch 11520 (/4 2880)
>[109093.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a909a0]
>[109093.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a909a0] width 2880 pitch 11520 (/4 2880)
>[109093.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109093.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109093.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a909a0]
>[109093.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a909a0] width 2880 pitch 11520 (/4 2880)
>[109093.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109093.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109094.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109094.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109094.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109094.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109094.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109094.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109094.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109094.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109095.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109095.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109095.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d870]
>[109095.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d870] width 2880 pitch 11520 (/4 2880)
>[109096.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109096.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109096.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa10d870]
>[109096.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa10d870] width 2880 pitch 11520 (/4 2880)
>[109096.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95748c8]
>[109096.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95748c8] width 2880 pitch 11520 (/4 2880)
>[109097.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4490]
>[109097.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4490] width 2880 pitch 11520 (/4 2880)
>[109097.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940c4a0]
>[109097.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940c4a0] width 2880 pitch 11520 (/4 2880)
>[109097.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4490]
>[109097.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4490] width 2880 pitch 11520 (/4 2880)
>[109097.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x940c4a0]
>[109097.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x940c4a0] width 2880 pitch 11520 (/4 2880)
>[109097.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98f4490]
>[109097.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98f4490] width 2880 pitch 11520 (/4 2880)
>[109097.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98ff320]
>[109097.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98ff320] width 2880 pitch 11520 (/4 2880)
>[109110.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa09d140]
>[109110.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa09d140] width 2880 pitch 11520 (/4 2880)
>[109110.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109110.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109110.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[109110.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[109110.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96183f8]
>[109110.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96183f8] width 2880 pitch 11520 (/4 2880)
>[109110.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9817300]
>[109110.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9817300] width 2880 pitch 11520 (/4 2880)
>[109111.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f358f0]
>[109111.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f358f0] width 2880 pitch 11520 (/4 2880)
>[109111.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9817300]
>[109111.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9817300] width 2880 pitch 11520 (/4 2880)
>[109111.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[109111.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[109111.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9744be8]
>[109111.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9744be8] width 2880 pitch 11520 (/4 2880)
>[109111.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dbdd78]
>[109111.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dbdd78] width 2880 pitch 11520 (/4 2880)
>[109111.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455298]
>[109111.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455298] width 2880 pitch 11520 (/4 2880)
>[109112.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba0d48]
>[109112.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba0d48] width 2880 pitch 11520 (/4 2880)
>[109112.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455298]
>[109112.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455298] width 2880 pitch 11520 (/4 2880)
>[109112.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba0d48]
>[109112.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba0d48] width 2880 pitch 11520 (/4 2880)
>[109113.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9455298]
>[109113.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9455298] width 2880 pitch 11520 (/4 2880)
>[109113.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ba0d48]
>[109113.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ba0d48] width 2880 pitch 11520 (/4 2880)
>[109113.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bcec88]
>[109113.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bcec88] width 2880 pitch 11520 (/4 2880)
>[109113.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f358f0]
>[109113.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f358f0] width 2880 pitch 11520 (/4 2880)
>[109113.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12d0b0]
>[109113.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12d0b0] width 2880 pitch 11520 (/4 2880)
>[109113.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa13a2b8]
>[109113.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa13a2b8] width 2880 pitch 11520 (/4 2880)
>[109113.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa104c38]
>[109113.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa104c38] width 2880 pitch 11520 (/4 2880)
>[109113.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579bd8]
>[109113.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579bd8] width 2880 pitch 11520 (/4 2880)
>[109113.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b800]
>[109113.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b800] width 2880 pitch 11520 (/4 2880)
>[109115.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa3efee0]
>[109115.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa3efee0] width 2880 pitch 11520 (/4 2880)
>[109115.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8060]
>[109115.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8060] width 2880 pitch 11520 (/4 2880)
>[109115.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cd5cc0]
>[109115.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cd5cc0] width 2880 pitch 11520 (/4 2880)
>[109115.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e8060]
>[109115.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e8060] width 2880 pitch 11520 (/4 2880)
>[109115.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98a2e50]
>[109115.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98a2e50] width 2880 pitch 11520 (/4 2880)
>[109115.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76480]
>[109115.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76480] width 2880 pitch 11520 (/4 2880)
>[109115.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa374d38]
>[109115.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa374d38] width 2880 pitch 11520 (/4 2880)
>[109118.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7fd0]
>[109118.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7fd0] width 2880 pitch 11520 (/4 2880)
>[109122.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cf168]
>[109122.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cf168] width 2880 pitch 11520 (/4 2880)
>[109122.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96dc9a0]
>[109122.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96dc9a0] width 2880 pitch 11520 (/4 2880)
>[109124.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2198]
>[109124.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2198] width 2880 pitch 11520 (/4 2880)
>[109124.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963b430]
>[109124.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963b430] width 2880 pitch 11520 (/4 2880)
>[109125.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa068ca8]
>[109125.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa068ca8] width 2880 pitch 11520 (/4 2880)
>[109125.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa28e260]
>[109125.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa28e260] width 2880 pitch 11520 (/4 2880)
>[109125.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa068ca8]
>[109125.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa068ca8] width 2880 pitch 11520 (/4 2880)
>[109125.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b3bd8]
>[109125.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b3bd8] width 2880 pitch 11520 (/4 2880)
>[109125.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x963b430]
>[109125.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x963b430] width 2880 pitch 11520 (/4 2880)
>[109126.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b3bd8]
>[109126.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b3bd8] width 2880 pitch 11520 (/4 2880)
>[109126.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a2280]
>[109126.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a2280] width 2880 pitch 11520 (/4 2880)
>[109126.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a2280]
>[109126.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a2280] width 2880 pitch 11520 (/4 2880)
>[109127.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b3bd8]
>[109127.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b3bd8] width 2880 pitch 11520 (/4 2880)
>[109127.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a2280]
>[109127.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a2280] width 2880 pitch 11520 (/4 2880)
>[109127.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b3bd8]
>[109127.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b3bd8] width 2880 pitch 11520 (/4 2880)
>[109127.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1a2280]
>[109127.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1a2280] width 2880 pitch 11520 (/4 2880)
>[109127.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2198]
>[109127.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2198] width 2880 pitch 11520 (/4 2880)
>[109128.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98b3bd8]
>[109128.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98b3bd8] width 2880 pitch 11520 (/4 2880)
>[109132.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fc300]
>[109132.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fc300] width 2880 pitch 11520 (/4 2880)
>[109132.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9726488]
>[109132.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9726488] width 2880 pitch 11520 (/4 2880)
>[109132.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa068cb0]
>[109132.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa068cb0] width 2880 pitch 11520 (/4 2880)
>[109132.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97f2198]
>[109132.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97f2198] width 2880 pitch 11520 (/4 2880)
>[109132.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ab4620]
>[109132.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ab4620] width 2880 pitch 11520 (/4 2880)
>[109136.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x998bab0]
>[109136.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x998bab0] width 2880 pitch 11520 (/4 2880)
>[109140.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97265e0]
>[109140.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97265e0] width 2880 pitch 11520 (/4 2880)
>[109140.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c59248]
>[109140.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c59248] width 2880 pitch 11520 (/4 2880)
>[109140.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d39a8]
>[109140.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d39a8] width 2880 pitch 11520 (/4 2880)
>[109140.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[109140.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[109140.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d39a8]
>[109140.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d39a8] width 2880 pitch 11520 (/4 2880)
>[109140.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[109140.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[109140.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d39a8]
>[109140.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d39a8] width 2880 pitch 11520 (/4 2880)
>[109140.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[109140.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[109140.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa2d39a8]
>[109140.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa2d39a8] width 2880 pitch 11520 (/4 2880)
>[109140.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9860db0]
>[109140.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9860db0] width 2880 pitch 11520 (/4 2880)
>[109142.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fcd30]
>[109142.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fcd30] width 2880 pitch 11520 (/4 2880)
>[109145.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3c78]
>[109145.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3c78] width 2880 pitch 11520 (/4 2880)
>[109147.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa029fd8]
>[109147.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa029fd8] width 2880 pitch 11520 (/4 2880)
>[109147.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x95b3170]
>[109148.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x95b3170] width 2880 pitch 11520 (/4 2880)
>[109148.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05aac0]
>[109148.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05aac0] width 2880 pitch 11520 (/4 2880)
>[109148.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b46120]
>[109148.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b46120] width 2880 pitch 11520 (/4 2880)
>[109148.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9785e88]
>[109148.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9785e88] width 2880 pitch 11520 (/4 2880)
>[109149.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6fcf0]
>[109149.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6fcf0] width 2880 pitch 11520 (/4 2880)
>[109149.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76ba8]
>[109149.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76ba8] width 2880 pitch 11520 (/4 2880)
>[109150.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76ba8]
>[109150.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76ba8] width 2880 pitch 11520 (/4 2880)
>[109150.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a81940]
>[109150.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a81940] width 2880 pitch 11520 (/4 2880)
>[109150.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0ae350]
>[109150.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0ae350] width 2880 pitch 11520 (/4 2880)
>[109152.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96bd0b8]
>[109152.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96bd0b8] width 2880 pitch 11520 (/4 2880)
>[109152.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1eead8]
>[109152.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1eead8] width 2880 pitch 11520 (/4 2880)
>[109152.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f358f0]
>[109152.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f358f0] width 2880 pitch 11520 (/4 2880)
>[109153.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96aa278]
>[109153.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96aa278] width 2880 pitch 11520 (/4 2880)
>[109153.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa071f00]
>[109153.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa071f00] width 2880 pitch 11520 (/4 2880)
>[109153.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579258]
>[109153.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579258] width 2880 pitch 11520 (/4 2880)
>[109154.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3c78]
>[109154.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3c78] width 2880 pitch 11520 (/4 2880)
>[109154.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9579258]
>[109154.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9579258] width 2880 pitch 11520 (/4 2880)
>[109154.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9aa3c78]
>[109154.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9aa3c78] width 2880 pitch 11520 (/4 2880)
>[109154.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0393b0]
>[109154.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0393b0] width 2880 pitch 11520 (/4 2880)
>[109154.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b72a40]
>[109154.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b72a40] width 2880 pitch 11520 (/4 2880)
>[109155.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12cad0]
>[109155.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12cad0] width 2880 pitch 11520 (/4 2880)
>[109155.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138c18]
>[109155.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138c18] width 2880 pitch 11520 (/4 2880)
>[109155.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8c98]
>[109155.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8c98] width 2880 pitch 11520 (/4 2880)
>[109155.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138c18]
>[109155.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138c18] width 2880 pitch 11520 (/4 2880)
>[109156.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97e8c98]
>[109156.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97e8c98] width 2880 pitch 11520 (/4 2880)
>[109156.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa138c18]
>[109156.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa138c18] width 2880 pitch 11520 (/4 2880)
>[109156.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7b458]
>[109156.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7b458] width 2880 pitch 11520 (/4 2880)
>[109156.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05aac0]
>[109156.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05aac0] width 2880 pitch 11520 (/4 2880)
>[109156.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7b458]
>[109156.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7b458] width 2880 pitch 11520 (/4 2880)
>[109156.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa05aac0]
>[109157.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa05aac0] width 2880 pitch 11520 (/4 2880)
>[109157.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03d6e8]
>[109157.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03d6e8] width 2880 pitch 11520 (/4 2880)
>[109158.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a6d3e0]
>[109158.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a6d3e0] width 2880 pitch 11520 (/4 2880)
>[109158.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1de00]
>[109158.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1de00] width 2880 pitch 11520 (/4 2880)
>[109165.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa029fd8]
>[109165.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa029fd8] width 2880 pitch 11520 (/4 2880)
>[109165.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97aa400]
>[109165.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97aa400] width 2880 pitch 11520 (/4 2880)
>[109165.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fc598]
>[109165.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fc598] width 2880 pitch 11520 (/4 2880)
>[109165.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96f10a0]
>[109165.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96f10a0] width 2880 pitch 11520 (/4 2880)
>[109165.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15fe78]
>[109165.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15fe78] width 2880 pitch 11520 (/4 2880)
>[109165.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d7e700]
>[109165.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d7e700] width 2880 pitch 11520 (/4 2880)
>[109175.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109175.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109175.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109175.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109175.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109175.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109176.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109176.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109176.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109176.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109176.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109176.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109176.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109176.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109176.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109176.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109176.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109176.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109176.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109176.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109176.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109176.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109176.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109176.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109177.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109177.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109177.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd410]
>[109177.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd410] width 2880 pitch 11520 (/4 2880)
>[109177.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fc588]
>[109177.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fc588] width 2880 pitch 11520 (/4 2880)
>[109177.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109177.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109178.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa1fc588]
>[109178.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa1fc588] width 2880 pitch 11520 (/4 2880)
>[109178.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109178.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109180.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd3e0]
>[109180.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd3e0] width 2880 pitch 11520 (/4 2880)
>[109180.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109180.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109180.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1dec0]
>[109180.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1dec0] width 2880 pitch 11520 (/4 2880)
>[109180.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de3458]
>[109180.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de3458] width 2880 pitch 11520 (/4 2880)
>[109180.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1dec0]
>[109180.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1dec0] width 2880 pitch 11520 (/4 2880)
>[109182.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9f1de60]
>[109182.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9f1de60] width 2880 pitch 11520 (/4 2880)
>[109182.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b97f38]
>[109182.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b97f38] width 2880 pitch 11520 (/4 2880)
>[109182.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9afaca8]
>[109182.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9afaca8] width 2880 pitch 11520 (/4 2880)
>[109182.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x99a5ac0]
>[109182.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x99a5ac0] width 2880 pitch 11520 (/4 2880)
>[109182.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109182.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109182.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x952b800]
>[109182.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x952b800] width 2880 pitch 11520 (/4 2880)
>[109182.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x96e4b60]
>[109182.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x96e4b60] width 2880 pitch 11520 (/4 2880)
>[109182.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9dd9bc0]
>[109182.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9dd9bc0] width 2880 pitch 11520 (/4 2880)
>[109182.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b7a618]
>[109182.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b7a618] width 2880 pitch 11520 (/4 2880)
>[109182.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d41f8]
>[109182.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d41f8] width 2880 pitch 11520 (/4 2880)
>[109182.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07d0d8]
>[109182.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07d0d8] width 2880 pitch 11520 (/4 2880)
>[109182.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d41f8]
>[109182.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d41f8] width 2880 pitch 11520 (/4 2880)
>[109182.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa07d0d8]
>[109182.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa07d0d8] width 2880 pitch 11520 (/4 2880)
>[109182.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x97d41f8]
>[109182.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x97d41f8] width 2880 pitch 11520 (/4 2880)
>[109183.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c7f5c8]
>[109183.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c7f5c8] width 2880 pitch 11520 (/4 2880)
>[109184.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9def4d8]
>[109184.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9def4d8] width 2880 pitch 11520 (/4 2880)
>[109184.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0a8230]
>[109184.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0a8230] width 2880 pitch 11520 (/4 2880)
>[109184.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15c038]
>[109184.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15c038] width 2880 pitch 11520 (/4 2880)
>[109184.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9de2af0]
>[109184.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9de2af0] width 2880 pitch 11520 (/4 2880)
>[109184.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa15c038]
>[109184.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa15c038] width 2880 pitch 11520 (/4 2880)
>[109184.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c92e58]
>[109184.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c92e58] width 2880 pitch 11520 (/4 2880)
>[109184.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0fba38]
>[109185.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0fba38] width 2880 pitch 11520 (/4 2880)
>[109185.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ff5860]
>[109185.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ff5860] width 2880 pitch 11520 (/4 2880)
>[109186.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa080170]
>[109186.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa080170] width 2880 pitch 11520 (/4 2880)
>[109186.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa03aa58]
>[109186.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa03aa58] width 2880 pitch 11520 (/4 2880)
>[109186.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c709f0]
>[109186.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c709f0] width 2880 pitch 11520 (/4 2880)
>[109186.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x98e7368]
>[109186.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x98e7368] width 2880 pitch 11520 (/4 2880)
>[109186.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94d6290]
>[109186.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94d6290] width 2880 pitch 11520 (/4 2880)
>[109186.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12cad0]
>[109186.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12cad0] width 2880 pitch 11520 (/4 2880)
>[109186.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109186.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109186.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76ba8]
>[109186.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76ba8] width 2880 pitch 11520 (/4 2880)
>[109186.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[109186.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[109186.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12cad0]
>[109186.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12cad0] width 2880 pitch 11520 (/4 2880)
>[109186.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109186.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109186.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76ba8]
>[109186.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76ba8] width 2880 pitch 11520 (/4 2880)
>[109186.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c5ecf8]
>[109186.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c5ecf8] width 2880 pitch 11520 (/4 2880)
>[109186.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa12cad0]
>[109186.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa12cad0] width 2880 pitch 11520 (/4 2880)
>[109187.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9570]
>[109187.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9570] width 2880 pitch 11520 (/4 2880)
>[109187.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109187.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109187.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b76ba8]
>[109187.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b76ba8] width 2880 pitch 11520 (/4 2880)
>[109187.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa077cf8]
>[109187.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa077cf8] width 2880 pitch 11520 (/4 2880)
>[109187.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9570]
>[109187.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9570] width 2880 pitch 11520 (/4 2880)
>[109187.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109187.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109187.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9570]
>[109187.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9570] width 2880 pitch 11520 (/4 2880)
>[109187.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109188.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109188.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9570]
>[109188.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9570] width 2880 pitch 11520 (/4 2880)
>[109188.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9a84b10]
>[109188.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9a84b10] width 2880 pitch 11520 (/4 2880)
>[109188.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x94f9570]
>[109188.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x94f9570] width 2880 pitch 11520 (/4 2880)
>[109188.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa035e58]
>[109188.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa035e58] width 2880 pitch 11520 (/4 2880)
>[109188.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa072838]
>[109188.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa072838] width 2880 pitch 11520 (/4 2880)
>[109188.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa195250]
>[109188.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa195250] width 2880 pitch 11520 (/4 2880)
>[109188.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa190870]
>[109188.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa190870] width 2880 pitch 11520 (/4 2880)
>[109190.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1f70]
>[109190.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1f70] width 2880 pitch 11520 (/4 2880)
>[109190.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161a88]
>[109190.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161a88] width 2880 pitch 11520 (/4 2880)
>[109190.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c379f0]
>[109191.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c379f0] width 2880 pitch 11520 (/4 2880)
>[109191.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161a88]
>[109191.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161a88] width 2880 pitch 11520 (/4 2880)
>[109191.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c379f0]
>[109191.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c379f0] width 2880 pitch 11520 (/4 2880)
>[109191.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa161a88]
>[109191.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa161a88] width 2880 pitch 11520 (/4 2880)
>[109192.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2048]
>[109192.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2048] width 2880 pitch 11520 (/4 2880)
>[109192.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb1f70]
>[109192.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb1f70] width 2880 pitch 11520 (/4 2880)
>[109192.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2048]
>[109193.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2048] width 2880 pitch 11520 (/4 2880)
>[109193.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d49070]
>[109193.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d49070] width 2880 pitch 11520 (/4 2880)
>[109193.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9bb2048]
>[109193.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9bb2048] width 2880 pitch 11520 (/4 2880)
>[109194.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9b58e68]
>[109194.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9b58e68] width 2880 pitch 11520 (/4 2880)
>[109194.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9d48f48]
>[109194.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9d48f48] width 2880 pitch 11520 (/4 2880)
>[109194.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9ffd260]
>[109194.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9ffd260] width 2880 pitch 11520 (/4 2880)
>[109194.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa11d730]
>[109194.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa11d730] width 2880 pitch 11520 (/4 2880)
>[109194.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa0cbd40]
>[109194.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa0cbd40] width 2880 pitch 11520 (/4 2880)
>[109195.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9cfb770]
>[109195.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9cfb770] width 2880 pitch 11520 (/4 2880)
>[109202.562] [mi] EQ overflowing.  Additional events will be discarded until existing events are processed.
>[109202.574] 
>[109202.574] Backtrace:
>[109203.186] 0: /usr/bin/Xorg (xorg_backtrace+0x4a) [0x80ac45a]
>[109203.186] 1: /usr/bin/Xorg (mieqEnqueue+0x22b) [0x81aacfb]
>[109203.186] 2: /usr/bin/Xorg (0x8047000+0x4589c) [0x808c89c]
>[109203.186] 3: /usr/bin/Xorg (xf86PostMotionEventM+0x253) [0x80d9ec3]
>[109203.186] 4: /usr/lib/xorg/modules/input/evdev_drv.so (0xb4fbb000+0x3e2e) [0xb4fbee2e]
>[109203.186] 5: /usr/lib/xorg/modules/input/evdev_drv.so (0xb4fbb000+0x5534) [0xb4fc0534]
>[109203.186] 6: /usr/bin/Xorg (0x8047000+0x82302) [0x80c9302]
>[109203.187] 7: /usr/bin/Xorg (0x8047000+0xa8693) [0x80ef693]
>[109203.187] 8: (vdso) (__kernel_sigreturn+0x0) [0xb77e4400]
>[109203.187] 9: /usr/bin/Xorg (0x8047000+0x6aed0) [0x80b1ed0]
>[109203.187] 10: (vdso) (__kernel_sigreturn+0x0) [0xb77e4400]
>[109203.187] 11: /lib/libpixman-1.so.0 (0x48cdd000+0x66786) [0x48d43786]
>[109203.187] 12: /lib/libpixman-1.so.0 (0x48cdd000+0x86dc6) [0x48d63dc6]
>[109203.187] 13: /lib/libpixman-1.so.0 (0x48cdd000+0x52681) [0x48d2f681]
>[109203.187] 14: /lib/libpixman-1.so.0 (0x48cdd000+0x529be) [0x48d2f9be]
>[109203.194] 15: /lib/libpixman-1.so.0 (pixman_fill+0x5e) [0x48ce2eae]
>[109203.194] 16: /usr/lib/xorg/modules/libfb.so (fbFill+0x2a1) [0xb7567af1]
>[109203.194] 17: /usr/lib/xorg/modules/libfb.so (fbPolyFillRect+0x1bc) [0xb756822c]
>[109203.194] 18: /usr/lib/xorg/modules/libexa.so (0xb7578000+0x11206) [0xb7589206]
>[109203.194] 19: /usr/lib/xorg/modules/libexa.so (0xb7578000+0xa449) [0xb7582449]
>[109203.194] 20: /usr/bin/Xorg (0x8047000+0x10e9be) [0x81559be]
>[109203.194] 21: /usr/bin/Xorg (0x8047000+0xfda80) [0x8144a80]
>[109203.194] 22: /usr/bin/Xorg (miCompositeRects+0x9a) [0x8144b9a]
>[109203.195] 23: /usr/bin/Xorg (CompositeRects+0x79) [0x81487f9]
>[109203.195] 24: /usr/bin/Xorg (0x8047000+0x105fc4) [0x814cfc4]
>[109203.195] 25: /usr/bin/Xorg (0x8047000+0x101dbf) [0x8148dbf]
>[109203.195] 26: /usr/bin/Xorg (0x8047000+0x303fd) [0x80773fd]
>[109203.195] 27: /usr/bin/Xorg (0x8047000+0x1dce5) [0x8064ce5]
>[109203.195] 28: /lib/libc.so.6 (__libc_start_main+0xf5) [0x48151635]
>[109203.195] 29: /usr/bin/Xorg (0x8047000+0x1e029) [0x8065029]
>[109203.195] 
>[109203.195] [mi] These backtraces from mieqEnqueue may point to a culprit higher up the stack.
>[109203.195] [mi] mieq is *NOT* the cause.  It is a victim.
>[109203.198] [mi] Increasing EQ size to 512 to prevent dropped events.
>[109203.228] [mi] EQ processing has resumed after 21 dropped events.
>[109203.228] [mi] This may be caused my a misbehaving driver monopolizing the server's resources.
>[109219.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x9c66d58]
>[109219.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x9c66d58] width 2880 pitch 11520 (/4 2880)

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Attachments on bug 876243: 644194 | 644195 | 644197 | 644198 | 644199 | 644200