Attachment 648512 Details for Bug 878478 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 341.05 KB, created by Sam Barker on 2012-11-20 14:18:04 UTC

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Creator: Sam Barker

Created: 2012-11-20 14:18:04 UTC

Size: 341.05 KB

patch

obsolete

>[    26.553] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[    26.553] X Protocol Version 11, Revision 0
>[    26.553] Build Operating System:  2.6.32-220.17.1.el6.x86_64 
>[    26.553] Current Operating System: Linux kirkau.viceroylodge.quadrocket.co.uk 3.6.6-1.fc17.x86_64 #1 SMP Mon Nov 5 21:59:35 UTC 2012 x86_64
>[    26.554] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.6-1.fc17.x86_64 root=/dev/mapper/kirikau-root ro rd.md=0 rd.dm=0 rd.lvm.lv=kirikau/swap SYSFONT=True KEYTABLE=uk LANG=en_US.UTF-8 rd.luks.uuid=luks-0d22a615-f826-4ef6-a278-28ef601ac605 rd.lvm.lv=kirikau/root rhgb quiet
>[    26.554] Build Date: 20 September 2012  07:51:23AM
>[    26.554] Build ID: xorg-x11-server 1.12.3-2.fc17 
>[    26.554] Current version of pixman: 0.24.4
>[    26.554] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    26.554] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    26.554] (==) Log file: "/var/log/Xorg.0.log", Time: Tue Nov 20 12:15:27 2012
>[    26.562] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    26.562] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    26.562] (==) No Layout section.  Using the first Screen section.
>[    26.562] (==) No screen section available. Using defaults.
>[    26.562] (**) |-->Screen "Default Screen Section" (0)
>[    26.562] (**) |   |-->Monitor "<default monitor>"
>[    26.562] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    26.562] (==) Automatically adding devices
>[    26.563] (==) Automatically enabling devices
>[    26.563] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    26.563] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    26.563] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    26.563] (II) Loader magic: 0x7c6ac0
>[    26.563] (II) Module ABI versions:
>[    26.563] 	X.Org ANSI C Emulation: 0.4
>[    26.563] 	X.Org Video Driver: 12.0
>[    26.563] 	X.Org XInput driver : 16.0
>[    26.563] 	X.Org Server Extension : 6.0
>[    26.565] (--) PCI:*(0:2:0:0) 1002:9488:1028:02fe rev 0, Mem @ 0xd0000000/268435456, 0xcfef0000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    26.565] (II) LoadModule: "extmod"
>[    26.565] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    26.566] (II) Module extmod: vendor="X.Org Foundation"
>[    26.566] 	compiled for 1.12.3, module version = 1.0.0
>[    26.566] 	Module class: X.Org Server Extension
>[    26.566] 	ABI class: X.Org Server Extension, version 6.0
>[    26.566] (II) Loading extension SELinux
>[    26.566] (II) Loading extension MIT-SCREEN-SAVER
>[    26.566] (II) Loading extension XFree86-VidModeExtension
>[    26.566] (II) Loading extension XFree86-DGA
>[    26.566] (II) Loading extension DPMS
>[    26.566] (II) Loading extension XVideo
>[    26.566] (II) Loading extension XVideo-MotionCompensation
>[    26.566] (II) Loading extension X-Resource
>[    26.566] (II) LoadModule: "dbe"
>[    26.566] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    26.566] (II) Module dbe: vendor="X.Org Foundation"
>[    26.566] 	compiled for 1.12.3, module version = 1.0.0
>[    26.566] 	Module class: X.Org Server Extension
>[    26.566] 	ABI class: X.Org Server Extension, version 6.0
>[    26.566] (II) Loading extension DOUBLE-BUFFER
>[    26.566] (II) LoadModule: "glx"
>[    26.566] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    26.566] (II) Module glx: vendor="X.Org Foundation"
>[    26.566] 	compiled for 1.12.3, module version = 1.0.0
>[    26.566] 	ABI class: X.Org Server Extension, version 6.0
>[    26.566] (==) AIGLX enabled
>[    26.566] (II) Loading extension GLX
>[    26.566] (II) LoadModule: "record"
>[    26.567] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    26.567] (II) Module record: vendor="X.Org Foundation"
>[    26.567] 	compiled for 1.12.3, module version = 1.13.0
>[    26.567] 	Module class: X.Org Server Extension
>[    26.567] 	ABI class: X.Org Server Extension, version 6.0
>[    26.567] (II) Loading extension RECORD
>[    26.567] (II) LoadModule: "dri"
>[    26.567] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    26.567] (II) Module dri: vendor="X.Org Foundation"
>[    26.567] 	compiled for 1.12.3, module version = 1.0.0
>[    26.567] 	ABI class: X.Org Server Extension, version 6.0
>[    26.567] (II) Loading extension XFree86-DRI
>[    26.567] (II) LoadModule: "dri2"
>[    26.567] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    26.567] (II) Module dri2: vendor="X.Org Foundation"
>[    26.567] 	compiled for 1.12.3, module version = 1.2.0
>[    26.567] 	ABI class: X.Org Server Extension, version 6.0
>[    26.567] (II) Loading extension DRI2
>[    26.567] (==) Matched ati as autoconfigured driver 0
>[    26.567] (==) Matched vesa as autoconfigured driver 1
>[    26.567] (==) Matched modesetting as autoconfigured driver 2
>[    26.567] (==) Matched fbdev as autoconfigured driver 3
>[    26.567] (==) Assigned the driver to the xf86ConfigLayout
>[    26.567] (II) LoadModule: "ati"
>[    26.567] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    26.567] (II) Module ati: vendor="X.Org Foundation"
>[    26.567] 	compiled for 1.12.0, module version = 6.14.99
>[    26.567] 	Module class: X.Org Video Driver
>[    26.568] 	ABI class: X.Org Video Driver, version 12.0
>[    26.568] (II) LoadModule: "radeon"
>[    26.568] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    26.568] (II) Module radeon: vendor="X.Org Foundation"
>[    26.568] 	compiled for 1.12.0, module version = 6.14.99
>[    26.568] 	Module class: X.Org Video Driver
>[    26.568] 	ABI class: X.Org Video Driver, version 12.0
>[    26.568] (II) LoadModule: "vesa"
>[    26.568] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    26.568] (II) Module vesa: vendor="X.Org Foundation"
>[    26.568] 	compiled for 1.12.0, module version = 2.3.1
>[    26.568] 	Module class: X.Org Video Driver
>[    26.568] 	ABI class: X.Org Video Driver, version 12.0
>[    26.568] (II) LoadModule: "modesetting"
>[    26.568] (WW) Warning, couldn't open module modesetting
>[    26.568] (II) UnloadModule: "modesetting"
>[    26.568] (II) Unloading modesetting
>[    26.568] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    26.568] (II) LoadModule: "fbdev"
>[    26.568] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    26.568] (II) Module fbdev: vendor="X.Org Foundation"
>[    26.569] 	compiled for 1.11.99.901, module version = 0.4.2
>[    26.569] 	ABI class: X.Org Video Driver, version 12.0
>[    26.569] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    26.571] (II) VESA: driver for VESA chipsets: vesa
>[    26.571] (II) FBDEV: driver for framebuffer: fbdev
>[    26.571] (++) using VT number 1
>
>[    26.572] (II) [KMS] Kernel modesetting enabled.
>[    26.572] (WW) Falling back to old probe method for vesa
>[    26.572] (WW) Falling back to old probe method for fbdev
>[    26.572] (II) Loading sub module "fbdevhw"
>[    26.572] (II) LoadModule: "fbdevhw"
>[    26.572] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    26.572] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    26.572] 	compiled for 1.12.3, module version = 0.0.2
>[    26.572] 	ABI class: X.Org Video Driver, version 12.0
>[    26.572] (II) RADEON(0): RADEONPreInit_KMS
>[    26.572] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    26.572] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    26.572] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    26.572] (==) RADEON(0): Default visual is TrueColor
>[    26.572] (==) RADEON(0): RGB weight 888
>[    26.572] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    26.572] (--) RADEON(0): Chipset: "ATI Mobility Radeon HD 4670" (ChipID = 0x9488)
>[    26.572] (II) RADEON(0): PCIE card detected
>[    26.572] drmOpenDevice: node name is /dev/dri/card0
>[    26.572] drmOpenDevice: open result is 8, (OK)
>[    26.573] drmOpenByBusid: Searching for BusID pci:0000:02:00.0
>[    26.573] drmOpenDevice: node name is /dev/dri/card0
>[    26.573] drmOpenDevice: open result is 8, (OK)
>[    26.573] drmOpenByBusid: drmOpenMinor returns 8
>[    26.573] drmOpenByBusid: drmGetBusid reports pci:0000:02:00.0
>[    26.573] (II) Loading sub module "exa"
>[    26.573] (II) LoadModule: "exa"
>[    26.573] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    26.573] (II) Module exa: vendor="X.Org Foundation"
>[    26.573] 	compiled for 1.12.3, module version = 2.5.0
>[    26.573] 	ABI class: X.Org Video Driver, version 12.0
>[    26.573] (II) RADEON(0): KMS Color Tiling: enabled
>[    26.573] (II) RADEON(0): KMS Pageflipping: enabled
>[    26.573] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    26.587] (II) RADEON(0): Output VGA-0 has no monitor section
>[    26.589] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    26.589] (II) RADEON(0): Output LVDS has no monitor section
>[    26.598] (II) RADEON(0): Output DisplayPort-0 has no monitor section
>[    26.612] (II) RADEON(0): EDID for output VGA-0
>[    26.614] (II) RADEON(0): EDID for output HDMI-0
>[    26.614] (II) RADEON(0): EDID for output LVDS
>[    26.614] (II) RADEON(0): Manufacturer: AUO  Model: 11ed  Serial#: 0
>[    26.614] (II) RADEON(0): Year: 2009  Week: 1
>[    26.614] (II) RADEON(0): EDID Version: 1.3
>[    26.614] (II) RADEON(0): Digital Display Input
>[    26.615] (II) RADEON(0): Max Image Size [cm]: horiz.: 34  vert.: 19
>[    26.615] (II) RADEON(0): Gamma: 2.20
>[    26.615] (II) RADEON(0): No DPMS capabilities specified
>[    26.615] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    26.615] (II) RADEON(0): First detailed timing is preferred mode
>[    26.615] (II) RADEON(0): redX: 0.620 redY: 0.340   greenX: 0.330 greenY: 0.570
>[    26.615] (II) RADEON(0): blueX: 0.150 blueY: 0.060   whiteX: 0.313 whiteY: 0.329
>[    26.615] (II) RADEON(0): Manufacturer's mask: 0
>[    26.615] (II) RADEON(0): Supported detailed timing:
>[    26.615] (II) RADEON(0): clock: 139.0 MHz   Image Size:  344 x 193 mm
>[    26.615] (II) RADEON(0): h_active: 1920  h_sync: 1950  h_sync_end 1970 h_blank_end 2014 h_border: 0
>[    26.615] (II) RADEON(0): v_active: 1080  v_sync: 1090  v_sync_end 1100 v_blanking: 1150 v_border: 0
>[    26.615] (II) RADEON(0): Supported detailed timing:
>[    26.615] (II) RADEON(0): clock: 139.0 MHz   Image Size:  344 x 193 mm
>[    26.615] (II) RADEON(0): h_active: 1920  h_sync: 1950  h_sync_end 1970 h_blank_end 2014 h_border: 0
>[    26.615] (II) RADEON(0): v_active: 1080  v_sync: 1090  v_sync_end 1100 v_blanking: 1150 v_border: 0
>[    26.615] (II) RADEON(0):  K026T[80]B156HW1
>[    26.615] (II) RADEON(0): Unknown vendor-specific block 0
>[    26.615] (II) RADEON(0): EDID (in hex):
>[    26.615] (II) RADEON(0): 	00ffffffffffff0006afed1100000000
>[    26.615] (II) RADEON(0): 	01130103902213780ac8959e57549226
>[    26.615] (II) RADEON(0): 	0f505400000001010101010101010101
>[    26.615] (II) RADEON(0): 	0101010101014c36805e703846401e14
>[    26.615] (II) RADEON(0): 	aa0058c11000001a4c36805e70384640
>[    26.615] (II) RADEON(0): 	1e14aa0058c11000001a000000fe004b
>[    26.615] (II) RADEON(0): 	30323654804231353648573100000000
>[    26.615] (II) RADEON(0): 	00000000000000000002010a202000c9
>[    26.615] (II) RADEON(0): Printing probed modes for output LVDS
>[    26.615] (II) RADEON(0): Modeline "1920x1080"x60.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[    26.616] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[    26.616] (II) RADEON(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz d)
>[    26.616] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    26.616] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    26.616] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    26.616] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    26.616] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    26.616] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    26.616] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    26.616] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    26.616] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    26.616] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    26.616] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    26.616] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    26.616] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    26.616] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    26.616] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    26.616] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    26.616] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    26.616] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    26.616] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    26.616] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    26.616] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    26.624] (II) RADEON(0): EDID for output DisplayPort-0
>[    26.624] (II) RADEON(0): Output VGA-0 disconnected
>[    26.624] (II) RADEON(0): Output HDMI-0 disconnected
>[    26.624] (II) RADEON(0): Output LVDS connected
>[    26.624] (II) RADEON(0): Output DisplayPort-0 disconnected
>[    26.624] (II) RADEON(0): Using exact sizes for initial modes
>[    26.624] (II) RADEON(0): Output LVDS using initial mode 1920x1080 +0+0
>[    26.624] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    26.624] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:40000000 visible:f7d7000
>[    26.624] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    26.624] (==) RADEON(0): DPI set to (96, 96)
>[    26.624] (II) Loading sub module "fb"
>[    26.624] (II) LoadModule: "fb"
>[    26.625] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    26.625] (II) Module fb: vendor="X.Org Foundation"
>[    26.625] 	compiled for 1.12.3, module version = 1.0.0
>[    26.625] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    26.625] (II) Loading sub module "ramdac"
>[    26.625] (II) LoadModule: "ramdac"
>[    26.625] (II) Module "ramdac" already built-in
>[    26.625] (II) UnloadModule: "vesa"
>[    26.625] (II) Unloading vesa
>[    26.625] (II) UnloadModule: "fbdev"
>[    26.625] (II) Unloading fbdev
>[    26.625] (II) UnloadSubModule: "fbdevhw"
>[    26.625] (II) Unloading fbdevhw
>[    26.625] (--) Depth 24 pixmap format is 32 bpp
>[    26.625] (II) RADEON(0): [DRI2] Setup complete
>[    26.625] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    26.625] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    26.626] (II) RADEON(0): Front buffer size: 8100K
>[    26.626] (II) RADEON(0): VRAM usage limit set to 221119K
>[    26.626] (II) RADEON(0): Initializing backing store
>[    26.626] (==) RADEON(0): Backing store disabled
>[    26.626] (II) RADEON(0): Direct rendering enabled
>[    26.626] (II) RADEON(0): Initializing Acceleration
>[    26.626] (II) RADEON(0): Setting EXA maxPitchBytes
>[    26.626] (II) EXA(0): Driver allocated offscreen pixmaps
>[    26.626] (II) EXA(0): Driver registered support for the following operations:
>[    26.626] (II)         Solid
>[    26.626] (II)         Copy
>[    26.626] (II)         Composite (RENDER acceleration)
>[    26.626] (II)         UploadToScreen
>[    26.626] (II)         DownloadFromScreen
>[    26.626] (II) RADEON(0): Acceleration enabled
>[    26.626] (II) RADEON(0): Initializing DPMS
>[    26.626] (==) RADEON(0): DPMS enabled
>[    26.626] (II) RADEON(0): Initializing Cursor
>[    26.626] (==) RADEON(0): Silken mouse enabled
>[    26.626] (II) RADEON(0): Initializing Xv
>[    26.626] (II) RADEON(0): Set up textured video
>[    26.626] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    26.626] (II) RADEON(0): [XvMC] Extension initialized.
>[    26.626] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    26.626] (II) RADEON(0): Initializing kms color map
>[    26.627] (II) RADEON(0): RADEONScreenInit finished
>[    26.627] (--) RandR disabled
>[    26.627] (II) Initializing built-in extension Generic Event Extension
>[    26.627] (II) Initializing built-in extension SHAPE
>[    26.627] (II) Initializing built-in extension MIT-SHM
>[    26.627] (II) Initializing built-in extension XInputExtension
>[    26.627] (II) Initializing built-in extension XTEST
>[    26.627] (II) Initializing built-in extension BIG-REQUESTS
>[    26.627] (II) Initializing built-in extension SYNC
>[    26.627] (II) Initializing built-in extension XKEYBOARD
>[    26.627] (II) Initializing built-in extension XC-MISC
>[    26.627] (II) Initializing built-in extension XINERAMA
>[    26.627] (II) Initializing built-in extension XFIXES
>[    26.627] (II) Initializing built-in extension RENDER
>[    26.627] (II) Initializing built-in extension RANDR
>[    26.627] (II) Initializing built-in extension COMPOSITE
>[    26.627] (II) Initializing built-in extension DAMAGE
>[    26.629] (II) SELinux: Disabled by boolean
>[    27.203] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    27.203] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    27.203] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    27.203] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    27.203] (II) AIGLX: Loaded and initialized r600
>[    27.203] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    27.205] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    27.275] (II) XKB: Reusing cached keymap
>[    27.280] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    27.280] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    27.280] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    27.280] (II) LoadModule: "evdev"
>[    27.280] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    27.280] (II) Module evdev: vendor="X.Org Foundation"
>[    27.280] 	compiled for 1.12.0, module version = 2.7.0
>[    27.280] 	Module class: X.Org XInput Driver
>[    27.281] 	ABI class: X.Org XInput driver, version 16.0
>[    27.281] (II) Using input driver 'evdev' for 'Power Button'
>[    27.281] 	Option "XkbRules" "evdev"
>[    27.281] 	Option "XkbModel" "pc105"
>[    27.281] 	Option "XkbLayout" "gb"
>[    27.281] 	Option "_source" "server/udev"
>[    27.281] 	Option "name" "Power Button"
>[    27.281] 	Option "path" "/dev/input/event3"
>[    27.281] 	Option "device" "/dev/input/event3"
>[    27.281] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    27.281] 	Option "driver" "evdev"
>[    27.281] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.281] (**) Power Button: always reports core events
>[    27.281] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    27.281] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    27.281] (--) evdev: Power Button: Found keys
>[    27.281] (II) evdev: Power Button: Configuring as keyboard
>[    27.281] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    27.281] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    27.281] (**) Option "xkb_rules" "evdev"
>[    27.281] (**) Option "xkb_model" "pc105"
>[    27.281] (**) Option "xkb_layout" "gb"
>[    27.281] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.306] (II) config/udev: Adding input device Video Bus (/dev/input/event8)
>[    27.306] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    27.307] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    27.307] (II) Using input driver 'evdev' for 'Video Bus'
>[    27.307] 	Option "XkbRules" "evdev"
>[    27.307] 	Option "XkbModel" "pc105"
>[    27.307] 	Option "XkbLayout" "gb"
>[    27.307] 	Option "_source" "server/udev"
>[    27.307] 	Option "name" "Video Bus"
>[    27.307] 	Option "path" "/dev/input/event8"
>[    27.307] 	Option "device" "/dev/input/event8"
>[    27.307] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input8/event8"
>[    27.307] 	Option "driver" "evdev"
>[    27.307] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.307] (**) Video Bus: always reports core events
>[    27.307] (**) evdev: Video Bus: Device: "/dev/input/event8"
>[    27.307] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    27.307] (--) evdev: Video Bus: Found keys
>[    27.307] (II) evdev: Video Bus: Configuring as keyboard
>[    27.307] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input8/event8"
>[    27.307] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    27.307] (**) Option "xkb_rules" "evdev"
>[    27.307] (**) Option "xkb_model" "pc105"
>[    27.307] (**) Option "xkb_layout" "gb"
>[    27.307] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.307] (II) XKB: Reusing cached keymap
>[    27.308] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    27.308] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    27.308] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    27.308] (II) Using input driver 'evdev' for 'Power Button'
>[    27.308] 	Option "XkbRules" "evdev"
>[    27.308] 	Option "XkbModel" "pc105"
>[    27.308] 	Option "XkbLayout" "gb"
>[    27.308] 	Option "_source" "server/udev"
>[    27.308] 	Option "name" "Power Button"
>[    27.308] 	Option "path" "/dev/input/event0"
>[    27.308] 	Option "device" "/dev/input/event0"
>[    27.308] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    27.308] 	Option "driver" "evdev"
>[    27.308] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.308] (**) Power Button: always reports core events
>[    27.308] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    27.308] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    27.308] (--) evdev: Power Button: Found keys
>[    27.308] (II) evdev: Power Button: Configuring as keyboard
>[    27.308] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    27.308] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    27.308] (**) Option "xkb_rules" "evdev"
>[    27.308] (**) Option "xkb_model" "pc105"
>[    27.308] (**) Option "xkb_layout" "gb"
>[    27.308] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.308] (II) XKB: Reusing cached keymap
>[    27.309] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    27.309] (II) No input driver specified, ignoring this device.
>[    27.309] (II) This device may have been added with another device file.
>[    27.310] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    27.310] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    27.310] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    27.310] (II) Using input driver 'evdev' for 'Sleep Button'
>[    27.310] 	Option "XkbRules" "evdev"
>[    27.310] 	Option "XkbModel" "pc105"
>[    27.310] 	Option "XkbLayout" "gb"
>[    27.310] 	Option "_source" "server/udev"
>[    27.310] 	Option "name" "Sleep Button"
>[    27.310] 	Option "path" "/dev/input/event1"
>[    27.310] 	Option "device" "/dev/input/event1"
>[    27.310] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    27.310] 	Option "driver" "evdev"
>[    27.310] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.310] (**) Sleep Button: always reports core events
>[    27.310] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    27.310] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    27.310] (--) evdev: Sleep Button: Found keys
>[    27.310] (II) evdev: Sleep Button: Configuring as keyboard
>[    27.310] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    27.310] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    27.310] (**) Option "xkb_rules" "evdev"
>[    27.310] (**) Option "xkb_model" "pc105"
>[    27.310] (**) Option "xkb_layout" "gb"
>[    27.310] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.310] (II) XKB: Reusing cached keymap
>[    27.310] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event14)
>[    27.310] (II) No input driver specified, ignoring this device.
>[    27.310] (II) This device may have been added with another device file.
>[    27.311] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event12)
>[    27.311] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    27.311] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    27.311] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    27.311] 	Option "XkbRules" "evdev"
>[    27.311] 	Option "XkbModel" "pc105"
>[    27.311] 	Option "XkbLayout" "gb"
>[    27.311] 	Option "_source" "server/udev"
>[    27.311] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    27.311] 	Option "path" "/dev/input/event12"
>[    27.311] 	Option "device" "/dev/input/event12"
>[    27.311] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input12/event12"
>[    27.311] 	Option "driver" "evdev"
>[    27.311] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.311] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    27.311] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event12"
>[    27.311] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x640f
>[    27.311] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    27.311] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    27.311] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input12/event12"
>[    27.311] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 10)
>[    27.311] (**) Option "xkb_rules" "evdev"
>[    27.311] (**) Option "xkb_model" "pc105"
>[    27.311] (**) Option "xkb_layout" "gb"
>[    27.311] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.311] (II) XKB: Reusing cached keymap
>[    27.312] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event13)
>[    27.312] (II) No input driver specified, ignoring this device.
>[    27.312] (II) This device may have been added with another device file.
>[    27.313] (II) config/udev: Adding input device HID 413c:8157 (/dev/input/event6)
>[    27.313] (**) HID 413c:8157: Applying InputClass "evdev keyboard catchall"
>[    27.313] (**) HID 413c:8157: Applying InputClass "system-setup-keyboard"
>[    27.313] (II) Using input driver 'evdev' for 'HID 413c:8157'
>[    27.313] 	Option "XkbRules" "evdev"
>[    27.313] 	Option "XkbModel" "pc105"
>[    27.313] 	Option "XkbLayout" "gb"
>[    27.313] 	Option "_source" "server/udev"
>[    27.313] 	Option "name" "HID 413c:8157"
>[    27.313] 	Option "path" "/dev/input/event6"
>[    27.313] 	Option "device" "/dev/input/event6"
>[    27.313] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.6/2-1.6.1/2-1.6.1:1.0/input/input6/event6"
>[    27.313] 	Option "driver" "evdev"
>[    27.313] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.313] (**) HID 413c:8157: always reports core events
>[    27.313] (**) evdev: HID 413c:8157: Device: "/dev/input/event6"
>[    27.313] (--) evdev: HID 413c:8157: Vendor 0x413c Product 0x8157
>[    27.313] (--) evdev: HID 413c:8157: Found keys
>[    27.313] (II) evdev: HID 413c:8157: Configuring as keyboard
>[    27.313] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.6/2-1.6.1/2-1.6.1:1.0/input/input6/event6"
>[    27.313] (II) XINPUT: Adding extended input device "HID 413c:8157" (type: KEYBOARD, id 11)
>[    27.313] (**) Option "xkb_rules" "evdev"
>[    27.313] (**) Option "xkb_model" "pc105"
>[    27.313] (**) Option "xkb_layout" "gb"
>[    27.313] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.313] (II) XKB: Reusing cached keymap
>[    27.314] (II) config/udev: Adding input device HID 413c:8158 (/dev/input/event7)
>[    27.314] (**) HID 413c:8158: Applying InputClass "evdev pointer catchall"
>[    27.314] (II) Using input driver 'evdev' for 'HID 413c:8158'
>[    27.314] 	Option "XkbRules" "evdev"
>[    27.314] 	Option "XkbModel" "evdev"
>[    27.314] 	Option "XkbLayout" "us"
>[    27.314] 	Option "_source" "server/udev"
>[    27.314] 	Option "name" "HID 413c:8158"
>[    27.314] 	Option "path" "/dev/input/event7"
>[    27.314] 	Option "device" "/dev/input/event7"
>[    27.314] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.6/2-1.6.2/2-1.6.2:1.0/input/input7/event7"
>[    27.314] 	Option "driver" "evdev"
>[    27.314] (**) HID 413c:8158: always reports core events
>[    27.314] (**) evdev: HID 413c:8158: Device: "/dev/input/event7"
>[    27.314] (--) evdev: HID 413c:8158: Vendor 0x413c Product 0x8158
>[    27.314] (--) evdev: HID 413c:8158: Found 3 mouse buttons
>[    27.314] (--) evdev: HID 413c:8158: Found relative axes
>[    27.314] (--) evdev: HID 413c:8158: Found x and y relative axes
>[    27.314] (II) evdev: HID 413c:8158: Configuring as mouse
>[    27.314] (**) evdev: HID 413c:8158: YAxisMapping: buttons 4 and 5
>[    27.314] (**) evdev: HID 413c:8158: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    27.314] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.6/2-1.6.2/2-1.6.2:1.0/input/input7/event7"
>[    27.314] (II) XINPUT: Adding extended input device "HID 413c:8158" (type: MOUSE, id 12)
>[    27.314] (II) evdev: HID 413c:8158: initialized for relative axes.
>[    27.314] (**) HID 413c:8158: (accel) keeping acceleration scheme 1
>[    27.314] (**) HID 413c:8158: (accel) acceleration profile 0
>[    27.315] (**) HID 413c:8158: (accel) acceleration factor: 2.000
>[    27.315] (**) HID 413c:8158: (accel) acceleration threshold: 4
>[    27.315] (II) config/udev: Adding input device HID 413c:8158 (/dev/input/mouse1)
>[    27.315] (II) No input driver specified, ignoring this device.
>[    27.315] (II) This device may have been added with another device file.
>[    27.315] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    27.315] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    27.315] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    27.315] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    27.315] 	Option "XkbRules" "evdev"
>[    27.315] 	Option "XkbModel" "pc105"
>[    27.315] 	Option "XkbLayout" "gb"
>[    27.315] 	Option "_source" "server/udev"
>[    27.315] 	Option "name" "AT Translated Set 2 keyboard"
>[    27.315] 	Option "path" "/dev/input/event4"
>[    27.315] 	Option "device" "/dev/input/event4"
>[    27.315] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    27.315] 	Option "driver" "evdev"
>[    27.315] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.315] (**) AT Translated Set 2 keyboard: always reports core events
>[    27.315] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    27.315] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    27.315] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    27.315] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    27.315] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    27.315] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 13)
>[    27.315] (**) Option "xkb_rules" "evdev"
>[    27.315] (**) Option "xkb_model" "pc105"
>[    27.315] (**) Option "xkb_layout" "gb"
>[    27.315] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.315] (II) XKB: Reusing cached keymap
>[    27.316] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    27.316] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    27.316] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    27.316] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    27.316] (II) LoadModule: "synaptics"
>[    27.316] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    27.316] (II) Module synaptics: vendor="X.Org Foundation"
>[    27.316] 	compiled for 1.12.3, module version = 1.6.2
>[    27.316] 	Module class: X.Org XInput Driver
>[    27.316] 	ABI class: X.Org XInput driver, version 16.0
>[    27.316] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    27.316] 	Option "_source" "server/udev"
>[    27.316] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    27.316] 	Option "path" "/dev/input/event5"
>[    27.316] 	Option "device" "/dev/input/event5"
>[    27.316] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    27.316] 	Option "driver" "synaptics"
>[    27.316] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    27.316] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    27.316] (**) Option "Device" "/dev/input/event5"
>[    27.341] (**) Option "Device" "/dev/input/event5"
>[    27.341] port opened successfully
>[    27.341] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5576
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4684
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    27.341] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    27.341] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    27.351] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    27.351] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 14)
>[    27.351] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    27.351] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    27.351] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.038
>[    27.351] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    27.351] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    27.351] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    27.351] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    27.351] (**) Option "Device" "/dev/input/event5"
>[    27.351] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    27.352] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    27.352] (II) No input driver specified, ignoring this device.
>[    27.352] (II) This device may have been added with another device file.
>[    27.353] (II) config/udev: Adding input device MCE IR Keyboard/Mouse (ite-cir) (/dev/input/event11)
>[    27.353] (**) MCE IR Keyboard/Mouse (ite-cir): Applying InputClass "evdev pointer catchall"
>[    27.353] (**) MCE IR Keyboard/Mouse (ite-cir): Applying InputClass "evdev keyboard catchall"
>[    27.353] (**) MCE IR Keyboard/Mouse (ite-cir): Applying InputClass "system-setup-keyboard"
>[    27.353] (II) Using input driver 'evdev' for 'MCE IR Keyboard/Mouse (ite-cir)'
>[    27.353] 	Option "XkbRules" "evdev"
>[    27.353] 	Option "XkbModel" "pc105"
>[    27.353] 	Option "XkbLayout" "gb"
>[    27.353] 	Option "_source" "server/udev"
>[    27.353] 	Option "name" "MCE IR Keyboard/Mouse (ite-cir)"
>[    27.353] 	Option "path" "/dev/input/event11"
>[    27.353] 	Option "device" "/dev/input/event11"
>[    27.353] 	Option "config_info" "udev:/sys/devices/virtual/input/input11/event11"
>[    27.353] 	Option "driver" "evdev"
>[    27.353] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.353] (**) MCE IR Keyboard/Mouse (ite-cir): always reports core events
>[    27.353] (**) evdev: MCE IR Keyboard/Mouse (ite-cir): Device: "/dev/input/event11"
>[    27.353] (--) evdev: MCE IR Keyboard/Mouse (ite-cir): Vendor 0 Product 0
>[    27.353] (--) evdev: MCE IR Keyboard/Mouse (ite-cir): Found 3 mouse buttons
>[    27.353] (--) evdev: MCE IR Keyboard/Mouse (ite-cir): Found relative axes
>[    27.353] (--) evdev: MCE IR Keyboard/Mouse (ite-cir): Found x and y relative axes
>[    27.353] (--) evdev: MCE IR Keyboard/Mouse (ite-cir): Found keys
>[    27.353] (II) evdev: MCE IR Keyboard/Mouse (ite-cir): Configuring as mouse
>[    27.353] (II) evdev: MCE IR Keyboard/Mouse (ite-cir): Configuring as keyboard
>[    27.353] (**) evdev: MCE IR Keyboard/Mouse (ite-cir): YAxisMapping: buttons 4 and 5
>[    27.353] (**) evdev: MCE IR Keyboard/Mouse (ite-cir): EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    27.353] (**) Option "config_info" "udev:/sys/devices/virtual/input/input11/event11"
>[    27.353] (II) XINPUT: Adding extended input device "MCE IR Keyboard/Mouse (ite-cir)" (type: KEYBOARD, id 15)
>[    27.353] (**) Option "xkb_rules" "evdev"
>[    27.353] (**) Option "xkb_model" "pc105"
>[    27.353] (**) Option "xkb_layout" "gb"
>[    27.353] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.353] (II) XKB: Reusing cached keymap
>[    27.354] (II) evdev: MCE IR Keyboard/Mouse (ite-cir): initialized for relative axes.
>[    27.354] (**) MCE IR Keyboard/Mouse (ite-cir): (accel) keeping acceleration scheme 1
>[    27.354] (**) MCE IR Keyboard/Mouse (ite-cir): (accel) acceleration profile 0
>[    27.354] (**) MCE IR Keyboard/Mouse (ite-cir): (accel) acceleration factor: 2.000
>[    27.354] (**) MCE IR Keyboard/Mouse (ite-cir): (accel) acceleration threshold: 4
>[    27.354] (II) config/udev: Adding input device MCE IR Keyboard/Mouse (ite-cir) (/dev/input/mouse2)
>[    27.354] (**) MCE IR Keyboard/Mouse (ite-cir): Applying InputClass "system-setup-keyboard"
>[    27.354] (II) No input driver specified, ignoring this device.
>[    27.354] (II) This device may have been added with another device file.
>[    27.355] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event9)
>[    27.355] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    27.355] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    27.355] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    27.355] 	Option "XkbRules" "evdev"
>[    27.355] 	Option "XkbModel" "pc105"
>[    27.355] 	Option "XkbLayout" "gb"
>[    27.355] 	Option "_source" "server/udev"
>[    27.355] 	Option "name" "Dell WMI hotkeys"
>[    27.355] 	Option "path" "/dev/input/event9"
>[    27.355] 	Option "device" "/dev/input/event9"
>[    27.355] 	Option "config_info" "udev:/sys/devices/virtual/input/input9/event9"
>[    27.355] 	Option "driver" "evdev"
>[    27.355] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.355] (**) Dell WMI hotkeys: always reports core events
>[    27.355] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event9"
>[    27.355] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    27.355] (--) evdev: Dell WMI hotkeys: Found keys
>[    27.355] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    27.355] (**) Option "config_info" "udev:/sys/devices/virtual/input/input9/event9"
>[    27.355] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 16)
>[    27.355] (**) Option "xkb_rules" "evdev"
>[    27.355] (**) Option "xkb_model" "pc105"
>[    27.355] (**) Option "xkb_layout" "gb"
>[    27.355] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.355] (II) XKB: Reusing cached keymap
>[    27.356] (II) config/udev: Adding input device ITE8708 CIR transceiver (/dev/input/event10)
>[    27.356] (**) ITE8708 CIR transceiver: Applying InputClass "evdev keyboard catchall"
>[    27.356] (**) ITE8708 CIR transceiver: Applying InputClass "system-setup-keyboard"
>[    27.356] (II) Using input driver 'evdev' for 'ITE8708 CIR transceiver'
>[    27.356] 	Option "XkbRules" "evdev"
>[    27.356] 	Option "XkbModel" "pc105"
>[    27.356] 	Option "XkbLayout" "gb"
>[    27.356] 	Option "_source" "server/udev"
>[    27.356] 	Option "name" "ITE8708 CIR transceiver"
>[    27.356] 	Option "path" "/dev/input/event10"
>[    27.356] 	Option "device" "/dev/input/event10"
>[    27.356] 	Option "config_info" "udev:/sys/devices/virtual/rc/rc0/input10/event10"
>[    27.356] 	Option "driver" "evdev"
>[    27.356] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.356] (**) ITE8708 CIR transceiver: always reports core events
>[    27.356] (**) evdev: ITE8708 CIR transceiver: Device: "/dev/input/event10"
>[    27.357] (--) evdev: ITE8708 CIR transceiver: Vendor 0x1283 Product 0
>[    27.357] (--) evdev: ITE8708 CIR transceiver: Found keys
>[    27.357] (II) evdev: ITE8708 CIR transceiver: Configuring as keyboard
>[    27.357] (**) Option "config_info" "udev:/sys/devices/virtual/rc/rc0/input10/event10"
>[    27.357] (II) XINPUT: Adding extended input device "ITE8708 CIR transceiver" (type: KEYBOARD, id 17)
>[    27.357] (**) Option "xkb_rules" "evdev"
>[    27.357] (**) Option "xkb_model" "pc105"
>[    27.357] (**) Option "xkb_layout" "gb"
>[    27.357] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.357] (II) XKB: Reusing cached keymap
>[    27.364] (II) RADEON(0): RADEONSaveScreen(2)
>[    27.386] (II) RADEON(0): EDID vendor "AUO", prod id 4589
>[    27.387] (II) RADEON(0): Printing DDC gathered Modelines:
>[    27.387] (II) RADEON(0): Modeline "1920x1080"x0.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[    28.596] (II) RADEON(0): EDID vendor "AUO", prod id 4589
>[    28.596] (II) RADEON(0): Printing DDC gathered Modelines:
>[    28.596] (II) RADEON(0): Modeline "1920x1080"x0.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[    30.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1100]
>[    30.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1100] width 1920 pitch 7680 (/4 1920)
>[    30.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e1160]
>[    30.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e1160] width 1920 pitch 7680 (/4 1920)
>[    30.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    30.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    30.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    30.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    30.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    31.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    31.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    31.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    31.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    31.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    31.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    31.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    31.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    31.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    31.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    31.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    31.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    31.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    31.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[    31.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[    31.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[    59.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[    59.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   119.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   119.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   179.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[   179.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   239.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   239.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   299.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[   299.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   359.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   359.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   419.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[   419.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   479.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   479.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[   506.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   506.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e30b0]
>[   506.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e30b0] width 1920 pitch 7680 (/4 1920)
>[   506.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   506.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   506.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   506.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   506.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   507.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   507.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   507.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   507.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   508.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   508.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   508.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   508.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   508.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   508.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   508.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   508.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   508.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   508.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3130]
>[   508.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3130] width 1920 pitch 7680 (/4 1920)
>[   508.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e3050]
>[   508.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e3050] width 1920 pitch 7680 (/4 1920)
>[   508.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b24f0]
>[   508.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b24f0] width 1920 pitch 7680 (/4 1920)
>[   508.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b2490]
>[   508.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b2490] width 1920 pitch 7680 (/4 1920)
>[   509.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b27f0]
>[   509.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b27f0] width 1920 pitch 7680 (/4 1920)
>[   509.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b2790]
>[   509.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b2790] width 1920 pitch 7680 (/4 1920)
>[   509.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b27f0]
>[   509.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b27f0] width 1920 pitch 7680 (/4 1920)
>[   510.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b2790]
>[   510.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b2790] width 1920 pitch 7680 (/4 1920)
>[   510.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b27f0]
>[   510.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b27f0] width 1920 pitch 7680 (/4 1920)
>[   510.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b2790]
>[   510.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b2790] width 1920 pitch 7680 (/4 1920)
>[   510.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b27f0]
>[   510.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b27f0] width 1920 pitch 7680 (/4 1920)
>[   510.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15b2790]
>[   510.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15b2790] width 1920 pitch 7680 (/4 1920)
>[   513.373] (II) RADEON(0): EDID vendor "AUO", prod id 4589
>[   513.373] (II) RADEON(0): Printing DDC gathered Modelines:
>[   513.373] (II) RADEON(0): Modeline "1920x1080"x0.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[   515.604] (II) RADEON(0): EDID vendor "AUO", prod id 4589
>[   515.604] (II) RADEON(0): Printing DDC gathered Modelines:
>[   515.604] (II) RADEON(0): Modeline "1920x1080"x0.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[   516.529] (II) RADEON(0): EDID vendor "AUO", prod id 4589
>[   516.529] (II) RADEON(0): Printing DDC gathered Modelines:
>[   516.529] (II) RADEON(0): Modeline "1920x1080"x0.0  139.00  1920 1950 1970 2014  1080 1090 1100 1150 +hsync -vsync (69.0 kHz eP)
>[   533.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162ac50]
>[   533.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162ac50] width 1920 pitch 7680 (/4 1920)
>[   534.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162b000]
>[   534.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162b000] width 1920 pitch 7680 (/4 1920)
>[   534.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162b2c0]
>[   535.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162b2c0] width 1920 pitch 7680 (/4 1920)
>[   535.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162b000]
>[   535.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162b000] width 1920 pitch 7680 (/4 1920)
>[   535.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162b2c0]
>[   535.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162b2c0] width 1920 pitch 7680 (/4 1920)
>[   535.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   535.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   535.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   535.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   535.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   536.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   536.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   536.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   536.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   536.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632fe0]
>[   536.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632fe0] width 1920 pitch 7680 (/4 1920)
>[   536.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   536.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   538.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e90]
>[   538.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e90] width 1920 pitch 7680 (/4 1920)
>[   538.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   538.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   542.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   542.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   544.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   544.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   544.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   544.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   545.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   545.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   545.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1632e10]
>[   545.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1632e10] width 1920 pitch 7680 (/4 1920)
>[   546.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   546.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   546.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   546.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   546.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   546.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   546.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   546.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   546.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   546.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   546.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   546.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   546.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   546.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   546.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   546.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   547.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   547.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   547.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   547.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   548.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   548.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   548.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   548.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   548.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   548.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   549.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   549.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   549.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633330]
>[   549.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633330] width 1920 pitch 7680 (/4 1920)
>[   549.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   549.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   549.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   549.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   549.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   549.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   549.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1637a50]
>[   549.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1637a50] width 1920 pitch 7680 (/4 1920)
>[   549.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633bb0]
>[   549.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633bb0] width 1920 pitch 7680 (/4 1920)
>[   549.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1637a50]
>[   549.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1637a50] width 1920 pitch 7680 (/4 1920)
>[   549.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x163a8f0]
>[   549.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x163a8f0] width 1920 pitch 7680 (/4 1920)
>[   549.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1637a50]
>[   549.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1637a50] width 1920 pitch 7680 (/4 1920)
>[   549.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x166cbb0]
>[   549.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x166cbb0] width 1920 pitch 7680 (/4 1920)
>[   549.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16857c0]
>[   549.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16857c0] width 1920 pitch 7680 (/4 1920)
>[   567.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   567.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   567.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   567.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   567.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   567.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   567.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   567.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   567.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   567.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   567.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   567.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   567.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   568.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   568.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   568.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   568.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   568.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   568.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   568.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   568.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   568.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   568.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   568.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   568.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   568.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   568.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   568.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   568.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   570.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   570.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   570.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   570.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   571.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   571.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   572.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687470]
>[   572.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687470] width 1920 pitch 7680 (/4 1920)
>[   572.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633010]
>[   572.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633010] width 1920 pitch 7680 (/4 1920)
>[   584.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   584.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1650a50]
>[   584.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1650a50] width 1920 pitch 7680 (/4 1920)
>[   584.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164c980]
>[   584.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164c980] width 1920 pitch 7680 (/4 1920)
>[   585.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16db410]
>[   585.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16db410] width 1920 pitch 7680 (/4 1920)
>[   585.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1735510]
>[   585.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1735510] width 1920 pitch 7680 (/4 1920)
>[   585.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x178ffa0]
>[   585.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x178ffa0] width 1920 pitch 7680 (/4 1920)
>[   586.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170c450]
>[   586.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170c450] width 1920 pitch 7680 (/4 1920)
>[   598.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e85f0]
>[   598.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e85f0] width 1920 pitch 7680 (/4 1920)
>[   598.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e5640]
>[   598.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e5640] width 1920 pitch 7680 (/4 1920)
>[   598.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162fe00]
>[   598.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162fe00] width 1920 pitch 7680 (/4 1920)
>[   598.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x162fe00]
>[   598.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x162fe00] width 1920 pitch 7680 (/4 1920)
>[   598.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e5640]
>[   598.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e5640] width 1920 pitch 7680 (/4 1920)
>[   598.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e59c0]
>[   598.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e59c0] width 1920 pitch 7680 (/4 1920)
>[   598.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e59c0]
>[   598.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e59c0] width 1920 pitch 7680 (/4 1920)
>[   599.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e7180]
>[   599.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e7180] width 1920 pitch 7680 (/4 1920)
>[   600.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   600.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   600.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   600.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   601.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e58b0]
>[   601.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e58b0] width 1920 pitch 7680 (/4 1920)
>[   602.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e9fe0]
>[   602.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e9fe0] width 1920 pitch 7680 (/4 1920)
>[   602.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e58b0]
>[   602.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e58b0] width 1920 pitch 7680 (/4 1920)
>[   602.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e9fe0]
>[   602.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e9fe0] width 1920 pitch 7680 (/4 1920)
>[   602.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ee3a0]
>[   602.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ee3a0] width 1920 pitch 7680 (/4 1920)
>[   602.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e58b0]
>[   602.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e58b0] width 1920 pitch 7680 (/4 1920)
>[   603.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e7f60]
>[   603.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e7f60] width 1920 pitch 7680 (/4 1920)
>[   603.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   603.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   603.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e83d0]
>[   603.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e83d0] width 1920 pitch 7680 (/4 1920)
>[   603.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e58b0]
>[   603.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e58b0] width 1920 pitch 7680 (/4 1920)
>[   604.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17eac60]
>[   604.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17eac60] width 1920 pitch 7680 (/4 1920)
>[   604.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17eac60]
>[   604.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17eac60] width 1920 pitch 7680 (/4 1920)
>[   604.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   604.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   604.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f5640]
>[   604.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f5640] width 1920 pitch 7680 (/4 1920)
>[   604.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   604.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   605.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f5520]
>[   605.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f5520] width 1920 pitch 7680 (/4 1920)
>[   605.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f9dc0]
>[   605.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f9dc0] width 1920 pitch 7680 (/4 1920)
>[   605.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2520]
>[   605.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2520] width 1920 pitch 7680 (/4 1920)
>[   605.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2160]
>[   605.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2160] width 1920 pitch 7680 (/4 1920)
>[   606.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2160]
>[   606.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2160] width 1920 pitch 7680 (/4 1920)
>[   606.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2520]
>[   606.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2520] width 1920 pitch 7680 (/4 1920)
>[   606.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f5520]
>[   606.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f5520] width 1920 pitch 7680 (/4 1920)
>[   608.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ee160]
>[   608.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ee160] width 1920 pitch 7680 (/4 1920)
>[   608.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab740]
>[   608.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab740] width 1920 pitch 7680 (/4 1920)
>[   608.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687cf0]
>[   608.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687cf0] width 1920 pitch 7680 (/4 1920)
>[   608.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16e7e30]
>[   608.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16e7e30] width 1920 pitch 7680 (/4 1920)
>[   608.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f0600]
>[   608.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f0600] width 1920 pitch 7680 (/4 1920)
>[   609.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bf70]
>[   609.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bf70] width 1920 pitch 7680 (/4 1920)
>[   609.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2520]
>[   609.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2520] width 1920 pitch 7680 (/4 1920)
>[   609.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bcc0]
>[   609.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bcc0] width 1920 pitch 7680 (/4 1920)
>[   609.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bcc0]
>[   609.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bcc0] width 1920 pitch 7680 (/4 1920)
>[   609.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bcc0]
>[   609.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bcc0] width 1920 pitch 7680 (/4 1920)
>[   609.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bcc0]
>[   609.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bcc0] width 1920 pitch 7680 (/4 1920)
>[   609.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164ac20]
>[   609.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164ac20] width 1920 pitch 7680 (/4 1920)
>[   609.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1801b80]
>[   609.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1801b80] width 1920 pitch 7680 (/4 1920)
>[   610.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170bfc0]
>[   610.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170bfc0] width 1920 pitch 7680 (/4 1920)
>[   611.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2a30]
>[   611.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2a30] width 1920 pitch 7680 (/4 1920)
>[   611.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16ad0b0]
>[   611.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16ad0b0] width 1920 pitch 7680 (/4 1920)
>[   611.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fd310]
>[   611.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fd310] width 1920 pitch 7680 (/4 1920)
>[   611.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16e7e30]
>[   611.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16e7e30] width 1920 pitch 7680 (/4 1920)
>[   613.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2520]
>[   613.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2520] width 1920 pitch 7680 (/4 1920)
>[   613.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x179c340]
>[   613.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x179c340] width 1920 pitch 7680 (/4 1920)
>[   613.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1729780]
>[   613.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1729780] width 1920 pitch 7680 (/4 1920)
>[   613.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17297e0]
>[   613.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17297e0] width 1920 pitch 7680 (/4 1920)
>[   613.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ac010]
>[   613.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ac010] width 1920 pitch 7680 (/4 1920)
>[   613.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ee410]
>[   613.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ee410] width 1920 pitch 7680 (/4 1920)
>[   615.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85b0]
>[   615.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85b0] width 1920 pitch 7680 (/4 1920)
>[   617.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8ab0]
>[   617.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8ab0] width 1920 pitch 7680 (/4 1920)
>[   617.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   617.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   617.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18452b0]
>[   617.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18452b0] width 1920 pitch 7680 (/4 1920)
>[   617.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18452b0]
>[   617.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18452b0] width 1920 pitch 7680 (/4 1920)
>[   617.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   617.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   617.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a600]
>[   617.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a600] width 1920 pitch 7680 (/4 1920)
>[   617.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16daa00]
>[   617.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16daa00] width 1920 pitch 7680 (/4 1920)
>[   617.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a600]
>[   617.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a600] width 1920 pitch 7680 (/4 1920)
>[   617.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16daa00]
>[   617.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16daa00] width 1920 pitch 7680 (/4 1920)
>[   618.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   618.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   618.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   618.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   618.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   618.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   618.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   618.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   618.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c20]
>[   618.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c20] width 1920 pitch 7680 (/4 1920)
>[   620.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   620.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   620.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16acfd0]
>[   620.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16acfd0] width 1920 pitch 7680 (/4 1920)
>[   620.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687cb0]
>[   620.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687cb0] width 1920 pitch 7680 (/4 1920)
>[   620.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a7e0]
>[   620.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a7e0] width 1920 pitch 7680 (/4 1920)
>[   620.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a6a0]
>[   620.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a6a0] width 1920 pitch 7680 (/4 1920)
>[   620.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1846ce0]
>[   620.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1846ce0] width 1920 pitch 7680 (/4 1920)
>[   620.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1849440]
>[   620.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1849440] width 1920 pitch 7680 (/4 1920)
>[   620.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x178fc00]
>[   620.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x178fc00] width 1920 pitch 7680 (/4 1920)
>[   620.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1849440]
>[   620.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1849440] width 1920 pitch 7680 (/4 1920)
>[   620.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e180]
>[   620.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e180] width 1920 pitch 7680 (/4 1920)
>[   620.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1849510]
>[   620.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1849510] width 1920 pitch 7680 (/4 1920)
>[   623.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1707f60]
>[   623.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1707f60] width 1920 pitch 7680 (/4 1920)
>[   623.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85a0]
>[   623.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85a0] width 1920 pitch 7680 (/4 1920)
>[   623.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c30]
>[   623.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c30] width 1920 pitch 7680 (/4 1920)
>[   623.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85a0]
>[   623.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85a0] width 1920 pitch 7680 (/4 1920)
>[   623.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1707f60]
>[   623.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1707f60] width 1920 pitch 7680 (/4 1920)
>[   623.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85a0]
>[   623.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85a0] width 1920 pitch 7680 (/4 1920)
>[   623.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e180]
>[   623.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e180] width 1920 pitch 7680 (/4 1920)
>[   623.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7710]
>[   623.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7710] width 1920 pitch 7680 (/4 1920)
>[   623.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7710]
>[   623.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7710] width 1920 pitch 7680 (/4 1920)
>[   623.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   623.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   624.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   624.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   624.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   624.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   625.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1847fa0]
>[   625.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1847fa0] width 1920 pitch 7680 (/4 1920)
>[   625.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e860]
>[   625.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e860] width 1920 pitch 7680 (/4 1920)
>[   625.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85a0]
>[   625.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85a0] width 1920 pitch 7680 (/4 1920)
>[   625.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   625.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   627.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f85a0]
>[   627.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f85a0] width 1920 pitch 7680 (/4 1920)
>[   627.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   627.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   628.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   628.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   628.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16892a0]
>[   628.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16892a0] width 1920 pitch 7680 (/4 1920)
>[   628.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1801c40]
>[   628.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1801c40] width 1920 pitch 7680 (/4 1920)
>[   628.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f2520]
>[   628.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f2520] width 1920 pitch 7680 (/4 1920)
>[   629.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1807cb0]
>[   629.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1807cb0] width 1920 pitch 7680 (/4 1920)
>[   629.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633690]
>[   629.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633690] width 1920 pitch 7680 (/4 1920)
>[   630.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8570]
>[   630.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8570] width 1920 pitch 7680 (/4 1920)
>[   631.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2680]
>[   631.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2680] width 1920 pitch 7680 (/4 1920)
>[   631.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17092c0]
>[   631.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17092c0] width 1920 pitch 7680 (/4 1920)
>[   631.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2680]
>[   631.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2680] width 1920 pitch 7680 (/4 1920)
>[   631.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184d1b0]
>[   631.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184d1b0] width 1920 pitch 7680 (/4 1920)
>[   631.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2680]
>[   631.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2680] width 1920 pitch 7680 (/4 1920)
>[   631.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170b5d0]
>[   631.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170b5d0] width 1920 pitch 7680 (/4 1920)
>[   631.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   631.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   631.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   631.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   631.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   632.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   632.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2680]
>[   632.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2680] width 1920 pitch 7680 (/4 1920)
>[   634.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7940]
>[   634.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7940] width 1920 pitch 7680 (/4 1920)
>[   635.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7940]
>[   635.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7940] width 1920 pitch 7680 (/4 1920)
>[   635.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7710]
>[   635.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7710] width 1920 pitch 7680 (/4 1920)
>[   636.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f2520]
>[   636.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f2520] width 1920 pitch 7680 (/4 1920)
>[   637.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16ab5e0]
>[   637.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16ab5e0] width 1920 pitch 7680 (/4 1920)
>[   644.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17aae50]
>[   644.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17aae50] width 1920 pitch 7680 (/4 1920)
>[   644.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17aae50]
>[   644.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17aae50] width 1920 pitch 7680 (/4 1920)
>[   644.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   644.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   644.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1844fa0]
>[   645.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1844fa0] width 1920 pitch 7680 (/4 1920)
>[   645.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1688ec0]
>[   645.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1688ec0] width 1920 pitch 7680 (/4 1920)
>[   645.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1844fa0]
>[   645.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1844fa0] width 1920 pitch 7680 (/4 1920)
>[   645.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1688ec0]
>[   645.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1688ec0] width 1920 pitch 7680 (/4 1920)
>[   645.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17aae50]
>[   645.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17aae50] width 1920 pitch 7680 (/4 1920)
>[   645.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1844fa0]
>[   645.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1844fa0] width 1920 pitch 7680 (/4 1920)
>[   645.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1688ec0]
>[   645.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1688ec0] width 1920 pitch 7680 (/4 1920)
>[   645.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1688ec0]
>[   645.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1688ec0] width 1920 pitch 7680 (/4 1920)
>[   645.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1844fa0]
>[   645.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1844fa0] width 1920 pitch 7680 (/4 1920)
>[   646.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687cb0]
>[   646.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687cb0] width 1920 pitch 7680 (/4 1920)
>[   646.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185f960]
>[   646.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185f960] width 1920 pitch 7680 (/4 1920)
>[   646.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687cb0]
>[   646.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687cb0] width 1920 pitch 7680 (/4 1920)
>[   646.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185fa10]
>[   646.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185fa10] width 1920 pitch 7680 (/4 1920)
>[   646.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1687cb0]
>[   646.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1687cb0] width 1920 pitch 7680 (/4 1920)
>[   646.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1862930]
>[   646.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1862930] width 1920 pitch 7680 (/4 1920)
>[   646.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16dad50]
>[   646.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16dad50] width 1920 pitch 7680 (/4 1920)
>[   646.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16ad0a0]
>[   646.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16ad0a0] width 1920 pitch 7680 (/4 1920)
>[   646.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c10]
>[   646.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c10] width 1920 pitch 7680 (/4 1920)
>[   646.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893740]
>[   646.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893740] width 1920 pitch 7680 (/4 1920)
>[   649.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1894370]
>[   649.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1894370] width 1920 pitch 7680 (/4 1920)
>[   650.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1689010]
>[   650.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1689010] width 1920 pitch 7680 (/4 1920)
>[   652.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   652.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   652.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4c40]
>[   652.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4c40] width 1920 pitch 7680 (/4 1920)
>[   652.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7750]
>[   652.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7750] width 1920 pitch 7680 (/4 1920)
>[   652.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   652.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   652.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c10]
>[   652.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c10] width 1920 pitch 7680 (/4 1920)
>[   652.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   652.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   652.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   652.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   652.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4c40]
>[   652.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4c40] width 1920 pitch 7680 (/4 1920)
>[   652.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c7750]
>[   652.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c7750] width 1920 pitch 7680 (/4 1920)
>[   652.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   652.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   655.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   655.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   655.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   655.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   655.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   655.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   655.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   655.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   655.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   655.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   655.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   655.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   655.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   655.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   655.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   655.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   655.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   655.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   655.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   655.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   655.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   655.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   655.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   655.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   655.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   655.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   655.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   655.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   656.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c10]
>[   656.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c10] width 1920 pitch 7680 (/4 1920)
>[   656.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   656.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   656.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   656.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   656.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   656.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   656.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174bb80]
>[   656.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174bb80] width 1920 pitch 7680 (/4 1920)
>[   656.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1856600]
>[   656.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1856600] width 1920 pitch 7680 (/4 1920)
>[   656.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   656.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   656.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   656.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   656.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   656.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   657.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   657.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   657.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   657.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   658.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16f8c10]
>[   658.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16f8c10] width 1920 pitch 7680 (/4 1920)
>[   659.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   659.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   659.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   659.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   660.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e730]
>[   660.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e730] width 1920 pitch 7680 (/4 1920)
>[   660.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184e4d0]
>[   661.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184e4d0] width 1920 pitch 7680 (/4 1920)
>[   661.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185ba80]
>[   661.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185ba80] width 1920 pitch 7680 (/4 1920)
>[   661.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c78e0]
>[   661.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c78e0] width 1920 pitch 7680 (/4 1920)
>[   661.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1809a00]
>[   661.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1809a00] width 1920 pitch 7680 (/4 1920)
>[   661.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1892e90]
>[   661.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1892e90] width 1920 pitch 7680 (/4 1920)
>[   661.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185ba80]
>[   661.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185ba80] width 1920 pitch 7680 (/4 1920)
>[   661.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a920]
>[   661.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a920] width 1920 pitch 7680 (/4 1920)
>[   661.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185ba80]
>[   661.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185ba80] width 1920 pitch 7680 (/4 1920)
>[   661.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a920]
>[   661.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a920] width 1920 pitch 7680 (/4 1920)
>[   661.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185ba80]
>[   661.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185ba80] width 1920 pitch 7680 (/4 1920)
>[   661.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c78e0]
>[   661.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c78e0] width 1920 pitch 7680 (/4 1920)
>[   661.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1809a00]
>[   661.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1809a00] width 1920 pitch 7680 (/4 1920)
>[   694.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f6380]
>[   694.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f6380] width 1920 pitch 7680 (/4 1920)
>[   694.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x186fc00]
>[   694.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x186fc00] width 1920 pitch 7680 (/4 1920)
>[   696.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18990b0]
>[   696.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18990b0] width 1920 pitch 7680 (/4 1920)
>[   696.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4be0]
>[   696.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4be0] width 1920 pitch 7680 (/4 1920)
>[   696.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18990b0]
>[   696.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18990b0] width 1920 pitch 7680 (/4 1920)
>[   696.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18990b0]
>[   696.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18990b0] width 1920 pitch 7680 (/4 1920)
>[   714.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x163b720]
>[   715.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x163b720] width 1920 pitch 7680 (/4 1920)
>[   739.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f6110]
>[   739.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f6110] width 1920 pitch 7680 (/4 1920)
>[   740.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f6110]
>[   740.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f6110] width 1920 pitch 7680 (/4 1920)
>[   740.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   740.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   742.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870100]
>[   742.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870100] width 1920 pitch 7680 (/4 1920)
>[   742.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870100]
>[   742.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870100] width 1920 pitch 7680 (/4 1920)
>[   746.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x179c0c0]
>[   746.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x179c0c0] width 1920 pitch 7680 (/4 1920)
>[   751.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x170a600]
>[   751.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x170a600] width 1920 pitch 7680 (/4 1920)
>[   758.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f86a0]
>[   758.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f86a0] width 1920 pitch 7680 (/4 1920)
>[   758.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x179c0c0]
>[   758.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x179c0c0] width 1920 pitch 7680 (/4 1920)
>[   759.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1735070]
>[   759.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1735070] width 1920 pitch 7680 (/4 1920)
>[   760.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   760.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1735070]
>[   760.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1735070] width 1920 pitch 7680 (/4 1920)
>[   760.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   760.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   760.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   760.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   760.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   760.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   760.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   760.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   760.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   760.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184aaf0]
>[   760.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184aaf0] width 1920 pitch 7680 (/4 1920)
>[   760.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f9f80]
>[   760.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f9f80] width 1920 pitch 7680 (/4 1920)
>[   760.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   760.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   760.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   760.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   760.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   760.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   760.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   760.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   760.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   760.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f9f80]
>[   760.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f9f80] width 1920 pitch 7680 (/4 1920)
>[   760.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f4b80]
>[   760.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f4b80] width 1920 pitch 7680 (/4 1920)
>[   760.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   760.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   760.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   760.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   760.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   760.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   760.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   760.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   778.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1870270]
>[   778.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1870270] width 1920 pitch 7680 (/4 1920)
>[   781.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x185b810]
>[   781.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x185b810] width 1920 pitch 7680 (/4 1920)
>[   781.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633510]
>[   781.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633510] width 1920 pitch 7680 (/4 1920)
>[   781.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1761d70]
>[   781.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1761d70] width 1920 pitch 7680 (/4 1920)
>[   782.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1633510]
>[   782.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1633510] width 1920 pitch 7680 (/4 1920)
>[   816.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2160]
>[   816.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2160] width 1920 pitch 7680 (/4 1920)
>[   817.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2160]
>[   817.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2160] width 1920 pitch 7680 (/4 1920)
>[   817.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b9500]
>[   817.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b9500] width 1920 pitch 7680 (/4 1920)
>[   880.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16075b0]
>[   880.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16075b0] width 1920 pitch 7680 (/4 1920)
>[   880.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bca60]
>[   880.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bca60] width 1920 pitch 7680 (/4 1920)
>[   880.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   880.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   881.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   881.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   881.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17aae20]
>[   881.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17aae20] width 1920 pitch 7680 (/4 1920)
>[   881.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189ff20]
>[   881.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189ff20] width 1920 pitch 7680 (/4 1920)
>[   881.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17636f0]
>[   881.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17636f0] width 1920 pitch 7680 (/4 1920)
>[   881.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18af8d0]
>[   881.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18af8d0] width 1920 pitch 7680 (/4 1920)
>[   881.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x181b7c0]
>[   881.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x181b7c0] width 1920 pitch 7680 (/4 1920)
>[   881.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4440]
>[   881.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4440] width 1920 pitch 7680 (/4 1920)
>[   881.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x181b7c0]
>[   881.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x181b7c0] width 1920 pitch 7680 (/4 1920)
>[   881.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4440]
>[   881.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4440] width 1920 pitch 7680 (/4 1920)
>[   881.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x181b7c0]
>[   881.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x181b7c0] width 1920 pitch 7680 (/4 1920)
>[   881.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15ef1b0]
>[   881.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15ef1b0] width 1920 pitch 7680 (/4 1920)
>[   881.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x181b7c0]
>[   881.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x181b7c0] width 1920 pitch 7680 (/4 1920)
>[   881.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b3b60]
>[   881.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b3b60] width 1920 pitch 7680 (/4 1920)
>[   885.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   885.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   885.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16075b0]
>[   885.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16075b0] width 1920 pitch 7680 (/4 1920)
>[   885.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   885.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   885.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   885.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   885.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   885.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   885.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   885.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   885.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0cc0]
>[   885.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0cc0] width 1920 pitch 7680 (/4 1920)
>[   885.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16075b0]
>[   885.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16075b0] width 1920 pitch 7680 (/4 1920)
>[   885.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   885.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   885.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   885.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   885.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   885.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   885.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   885.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   885.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   885.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   885.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0cc0]
>[   885.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0cc0] width 1920 pitch 7680 (/4 1920)
>[   885.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16075b0]
>[   885.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16075b0] width 1920 pitch 7680 (/4 1920)
>[   885.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   885.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   885.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   885.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   885.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   885.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   885.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   885.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   885.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   885.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   885.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   885.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   885.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0cc0]
>[   885.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0cc0] width 1920 pitch 7680 (/4 1920)
>[   889.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5b50]
>[   889.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5b50] width 1920 pitch 7680 (/4 1920)
>[   895.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c11b0]
>[   895.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c11b0] width 1920 pitch 7680 (/4 1920)
>[   895.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   895.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   895.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[   895.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[   895.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   895.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   895.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4500]
>[   895.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4500] width 1920 pitch 7680 (/4 1920)
>[   895.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5b50]
>[   895.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5b50] width 1920 pitch 7680 (/4 1920)
>[   895.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[   895.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[   895.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   895.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   895.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[   895.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[   895.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1801930]
>[   895.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1801930] width 1920 pitch 7680 (/4 1920)
>[   945.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1634390]
>[   945.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1634390] width 1920 pitch 7680 (/4 1920)
>[   946.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1634390]
>[   946.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1634390] width 1920 pitch 7680 (/4 1920)
>[   946.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   946.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   947.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1634390]
>[   947.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1634390] width 1920 pitch 7680 (/4 1920)
>[   947.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   947.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   947.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   947.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   947.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   947.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   947.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[   947.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[   947.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   947.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   947.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   947.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   947.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   947.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   947.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[   947.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[   947.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   947.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   947.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   947.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   947.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   947.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   947.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   947.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   947.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1762520]
>[   947.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1762520] width 1920 pitch 7680 (/4 1920)
>[   947.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   947.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   963.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   963.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   964.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   964.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   964.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   964.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   964.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16edc00]
>[   964.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16edc00] width 1920 pitch 7680 (/4 1920)
>[   964.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   964.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   964.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4630]
>[   964.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4630] width 1920 pitch 7680 (/4 1920)
>[   964.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   964.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   964.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   964.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   964.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   964.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   964.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16edc00]
>[   964.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16edc00] width 1920 pitch 7680 (/4 1920)
>[   964.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   964.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   964.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4630]
>[   964.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4630] width 1920 pitch 7680 (/4 1920)
>[   964.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   964.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   964.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   964.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   964.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   964.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   964.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16edc00]
>[   964.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16edc00] width 1920 pitch 7680 (/4 1920)
>[   964.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   964.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   964.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c4630]
>[   964.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c4630] width 1920 pitch 7680 (/4 1920)
>[   964.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   964.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   964.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   964.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   964.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   964.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   964.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16edc00]
>[   964.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16edc00] width 1920 pitch 7680 (/4 1920)
>[   964.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   964.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   964.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1797160]
>[   964.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1797160] width 1920 pitch 7680 (/4 1920)
>[   964.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   964.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   972.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   972.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   972.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   972.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   972.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6a90]
>[   972.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6a90] width 1920 pitch 7680 (/4 1920)
>[   979.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1708b00]
>[   979.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1708b00] width 1920 pitch 7680 (/4 1920)
>[   979.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   979.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   979.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   979.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   979.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   979.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   979.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   979.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   979.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f83f0]
>[   979.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f83f0] width 1920 pitch 7680 (/4 1920)
>[   979.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   979.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   979.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   979.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[   979.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[   979.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[   979.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17125e0]
>[   979.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17125e0] width 1920 pitch 7680 (/4 1920)
>[   979.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[   979.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[   979.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16edc00]
>[   979.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16edc00] width 1920 pitch 7680 (/4 1920)
>[   979.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f83f0]
>[   979.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f83f0] width 1920 pitch 7680 (/4 1920)
>[   979.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17fc740]
>[   979.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17fc740] width 1920 pitch 7680 (/4 1920)
>[   979.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189e7b0]
>[   979.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189e7b0] width 1920 pitch 7680 (/4 1920)
>[   979.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1859780]
>[   979.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1859780] width 1920 pitch 7680 (/4 1920)
>[  1464.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1464.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1464.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1464.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1464.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1468.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6a10]
>[  1468.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6a10] width 1920 pitch 7680 (/4 1920)
>[  1468.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6940]
>[  1468.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6940] width 1920 pitch 7680 (/4 1920)
>[  1468.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f67a0]
>[  1468.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f67a0] width 1920 pitch 7680 (/4 1920)
>[  1468.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6940]
>[  1468.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6940] width 1920 pitch 7680 (/4 1920)
>[  1468.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1468.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1468.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6940]
>[  1468.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6940] width 1920 pitch 7680 (/4 1920)
>[  1468.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184ec10]
>[  1468.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184ec10] width 1920 pitch 7680 (/4 1920)
>[  1469.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6940]
>[  1469.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6940] width 1920 pitch 7680 (/4 1920)
>[  1469.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184ec10]
>[  1469.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184ec10] width 1920 pitch 7680 (/4 1920)
>[  1469.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184ec10]
>[  1469.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184ec10] width 1920 pitch 7680 (/4 1920)
>[  1469.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184ec10]
>[  1469.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184ec10] width 1920 pitch 7680 (/4 1920)
>[  1469.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x184ec10]
>[  1469.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x184ec10] width 1920 pitch 7680 (/4 1920)
>[  1469.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f68b0]
>[  1469.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f68b0] width 1920 pitch 7680 (/4 1920)
>[  1469.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f67a0]
>[  1469.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f67a0] width 1920 pitch 7680 (/4 1920)
>[  1469.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6890]
>[  1469.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6890] width 1920 pitch 7680 (/4 1920)
>[  1469.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1469.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6740]
>[  1469.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6740] width 1920 pitch 7680 (/4 1920)
>[  1469.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c5c40]
>[  1469.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c5c40] width 1920 pitch 7680 (/4 1920)
>[  1785.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  1785.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  1786.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bda90]
>[  1786.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bda90] width 1920 pitch 7680 (/4 1920)
>[  1786.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab5d0]
>[  1786.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab5d0] width 1920 pitch 7680 (/4 1920)
>[  1789.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b89d0]
>[  1789.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b89d0] width 1920 pitch 7680 (/4 1920)
>[  1803.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194f350]
>[  1803.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194f350] width 1920 pitch 7680 (/4 1920)
>[  1819.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190df60]
>[  1819.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190df60] width 1920 pitch 7680 (/4 1920)
>[  1819.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c7df0]
>[  1819.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c7df0] width 1920 pitch 7680 (/4 1920)
>[  1819.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1946900]
>[  1819.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1946900] width 1920 pitch 7680 (/4 1920)
>[  1820.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19473d0]
>[  1820.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19473d0] width 1920 pitch 7680 (/4 1920)
>[  1944.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1947740]
>[  1944.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1947740] width 1920 pitch 7680 (/4 1920)
>[  1944.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1947740]
>[  1944.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1947740] width 1920 pitch 7680 (/4 1920)
>[  1944.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1947140]
>[  1944.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1947140] width 1920 pitch 7680 (/4 1920)
>[  2177.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2177.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2178.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2178.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2178.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2178.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2179.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2179.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2179.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2179.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2179.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2179.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2179.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2179.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2179.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2179.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2179.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2179.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2179.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2179.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2179.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2179.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2179.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2179.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2179.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2179.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2180.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2180.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2180.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2180.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2180.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2180.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2180.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2180.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2180.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2180.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2180.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2180.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2180.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2180.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2180.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2180.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2180.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2180.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2180.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2180.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2180.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2180.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2180.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2180.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2180.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2180.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2180.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2180.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2180.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2181.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2181.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2181.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2181.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2181.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2181.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2181.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2181.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2181.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2181.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2181.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2181.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2181.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2181.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2181.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2181.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2181.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2181.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2181.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2182.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2182.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2182.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2182.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2182.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1995b60]
>[  2182.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1995b60] width 1920 pitch 7680 (/4 1920)
>[  2182.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1995b40]
>[  2182.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1995b40] width 1920 pitch 7680 (/4 1920)
>[  2182.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2182.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2182.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1995c70]
>[  2182.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1995c70] width 1920 pitch 7680 (/4 1920)
>[  2182.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2182.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2182.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19987f0]
>[  2182.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19987f0] width 1920 pitch 7680 (/4 1920)
>[  2182.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989a0]
>[  2182.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989a0] width 1920 pitch 7680 (/4 1920)
>[  2182.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927d00]
>[  2182.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927d00] width 1920 pitch 7680 (/4 1920)
>[  2182.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1947610]
>[  2182.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1947610] width 1920 pitch 7680 (/4 1920)
>[  2189.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c6d50]
>[  2189.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c6d50] width 1920 pitch 7680 (/4 1920)
>[  2191.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ab970]
>[  2191.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ab970] width 1920 pitch 7680 (/4 1920)
>[  2191.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2191.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2191.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927b90]
>[  2191.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927b90] width 1920 pitch 7680 (/4 1920)
>[  2191.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2191.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2191.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2191.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2191.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2191.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2191.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2191.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2191.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2191.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194df80]
>[  2191.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194df80] width 1920 pitch 7680 (/4 1920)
>[  2191.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2191.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a690]
>[  2191.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a690] width 1920 pitch 7680 (/4 1920)
>[  2191.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2191.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a690]
>[  2191.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a690] width 1920 pitch 7680 (/4 1920)
>[  2191.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b2650]
>[  2191.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b2650] width 1920 pitch 7680 (/4 1920)
>[  2310.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1990e50]
>[  2310.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1990e50] width 1920 pitch 7680 (/4 1920)
>[  2311.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893a40]
>[  2311.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893a40] width 1920 pitch 7680 (/4 1920)
>[  2311.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  2311.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  2311.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf0a0]
>[  2311.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf0a0] width 1920 pitch 7680 (/4 1920)
>[  2311.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893a40]
>[  2311.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893a40] width 1920 pitch 7680 (/4 1920)
>[  2311.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  2311.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  2311.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf0a0]
>[  2311.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf0a0] width 1920 pitch 7680 (/4 1920)
>[  2311.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893a40]
>[  2311.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893a40] width 1920 pitch 7680 (/4 1920)
>[  2311.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  2311.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  2312.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893a40]
>[  2312.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893a40] width 1920 pitch 7680 (/4 1920)
>[  2312.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf0a0]
>[  2312.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf0a0] width 1920 pitch 7680 (/4 1920)
>[  2312.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1608210]
>[  2312.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1608210] width 1920 pitch 7680 (/4 1920)
>[  2312.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf0a0]
>[  2312.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf0a0] width 1920 pitch 7680 (/4 1920)
>[  2396.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1893a40]
>[  2396.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1893a40] width 1920 pitch 7680 (/4 1920)
>[  2396.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ca430]
>[  2396.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ca430] width 1920 pitch 7680 (/4 1920)
>[  2396.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1991d70]
>[  2396.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1991d70] width 1920 pitch 7680 (/4 1920)
>[  2760.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2760.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2761.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf970]
>[  2761.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf970] width 1920 pitch 7680 (/4 1920)
>[  2761.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b37b0]
>[  2761.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b37b0] width 1920 pitch 7680 (/4 1920)
>[  2780.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  2780.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  2781.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1990c70]
>[  2781.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1990c70] width 1920 pitch 7680 (/4 1920)
>[  2781.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1990c70]
>[  2781.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1990c70] width 1920 pitch 7680 (/4 1920)
>[  2788.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2788.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2788.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c9cd0]
>[  2788.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c9cd0] width 1920 pitch 7680 (/4 1920)
>[  2789.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e58b0]
>[  2789.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e58b0] width 1920 pitch 7680 (/4 1920)
>[  2789.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2789.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2789.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19475d0]
>[  2789.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19475d0] width 1920 pitch 7680 (/4 1920)
>[  2789.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19475d0]
>[  2789.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19475d0] width 1920 pitch 7680 (/4 1920)
>[  2789.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194a070]
>[  2789.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194a070] width 1920 pitch 7680 (/4 1920)
>[  2932.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c3fc0]
>[  2932.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c3fc0] width 1920 pitch 7680 (/4 1920)
>[  2932.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1990930]
>[  2932.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1990930] width 1920 pitch 7680 (/4 1920)
>[  2932.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18d4a60]
>[  2932.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18d4a60] width 1920 pitch 7680 (/4 1920)
>[  2955.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923470]
>[  2955.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923470] width 1920 pitch 7680 (/4 1920)
>[  2955.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2955.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2955.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2955.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2955.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c260]
>[  2955.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c260] width 1920 pitch 7680 (/4 1920)
>[  2955.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2955.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2955.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c9cd0]
>[  2955.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c9cd0] width 1920 pitch 7680 (/4 1920)
>[  2955.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2955.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2955.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2955.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2955.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923210]
>[  2955.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923210] width 1920 pitch 7680 (/4 1920)
>[  2955.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2955.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2955.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c260]
>[  2955.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c260] width 1920 pitch 7680 (/4 1920)
>[  2955.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2955.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2955.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c9cd0]
>[  2955.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c9cd0] width 1920 pitch 7680 (/4 1920)
>[  2955.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923210]
>[  2955.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923210] width 1920 pitch 7680 (/4 1920)
>[  2955.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2955.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2955.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c260]
>[  2955.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c260] width 1920 pitch 7680 (/4 1920)
>[  2955.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2955.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2955.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c9cd0]
>[  2955.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c9cd0] width 1920 pitch 7680 (/4 1920)
>[  2955.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923210]
>[  2955.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923210] width 1920 pitch 7680 (/4 1920)
>[  2955.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2955.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2956.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2956.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2956.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923210]
>[  2956.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923210] width 1920 pitch 7680 (/4 1920)
>[  2956.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2956.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2956.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c260]
>[  2956.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c260] width 1920 pitch 7680 (/4 1920)
>[  2956.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927490]
>[  2956.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927490] width 1920 pitch 7680 (/4 1920)
>[  2956.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c9cd0]
>[  2956.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c9cd0] width 1920 pitch 7680 (/4 1920)
>[  2956.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2956.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2971.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2971.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2971.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2971.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  2971.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b34c0]
>[  2971.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b34c0] width 1920 pitch 7680 (/4 1920)
>[  3016.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6ca0]
>[  3016.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6ca0] width 1920 pitch 7680 (/4 1920)
>[  3017.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c260]
>[  3017.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c260] width 1920 pitch 7680 (/4 1920)
>[  3017.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194db20]
>[  3017.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194db20] width 1920 pitch 7680 (/4 1920)
>[  3017.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b3650]
>[  3017.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b3650] width 1920 pitch 7680 (/4 1920)
>[  3017.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b3650]
>[  3017.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b3650] width 1920 pitch 7680 (/4 1920)
>[  3017.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194db20]
>[  3017.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194db20] width 1920 pitch 7680 (/4 1920)
>[  3017.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194db20]
>[  3017.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194db20] width 1920 pitch 7680 (/4 1920)
>[  3017.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1936e10]
>[  3017.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1936e10] width 1920 pitch 7680 (/4 1920)
>[  3017.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1936e10]
>[  3017.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1936e10] width 1920 pitch 7680 (/4 1920)
>[  3017.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1936e10]
>[  3017.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1936e10] width 1920 pitch 7680 (/4 1920)
>[  3017.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18c51c0]
>[  3017.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18c51c0] width 1920 pitch 7680 (/4 1920)
>[  3017.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1936e10]
>[  3017.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1936e10] width 1920 pitch 7680 (/4 1920)
>[  3018.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1932b40]
>[  3018.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1932b40] width 1920 pitch 7680 (/4 1920)
>[  3019.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bf600]
>[  3019.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bf600] width 1920 pitch 7680 (/4 1920)
>[  3086.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17f6c70]
>[  3086.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17f6c70] width 1920 pitch 7680 (/4 1920)
>[  3086.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194db20]
>[  3086.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194db20] width 1920 pitch 7680 (/4 1920)
>[  3097.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3097.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3097.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3097.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3097.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3097.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3097.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3097.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3097.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3097.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3097.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3097.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3097.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3097.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3097.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3098.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3098.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3098.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3098.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3098.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3098.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190b9d0]
>[  3098.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190b9d0] width 1920 pitch 7680 (/4 1920)
>[  3098.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3098.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3100.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1926780]
>[  3100.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1926780] width 1920 pitch 7680 (/4 1920)
>[  3101.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19348e0]
>[  3102.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19348e0] width 1920 pitch 7680 (/4 1920)
>[  3102.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3102.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3102.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3102.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3102.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19348e0]
>[  3102.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19348e0] width 1920 pitch 7680 (/4 1920)
>[  3102.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3102.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3102.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ed8f0]
>[  3102.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ed8f0] width 1920 pitch 7680 (/4 1920)
>[  3102.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924520]
>[  3102.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924520] width 1920 pitch 7680 (/4 1920)
>[  3102.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933bb0]
>[  3102.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933bb0] width 1920 pitch 7680 (/4 1920)
>[  3102.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3102.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3102.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19348e0]
>[  3102.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19348e0] width 1920 pitch 7680 (/4 1920)
>[  3102.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b2940]
>[  3102.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b2940] width 1920 pitch 7680 (/4 1920)
>[  3102.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ed8f0]
>[  3102.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ed8f0] width 1920 pitch 7680 (/4 1920)
>[  3103.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3103.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1933c60]
>[  3105.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1933c60] width 1920 pitch 7680 (/4 1920)
>[  3105.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1924820]
>[  3105.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1924820] width 1920 pitch 7680 (/4 1920)
>[  3105.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3105.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x194aa00]
>[  3105.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x194aa00] width 1920 pitch 7680 (/4 1920)
>[  3120.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993650]
>[  3120.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993650] width 1920 pitch 7680 (/4 1920)
>[  3120.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190cba0]
>[  3120.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190cba0] width 1920 pitch 7680 (/4 1920)
>[  3123.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993de0]
>[  3123.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993de0] width 1920 pitch 7680 (/4 1920)
>[  3124.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1941980]
>[  3124.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1941980] width 1920 pitch 7680 (/4 1920)
>[  3126.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1932bf0]
>[  3126.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1932bf0] width 1920 pitch 7680 (/4 1920)
>[  3127.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192fd90]
>[  3127.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192fd90] width 1920 pitch 7680 (/4 1920)
>[  3127.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ccd00]
>[  3127.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ccd00] width 1920 pitch 7680 (/4 1920)
>[  3128.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ccd00]
>[  3129.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ccd00] width 1920 pitch 7680 (/4 1920)
>[  3129.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940fd0]
>[  3129.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940fd0] width 1920 pitch 7680 (/4 1920)
>[  3129.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bd3d0]
>[  3129.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bd3d0] width 1920 pitch 7680 (/4 1920)
>[  3129.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1686d80]
>[  3129.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1686d80] width 1920 pitch 7680 (/4 1920)
>[  3129.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1934840]
>[  3129.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1934840] width 1920 pitch 7680 (/4 1920)
>[  3188.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1930b10]
>[  3188.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1930b10] width 1920 pitch 7680 (/4 1920)
>[  3188.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1930b10]
>[  3188.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1930b10] width 1920 pitch 7680 (/4 1920)
>[  3188.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1930b10]
>[  3188.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1930b10] width 1920 pitch 7680 (/4 1920)
>[  3189.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940fa0]
>[  3189.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940fa0] width 1920 pitch 7680 (/4 1920)
>[  3191.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19223b0]
>[  3191.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19223b0] width 1920 pitch 7680 (/4 1920)
>[  3224.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b1750]
>[  3224.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b1750] width 1920 pitch 7680 (/4 1920)
>[  3226.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c360]
>[  3226.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c360] width 1920 pitch 7680 (/4 1920)
>[  3226.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192d7a0]
>[  3226.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192d7a0] width 1920 pitch 7680 (/4 1920)
>[  3226.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1935820]
>[  3226.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1935820] width 1920 pitch 7680 (/4 1920)
>[  3233.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192d7a0]
>[  3233.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192d7a0] width 1920 pitch 7680 (/4 1920)
>[  3234.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192afe0]
>[  3234.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192afe0] width 1920 pitch 7680 (/4 1920)
>[  3234.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192a9f0]
>[  3234.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192a9f0] width 1920 pitch 7680 (/4 1920)
>[  3234.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18d8b90]
>[  3234.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18d8b90] width 1920 pitch 7680 (/4 1920)
>[  3236.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1930b10]
>[  3236.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1930b10] width 1920 pitch 7680 (/4 1920)
>[  3241.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1930b10]
>[  3241.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1930b10] width 1920 pitch 7680 (/4 1920)
>[  3242.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b1c10]
>[  3242.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b1c10] width 1920 pitch 7680 (/4 1920)
>[  3242.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b4890]
>[  3242.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b4890] width 1920 pitch 7680 (/4 1920)
>[  3242.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927340]
>[  3242.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927340] width 1920 pitch 7680 (/4 1920)
>[  3242.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c280]
>[  3242.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c280] width 1920 pitch 7680 (/4 1920)
>[  3242.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b1750]
>[  3242.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b1750] width 1920 pitch 7680 (/4 1920)
>[  3246.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18eaf60]
>[  3246.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18eaf60] width 1920 pitch 7680 (/4 1920)
>[  3246.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940fa0]
>[  3246.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940fa0] width 1920 pitch 7680 (/4 1920)
>[  3246.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b16f0]
>[  3246.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b16f0] width 1920 pitch 7680 (/4 1920)
>[  3260.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c280]
>[  3260.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c280] width 1920 pitch 7680 (/4 1920)
>[  3261.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18d8c00]
>[  3261.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18d8c00] width 1920 pitch 7680 (/4 1920)
>[  3282.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1925010]
>[  3282.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1925010] width 1920 pitch 7680 (/4 1920)
>[  3282.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19441e0]
>[  3282.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19441e0] width 1920 pitch 7680 (/4 1920)
>[  3309.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192aad0]
>[  3309.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192aad0] width 1920 pitch 7680 (/4 1920)
>[  3310.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b4890]
>[  3310.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b4890] width 1920 pitch 7680 (/4 1920)
>[  3310.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18eaf60]
>[  3310.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18eaf60] width 1920 pitch 7680 (/4 1920)
>[  3310.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b4890]
>[  3310.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b4890] width 1920 pitch 7680 (/4 1920)
>[  3310.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18eaf60]
>[  3310.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18eaf60] width 1920 pitch 7680 (/4 1920)
>[  3310.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b4890]
>[  3310.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b4890] width 1920 pitch 7680 (/4 1920)
>[  3310.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1936e80]
>[  3310.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1936e80] width 1920 pitch 7680 (/4 1920)
>[  3398.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1925590]
>[  3398.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1925590] width 1920 pitch 7680 (/4 1920)
>[  3398.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3398.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3398.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1925a90]
>[  3398.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1925a90] width 1920 pitch 7680 (/4 1920)
>[  3424.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927340]
>[  3424.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927340] width 1920 pitch 7680 (/4 1920)
>[  3424.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1945510]
>[  3424.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1945510] width 1920 pitch 7680 (/4 1920)
>[  3425.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1945510]
>[  3425.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1945510] width 1920 pitch 7680 (/4 1920)
>[  3425.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cba0]
>[  3425.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cba0] width 1920 pitch 7680 (/4 1920)
>[  3425.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927340]
>[  3425.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927340] width 1920 pitch 7680 (/4 1920)
>[  3425.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1945510]
>[  3425.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1945510] width 1920 pitch 7680 (/4 1920)
>[  3425.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cba0]
>[  3425.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cba0] width 1920 pitch 7680 (/4 1920)
>[  3425.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927340]
>[  3425.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927340] width 1920 pitch 7680 (/4 1920)
>[  3425.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1945510]
>[  3425.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1945510] width 1920 pitch 7680 (/4 1920)
>[  3425.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cba0]
>[  3425.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cba0] width 1920 pitch 7680 (/4 1920)
>[  3425.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927340]
>[  3425.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927340] width 1920 pitch 7680 (/4 1920)
>[  3425.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cba0]
>[  3425.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cba0] width 1920 pitch 7680 (/4 1920)
>[  3425.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cba0]
>[  3425.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cba0] width 1920 pitch 7680 (/4 1920)
>[  3425.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3425.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3425.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190cb60]
>[  3425.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190cb60] width 1920 pitch 7680 (/4 1920)
>[  3425.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923480]
>[  3425.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923480] width 1920 pitch 7680 (/4 1920)
>[  3425.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923480]
>[  3425.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923480] width 1920 pitch 7680 (/4 1920)
>[  3437.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18b8970]
>[  3437.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18b8970] width 1920 pitch 7680 (/4 1920)
>[  3437.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190cb60]
>[  3437.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190cb60] width 1920 pitch 7680 (/4 1920)
>[  3437.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b35d0]
>[  3437.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b35d0] width 1920 pitch 7680 (/4 1920)
>[  3437.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190cb60]
>[  3437.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190cb60] width 1920 pitch 7680 (/4 1920)
>[  3452.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192d770]
>[  3452.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192d770] width 1920 pitch 7680 (/4 1920)
>[  3453.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931d60]
>[  3453.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931d60] width 1920 pitch 7680 (/4 1920)
>[  3453.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18d8cf0]
>[  3453.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18d8cf0] width 1920 pitch 7680 (/4 1920)
>[  3474.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3474.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3474.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cde0]
>[  3474.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cde0] width 1920 pitch 7680 (/4 1920)
>[  3474.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1926530]
>[  3474.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1926530] width 1920 pitch 7680 (/4 1920)
>[  3474.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cde0]
>[  3474.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cde0] width 1920 pitch 7680 (/4 1920)
>[  3474.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1926530]
>[  3474.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1926530] width 1920 pitch 7680 (/4 1920)
>[  3474.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cde0]
>[  3474.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cde0] width 1920 pitch 7680 (/4 1920)
>[  3474.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1926530]
>[  3474.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1926530] width 1920 pitch 7680 (/4 1920)
>[  3474.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cde0]
>[  3474.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cde0] width 1920 pitch 7680 (/4 1920)
>[  3511.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19307f0]
>[  3511.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19307f0] width 1920 pitch 7680 (/4 1920)
>[  3512.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3512.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3512.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3512.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3512.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3512.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3512.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3512.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3512.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3512.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3512.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3512.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3512.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3512.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3512.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3512.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3512.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3512.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3512.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3513.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3513.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3513.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3513.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3513.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3513.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3513.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3513.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3513.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3513.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3513.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3513.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3513.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3513.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3513.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3513.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3513.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3513.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3513.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3513.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3513.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3513.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3513.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19989c0]
>[  3513.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19989c0] width 1920 pitch 7680 (/4 1920)
>[  3513.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928d70]
>[  3513.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928d70] width 1920 pitch 7680 (/4 1920)
>[  3513.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192ada0]
>[  3513.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192ada0] width 1920 pitch 7680 (/4 1920)
>[  3521.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3521.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3522.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18e9000]
>[  3522.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18e9000] width 1920 pitch 7680 (/4 1920)
>[  3522.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164ac90]
>[  3522.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164ac90] width 1920 pitch 7680 (/4 1920)
>[  3522.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19228c0]
>[  3522.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19228c0] width 1920 pitch 7680 (/4 1920)
>[  3522.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1937d20]
>[  3522.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1937d20] width 1920 pitch 7680 (/4 1920)
>[  3522.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18e9000]
>[  3522.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18e9000] width 1920 pitch 7680 (/4 1920)
>[  3522.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164ac90]
>[  3522.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164ac90] width 1920 pitch 7680 (/4 1920)
>[  3522.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19228c0]
>[  3522.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19228c0] width 1920 pitch 7680 (/4 1920)
>[  3522.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18e9000]
>[  3522.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18e9000] width 1920 pitch 7680 (/4 1920)
>[  3522.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164ac90]
>[  3522.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164ac90] width 1920 pitch 7680 (/4 1920)
>[  3522.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19228c0]
>[  3522.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19228c0] width 1920 pitch 7680 (/4 1920)
>[  3612.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914660]
>[  3612.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914660] width 1920 pitch 7680 (/4 1920)
>[  3613.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1991c10]
>[  3613.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1991c10] width 1920 pitch 7680 (/4 1920)
>[  3613.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19137c0]
>[  3613.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19137c0] width 1920 pitch 7680 (/4 1920)
>[  3659.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3659.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3659.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18d6050]
>[  3659.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18d6050] width 1920 pitch 7680 (/4 1920)
>[  3659.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3659.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3659.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19399a0]
>[  3659.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19399a0] width 1920 pitch 7680 (/4 1920)
>[  3659.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3659.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3659.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b31b0]
>[  3659.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b31b0] width 1920 pitch 7680 (/4 1920)
>[  3659.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3659.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3659.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b31b0]
>[  3659.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b31b0] width 1920 pitch 7680 (/4 1920)
>[  3659.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1927f80]
>[  3659.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1927f80] width 1920 pitch 7680 (/4 1920)
>[  3659.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193c490]
>[  3659.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193c490] width 1920 pitch 7680 (/4 1920)
>[  3659.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  3659.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  3659.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3659.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193adc0]
>[  3659.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193adc0] width 1920 pitch 7680 (/4 1920)
>[  3659.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1940e00]
>[  3659.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1940e00] width 1920 pitch 7680 (/4 1920)
>[  3671.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3671.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3672.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3672.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3673.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3673.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3673.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3673.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3673.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c9e0]
>[  3673.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c9e0] width 1920 pitch 7680 (/4 1920)
>[  3673.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3673.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3673.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  3673.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  3673.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c9e0]
>[  3673.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c9e0] width 1920 pitch 7680 (/4 1920)
>[  3673.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3673.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3673.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3673.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3673.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  3673.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  3673.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3673.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3673.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  3673.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  3673.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1923fc0]
>[  3673.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1923fc0] width 1920 pitch 7680 (/4 1920)
>[  3770.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  3770.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  3770.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3770.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3770.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3770.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3770.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3770.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3770.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3770.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3770.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3770.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3770.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3770.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3770.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3770.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3770.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3770.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3770.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3770.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3770.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3770.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3770.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3771.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3771.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3771.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3771.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3771.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3804.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993690]
>[  3804.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993690] width 1920 pitch 7680 (/4 1920)
>[  3804.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993690]
>[  3804.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993690] width 1920 pitch 7680 (/4 1920)
>[  3804.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3804.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3804.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bdf90]
>[  3804.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bdf90] width 1920 pitch 7680 (/4 1920)
>[  3817.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3817.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3817.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3817.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3817.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3817.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3817.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3817.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3817.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3817.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3817.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3817.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3817.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bdf90]
>[  3817.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bdf90] width 1920 pitch 7680 (/4 1920)
>[  3817.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3817.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3817.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993690]
>[  3817.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993690] width 1920 pitch 7680 (/4 1920)
>[  3817.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3817.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3817.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3818.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3818.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3818.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3818.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1919990]
>[  3818.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1919990] width 1920 pitch 7680 (/4 1920)
>[  3818.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1931c10]
>[  3818.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1931c10] width 1920 pitch 7680 (/4 1920)
>[  3818.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18bdf90]
>[  3818.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18bdf90] width 1920 pitch 7680 (/4 1920)
>[  3818.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193e620]
>[  3818.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193e620] width 1920 pitch 7680 (/4 1920)
>[  3818.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1993690]
>[  3818.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1993690] width 1920 pitch 7680 (/4 1920)
>[  3818.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3818.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3818.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910cd0]
>[  3818.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910cd0] width 1920 pitch 7680 (/4 1920)
>[  3818.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192da70]
>[  3818.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192da70] width 1920 pitch 7680 (/4 1920)
>[  3818.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3818.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3840.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19331e0]
>[  3840.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19331e0] width 1920 pitch 7680 (/4 1920)
>[  3840.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199fb40]
>[  3840.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199fb40] width 1920 pitch 7680 (/4 1920)
>[  3935.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bda00]
>[  3935.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bda00] width 1920 pitch 7680 (/4 1920)
>[  3935.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b02b0]
>[  3935.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b02b0] width 1920 pitch 7680 (/4 1920)
>[  4265.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ae020]
>[  4265.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ae020] width 1920 pitch 7680 (/4 1920)
>[  4265.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ae020]
>[  4265.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ae020] width 1920 pitch 7680 (/4 1920)
>[  4265.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bed70]
>[  4265.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bed70] width 1920 pitch 7680 (/4 1920)
>[  4265.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ae020]
>[  4265.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ae020] width 1920 pitch 7680 (/4 1920)
>[  4269.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  4269.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  4269.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  4269.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  4269.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  4269.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  4269.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1928a90]
>[  4269.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1928a90] width 1920 pitch 7680 (/4 1920)
>[  4269.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  4269.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  4269.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  4269.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  4269.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  4269.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  4269.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  4269.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  4269.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bee70]
>[  4269.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bee70] width 1920 pitch 7680 (/4 1920)
>[  4269.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  4269.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  4272.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bee70]
>[  4272.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bee70] width 1920 pitch 7680 (/4 1920)
>[  4272.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a4df0]
>[  4272.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a4df0] width 1920 pitch 7680 (/4 1920)
>[  4272.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e00]
>[  4272.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e00] width 1920 pitch 7680 (/4 1920)
>[  4272.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e00]
>[  4272.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e00] width 1920 pitch 7680 (/4 1920)
>[  4272.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e00]
>[  4272.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e00] width 1920 pitch 7680 (/4 1920)
>[  4272.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  4272.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  4272.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d77b0]
>[  4272.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d77b0] width 1920 pitch 7680 (/4 1920)
>[  4272.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4272.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1999360]
>[  4272.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1999360] width 1920 pitch 7680 (/4 1920)
>[  4337.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  4337.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  4338.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4338.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c59b0]
>[  4343.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c59b0] width 1920 pitch 7680 (/4 1920)
>[  4343.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4343.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4343.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4343.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4343.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4343.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4343.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4343.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4343.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4343.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4343.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4343.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4343.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4344.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4344.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4344.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4344.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4344.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4344.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x193d920]
>[  4344.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x193d920] width 1920 pitch 7680 (/4 1920)
>[  4344.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b81e0]
>[  4344.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b81e0] width 1920 pitch 7680 (/4 1920)
>[  4346.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d79f0]
>[  4346.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d79f0] width 1920 pitch 7680 (/4 1920)
>[  4346.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a2720]
>[  4346.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a2720] width 1920 pitch 7680 (/4 1920)
>[  4346.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c020]
>[  4346.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c020] width 1920 pitch 7680 (/4 1920)
>[  4346.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c9e0]
>[  4346.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c9e0] width 1920 pitch 7680 (/4 1920)
>[  4351.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c9e0]
>[  4351.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c9e0] width 1920 pitch 7680 (/4 1920)
>[  4577.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1917c60]
>[  4577.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1917c60] width 1920 pitch 7680 (/4 1920)
>[  4577.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1917c60]
>[  4577.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1917c60] width 1920 pitch 7680 (/4 1920)
>[  4579.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192c9e0]
>[  4579.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192c9e0] width 1920 pitch 7680 (/4 1920)
>[  4579.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19df2c0]
>[  4579.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19df2c0] width 1920 pitch 7680 (/4 1920)
>[  4579.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d97e0]
>[  4579.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d97e0] width 1920 pitch 7680 (/4 1920)
>[  4647.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19df2c0]
>[  4647.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19df2c0] width 1920 pitch 7680 (/4 1920)
>[  4647.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189f2f0]
>[  4647.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189f2f0] width 1920 pitch 7680 (/4 1920)
>[  4656.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x189f2f0]
>[  4656.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x189f2f0] width 1920 pitch 7680 (/4 1920)
>[  4656.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199e540]
>[  4656.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199e540] width 1920 pitch 7680 (/4 1920)
>[  4674.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19794d0]
>[  4674.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19794d0] width 1920 pitch 7680 (/4 1920)
>[  5027.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x197ff30]
>[  5027.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x197ff30] width 1920 pitch 7680 (/4 1920)
>[  5028.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9200]
>[  5028.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9200] width 1920 pitch 7680 (/4 1920)
>[  5523.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501000]
>[  5523.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501000] width 1920 pitch 7680 (/4 1920)
>[  5523.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501000]
>[  5523.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501000] width 1920 pitch 7680 (/4 1920)
>[  5525.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  5525.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  5527.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251a860]
>[  5527.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251a860] width 1920 pitch 7680 (/4 1920)
>[  5527.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1979b70]
>[  5527.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1979b70] width 1920 pitch 7680 (/4 1920)
>[  5527.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  5527.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  5527.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d530]
>[  5527.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d530] width 1920 pitch 7680 (/4 1920)
>[  5527.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  5527.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  5527.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5527.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5527.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5527.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5527.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  5527.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  5527.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  5527.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  5527.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506950]
>[  5527.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506950] width 1920 pitch 7680 (/4 1920)
>[  5527.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d530]
>[  5527.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d530] width 1920 pitch 7680 (/4 1920)
>[  5527.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5527.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5527.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5527.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5527.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250f500]
>[  5527.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250f500] width 1920 pitch 7680 (/4 1920)
>[  5527.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  5527.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  5527.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517320]
>[  5527.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517320] width 1920 pitch 7680 (/4 1920)
>[  5527.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  5527.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  5527.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  5527.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  5527.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5527.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5527.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  5527.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  5527.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  5527.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  5536.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  5536.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  5537.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2516330]
>[  5537.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2516330] width 1920 pitch 7680 (/4 1920)
>[  5537.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c2d60]
>[  5537.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c2d60] width 1920 pitch 7680 (/4 1920)
>[  5537.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2516530]
>[  5537.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2516530] width 1920 pitch 7680 (/4 1920)
>[  5537.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5537.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5580.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ee9d0]
>[  5580.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ee9d0] width 1920 pitch 7680 (/4 1920)
>[  5580.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  5580.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  5661.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d530]
>[  5661.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d530] width 1920 pitch 7680 (/4 1920)
>[  5661.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25212e0]
>[  5661.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25212e0] width 1920 pitch 7680 (/4 1920)
>[  5661.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ce250]
>[  5661.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ce250] width 1920 pitch 7680 (/4 1920)
>[  5661.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501000]
>[  5661.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501000] width 1920 pitch 7680 (/4 1920)
>[  5689.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  5689.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  5690.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ce250]
>[  5690.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ce250] width 1920 pitch 7680 (/4 1920)
>[  5690.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ca590]
>[  5690.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ca590] width 1920 pitch 7680 (/4 1920)
>[  5715.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ee9d0]
>[  5715.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ee9d0] width 1920 pitch 7680 (/4 1920)
>[  5715.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  5715.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  5715.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  5715.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  5715.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  5715.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  5715.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5760]
>[  5715.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5760] width 1920 pitch 7680 (/4 1920)
>[  5715.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5715.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5715.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5715.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5715.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e80]
>[  5715.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e80] width 1920 pitch 7680 (/4 1920)
>[  5715.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5715.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5715.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  5715.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  5715.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21cc520]
>[  5715.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21cc520] width 1920 pitch 7680 (/4 1920)
>[  5715.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  5715.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  5715.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c5db0]
>[  5715.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c5db0] width 1920 pitch 7680 (/4 1920)
>[  5715.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  5715.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  5715.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  5715.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  5715.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5760]
>[  5715.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5760] width 1920 pitch 7680 (/4 1920)
>[  5715.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  5715.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  5715.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5715.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5715.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5715.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5715.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5715.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5715.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  5715.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  5715.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  5715.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  5715.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  5715.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  5717.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  5717.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  5717.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517320]
>[  5717.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517320] width 1920 pitch 7680 (/4 1920)
>[  5803.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  5803.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  5803.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506950]
>[  5803.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506950] width 1920 pitch 7680 (/4 1920)
>[  5803.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25165f0]
>[  5803.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25165f0] width 1920 pitch 7680 (/4 1920)
>[  5812.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506950]
>[  5812.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506950] width 1920 pitch 7680 (/4 1920)
>[  5812.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  5812.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  5812.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5812.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5813.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  5813.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  5813.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1988320]
>[  5813.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1988320] width 1920 pitch 7680 (/4 1920)
>[  5813.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  5813.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  5813.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5813.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5813.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520620]
>[  5813.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520620] width 1920 pitch 7680 (/4 1920)
>[  5813.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5813.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5813.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21bb640]
>[  5813.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21bb640] width 1920 pitch 7680 (/4 1920)
>[  5813.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517320]
>[  5813.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517320] width 1920 pitch 7680 (/4 1920)
>[  5813.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1988320]
>[  5813.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1988320] width 1920 pitch 7680 (/4 1920)
>[  5813.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2513960]
>[  5813.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2513960] width 1920 pitch 7680 (/4 1920)
>[  5813.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21e01c0]
>[  5813.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21e01c0] width 1920 pitch 7680 (/4 1920)
>[  5813.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5814.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5814.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c3cb0]
>[  5814.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c3cb0] width 1920 pitch 7680 (/4 1920)
>[  5814.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2513960]
>[  5814.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2513960] width 1920 pitch 7680 (/4 1920)
>[  5814.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c3cb0]
>[  5814.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c3cb0] width 1920 pitch 7680 (/4 1920)
>[  5814.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  5814.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  5814.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199d840]
>[  5814.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199d840] width 1920 pitch 7680 (/4 1920)
>[  5815.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21df570]
>[  5815.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21df570] width 1920 pitch 7680 (/4 1920)
>[  5816.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19aced0]
>[  5816.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19aced0] width 1920 pitch 7680 (/4 1920)
>[  5816.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1988320]
>[  5816.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1988320] width 1920 pitch 7680 (/4 1920)
>[  5816.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ce250]
>[  5816.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ce250] width 1920 pitch 7680 (/4 1920)
>[  6379.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6379.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6381.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5760]
>[  6381.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5760] width 1920 pitch 7680 (/4 1920)
>[  6381.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6381.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6381.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  6381.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  6381.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  6381.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  6381.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  6381.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  6381.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  6381.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  6438.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e80]
>[  6438.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e80] width 1920 pitch 7680 (/4 1920)
>[  6438.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6438.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6438.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6438.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6438.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6439.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6439.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6439.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6439.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6439.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6439.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6439.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6439.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6439.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6439.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6439.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6439.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6439.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6439.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6439.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6439.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25ad2c0]
>[  6439.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25ad2c0] width 1920 pitch 7680 (/4 1920)
>[  6439.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515b70]
>[  6439.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515b70] width 1920 pitch 7680 (/4 1920)
>[  6533.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2206540]
>[  6533.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2206540] width 1920 pitch 7680 (/4 1920)
>[  6535.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6535.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6535.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6535.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6535.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6535.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6535.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6535.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6536.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6536.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6536.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201740]
>[  6536.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201740] width 1920 pitch 7680 (/4 1920)
>[  6537.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259cf10]
>[  6537.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259cf10] width 1920 pitch 7680 (/4 1920)
>[  6542.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25a5a60]
>[  6542.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25a5a60] width 1920 pitch 7680 (/4 1920)
>[  6763.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21fc8b0]
>[  6763.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21fc8b0] width 1920 pitch 7680 (/4 1920)
>[  6764.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x220f390]
>[  6764.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x220f390] width 1920 pitch 7680 (/4 1920)
>[  6764.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6764.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212ba0]
>[  6764.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212ba0] width 1920 pitch 7680 (/4 1920)
>[  6765.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2206540]
>[  6765.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2206540] width 1920 pitch 7680 (/4 1920)
>[  6769.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201800]
>[  6769.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201800] width 1920 pitch 7680 (/4 1920)
>[  6769.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201800]
>[  6769.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201800] width 1920 pitch 7680 (/4 1920)
>[  6769.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6769.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25403d0]
>[  6769.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25403d0] width 1920 pitch 7680 (/4 1920)
>[  6769.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  6769.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  6784.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff910]
>[  6784.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff910] width 1920 pitch 7680 (/4 1920)
>[  6786.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6786.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6786.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6786.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6786.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6786.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6786.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6786.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6786.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207da0]
>[  6786.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207da0] width 1920 pitch 7680 (/4 1920)
>[  6786.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6786.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6786.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6786.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6786.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6786.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6786.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6786.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6786.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6786.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6786.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207da0]
>[  6786.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207da0] width 1920 pitch 7680 (/4 1920)
>[  6786.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6787.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6787.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6787.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6787.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6787.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6787.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6787.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6787.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6787.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6787.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207da0]
>[  6787.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207da0] width 1920 pitch 7680 (/4 1920)
>[  6787.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6787.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6787.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6787.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6787.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207da0]
>[  6787.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207da0] width 1920 pitch 7680 (/4 1920)
>[  6787.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6787.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6787.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6787.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6787.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6787.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  6787.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207da0]
>[  6787.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207da0] width 1920 pitch 7680 (/4 1920)
>[  6787.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2208860]
>[  6787.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2208860] width 1920 pitch 7680 (/4 1920)
>[  6787.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffec0]
>[  6787.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffec0] width 1920 pitch 7680 (/4 1920)
>[  6787.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2212d20]
>[  6787.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2212d20] width 1920 pitch 7680 (/4 1920)
>[  6787.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217040]
>[  6787.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217040] width 1920 pitch 7680 (/4 1920)
>[  7009.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d9c0]
>[  7009.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d9c0] width 1920 pitch 7680 (/4 1920)
>[  7009.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259d9c0]
>[  7009.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259d9c0] width 1920 pitch 7680 (/4 1920)
>[  7009.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532510]
>[  7009.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532510] width 1920 pitch 7680 (/4 1920)
>[  7084.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221be60]
>[  7084.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221be60] width 1920 pitch 7680 (/4 1920)
>[  7084.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ebc0]
>[  7084.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ebc0] width 1920 pitch 7680 (/4 1920)
>[  7098.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  7098.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  7101.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221b160]
>[  7102.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221b160] width 1920 pitch 7680 (/4 1920)
>[  7105.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2214380]
>[  7105.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2214380] width 1920 pitch 7680 (/4 1920)
>[  7108.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21cc520]
>[  7108.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21cc520] width 1920 pitch 7680 (/4 1920)
>[  7108.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5760]
>[  7108.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5760] width 1920 pitch 7680 (/4 1920)
>[  7108.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c5db0]
>[  7108.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c5db0] width 1920 pitch 7680 (/4 1920)
>[  7108.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  7108.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  7108.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  7108.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  7108.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1910ba0]
>[  7108.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1910ba0] width 1920 pitch 7680 (/4 1920)
>[  7108.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250f500]
>[  7108.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250f500] width 1920 pitch 7680 (/4 1920)
>[  7108.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f6f90]
>[  7108.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f6f90] width 1920 pitch 7680 (/4 1920)
>[  7108.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21cc520]
>[  7108.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21cc520] width 1920 pitch 7680 (/4 1920)
>[  7108.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914e80]
>[  7108.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914e80] width 1920 pitch 7680 (/4 1920)
>[  7108.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d530]
>[  7108.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d530] width 1920 pitch 7680 (/4 1920)
>[  7108.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  7108.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  7108.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ba640]
>[  7108.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ba640] width 1920 pitch 7680 (/4 1920)
>[  7108.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f5760]
>[  7108.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f5760] width 1920 pitch 7680 (/4 1920)
>[  7108.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c5db0]
>[  7108.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c5db0] width 1920 pitch 7680 (/4 1920)
>[  7108.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529740]
>[  7108.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529740] width 1920 pitch 7680 (/4 1920)
>[  7108.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  7108.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  7108.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250f500]
>[  7108.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250f500] width 1920 pitch 7680 (/4 1920)
>[  7108.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21cc520]
>[  7108.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21cc520] width 1920 pitch 7680 (/4 1920)
>[  7108.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d530]
>[  7109.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d530] width 1920 pitch 7680 (/4 1920)
>[  7109.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1939950]
>[  7109.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1939950] width 1920 pitch 7680 (/4 1920)
>[  7110.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251abc0]
>[  7110.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251abc0] width 1920 pitch 7680 (/4 1920)
>[  7113.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  7113.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  7114.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221be60]
>[  7114.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221be60] width 1920 pitch 7680 (/4 1920)
>[  7114.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  7114.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  7114.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ce240]
>[  7114.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ce240] width 1920 pitch 7680 (/4 1920)
>[  7114.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205600]
>[  7114.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205600] width 1920 pitch 7680 (/4 1920)
>[  7114.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff910]
>[  7114.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff910] width 1920 pitch 7680 (/4 1920)
>[  7114.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526e70]
>[  7114.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526e70] width 1920 pitch 7680 (/4 1920)
>[  7114.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ebc0]
>[  7114.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ebc0] width 1920 pitch 7680 (/4 1920)
>[  7114.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259ce00]
>[  7114.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259ce00] width 1920 pitch 7680 (/4 1920)
>[  7114.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221be60]
>[  7114.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221be60] width 1920 pitch 7680 (/4 1920)
>[  7114.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ce240]
>[  7114.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ce240] width 1920 pitch 7680 (/4 1920)
>[  7114.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff910]
>[  7114.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff910] width 1920 pitch 7680 (/4 1920)
>[  7114.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ebc0]
>[  7114.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ebc0] width 1920 pitch 7680 (/4 1920)
>[  7114.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526e70]
>[  7114.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526e70] width 1920 pitch 7680 (/4 1920)
>[  7114.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259ce00]
>[  7114.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259ce00] width 1920 pitch 7680 (/4 1920)
>[  7114.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ebc0]
>[  7114.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ebc0] width 1920 pitch 7680 (/4 1920)
>[  7115.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1952f40]
>[  7115.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1952f40] width 1920 pitch 7680 (/4 1920)
>[  7115.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19da4c0]
>[  7115.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19da4c0] width 1920 pitch 7680 (/4 1920)
>[  7117.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ebc0]
>[  7117.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ebc0] width 1920 pitch 7680 (/4 1920)
>[  7121.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x259ce00]
>[  7121.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x259ce00] width 1920 pitch 7680 (/4 1920)
>[  7207.520] [mi] EQ overflowing.  Additional events will be discarded until existing events are processed.
>[  7207.520] 
>[  7207.520] Backtrace:
>[  7207.520] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[  7207.520] 1: /usr/bin/Xorg (mieqEnqueue+0x26b) [0x5514db]
>[  7207.520] 2: /usr/bin/Xorg (0x400000+0x47f32) [0x447f32]
>[  7207.520] 3: /usr/bin/Xorg (xf86PostButtonEvent+0xd6) [0x490566]
>[  7207.520] 4: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f75e82a9000+0x50eb) [0x7f75e82ae0eb]
>[  7207.520] 5: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f75e82a9000+0x6fa4) [0x7f75e82affa4]
>[  7207.520] 6: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[  7207.520] 7: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[  7207.520] 8: /lib64/libpthread.so.0 (0x7f75ed2b9000+0xefe0) [0x7f75ed2c7fe0]
>[  7207.520] 9: /lib64/libc.so.6 (ioctl+0x7) [0x7f75ecae9307]
>[  7207.520] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x366f603658]
>[  7207.520] 11: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x366f6058cc]
>[  7207.520] 12: /lib64/libdrm_radeon.so.1 (0x7f75eb401000+0x27c3) [0x7f75eb4037c3]
>[  7207.520] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f75eb60c000+0xd3664) [0x7f75eb6df664]
>[  7207.521] 14: /usr/bin/Xorg (_CallCallbacks+0x34) [0x438bb4]
>[  7207.521] 15: /usr/bin/Xorg (FlushAllOutput+0x2b) [0x468a3b]
>[  7207.521] 16: /usr/bin/Xorg (0x400000+0x341f1) [0x4341f1]
>[  7207.521] 17: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[  7207.521] 18: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x7f75eca20735]
>[  7207.521] 19: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[  7207.521] 
>[  7207.521] [mi] These backtraces from mieqEnqueue may point to a culprit higher up the stack.
>[  7207.521] [mi] mieq is *NOT* the cause.  It is a victim.
>[  7207.738] [mi] Increasing EQ size to 512 to prevent dropped events.
>[  7207.738] [mi] EQ processing has resumed after 37 dropped events.
>[  7207.738] [mi] This may be caused my a misbehaving driver monopolizing the server's resources.

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Attachments on bug 878478: 648511 | 648512 | 648513 | 648514 | 648515 | 648516