Attachment 665578 Details for Bug 888400 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 907.62 KB, created by Steevithak on 2012-12-18 16:23:23 UTC

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Creator: Steevithak

Created: 2012-12-18 16:23:23 UTC

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patch

obsolete

>[    23.951] 
>X.Org X Server 1.12.4
>Release Date: 2012-08-27
>[    23.951] X Protocol Version 11, Revision 0
>[    23.951] Build Operating System:  2.6.32-279.9.1.el6.x86_64 
>[    23.951] Current Operating System: Linux localhost.localdomain 3.6.10-2.fc17.x86_64 #1 SMP Tue Dec 11 18:07:34 UTC 2012 x86_64
>[    23.952] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.10-2.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 KEYTABLE=us SYSFONT=True rd.lvm.lv=vg/lv_root rd.luks=0 rd.lvm.lv=vg/lv_swap LANG=en_US.UTF-8 rhgb quiet
>[    23.952] Build Date: 28 November 2012  05:10:39PM
>[    23.952] Build ID: xorg-x11-server 1.12.4-1.fc17 
>[    23.952] Current version of pixman: 0.24.4
>[    23.952] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    23.952] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    23.952] (==) Log file: "/var/log/Xorg.0.log", Time: Sun Dec 16 13:03:57 2012
>[    23.978] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    23.978] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    23.978] (==) No Layout section.  Using the first Screen section.
>[    23.978] (==) No screen section available. Using defaults.
>[    23.978] (**) |-->Screen "Default Screen Section" (0)
>[    23.979] (**) |   |-->Monitor "<default monitor>"
>[    23.979] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    23.979] (==) Automatically adding devices
>[    23.979] (==) Automatically enabling devices
>[    23.979] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    23.979] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    23.979] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    23.979] (II) Loader magic: 0x7c6ac0
>[    23.979] (II) Module ABI versions:
>[    23.979] 	X.Org ANSI C Emulation: 0.4
>[    23.979] 	X.Org Video Driver: 12.1
>[    23.979] 	X.Org XInput driver : 16.0
>[    23.979] 	X.Org Server Extension : 6.0
>[    23.981] (--) PCI:*(0:2:0:0) 1002:9553:1028:0413 rev 0, Mem @ 0xd0000000/268435456, 0xcfef0000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    23.981] (II) LoadModule: "extmod"
>[    24.055] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    24.102] (II) Module extmod: vendor="X.Org Foundation"
>[    24.102] 	compiled for 1.12.4, module version = 1.0.0
>[    24.102] 	Module class: X.Org Server Extension
>[    24.102] 	ABI class: X.Org Server Extension, version 6.0
>[    24.102] (II) Loading extension SELinux
>[    24.102] (II) Loading extension MIT-SCREEN-SAVER
>[    24.102] (II) Loading extension XFree86-VidModeExtension
>[    24.102] (II) Loading extension XFree86-DGA
>[    24.102] (II) Loading extension DPMS
>[    24.102] (II) Loading extension XVideo
>[    24.102] (II) Loading extension XVideo-MotionCompensation
>[    24.102] (II) Loading extension X-Resource
>[    24.102] (II) LoadModule: "dbe"
>[    24.102] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    24.102] (II) Module dbe: vendor="X.Org Foundation"
>[    24.102] 	compiled for 1.12.4, module version = 1.0.0
>[    24.102] 	Module class: X.Org Server Extension
>[    24.102] 	ABI class: X.Org Server Extension, version 6.0
>[    24.102] (II) Loading extension DOUBLE-BUFFER
>[    24.102] (II) LoadModule: "glx"
>[    24.103] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    24.162] (II) Module glx: vendor="X.Org Foundation"
>[    24.162] 	compiled for 1.12.4, module version = 1.0.0
>[    24.162] 	ABI class: X.Org Server Extension, version 6.0
>[    24.162] (==) AIGLX enabled
>[    24.173] (II) Loading extension GLX
>[    24.173] (II) LoadModule: "record"
>[    24.173] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    24.173] (II) Module record: vendor="X.Org Foundation"
>[    24.173] 	compiled for 1.12.4, module version = 1.13.0
>[    24.173] 	Module class: X.Org Server Extension
>[    24.173] 	ABI class: X.Org Server Extension, version 6.0
>[    24.173] (II) Loading extension RECORD
>[    24.173] (II) LoadModule: "dri"
>[    24.173] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    24.174] (II) Module dri: vendor="X.Org Foundation"
>[    24.174] 	compiled for 1.12.4, module version = 1.0.0
>[    24.174] 	ABI class: X.Org Server Extension, version 6.0
>[    24.174] (II) Loading extension XFree86-DRI
>[    24.174] (II) LoadModule: "dri2"
>[    24.174] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    24.174] (II) Module dri2: vendor="X.Org Foundation"
>[    24.174] 	compiled for 1.12.4, module version = 1.2.0
>[    24.174] 	ABI class: X.Org Server Extension, version 6.0
>[    24.174] (II) Loading extension DRI2
>[    24.174] (==) Matched ati as autoconfigured driver 0
>[    24.174] (==) Matched vesa as autoconfigured driver 1
>[    24.174] (==) Matched modesetting as autoconfigured driver 2
>[    24.174] (==) Matched fbdev as autoconfigured driver 3
>[    24.174] (==) Assigned the driver to the xf86ConfigLayout
>[    24.174] (II) LoadModule: "ati"
>[    24.198] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    24.198] (II) Module ati: vendor="X.Org Foundation"
>[    24.198] 	compiled for 1.12.0, module version = 6.14.99
>[    24.198] 	Module class: X.Org Video Driver
>[    24.199] 	ABI class: X.Org Video Driver, version 12.0
>[    24.199] (II) LoadModule: "radeon"
>[    24.199] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    24.454] (II) Module radeon: vendor="X.Org Foundation"
>[    24.454] 	compiled for 1.12.0, module version = 6.14.99
>[    24.454] 	Module class: X.Org Video Driver
>[    24.454] 	ABI class: X.Org Video Driver, version 12.0
>[    24.454] (II) LoadModule: "vesa"
>[    24.454] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    24.454] (II) Module vesa: vendor="X.Org Foundation"
>[    24.454] 	compiled for 1.12.0, module version = 2.3.1
>[    24.454] 	Module class: X.Org Video Driver
>[    24.454] 	ABI class: X.Org Video Driver, version 12.0
>[    24.454] (II) LoadModule: "modesetting"
>[    24.455] (WW) Warning, couldn't open module modesetting
>[    24.455] (II) UnloadModule: "modesetting"
>[    24.455] (II) Unloading modesetting
>[    24.455] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    24.455] (II) LoadModule: "fbdev"
>[    24.455] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    24.455] (II) Module fbdev: vendor="X.Org Foundation"
>[    24.455] 	compiled for 1.11.99.901, module version = 0.4.2
>[    24.455] 	ABI class: X.Org Video Driver, version 12.0
>[    24.455] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    24.458] (II) VESA: driver for VESA chipsets: vesa
>[    24.459] (II) FBDEV: driver for framebuffer: fbdev
>[    24.459] (++) using VT number 1
>
>[    24.460] (II) [KMS] Kernel modesetting enabled.
>[    24.460] (WW) Falling back to old probe method for vesa
>[    24.460] (WW) Falling back to old probe method for fbdev
>[    24.460] (II) Loading sub module "fbdevhw"
>[    24.460] (II) LoadModule: "fbdevhw"
>[    24.460] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    24.460] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    24.460] 	compiled for 1.12.4, module version = 0.0.2
>[    24.460] 	ABI class: X.Org Video Driver, version 12.1
>[    24.460] (II) RADEON(0): RADEONPreInit_KMS
>[    24.460] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    24.460] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    24.460] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    24.460] (==) RADEON(0): Default visual is TrueColor
>[    24.461] (==) RADEON(0): RGB weight 888
>[    24.461] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    24.461] (--) RADEON(0): Chipset: "ATI Mobility Radeon 4500 Series" (ChipID = 0x9553)
>[    24.461] (II) RADEON(0): PCIE card detected
>[    24.461] drmOpenDevice: node name is /dev/dri/card0
>[    24.461] drmOpenDevice: open result is 8, (OK)
>[    24.461] drmOpenByBusid: Searching for BusID pci:0000:02:00.0
>[    24.461] drmOpenDevice: node name is /dev/dri/card0
>[    24.461] drmOpenDevice: open result is 8, (OK)
>[    24.461] drmOpenByBusid: drmOpenMinor returns 8
>[    24.461] drmOpenByBusid: drmGetBusid reports pci:0000:02:00.0
>[    24.461] (II) Loading sub module "exa"
>[    24.461] (II) LoadModule: "exa"
>[    24.461] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    24.461] (II) Module exa: vendor="X.Org Foundation"
>[    24.461] 	compiled for 1.12.4, module version = 2.5.0
>[    24.461] 	ABI class: X.Org Video Driver, version 12.1
>[    24.461] (II) RADEON(0): KMS Color Tiling: enabled
>[    24.461] (II) RADEON(0): KMS Pageflipping: enabled
>[    24.461] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    24.476] (II) RADEON(0): Output VGA-0 has no monitor section
>[    24.477] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    24.477] (II) RADEON(0): Output LVDS has no monitor section
>[    24.492] (II) RADEON(0): EDID for output VGA-0
>[    24.494] (II) RADEON(0): EDID for output HDMI-0
>[    24.495] (II) RADEON(0): EDID for output LVDS
>[    24.495] (II) RADEON(0): Manufacturer: LGD  Model: 20b  Serial#: 0
>[    24.495] (II) RADEON(0): Year: 2009  Week: 0
>[    24.495] (II) RADEON(0): EDID Version: 1.3
>[    24.495] (II) RADEON(0): Digital Display Input
>[    24.495] (II) RADEON(0): Max Image Size [cm]: horiz.: 35  vert.: 19
>[    24.495] (II) RADEON(0): Gamma: 2.20
>[    24.495] (II) RADEON(0): No DPMS capabilities specified
>[    24.495] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    24.495] (II) RADEON(0): First detailed timing is preferred mode
>[    24.495] (II) RADEON(0): redX: 0.617 redY: 0.349   greenX: 0.313 greenY: 0.595
>[    24.495] (II) RADEON(0): blueX: 0.151 blueY: 0.056   whiteX: 0.313 whiteY: 0.329
>[    24.495] (II) RADEON(0): Manufacturer's mask: 0
>[    24.495] (II) RADEON(0): Supported detailed timing:
>[    24.495] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    24.495] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    24.495] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    24.495] (II) RADEON(0): Supported detailed timing:
>[    24.495] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    24.495] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    24.495] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    24.495] (II) RADEON(0):  H162K[80]156WF1
>[    24.495] (II) RADEON(0): Unknown vendor-specific block 0
>[    24.495] (II) RADEON(0): EDID (in hex):
>[    24.495] (II) RADEON(0): 	00ffffffffffff0030e40b0200000000
>[    24.495] (II) RADEON(0): 	00130103902313780a15d59e59509826
>[    24.495] (II) RADEON(0): 	0e505400000001010101010101010101
>[    24.495] (II) RADEON(0): 	0101010101011a3680a070381f403020
>[    24.495] (II) RADEON(0): 	350059c21000001b1a3680a070381f40
>[    24.495] (II) RADEON(0): 	3020350059c21000001b000000fe0048
>[    24.495] (II) RADEON(0): 	3136324b803135365746310a00000000
>[    24.495] (II) RADEON(0): 	00000000000000000002010a202000e6
>[    24.496] (II) RADEON(0): Printing probed modes for output LVDS
>[    24.496] (II) RADEON(0): Modeline "1920x1080"x59.9  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    24.496] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[    24.496] (II) RADEON(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz d)
>[    24.496] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz d)
>[    24.496] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz d)
>[    24.496] (II) RADEON(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    24.496] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    24.496] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    24.496] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    24.496] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    24.496] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    24.496] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    24.496] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    24.498] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    24.498] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    24.498] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    24.498] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    24.498] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    24.498] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    24.498] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    24.498] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    24.498] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    24.498] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    24.498] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    24.498] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    24.498] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    24.498] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    24.498] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    24.498] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    24.498] (II) RADEON(0): Output VGA-0 disconnected
>[    24.498] (II) RADEON(0): Output HDMI-0 disconnected
>[    24.498] (II) RADEON(0): Output LVDS connected
>[    24.498] (II) RADEON(0): Using exact sizes for initial modes
>[    24.498] (II) RADEON(0): Output LVDS using initial mode 1920x1080 +0+0
>[    24.498] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    24.498] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:f7d7000
>[    24.498] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    24.498] (==) RADEON(0): DPI set to (96, 96)
>[    24.498] (II) Loading sub module "fb"
>[    24.498] (II) LoadModule: "fb"
>[    24.499] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    24.499] (II) Module fb: vendor="X.Org Foundation"
>[    24.499] 	compiled for 1.12.4, module version = 1.0.0
>[    24.499] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    24.499] (II) Loading sub module "ramdac"
>[    24.499] (II) LoadModule: "ramdac"
>[    24.499] (II) Module "ramdac" already built-in
>[    24.499] (II) UnloadModule: "vesa"
>[    24.499] (II) Unloading vesa
>[    24.499] (II) UnloadModule: "fbdev"
>[    24.499] (II) Unloading fbdev
>[    24.499] (II) UnloadSubModule: "fbdevhw"
>[    24.499] (II) Unloading fbdevhw
>[    24.499] (--) Depth 24 pixmap format is 32 bpp
>[    24.499] (II) RADEON(0): [DRI2] Setup complete
>[    24.499] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    24.499] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    24.500] (II) RADEON(0): Front buffer size: 8100K
>[    24.500] (II) RADEON(0): VRAM usage limit set to 221119K
>[    24.500] (II) RADEON(0): Initializing backing store
>[    24.500] (==) RADEON(0): Backing store disabled
>[    24.500] (II) RADEON(0): Direct rendering enabled
>[    24.500] (II) RADEON(0): Initializing Acceleration
>[    24.500] (II) RADEON(0): Setting EXA maxPitchBytes
>[    24.500] (II) EXA(0): Driver allocated offscreen pixmaps
>[    24.500] (II) EXA(0): Driver registered support for the following operations:
>[    24.500] (II)         Solid
>[    24.500] (II)         Copy
>[    24.500] (II)         Composite (RENDER acceleration)
>[    24.500] (II)         UploadToScreen
>[    24.500] (II)         DownloadFromScreen
>[    24.500] (II) RADEON(0): Acceleration enabled
>[    24.502] (II) RADEON(0): Initializing DPMS
>[    24.502] (==) RADEON(0): DPMS enabled
>[    24.502] (II) RADEON(0): Initializing Cursor
>[    24.502] (==) RADEON(0): Silken mouse enabled
>[    24.502] (II) RADEON(0): Initializing Xv
>[    24.502] (II) RADEON(0): Set up textured video
>[    24.502] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    24.502] (II) RADEON(0): [XvMC] Extension initialized.
>[    24.502] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    24.502] (II) RADEON(0): Initializing kms color map
>[    24.502] (II) RADEON(0): RADEONScreenInit finished
>[    24.502] (--) RandR disabled
>[    24.502] (II) Initializing built-in extension Generic Event Extension
>[    24.502] (II) Initializing built-in extension SHAPE
>[    24.502] (II) Initializing built-in extension MIT-SHM
>[    24.502] (II) Initializing built-in extension XInputExtension
>[    24.502] (II) Initializing built-in extension XTEST
>[    24.502] (II) Initializing built-in extension BIG-REQUESTS
>[    24.502] (II) Initializing built-in extension SYNC
>[    24.502] (II) Initializing built-in extension XKEYBOARD
>[    24.502] (II) Initializing built-in extension XC-MISC
>[    24.502] (II) Initializing built-in extension XINERAMA
>[    24.502] (II) Initializing built-in extension XFIXES
>[    24.502] (II) Initializing built-in extension RENDER
>[    24.502] (II) Initializing built-in extension RANDR
>[    24.502] (II) Initializing built-in extension COMPOSITE
>[    24.502] (II) Initializing built-in extension DAMAGE
>[    24.505] (II) SELinux: Disabled by boolean
>[    25.396] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    25.397] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    25.397] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    25.397] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    25.397] (II) AIGLX: Loaded and initialized r600
>[    25.397] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    25.398] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    25.530] (II) XKB: Reusing cached keymap
>[    25.533] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    25.533] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    25.533] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    25.533] (II) LoadModule: "evdev"
>[    25.533] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    25.534] (II) Module evdev: vendor="X.Org Foundation"
>[    25.534] 	compiled for 1.12.0, module version = 2.7.0
>[    25.534] 	Module class: X.Org XInput Driver
>[    25.534] 	ABI class: X.Org XInput driver, version 16.0
>[    25.534] (II) Using input driver 'evdev' for 'Power Button'
>[    25.534] 	Option "XkbRules" "evdev"
>[    25.534] 	Option "XkbModel" "pc105+inet"
>[    25.534] 	Option "XkbLayout" "us"
>[    25.534] 	Option "_source" "server/udev"
>[    25.534] 	Option "name" "Power Button"
>[    25.534] 	Option "path" "/dev/input/event3"
>[    25.534] 	Option "device" "/dev/input/event3"
>[    25.534] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    25.534] 	Option "driver" "evdev"
>[    25.534] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.534] (**) Power Button: always reports core events
>[    25.534] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    25.534] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    25.534] (--) evdev: Power Button: Found keys
>[    25.534] (II) evdev: Power Button: Configuring as keyboard
>[    25.534] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    25.534] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    25.534] (**) Option "xkb_rules" "evdev"
>[    25.534] (**) Option "xkb_model" "pc105+inet"
>[    25.534] (**) Option "xkb_layout" "us"
>[    25.534] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.564] (II) config/udev: Adding input device Video Bus (/dev/input/event6)
>[    25.564] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    25.564] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    25.564] (II) Using input driver 'evdev' for 'Video Bus'
>[    25.564] 	Option "XkbRules" "evdev"
>[    25.564] 	Option "XkbModel" "pc105+inet"
>[    25.564] 	Option "XkbLayout" "us"
>[    25.564] 	Option "_source" "server/udev"
>[    25.564] 	Option "name" "Video Bus"
>[    25.564] 	Option "path" "/dev/input/event6"
>[    25.564] 	Option "device" "/dev/input/event6"
>[    25.564] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    25.564] 	Option "driver" "evdev"
>[    25.564] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.564] (**) Video Bus: always reports core events
>[    25.564] (**) evdev: Video Bus: Device: "/dev/input/event6"
>[    25.564] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    25.564] (--) evdev: Video Bus: Found keys
>[    25.564] (II) evdev: Video Bus: Configuring as keyboard
>[    25.564] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    25.564] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    25.564] (**) Option "xkb_rules" "evdev"
>[    25.564] (**) Option "xkb_model" "pc105+inet"
>[    25.564] (**) Option "xkb_layout" "us"
>[    25.564] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.564] (II) XKB: Reusing cached keymap
>[    25.565] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    25.565] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    25.565] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    25.565] (II) Using input driver 'evdev' for 'Power Button'
>[    25.565] 	Option "XkbRules" "evdev"
>[    25.565] 	Option "XkbModel" "pc105+inet"
>[    25.565] 	Option "XkbLayout" "us"
>[    25.565] 	Option "_source" "server/udev"
>[    25.565] 	Option "name" "Power Button"
>[    25.565] 	Option "path" "/dev/input/event0"
>[    25.565] 	Option "device" "/dev/input/event0"
>[    25.565] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    25.565] 	Option "driver" "evdev"
>[    25.565] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.565] (**) Power Button: always reports core events
>[    25.565] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    25.565] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    25.565] (--) evdev: Power Button: Found keys
>[    25.565] (II) evdev: Power Button: Configuring as keyboard
>[    25.565] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    25.565] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    25.565] (**) Option "xkb_rules" "evdev"
>[    25.565] (**) Option "xkb_model" "pc105+inet"
>[    25.565] (**) Option "xkb_layout" "us"
>[    25.565] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.565] (II) XKB: Reusing cached keymap
>[    25.566] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    25.566] (II) No input driver specified, ignoring this device.
>[    25.566] (II) This device may have been added with another device file.
>[    25.566] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    25.566] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    25.566] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    25.566] (II) Using input driver 'evdev' for 'Sleep Button'
>[    25.566] 	Option "XkbRules" "evdev"
>[    25.566] 	Option "XkbModel" "pc105+inet"
>[    25.566] 	Option "XkbLayout" "us"
>[    25.566] 	Option "_source" "server/udev"
>[    25.566] 	Option "name" "Sleep Button"
>[    25.566] 	Option "path" "/dev/input/event1"
>[    25.566] 	Option "device" "/dev/input/event1"
>[    25.566] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    25.566] 	Option "driver" "evdev"
>[    25.566] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.566] (**) Sleep Button: always reports core events
>[    25.566] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    25.566] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    25.566] (--) evdev: Sleep Button: Found keys
>[    25.566] (II) evdev: Sleep Button: Configuring as keyboard
>[    25.566] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    25.566] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    25.566] (**) Option "xkb_rules" "evdev"
>[    25.566] (**) Option "xkb_model" "pc105+inet"
>[    25.566] (**) Option "xkb_layout" "us"
>[    25.566] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.566] (II) XKB: Reusing cached keymap
>[    25.567] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event10)
>[    25.567] (II) No input driver specified, ignoring this device.
>[    25.567] (II) This device may have been added with another device file.
>[    25.567] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event8)
>[    25.567] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    25.567] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    25.567] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    25.567] 	Option "XkbRules" "evdev"
>[    25.567] 	Option "XkbModel" "pc105+inet"
>[    25.567] 	Option "XkbLayout" "us"
>[    25.567] 	Option "_source" "server/udev"
>[    25.567] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    25.567] 	Option "path" "/dev/input/event8"
>[    25.567] 	Option "device" "/dev/input/event8"
>[    25.567] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    25.567] 	Option "driver" "evdev"
>[    25.567] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.567] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    25.567] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event8"
>[    25.567] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x6417
>[    25.567] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    25.567] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    25.567] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input8/event8"
>[    25.567] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 10)
>[    25.567] (**) Option "xkb_rules" "evdev"
>[    25.567] (**) Option "xkb_model" "pc105+inet"
>[    25.567] (**) Option "xkb_layout" "us"
>[    25.567] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.567] (II) XKB: Reusing cached keymap
>[    25.568] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event9)
>[    25.568] (II) No input driver specified, ignoring this device.
>[    25.568] (II) This device may have been added with another device file.
>[    25.571] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    25.571] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    25.571] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    25.571] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    25.571] 	Option "XkbRules" "evdev"
>[    25.571] 	Option "XkbModel" "pc105+inet"
>[    25.571] 	Option "XkbLayout" "us"
>[    25.571] 	Option "_source" "server/udev"
>[    25.571] 	Option "name" "AT Translated Set 2 keyboard"
>[    25.571] 	Option "path" "/dev/input/event4"
>[    25.571] 	Option "device" "/dev/input/event4"
>[    25.571] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    25.571] 	Option "driver" "evdev"
>[    25.571] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.571] (**) AT Translated Set 2 keyboard: always reports core events
>[    25.571] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    25.571] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    25.571] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    25.571] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    25.571] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    25.571] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 11)
>[    25.571] (**) Option "xkb_rules" "evdev"
>[    25.571] (**) Option "xkb_model" "pc105+inet"
>[    25.571] (**) Option "xkb_layout" "us"
>[    25.571] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.571] (II) XKB: Reusing cached keymap
>[    25.572] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    25.572] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    25.572] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    25.572] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    25.572] (II) LoadModule: "synaptics"
>[    25.572] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    25.572] (II) Module synaptics: vendor="X.Org Foundation"
>[    25.572] 	compiled for 1.12.3, module version = 1.6.2
>[    25.572] 	Module class: X.Org XInput Driver
>[    25.572] 	ABI class: X.Org XInput driver, version 16.0
>[    25.572] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    25.572] 	Option "_source" "server/udev"
>[    25.572] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    25.572] 	Option "path" "/dev/input/event5"
>[    25.572] 	Option "device" "/dev/input/event5"
>[    25.572] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    25.572] 	Option "driver" "synaptics"
>[    25.572] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    25.572] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    25.572] (**) Option "Device" "/dev/input/event5"
>[    25.595] (**) Option "Device" "/dev/input/event5"
>[    25.595] port opened successfully
>[    25.595] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5836
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4908
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    25.595] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    25.595] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    25.608] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    25.608] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 12)
>[    25.608] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    25.608] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    25.608] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.036
>[    25.608] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    25.608] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    25.608] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    25.608] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    25.608] (**) Option "Device" "/dev/input/event5"
>[    25.608] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    25.609] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    25.609] (II) No input driver specified, ignoring this device.
>[    25.609] (II) This device may have been added with another device file.
>[    25.610] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event7)
>[    25.610] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    25.610] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    25.610] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    25.610] 	Option "XkbRules" "evdev"
>[    25.610] 	Option "XkbModel" "pc105+inet"
>[    25.610] 	Option "XkbLayout" "us"
>[    25.610] 	Option "_source" "server/udev"
>[    25.610] 	Option "name" "Dell WMI hotkeys"
>[    25.610] 	Option "path" "/dev/input/event7"
>[    25.610] 	Option "device" "/dev/input/event7"
>[    25.610] 	Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    25.610] 	Option "driver" "evdev"
>[    25.610] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.610] (**) Dell WMI hotkeys: always reports core events
>[    25.610] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event7"
>[    25.610] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    25.610] (--) evdev: Dell WMI hotkeys: Found keys
>[    25.610] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    25.610] (**) Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[    25.610] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 13)
>[    25.610] (**) Option "xkb_rules" "evdev"
>[    25.610] (**) Option "xkb_model" "pc105+inet"
>[    25.610] (**) Option "xkb_layout" "us"
>[    25.610] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.610] (II) XKB: Reusing cached keymap
>[    25.616] (II) RADEON(0): RADEONSaveScreen(2)
>[    25.638] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    25.638] (II) RADEON(0): Printing DDC gathered Modelines:
>[    25.638] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    27.442] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    27.442] (II) RADEON(0): Printing DDC gathered Modelines:
>[    27.442] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    29.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b43d0]
>[    29.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b43d0] width 1920 pitch 7680 (/4 1920)
>[    29.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b4370]
>[    29.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b4370] width 1920 pitch 7680 (/4 1920)
>[    29.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    29.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    29.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    29.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    29.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    29.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    29.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    29.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    29.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    29.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    29.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    30.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b61b0]
>[    30.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b61b0] width 1920 pitch 7680 (/4 1920)
>[    30.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b6210]
>[    30.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b6210] width 1920 pitch 7680 (/4 1920)
>[    32.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    32.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    32.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    32.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    32.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    33.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    33.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    33.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    33.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    33.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    33.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    33.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    33.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    33.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    33.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    33.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    33.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    34.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    34.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    34.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    34.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    34.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    34.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    34.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    34.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    34.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    34.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    34.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    34.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    35.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    35.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    35.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17bab70]
>[    35.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17bab70] width 1920 pitch 7680 (/4 1920)
>[    35.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b5a50]
>[    35.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b5a50] width 1920 pitch 7680 (/4 1920)
>[    35.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x179f800]
>[    38.237] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    38.237] (II) RADEON(0): Printing DDC gathered Modelines:
>[    38.237] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    40.313] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    40.313] (II) RADEON(0): Printing DDC gathered Modelines:
>[    40.313] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    41.642] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    41.642] (II) RADEON(0): Printing DDC gathered Modelines:
>[    41.642] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    49.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ed0d0]
>[    49.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ed0d0] width 1920 pitch 7680 (/4 1920)
>[    52.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    52.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    53.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f2780]
>[    53.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f2780] width 1920 pitch 7680 (/4 1920)
>[    53.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    53.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    62.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    62.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    62.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    62.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    62.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    62.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    63.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    63.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    63.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    63.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    65.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    65.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    65.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    65.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    65.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    65.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    65.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5620]
>[    65.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5620] width 1920 pitch 7680 (/4 1920)
>[    65.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    65.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    65.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    65.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    65.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    65.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    65.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5620]
>[    65.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5620] width 1920 pitch 7680 (/4 1920)
>[    65.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5020]
>[    65.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5020] width 1920 pitch 7680 (/4 1920)
>[    65.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f27e0]
>[    65.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f27e0] width 1920 pitch 7680 (/4 1920)
>[    67.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14efe00]
>[    67.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14efe00] width 1920 pitch 7680 (/4 1920)
>[    67.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5870]
>[    67.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5870] width 1920 pitch 7680 (/4 1920)
>[    67.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5810]
>[    67.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5810] width 1920 pitch 7680 (/4 1920)
>[    67.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5870]
>[    67.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5870] width 1920 pitch 7680 (/4 1920)
>[    67.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5810]
>[    67.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5810] width 1920 pitch 7680 (/4 1920)
>[    67.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f5870]
>[    67.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f5870] width 1920 pitch 7680 (/4 1920)
>[    82.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f65b0]
>[    82.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f65b0] width 1920 pitch 7680 (/4 1920)
>[    82.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283cfc0]
>[    82.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283cfc0] width 1920 pitch 7680 (/4 1920)
>[    82.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809110]
>[    82.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809110] width 1920 pitch 7680 (/4 1920)
>[    82.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808f60]
>[    82.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808f60] width 1920 pitch 7680 (/4 1920)
>[   289.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   289.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   289.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   289.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   289.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   290.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   290.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   290.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   290.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   290.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   290.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   291.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   291.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   291.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   291.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   291.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   291.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   291.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   291.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   291.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   291.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   291.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   291.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   291.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   291.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   291.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   291.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   291.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   291.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   291.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   292.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   292.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   292.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   292.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889b60]
>[   292.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889b60] width 1920 pitch 7680 (/4 1920)
>[   292.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c9c0]
>[   292.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c9c0] width 1920 pitch 7680 (/4 1920)
>[   292.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2887700]
>[   292.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2887700] width 1920 pitch 7680 (/4 1920)
>[   298.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cc1e0]
>[   298.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cc1e0] width 1920 pitch 7680 (/4 1920)
>[   298.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1a30]
>[   298.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1a30] width 1920 pitch 7680 (/4 1920)
>[   318.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cbe10]
>[   318.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cbe10] width 1920 pitch 7680 (/4 1920)
>[   378.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6450]
>[   378.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6450] width 1920 pitch 7680 (/4 1920)
>[   394.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293b160]
>[   394.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293b160] width 1920 pitch 7680 (/4 1920)
>[   438.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2931910]
>[   438.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2931910] width 1920 pitch 7680 (/4 1920)
>[   453.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29501a0]
>[   453.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29501a0] width 1920 pitch 7680 (/4 1920)
>[   468.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2875230]
>[   468.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2875230] width 1920 pitch 7680 (/4 1920)
>[   471.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2875230]
>[   471.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2875230] width 1920 pitch 7680 (/4 1920)
>[   483.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a2e10]
>[   483.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a2e10] width 1920 pitch 7680 (/4 1920)
>[   498.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2883070]
>[   498.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2883070] width 1920 pitch 7680 (/4 1920)
>[   528.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294f900]
>[   528.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294f900] width 1920 pitch 7680 (/4 1920)
>[   536.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2958bc0]
>[   536.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2958bc0] width 1920 pitch 7680 (/4 1920)
>[   543.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288cce0]
>[   543.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288cce0] width 1920 pitch 7680 (/4 1920)
>[   548.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294f900]
>[   548.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294f900] width 1920 pitch 7680 (/4 1920)
>[   548.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288cce0]
>[   548.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288cce0] width 1920 pitch 7680 (/4 1920)
>[   561.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933820]
>[   561.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933820] width 1920 pitch 7680 (/4 1920)
>[   566.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a0d30]
>[   566.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a0d30] width 1920 pitch 7680 (/4 1920)
>[   566.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ebe0]
>[   566.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ebe0] width 1920 pitch 7680 (/4 1920)
>[   566.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a0d30]
>[   566.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a0d30] width 1920 pitch 7680 (/4 1920)
>[   566.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ebe0]
>[   566.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ebe0] width 1920 pitch 7680 (/4 1920)
>[   573.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b51460]
>[   573.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b51460] width 1920 pitch 7680 (/4 1920)
>[   576.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b51460]
>[   576.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b51460] width 1920 pitch 7680 (/4 1920)
>[   576.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36900]
>[   576.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36900] width 1920 pitch 7680 (/4 1920)
>[   576.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ed790]
>[   576.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ed790] width 1920 pitch 7680 (/4 1920)
>[   576.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b32a80]
>[   576.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b32a80] width 1920 pitch 7680 (/4 1920)
>[   576.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36900]
>[   576.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36900] width 1920 pitch 7680 (/4 1920)
>[   576.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a0d30]
>[   576.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a0d30] width 1920 pitch 7680 (/4 1920)
>[   576.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36900]
>[   576.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36900] width 1920 pitch 7680 (/4 1920)
>[   576.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a0d30]
>[   576.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a0d30] width 1920 pitch 7680 (/4 1920)
>[   576.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b32a80]
>[   576.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b32a80] width 1920 pitch 7680 (/4 1920)
>[   576.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a0d30]
>[   576.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a0d30] width 1920 pitch 7680 (/4 1920)
>[   576.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ed790]
>[   576.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ed790] width 1920 pitch 7680 (/4 1920)
>[   588.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294f900]
>[   588.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294f900] width 1920 pitch 7680 (/4 1920)
>[   589.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2807490]
>[   589.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2807490] width 1920 pitch 7680 (/4 1920)
>[   648.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2962700]
>[   648.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2962700] width 1920 pitch 7680 (/4 1920)
>[   648.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294eee0]
>[   648.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294eee0] width 1920 pitch 7680 (/4 1920)
>[   723.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2882cc0]
>[   723.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2882cc0] width 1920 pitch 7680 (/4 1920)
>[   768.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2953ae0]
>[   768.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2953ae0] width 1920 pitch 7680 (/4 1920)
>[   798.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36a50]
>[   798.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36a50] width 1920 pitch 7680 (/4 1920)
>[   858.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2895f10]
>[   858.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2895f10] width 1920 pitch 7680 (/4 1920)
>[   888.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954ea0]
>[   888.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954ea0] width 1920 pitch 7680 (/4 1920)
>[   903.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2895f10]
>[   903.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2895f10] width 1920 pitch 7680 (/4 1920)
>[   933.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2954ea0]
>[   933.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2954ea0] width 1920 pitch 7680 (/4 1920)
>[   963.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b54440]
>[   963.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b54440] width 1920 pitch 7680 (/4 1920)
>[   978.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4f1a0]
>[   978.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4f1a0] width 1920 pitch 7680 (/4 1920)
>[   993.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2944520]
>[   993.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2944520] width 1920 pitch 7680 (/4 1920)
>[   993.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2944520]
>[   993.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2944520] width 1920 pitch 7680 (/4 1920)
>[   994.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b36310]
>[   994.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b36310] width 1920 pitch 7680 (/4 1920)
>[   994.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   994.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   994.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   994.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   994.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   994.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   994.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   994.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   994.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   994.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   994.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   994.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   994.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   994.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   994.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   994.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   995.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   995.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   995.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   995.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   995.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   995.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   995.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   995.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[   999.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[   999.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[   999.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[   999.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[  1005.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1005.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1018.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[  1018.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[  1018.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1018.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1018.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[  1018.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[  1018.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1018.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1018.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[  1018.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[  1019.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1019.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1020.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2806ec0]
>[  1020.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2806ec0] width 1920 pitch 7680 (/4 1920)
>[  1020.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1020.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1020.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1020.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1020.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1020.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1020.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1020.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1020.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2957940]
>[  1020.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2957940] width 1920 pitch 7680 (/4 1920)
>[  1020.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cdf30]
>[  1020.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cdf30] width 1920 pitch 7680 (/4 1920)
>[  1038.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1038.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1056.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1056.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1056.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1056.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1056.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1056.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1056.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1056.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1056.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1056.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1056.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840de0]
>[  1056.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840de0] width 1920 pitch 7680 (/4 1920)
>[  1098.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c3c0]
>[  1098.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c3c0] width 1920 pitch 7680 (/4 1920)
>[  1099.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cab60]
>[  1099.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cab60] width 1920 pitch 7680 (/4 1920)
>[  1103.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2955ea0]
>[  1103.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2955ea0] width 1920 pitch 7680 (/4 1920)
>[  1103.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289c410]
>[  1103.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289c410] width 1920 pitch 7680 (/4 1920)
>[  1103.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29384c0]
>[  1103.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29384c0] width 1920 pitch 7680 (/4 1920)
>[  1103.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289c3b0]
>[  1103.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289c3b0] width 1920 pitch 7680 (/4 1920)
>[  1103.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29384c0]
>[  1103.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29384c0] width 1920 pitch 7680 (/4 1920)
>[  1103.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289c3b0]
>[  1103.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289c3b0] width 1920 pitch 7680 (/4 1920)
>[  1103.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289c410]
>[  1103.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289c410] width 1920 pitch 7680 (/4 1920)
>[  1105.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933800]
>[  1105.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933800] width 1920 pitch 7680 (/4 1920)
>[  1105.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29558f0]
>[  1105.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29558f0] width 1920 pitch 7680 (/4 1920)
>[  1105.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2970d80]
>[  1105.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2970d80] width 1920 pitch 7680 (/4 1920)
>[  1108.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b430f0]
>[  1108.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b430f0] width 1920 pitch 7680 (/4 1920)
>[  1113.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x298ca40]
>[  1113.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x298ca40] width 1920 pitch 7680 (/4 1920)
>[  1118.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d4e70]
>[  1118.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d4e70] width 1920 pitch 7680 (/4 1920)
>[  1118.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2894b10]
>[  1118.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2894b10] width 1920 pitch 7680 (/4 1920)
>[  1127.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d43c0]
>[  1127.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d43c0] width 1920 pitch 7680 (/4 1920)
>[  1127.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac040]
>[  1127.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac040] width 1920 pitch 7680 (/4 1920)
>[  1127.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2bfa0]
>[  1127.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2bfa0] width 1920 pitch 7680 (/4 1920)
>[  1127.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296dda0]
>[  1127.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296dda0] width 1920 pitch 7680 (/4 1920)
>[  1127.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2894b70]
>[  1127.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2894b70] width 1920 pitch 7680 (/4 1920)
>[  1127.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x298bae0]
>[  1127.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x298bae0] width 1920 pitch 7680 (/4 1920)
>[  1127.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1127.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1127.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cefe0]
>[  1127.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cefe0] width 1920 pitch 7680 (/4 1920)
>[  1127.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1127.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1128.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1128.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1130.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eace0]
>[  1131.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eace0] width 1920 pitch 7680 (/4 1920)
>[  1131.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf240]
>[  1131.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf240] width 1920 pitch 7680 (/4 1920)
>[  1134.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1134.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1134.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1134.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1134.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1134.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1134.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eaaf0]
>[  1134.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eaaf0] width 1920 pitch 7680 (/4 1920)
>[  1134.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1134.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1134.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1134.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1134.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1134.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1134.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eaaf0]
>[  1134.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eaaf0] width 1920 pitch 7680 (/4 1920)
>[  1134.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eaaf0]
>[  1134.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eaaf0] width 1920 pitch 7680 (/4 1920)
>[  1134.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2894b70]
>[  1134.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2894b70] width 1920 pitch 7680 (/4 1920)
>[  1134.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1135.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1135.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eaaf0]
>[  1135.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eaaf0] width 1920 pitch 7680 (/4 1920)
>[  1140.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1140.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1140.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1140.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1141.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1141.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1141.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1141.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1141.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1141.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1141.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1141.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1141.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1141.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1141.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1141.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1141.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1141.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1141.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1141.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1141.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1141.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1142.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1142.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1142.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d910]
>[  1142.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d910] width 1920 pitch 7680 (/4 1920)
>[  1142.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288c050]
>[  1142.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288c050] width 1920 pitch 7680 (/4 1920)
>[  1143.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2894ee0]
>[  1143.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2894ee0] width 1920 pitch 7680 (/4 1920)
>[  1143.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29abb50]
>[  1143.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29abb50] width 1920 pitch 7680 (/4 1920)
>[  1143.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d4f90]
>[  1143.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d4f90] width 1920 pitch 7680 (/4 1920)
>[  1143.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2871f10]
>[  1143.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2871f10] width 1920 pitch 7680 (/4 1920)
>[  1143.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29abb50]
>[  1143.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29abb50] width 1920 pitch 7680 (/4 1920)
>[  1143.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2871f10]
>[  1143.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2871f10] width 1920 pitch 7680 (/4 1920)
>[  1143.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29abb50]
>[  1143.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29abb50] width 1920 pitch 7680 (/4 1920)
>[  1143.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bd8b0]
>[  1143.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bd8b0] width 1920 pitch 7680 (/4 1920)
>[  1143.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5e00]
>[  1143.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5e00] width 1920 pitch 7680 (/4 1920)
>[  1143.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e7b30]
>[  1143.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e7b30] width 1920 pitch 7680 (/4 1920)
>[  1143.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5e00]
>[  1143.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5e00] width 1920 pitch 7680 (/4 1920)
>[  1245.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b00580]
>[  1245.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b00580] width 1920 pitch 7680 (/4 1920)
>[  1270.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a39760]
>[  1270.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a39760] width 1920 pitch 7680 (/4 1920)
>[  1271.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3f50]
>[  1271.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3f50] width 1920 pitch 7680 (/4 1920)
>[  1271.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2be8b50]
>[  1271.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2be8b50] width 1920 pitch 7680 (/4 1920)
>[  1282.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aaf560]
>[  1282.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aaf560] width 1920 pitch 7680 (/4 1920)
>[  1282.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1282.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1282.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1282.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1282.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cec80]
>[  1283.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cec80] width 1920 pitch 7680 (/4 1920)
>[  1283.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1283.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1283.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1283.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1283.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1283.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1283.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1283.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1283.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cec80]
>[  1283.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cec80] width 1920 pitch 7680 (/4 1920)
>[  1283.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  1283.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  1283.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1283.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1283.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cec80]
>[  1283.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cec80] width 1920 pitch 7680 (/4 1920)
>[  1284.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[  1284.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[  1286.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e66a0]
>[  1286.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e66a0] width 1920 pitch 7680 (/4 1920)
>[  1323.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab33e0]
>[  1323.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab33e0] width 1920 pitch 7680 (/4 1920)
>[  1353.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afc080]
>[  1353.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afc080] width 1920 pitch 7680 (/4 1920)
>[  1368.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a56770]
>[  1368.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a56770] width 1920 pitch 7680 (/4 1920)
>[  1383.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a56770]
>[  1383.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a56770] width 1920 pitch 7680 (/4 1920)
>[  1398.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeb150]
>[  1398.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeb150] width 1920 pitch 7680 (/4 1920)
>[  1420.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0b020]
>[  1420.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0b020] width 1920 pitch 7680 (/4 1920)
>[  1423.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab35a0]
>[  1423.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab35a0] width 1920 pitch 7680 (/4 1920)
>[  1423.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0d670]
>[  1423.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0d670] width 1920 pitch 7680 (/4 1920)
>[  1425.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2981c00]
>[  1425.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2981c00] width 1920 pitch 7680 (/4 1920)
>[  1427.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae0df0]
>[  1427.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae0df0] width 1920 pitch 7680 (/4 1920)
>[  1428.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae03a0]
>[  1428.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae03a0] width 1920 pitch 7680 (/4 1920)
>[  1446.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a382d0]
>[  1446.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a382d0] width 1920 pitch 7680 (/4 1920)
>[  1586.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c8d30]
>[  1586.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c8d30] width 1920 pitch 7680 (/4 1920)
>[  1608.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adfa80]
>[  1608.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adfa80] width 1920 pitch 7680 (/4 1920)
>[  1616.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  1616.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  1633.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c31710]
>[  1633.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c31710] width 1920 pitch 7680 (/4 1920)
>[  1640.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c385c0]
>[  1640.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c385c0] width 1920 pitch 7680 (/4 1920)
>[  1640.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38790]
>[  1640.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38790] width 1920 pitch 7680 (/4 1920)
>[  1642.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a94f60]
>[  1642.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a94f60] width 1920 pitch 7680 (/4 1920)
>[  1642.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c30d20]
>[  1642.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c30d20] width 1920 pitch 7680 (/4 1920)
>[  1642.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38020]
>[  1642.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38020] width 1920 pitch 7680 (/4 1920)
>[  1642.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38450]
>[  1642.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38450] width 1920 pitch 7680 (/4 1920)
>[  1642.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38020]
>[  1642.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38020] width 1920 pitch 7680 (/4 1920)
>[  1642.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a95210]
>[  1642.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a95210] width 1920 pitch 7680 (/4 1920)
>[  1642.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38020]
>[  1642.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38020] width 1920 pitch 7680 (/4 1920)
>[  1642.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a95210]
>[  1642.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a95210] width 1920 pitch 7680 (/4 1920)
>[  1642.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38020]
>[  1642.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38020] width 1920 pitch 7680 (/4 1920)
>[  1642.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58780]
>[  1642.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58780] width 1920 pitch 7680 (/4 1920)
>[  1643.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a586b0]
>[  1643.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a586b0] width 1920 pitch 7680 (/4 1920)
>[  1643.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c30d20]
>[  1643.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c30d20] width 1920 pitch 7680 (/4 1920)
>[  1643.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a65e50]
>[  1643.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a65e50] width 1920 pitch 7680 (/4 1920)
>[  1643.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c2f9f0]
>[  1643.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c2f9f0] width 1920 pitch 7680 (/4 1920)
>[  1643.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296afa0]
>[  1643.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296afa0] width 1920 pitch 7680 (/4 1920)
>[  1643.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1643.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1643.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296afa0]
>[  1643.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296afa0] width 1920 pitch 7680 (/4 1920)
>[  1643.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1643.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1643.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296afa0]
>[  1643.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296afa0] width 1920 pitch 7680 (/4 1920)
>[  1643.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296a2a0]
>[  1643.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296a2a0] width 1920 pitch 7680 (/4 1920)
>[  1643.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c2f9f0]
>[  1643.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c2f9f0] width 1920 pitch 7680 (/4 1920)
>[  1703.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1703.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1703.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c5af0]
>[  1703.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c5af0] width 1920 pitch 7680 (/4 1920)
>[  1703.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c401d0]
>[  1703.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c401d0] width 1920 pitch 7680 (/4 1920)
>[  1703.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c5af0]
>[  1703.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c5af0] width 1920 pitch 7680 (/4 1920)
>[  1703.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3bb90]
>[  1703.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3bb90] width 1920 pitch 7680 (/4 1920)
>[  1703.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c5af0]
>[  1703.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c5af0] width 1920 pitch 7680 (/4 1920)
>[  1703.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1704.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1704.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c5af0]
>[  1704.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c5af0] width 1920 pitch 7680 (/4 1920)
>[  1704.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1704.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1704.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  1704.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  1704.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3be20]
>[  1704.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3be20] width 1920 pitch 7680 (/4 1920)
>[  1736.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3be20]
>[  1736.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3be20] width 1920 pitch 7680 (/4 1920)
>[  1751.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a49200]
>[  1751.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a49200] width 1920 pitch 7680 (/4 1920)
>[  1757.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  1757.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  1758.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2927620]
>[  1758.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2927620] width 1920 pitch 7680 (/4 1920)
>[  1760.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c43570]
>[  1760.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c43570] width 1920 pitch 7680 (/4 1920)
>[  1793.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a804c0]
>[  1793.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a804c0] width 1920 pitch 7680 (/4 1920)
>[  1793.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a823f0]
>[  1793.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a823f0] width 1920 pitch 7680 (/4 1920)
>[  1793.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a804c0]
>[  1793.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a804c0] width 1920 pitch 7680 (/4 1920)
>[  1793.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a80380]
>[  1793.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a80380] width 1920 pitch 7680 (/4 1920)
>[  1793.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a804c0]
>[  1793.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a804c0] width 1920 pitch 7680 (/4 1920)
>[  1793.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a80380]
>[  1793.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a80380] width 1920 pitch 7680 (/4 1920)
>[  1793.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a804c0]
>[  1793.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a804c0] width 1920 pitch 7680 (/4 1920)
>[  1793.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a823f0]
>[  1793.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a823f0] width 1920 pitch 7680 (/4 1920)
>[  1793.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a804c0]
>[  1793.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a804c0] width 1920 pitch 7680 (/4 1920)
>[  1794.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a7f990]
>[  1794.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a7f990] width 1920 pitch 7680 (/4 1920)
>[  1794.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a7fa10]
>[  1794.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a7fa10] width 1920 pitch 7680 (/4 1920)
>[  1794.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c31230]
>[  1794.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c31230] width 1920 pitch 7680 (/4 1920)
>[  1794.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a85c90]
>[  1794.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a85c90] width 1920 pitch 7680 (/4 1920)
>[  1794.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b46b70]
>[  1794.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b46b70] width 1920 pitch 7680 (/4 1920)
>[  1794.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40bb0]
>[  1794.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40bb0] width 1920 pitch 7680 (/4 1920)
>[  1794.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4f230]
>[  1795.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4f230] width 1920 pitch 7680 (/4 1920)
>[  1795.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40bb0]
>[  1795.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40bb0] width 1920 pitch 7680 (/4 1920)
>[  1795.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4f230]
>[  1795.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4f230] width 1920 pitch 7680 (/4 1920)
>[  1795.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40bb0]
>[  1795.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40bb0] width 1920 pitch 7680 (/4 1920)
>[  1795.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b46b70]
>[  1795.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b46b70] width 1920 pitch 7680 (/4 1920)
>[  1826.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4e660]
>[  1826.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4e660] width 1920 pitch 7680 (/4 1920)
>[  1841.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4f6a0]
>[  1841.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4f6a0] width 1920 pitch 7680 (/4 1920)
>[  1856.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c53c70]
>[  1856.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c53c70] width 1920 pitch 7680 (/4 1920)
>[  1871.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c59d90]
>[  1871.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c59d90] width 1920 pitch 7680 (/4 1920)
>[  2028.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c551f0]
>[  2028.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c551f0] width 1920 pitch 7680 (/4 1920)
>[  2032.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2032.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2048.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2048.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2048.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2048.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2048.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2048.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2048.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2048.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2048.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2048.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2048.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2049.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2049.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2049.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2049.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2049.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2049.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2049.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2049.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2049.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2049.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2049.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2049.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2049.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2050.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2050.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2051.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f4c0]
>[  2052.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f4c0] width 1920 pitch 7680 (/4 1920)
>[  2052.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c48270]
>[  2052.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c48270] width 1920 pitch 7680 (/4 1920)
>[  2055.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adfa80]
>[  2055.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adfa80] width 1920 pitch 7680 (/4 1920)
>[  2055.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289c410]
>[  2055.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289c410] width 1920 pitch 7680 (/4 1920)
>[  2055.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adfa80]
>[  2055.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adfa80] width 1920 pitch 7680 (/4 1920)
>[  2055.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b216e0]
>[  2056.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b216e0] width 1920 pitch 7680 (/4 1920)
>[  2061.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b48150]
>[  2061.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b48150] width 1920 pitch 7680 (/4 1920)
>[  2061.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91030]
>[  2061.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91030] width 1920 pitch 7680 (/4 1920)
>[  2061.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8fc40]
>[  2061.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8fc40] width 1920 pitch 7680 (/4 1920)
>[  2066.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c57f30]
>[  2066.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c57f30] width 1920 pitch 7680 (/4 1920)
>[  2080.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e453b0]
>[  2080.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e453b0] width 1920 pitch 7680 (/4 1920)
>[  2081.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c360]
>[  2081.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c360] width 1920 pitch 7680 (/4 1920)
>[  2090.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3eb50]
>[  2090.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3eb50] width 1920 pitch 7680 (/4 1920)
>[  2090.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e7d0]
>[  2090.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e7d0] width 1920 pitch 7680 (/4 1920)
>[  2090.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39a10]
>[  2090.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39a10] width 1920 pitch 7680 (/4 1920)
>[  2090.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e7d0]
>[  2090.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e7d0] width 1920 pitch 7680 (/4 1920)
>[  2128.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a330]
>[  2128.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a330] width 1920 pitch 7680 (/4 1920)
>[  2141.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938410]
>[  2141.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938410] width 1920 pitch 7680 (/4 1920)
>[  2156.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8a440]
>[  2156.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8a440] width 1920 pitch 7680 (/4 1920)
>[  2197.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3f120]
>[  2197.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3f120] width 1920 pitch 7680 (/4 1920)
>[  2238.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa94f0]
>[  2238.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa94f0] width 1920 pitch 7680 (/4 1920)
>[  2261.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2923270]
>[  2261.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2923270] width 1920 pitch 7680 (/4 1920)
>[  2276.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af9f20]
>[  2276.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af9f20] width 1920 pitch 7680 (/4 1920)
>[  2298.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af9f20]
>[  2298.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af9f20] width 1920 pitch 7680 (/4 1920)
>[  2306.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2925440]
>[  2306.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2925440] width 1920 pitch 7680 (/4 1920)
>[  2314.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295f210]
>[  2314.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295f210] width 1920 pitch 7680 (/4 1920)
>[  2321.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44a00]
>[  2321.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44a00] width 1920 pitch 7680 (/4 1920)
>[  2366.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44a00]
>[  2366.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44a00] width 1920 pitch 7680 (/4 1920)
>[  2385.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9200]
>[  2385.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9200] width 1920 pitch 7680 (/4 1920)
>[  2396.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9530]
>[  2396.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9530] width 1920 pitch 7680 (/4 1920)
>[  2412.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa9530]
>[  2412.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa9530] width 1920 pitch 7680 (/4 1920)
>[  2416.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29feb90]
>[  2416.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29feb90] width 1920 pitch 7680 (/4 1920)
>[  2418.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fd990]
>[  2418.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fd990] width 1920 pitch 7680 (/4 1920)
>[  2418.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293e220]
>[  2418.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293e220] width 1920 pitch 7680 (/4 1920)
>[  2418.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f91e0]
>[  2418.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f91e0] width 1920 pitch 7680 (/4 1920)
>[  2418.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecc70]
>[  2419.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecc70] width 1920 pitch 7680 (/4 1920)
>[  2419.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f91e0]
>[  2419.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f91e0] width 1920 pitch 7680 (/4 1920)
>[  2419.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecc70]
>[  2419.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecc70] width 1920 pitch 7680 (/4 1920)
>[  2419.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f91e0]
>[  2419.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f91e0] width 1920 pitch 7680 (/4 1920)
>[  2419.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecc70]
>[  2419.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecc70] width 1920 pitch 7680 (/4 1920)
>[  2419.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f91e0]
>[  2419.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f91e0] width 1920 pitch 7680 (/4 1920)
>[  2419.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecc70]
>[  2419.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecc70] width 1920 pitch 7680 (/4 1920)
>[  2419.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f91e0]
>[  2419.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f91e0] width 1920 pitch 7680 (/4 1920)
>[  2419.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecc70]
>[  2419.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecc70] width 1920 pitch 7680 (/4 1920)
>[  2426.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a43b00]
>[  2426.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a43b00] width 1920 pitch 7680 (/4 1920)
>[  2426.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c50a60]
>[  2426.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c50a60] width 1920 pitch 7680 (/4 1920)
>[  2428.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a89fb0]
>[  2428.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a89fb0] width 1920 pitch 7680 (/4 1920)
>[  2428.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a43b00]
>[  2428.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a43b00] width 1920 pitch 7680 (/4 1920)
>[  2428.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8e9f0]
>[  2428.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8e9f0] width 1920 pitch 7680 (/4 1920)
>[  2428.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8f200]
>[  2428.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8f200] width 1920 pitch 7680 (/4 1920)
>[  2428.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91f00]
>[  2428.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91f00] width 1920 pitch 7680 (/4 1920)
>[  2428.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8f200]
>[  2428.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8f200] width 1920 pitch 7680 (/4 1920)
>[  2428.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91f00]
>[  2428.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91f00] width 1920 pitch 7680 (/4 1920)
>[  2428.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8f200]
>[  2428.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8f200] width 1920 pitch 7680 (/4 1920)
>[  2428.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91f00]
>[  2428.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91f00] width 1920 pitch 7680 (/4 1920)
>[  2428.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8f200]
>[  2428.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8f200] width 1920 pitch 7680 (/4 1920)
>[  2428.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91f00]
>[  2428.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91f00] width 1920 pitch 7680 (/4 1920)
>[  2428.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8f200]
>[  2428.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8f200] width 1920 pitch 7680 (/4 1920)
>[  2428.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91f00]
>[  2428.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91f00] width 1920 pitch 7680 (/4 1920)
>[  2456.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2456.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2456.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2456.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2471.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2471.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2496.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2496.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2496.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2496.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2496.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2496.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2496.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2496.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2496.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2496.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2496.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2496.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2496.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2496.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2496.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2496.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2496.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2496.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2496.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2496.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2497.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2497.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2497.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2497.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2497.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2497.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2498.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2498.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2498.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2498.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2498.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2498.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2498.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2498.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2498.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  2498.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  2501.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[  2501.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[  2503.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4b170]
>[  2503.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4b170] width 1920 pitch 7680 (/4 1920)
>[  2503.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50640]
>[  2503.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50640] width 1920 pitch 7680 (/4 1920)
>[  2503.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4b170]
>[  2503.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4b170] width 1920 pitch 7680 (/4 1920)
>[  2503.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50640]
>[  2503.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50640] width 1920 pitch 7680 (/4 1920)
>[  2503.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4b170]
>[  2503.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4b170] width 1920 pitch 7680 (/4 1920)
>[  2503.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50640]
>[  2503.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50640] width 1920 pitch 7680 (/4 1920)
>[  2503.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4b170]
>[  2503.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4b170] width 1920 pitch 7680 (/4 1920)
>[  2503.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1a770]
>[  2503.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1a770] width 1920 pitch 7680 (/4 1920)
>[  2503.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50640]
>[  2503.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50640] width 1920 pitch 7680 (/4 1920)
>[  2503.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e486b0]
>[  2503.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e486b0] width 1920 pitch 7680 (/4 1920)
>[  2503.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a7d980]
>[  2503.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a7d980] width 1920 pitch 7680 (/4 1920)
>[  2503.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead770]
>[  2503.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead770] width 1920 pitch 7680 (/4 1920)
>[  2509.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4d990]
>[  2509.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4d990] width 1920 pitch 7680 (/4 1920)
>[  2516.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4fa00]
>[  2516.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4fa00] width 1920 pitch 7680 (/4 1920)
>[  2524.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2524.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2531.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2531.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2539.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291d9c0]
>[  2539.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291d9c0] width 1920 pitch 7680 (/4 1920)
>[  2539.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a57b10]
>[  2539.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a57b10] width 1920 pitch 7680 (/4 1920)
>[  2539.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2f0d0]
>[  2539.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2f0d0] width 1920 pitch 7680 (/4 1920)
>[  2539.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50420]
>[  2539.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50420] width 1920 pitch 7680 (/4 1920)
>[  2539.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c64140]
>[  2539.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c64140] width 1920 pitch 7680 (/4 1920)
>[  2539.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50420]
>[  2539.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50420] width 1920 pitch 7680 (/4 1920)
>[  2539.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c64140]
>[  2539.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c64140] width 1920 pitch 7680 (/4 1920)
>[  2539.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a50420]
>[  2540.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a50420] width 1920 pitch 7680 (/4 1920)
>[  2540.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c64140]
>[  2540.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c64140] width 1920 pitch 7680 (/4 1920)
>[  2557.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c63490]
>[  2557.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c63490] width 1920 pitch 7680 (/4 1920)
>[  2558.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972160]
>[  2558.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972160] width 1920 pitch 7680 (/4 1920)
>[  2558.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c63490]
>[  2558.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c63490] width 1920 pitch 7680 (/4 1920)
>[  2558.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291cec0]
>[  2558.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291cec0] width 1920 pitch 7680 (/4 1920)
>[  2558.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6bc00]
>[  2558.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6bc00] width 1920 pitch 7680 (/4 1920)
>[  2558.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b25820]
>[  2558.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b25820] width 1920 pitch 7680 (/4 1920)
>[  2558.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b258f0]
>[  2558.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b258f0] width 1920 pitch 7680 (/4 1920)
>[  2561.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972250]
>[  2561.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972250] width 1920 pitch 7680 (/4 1920)
>[  2576.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c50850]
>[  2576.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c50850] width 1920 pitch 7680 (/4 1920)
>[  2598.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26040]
>[  2598.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26040] width 1920 pitch 7680 (/4 1920)
>[  2598.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26880]
>[  2598.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26880] width 1920 pitch 7680 (/4 1920)
>[  2598.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26040]
>[  2598.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26040] width 1920 pitch 7680 (/4 1920)
>[  2598.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26880]
>[  2598.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26880] width 1920 pitch 7680 (/4 1920)
>[  2598.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2598.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2598.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26880]
>[  2598.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26880] width 1920 pitch 7680 (/4 1920)
>[  2598.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2598.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2598.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26880]
>[  2599.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26880] width 1920 pitch 7680 (/4 1920)
>[  2599.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2599.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2599.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29131f0]
>[  2599.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29131f0] width 1920 pitch 7680 (/4 1920)
>[  2599.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c50850]
>[  2599.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c50850] width 1920 pitch 7680 (/4 1920)
>[  2599.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6a7c0]
>[  2599.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6a7c0] width 1920 pitch 7680 (/4 1920)
>[  2599.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2599.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2600.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2913250]
>[  2600.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2913250] width 1920 pitch 7680 (/4 1920)
>[  2600.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2600.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2600.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2600.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2600.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2600.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2600.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2600.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2600.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6b7c0]
>[  2600.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6b7c0] width 1920 pitch 7680 (/4 1920)
>[  2600.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c50850]
>[  2600.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c50850] width 1920 pitch 7680 (/4 1920)
>[  2606.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2606.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2621.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58580]
>[  2621.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58580] width 1920 pitch 7680 (/4 1920)
>[  2636.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a495f0]
>[  2636.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a495f0] width 1920 pitch 7680 (/4 1920)
>[  2651.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a495f0]
>[  2651.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a495f0] width 1920 pitch 7680 (/4 1920)
>[  2666.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2914930]
>[  2666.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2914930] width 1920 pitch 7680 (/4 1920)
>[  2681.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f00f0]
>[  2681.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f00f0] width 1920 pitch 7680 (/4 1920)
>[  2696.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6a7c0]
>[  2696.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6a7c0] width 1920 pitch 7680 (/4 1920)
>[  2711.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e525b0]
>[  2711.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e525b0] width 1920 pitch 7680 (/4 1920)
>[  2741.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4aef0]
>[  2741.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4aef0] width 1920 pitch 7680 (/4 1920)
>[  2771.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43740]
>[  2771.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43740] width 1920 pitch 7680 (/4 1920)
>[  2786.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26040]
>[  2786.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26040] width 1920 pitch 7680 (/4 1920)
>[  2801.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[  2801.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[  2816.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[  2816.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[  2831.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2831.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2846.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26040]
>[  2846.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26040] width 1920 pitch 7680 (/4 1920)
>[  2852.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b26040]
>[  2852.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b26040] width 1920 pitch 7680 (/4 1920)
>[  2858.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2858.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2858.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2858.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2858.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2858.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2858.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2858.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e520e0]
>[  2858.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e520e0] width 1920 pitch 7680 (/4 1920)
>[  2859.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2859.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2861.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2861.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2862.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2862.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2862.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2862.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2862.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2862.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2862.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2862.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2862.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2862.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2862.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2862.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2862.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2863.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2863.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2863.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2863.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2863.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2863.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2863.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2863.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2863.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2863.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2863.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2863.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2863.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2864.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2864.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  2864.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51e00]
>[  2864.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51e00] width 1920 pitch 7680 (/4 1920)
>[  2876.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  2876.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3086.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3086.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3131.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3131.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3131.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3131.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3146.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3146.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3161.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3161.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3161.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3161.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3236.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3236.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3266.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3266.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3281.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3281.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3281.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3281.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3311.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3311.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3341.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3341.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3371.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c5ca50]
>[  3371.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c5ca50] width 1920 pitch 7680 (/4 1920)
>[  3371.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e58570]
>[  3371.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e58570] width 1920 pitch 7680 (/4 1920)
>[  3371.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3371.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3371.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1f00]
>[  3371.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1f00] width 1920 pitch 7680 (/4 1920)
>[  3371.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3371.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3371.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1f00]
>[  3371.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1f00] width 1920 pitch 7680 (/4 1920)
>[  3371.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3371.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3371.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1f00]
>[  3371.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1f00] width 1920 pitch 7680 (/4 1920)
>[  3371.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3371.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3371.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af1f00]
>[  3371.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af1f00] width 1920 pitch 7680 (/4 1920)
>[  3371.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b338d0]
>[  3371.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b338d0] width 1920 pitch 7680 (/4 1920)
>[  3372.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c63490]
>[  3372.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c63490] width 1920 pitch 7680 (/4 1920)
>[  3372.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e485f0]
>[  3372.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e485f0] width 1920 pitch 7680 (/4 1920)
>[  3372.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a470]
>[  3372.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a470] width 1920 pitch 7680 (/4 1920)
>[  3372.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a51930]
>[  3372.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a51930] width 1920 pitch 7680 (/4 1920)
>[  3372.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4d670]
>[  3372.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4d670] width 1920 pitch 7680 (/4 1920)
>[  3372.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a420d0]
>[  3373.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a420d0] width 1920 pitch 7680 (/4 1920)
>[  3375.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[  3375.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[  3375.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b384d0]
>[  3375.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b384d0] width 1920 pitch 7680 (/4 1920)
>[  3375.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[  3375.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[  3375.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3375.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3375.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3375.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3375.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3375.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af2420]
>[  3375.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af2420] width 1920 pitch 7680 (/4 1920)
>[  3375.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b220]
>[  3375.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b220] width 1920 pitch 7680 (/4 1920)
>[  3386.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44a00]
>[  3386.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44a00] width 1920 pitch 7680 (/4 1920)
>[  3391.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3391.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3391.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3391.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3392.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3392.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3392.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3392.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3392.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3392.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3392.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3392.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3392.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3392.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3392.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3392.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3392.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3392.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3392.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3392.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3392.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3392.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3392.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3392.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3393.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3393.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3393.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3393.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3393.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3393.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3394.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3394.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3394.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29140a0]
>[  3394.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29140a0] width 1920 pitch 7680 (/4 1920)
>[  3395.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938130]
>[  3395.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938130] width 1920 pitch 7680 (/4 1920)
>[  3396.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90ca0]
>[  3396.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90ca0] width 1920 pitch 7680 (/4 1920)
>[  3396.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4b4a0]
>[  3396.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4b4a0] width 1920 pitch 7680 (/4 1920)
>[  3396.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90ca0]
>[  3396.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90ca0] width 1920 pitch 7680 (/4 1920)
>[  3396.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4b4a0]
>[  3396.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4b4a0] width 1920 pitch 7680 (/4 1920)
>[  3396.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90ca0]
>[  3396.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90ca0] width 1920 pitch 7680 (/4 1920)
>[  3396.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4b4a0]
>[  3396.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4b4a0] width 1920 pitch 7680 (/4 1920)
>[  3396.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90ca0]
>[  3396.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90ca0] width 1920 pitch 7680 (/4 1920)
>[  3396.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a4b4a0]
>[  3396.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a4b4a0] width 1920 pitch 7680 (/4 1920)
>[  3401.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2913800]
>[  3401.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2913800] width 1920 pitch 7680 (/4 1920)
>[  3416.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a68550]
>[  3416.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a68550] width 1920 pitch 7680 (/4 1920)
>[  3446.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a68550]
>[  3446.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a68550] width 1920 pitch 7680 (/4 1920)
>[  3476.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c610d0]
>[  3476.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c610d0] width 1920 pitch 7680 (/4 1920)
>[  3521.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2c5d0]
>[  3521.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2c5d0] width 1920 pitch 7680 (/4 1920)
>[  3536.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a2dd0]
>[  3536.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a2dd0] width 1920 pitch 7680 (/4 1920)
>[  3551.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9200]
>[  3551.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9200] width 1920 pitch 7680 (/4 1920)
>[  3566.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2c5d0]
>[  3566.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2c5d0] width 1920 pitch 7680 (/4 1920)
>[  3581.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2af9ca0]
>[  3581.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2af9ca0] width 1920 pitch 7680 (/4 1920)
>[  3596.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293ca30]
>[  3596.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293ca30] width 1920 pitch 7680 (/4 1920)
>[  3611.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291fbd0]
>[  3611.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291fbd0] width 1920 pitch 7680 (/4 1920)
>[  3641.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292a050]
>[  3641.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292a050] width 1920 pitch 7680 (/4 1920)
>[  3656.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299bcc0]
>[  3656.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299bcc0] width 1920 pitch 7680 (/4 1920)
>[  3656.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c72600]
>[  3656.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c72600] width 1920 pitch 7680 (/4 1920)
>[  3701.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b180]
>[  3701.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b180] width 1920 pitch 7680 (/4 1920)
>[  3716.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afdb40]
>[  3716.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afdb40] width 1920 pitch 7680 (/4 1920)
>[  3746.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2924c30]
>[  3746.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2924c30] width 1920 pitch 7680 (/4 1920)
>[  3761.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2915be0]
>[  3761.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2915be0] width 1920 pitch 7680 (/4 1920)
>[  3956.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9200]
>[  3956.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9200] width 1920 pitch 7680 (/4 1920)
>[  3956.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a52050]
>[  3956.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a52050] width 1920 pitch 7680 (/4 1920)
>[  3971.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9200]
>[  3971.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9200] width 1920 pitch 7680 (/4 1920)
>[  4046.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9200]
>[  4046.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9200] width 1920 pitch 7680 (/4 1920)
>[  4046.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29249f0]
>[  4046.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29249f0] width 1920 pitch 7680 (/4 1920)
>[  4061.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b1b180]
>[  4061.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b1b180] width 1920 pitch 7680 (/4 1920)
>[  4091.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9200]
>[  4091.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9200] width 1920 pitch 7680 (/4 1920)
>[  4121.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cfa00]
>[  4121.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cfa00] width 1920 pitch 7680 (/4 1920)
>[  4151.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cfa00]
>[  4151.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cfa00] width 1920 pitch 7680 (/4 1920)
>[  4166.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4e4a0]
>[  4166.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4e4a0] width 1920 pitch 7680 (/4 1920)
>[  4196.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4d760]
>[  4196.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4d760] width 1920 pitch 7680 (/4 1920)
>[  4226.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4226.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4496.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4496.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4556.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afdb40]
>[  4556.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afdb40] width 1920 pitch 7680 (/4 1920)
>[  4571.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4571.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4601.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4601.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4616.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4d760]
>[  4616.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4d760] width 1920 pitch 7680 (/4 1920)
>[  4631.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4631.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4646.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4d760]
>[  4646.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4d760] width 1920 pitch 7680 (/4 1920)
>[  4691.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29726d0]
>[  4691.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29726d0] width 1920 pitch 7680 (/4 1920)
>[  4751.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293c5a0]
>[  4751.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293c5a0] width 1920 pitch 7680 (/4 1920)
>[  4766.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  4766.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  4781.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a91b00]
>[  4781.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a91b00] width 1920 pitch 7680 (/4 1920)
>[  4811.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  4811.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5261.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae3120]
>[  5261.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae3120] width 1920 pitch 7680 (/4 1920)
>[  5261.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5261.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5276.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae3120]
>[  5276.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae3120] width 1920 pitch 7680 (/4 1920)
>[  5471.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae3120]
>[  5471.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae3120] width 1920 pitch 7680 (/4 1920)
>[  5471.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5471.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5486.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ae3120]
>[  5486.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ae3120] width 1920 pitch 7680 (/4 1920)
>[  5546.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeccc0]
>[  5546.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeccc0] width 1920 pitch 7680 (/4 1920)
>[  5561.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5561.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5561.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeccc0]
>[  5561.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeccc0] width 1920 pitch 7680 (/4 1920)
>[  5636.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46a50]
>[  5636.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46a50] width 1920 pitch 7680 (/4 1920)
>[  5651.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeccc0]
>[  5651.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeccc0] width 1920 pitch 7680 (/4 1920)
>[  5651.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5651.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5666.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeccc0]
>[  5666.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeccc0] width 1920 pitch 7680 (/4 1920)
>[  5681.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5681.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5681.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aeccc0]
>[  5681.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aeccc0] width 1920 pitch 7680 (/4 1920)
>[  5711.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46a50]
>[  5711.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46a50] width 1920 pitch 7680 (/4 1920)
>[  5711.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2afe5d0]
>[  5711.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2afe5d0] width 1920 pitch 7680 (/4 1920)
>[  5726.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46a50]
>[  5726.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46a50] width 1920 pitch 7680 (/4 1920)
>[  5732.999] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  5732.999] (II) RADEON(0): Printing DDC gathered Modelines:
>[  5732.999] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  5823.133] (II) RADEON(0): RADEONSaveScreen(2)
>[  5823.133] (II) RADEON(0): RADEONSaveScreen(0)
>[  6198.276] (II) RADEON(0): RADEONSaveScreen(1)
>[  6199.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa5570]
>[  6199.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa5570] width 1920 pitch 7680 (/4 1920)
>[  6199.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e50a70]
>[  6199.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e50a70] width 1920 pitch 7680 (/4 1920)
>[  6229.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aee440]
>[  6229.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aee440] width 1920 pitch 7680 (/4 1920)
>[  6244.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0120]
>[  6244.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0120] width 1920 pitch 7680 (/4 1920)
>[  6245.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aee440]
>[  6245.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aee440] width 1920 pitch 7680 (/4 1920)
>[  6319.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8fdb0]
>[  6319.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8fdb0] width 1920 pitch 7680 (/4 1920)
>[  6334.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aee440]
>[  6334.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aee440] width 1920 pitch 7680 (/4 1920)
>[  6335.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0120]
>[  6335.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0120] width 1920 pitch 7680 (/4 1920)
>[  6769.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b47d20]
>[  6769.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b47d20] width 1920 pitch 7680 (/4 1920)
>[  6784.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d0120]
>[  6784.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d0120] width 1920 pitch 7680 (/4 1920)
>[  6826.657] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  6826.658] (II) RADEON(0): Printing DDC gathered Modelines:
>[  6826.658] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  6829.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51140]
>[  6829.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51140] width 1920 pitch 7680 (/4 1920)
>[  6917.125] (II) RADEON(0): RADEONSaveScreen(2)
>[  6917.125] (II) RADEON(0): RADEONSaveScreen(0)
>[  9004.832] (II) RADEON(0): RADEONSaveScreen(1)
>[  9011.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x16b6a70]
>[  9011.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x16b6a70] width 1920 pitch 7680 (/4 1920)
>[  9021.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2fb10]
>[  9021.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2fb10] width 1920 pitch 7680 (/4 1920)
>[  9036.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293c010]
>[  9036.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293c010] width 1920 pitch 7680 (/4 1920)
>[  9111.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44f30]
>[  9111.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44f30] width 1920 pitch 7680 (/4 1920)
>[  9126.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e56900]
>[  9126.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e56900] width 1920 pitch 7680 (/4 1920)
>[  9156.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa87c0]
>[  9156.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa87c0] width 1920 pitch 7680 (/4 1920)
>[  9171.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa87c0]
>[  9171.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa87c0] width 1920 pitch 7680 (/4 1920)
>[  9171.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36690]
>[  9171.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36690] width 1920 pitch 7680 (/4 1920)
>[  9231.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c35b50]
>[  9231.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c35b50] width 1920 pitch 7680 (/4 1920)
>[  9231.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa87c0]
>[  9231.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa87c0] width 1920 pitch 7680 (/4 1920)
>[  9246.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c35b50]
>[  9246.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c35b50] width 1920 pitch 7680 (/4 1920)
>[  9306.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36690]
>[  9306.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36690] width 1920 pitch 7680 (/4 1920)
>[  9306.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2975670]
>[  9306.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2975670] width 1920 pitch 7680 (/4 1920)
>[  9321.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36690]
>[  9321.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36690] width 1920 pitch 7680 (/4 1920)
>[  9336.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36690]
>[  9336.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36690] width 1920 pitch 7680 (/4 1920)
>[  9351.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36690]
>[  9351.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36690] width 1920 pitch 7680 (/4 1920)
>[  9381.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cbe10]
>[  9381.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cbe10] width 1920 pitch 7680 (/4 1920)
>[  9411.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4ab60]
>[  9411.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4ab60] width 1920 pitch 7680 (/4 1920)
>[  9486.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2976520]
>[  9486.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2976520] width 1920 pitch 7680 (/4 1920)
>[  9516.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2976520]
>[  9516.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2976520] width 1920 pitch 7680 (/4 1920)
>[  9529.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a37b50]
>[  9529.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a37b50] width 1920 pitch 7680 (/4 1920)
>[  9529.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8bea0]
>[  9529.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8bea0] width 1920 pitch 7680 (/4 1920)
>[  9531.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a8bd80]
>[  9531.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a8bd80] width 1920 pitch 7680 (/4 1920)
>[  9546.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9546.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9576.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9576.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9591.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9591.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9610.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9610.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9610.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9610.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9610.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9610.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9610.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9610.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9610.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9610.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9610.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9610.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9610.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9610.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9610.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9610.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9610.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9610.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9611.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9611.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9611.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9611.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9611.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9611.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9611.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9611.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9611.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9611.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9612.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9612.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9612.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9612.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9612.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9612.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9612.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9612.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9612.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9612.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9612.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9612.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9612.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9612.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9612.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2920d40]
>[  9612.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2920d40] width 1920 pitch 7680 (/4 1920)
>[  9615.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46e40]
>[  9615.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46e40] width 1920 pitch 7680 (/4 1920)
>[  9618.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6ae10]
>[  9618.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6ae10] width 1920 pitch 7680 (/4 1920)
>[  9618.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295af10]
>[  9618.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295af10] width 1920 pitch 7680 (/4 1920)
>[  9618.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a54710]
>[  9618.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a54710] width 1920 pitch 7680 (/4 1920)
>[  9618.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5e350]
>[  9618.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5e350] width 1920 pitch 7680 (/4 1920)
>[  9619.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295af10]
>[  9619.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295af10] width 1920 pitch 7680 (/4 1920)
>[  9619.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5e350]
>[  9619.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5e350] width 1920 pitch 7680 (/4 1920)
>[  9621.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa5510]
>[  9621.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa5510] width 1920 pitch 7680 (/4 1920)
>[  9636.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29779a0]
>[  9636.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29779a0] width 1920 pitch 7680 (/4 1920)
>[  9651.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab90d0]
>[  9651.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab90d0] width 1920 pitch 7680 (/4 1920)
>[  9666.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab0b80]
>[  9666.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab0b80] width 1920 pitch 7680 (/4 1920)
>[  9679.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab6650]
>[  9679.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab6650] width 1920 pitch 7680 (/4 1920)
>[  9679.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809450]
>[  9679.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809450] width 1920 pitch 7680 (/4 1920)
>[  9679.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9679.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9679.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab6650]
>[  9679.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab6650] width 1920 pitch 7680 (/4 1920)
>[  9679.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d03f0]
>[  9679.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d03f0] width 1920 pitch 7680 (/4 1920)
>[  9679.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab6650]
>[  9679.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab6650] width 1920 pitch 7680 (/4 1920)
>[  9679.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d03f0]
>[  9679.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d03f0] width 1920 pitch 7680 (/4 1920)
>[  9679.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab6650]
>[  9679.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab6650] width 1920 pitch 7680 (/4 1920)
>[  9679.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d03f0]
>[  9679.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d03f0] width 1920 pitch 7680 (/4 1920)
>[  9680.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4e7a0]
>[  9680.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4e7a0] width 1920 pitch 7680 (/4 1920)
>[  9680.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809450]
>[  9680.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809450] width 1920 pitch 7680 (/4 1920)
>[  9688.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[  9688.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[  9688.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9688.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9688.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[  9688.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[  9688.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9688.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9688.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[  9688.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[  9688.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9688.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9688.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[  9688.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[  9688.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9688.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9688.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[  9688.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[  9689.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9689.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9689.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cec80]
>[  9689.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cec80] width 1920 pitch 7680 (/4 1920)
>[  9689.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853bb0]
>[  9689.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853bb0] width 1920 pitch 7680 (/4 1920)
>[  9689.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b42200]
>[  9689.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b42200] width 1920 pitch 7680 (/4 1920)
>[  9689.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9689.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9689.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b42200]
>[  9689.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b42200] width 1920 pitch 7680 (/4 1920)
>[  9689.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297a390]
>[  9689.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297a390] width 1920 pitch 7680 (/4 1920)
>[  9689.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b42200]
>[  9689.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b42200] width 1920 pitch 7680 (/4 1920)
>[  9689.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2858a40]
>[  9689.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2858a40] width 1920 pitch 7680 (/4 1920)
>[  9689.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[  9689.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[  9692.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9692.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9692.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9692.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9692.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9692.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9692.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9692.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9692.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9692.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9692.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9692.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9692.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9692.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9692.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9692.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9693.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9693.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9693.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9693.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9693.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987ea0]
>[  9693.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987ea0] width 1920 pitch 7680 (/4 1920)
>[  9694.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9694.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9694.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b19d30]
>[  9694.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b19d30] width 1920 pitch 7680 (/4 1920)
>[  9694.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39a70]
>[  9694.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39a70] width 1920 pitch 7680 (/4 1920)
>[  9695.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9695.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9695.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90400]
>[  9695.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90400] width 1920 pitch 7680 (/4 1920)
>[  9695.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90400]
>[  9695.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90400] width 1920 pitch 7680 (/4 1920)
>[  9695.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285a660]
>[  9695.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285a660] width 1920 pitch 7680 (/4 1920)
>[  9695.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90400]
>[  9695.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90400] width 1920 pitch 7680 (/4 1920)
>[  9695.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9695.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9695.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90400]
>[  9695.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90400] width 1920 pitch 7680 (/4 1920)
>[  9695.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[  9695.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[  9696.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289d4d0]
>[  9696.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289d4d0] width 1920 pitch 7680 (/4 1920)
>[  9699.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45790]
>[  9699.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45790] width 1920 pitch 7680 (/4 1920)
>[  9699.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45c50]
>[  9699.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45c50] width 1920 pitch 7680 (/4 1920)
>[  9699.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295a3c0]
>[  9699.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295a3c0] width 1920 pitch 7680 (/4 1920)
>[  9726.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6cce0]
>[  9726.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6cce0] width 1920 pitch 7680 (/4 1920)
>[  9726.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865500]
>[  9726.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865500] width 1920 pitch 7680 (/4 1920)
>[  9741.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c6cce0]
>[  9741.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c6cce0] width 1920 pitch 7680 (/4 1920)
>[  9786.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a9e0]
>[  9786.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a9e0] width 1920 pitch 7680 (/4 1920)
>[  9801.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2885f00]
>[  9801.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2885f00] width 1920 pitch 7680 (/4 1920)
>[  9810.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab5790]
>[  9810.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab5790] width 1920 pitch 7680 (/4 1920)
>[  9810.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288e890]
>[  9810.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288e890] width 1920 pitch 7680 (/4 1920)
>[  9812.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29990f0]
>[  9812.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29990f0] width 1920 pitch 7680 (/4 1920)
>[  9813.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9813.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9813.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9813.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9813.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9813.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9813.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9813.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9813.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9813.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9813.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9814.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9814.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9814.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9814.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9814.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9814.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9814.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9814.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9814.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9815.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9815.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9815.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c35d30]
>[  9815.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c35d30] width 1920 pitch 7680 (/4 1920)
>[  9815.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9815.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9815.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c35d30]
>[  9815.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c35d30] width 1920 pitch 7680 (/4 1920)
>[  9815.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9815.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9815.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c51d80]
>[  9815.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c51d80] width 1920 pitch 7680 (/4 1920)
>[  9815.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c35d30]
>[  9815.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c35d30] width 1920 pitch 7680 (/4 1920)
>[  9816.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e48960]
>[  9816.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e48960] width 1920 pitch 7680 (/4 1920)
>[  9816.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0e0]
>[  9816.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0e0] width 1920 pitch 7680 (/4 1920)
>[  9816.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288d810]
>[  9816.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288d810] width 1920 pitch 7680 (/4 1920)
>[  9816.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0e0]
>[  9816.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0e0] width 1920 pitch 7680 (/4 1920)
>[  9816.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288d810]
>[  9816.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288d810] width 1920 pitch 7680 (/4 1920)
>[  9816.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0e0]
>[  9816.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0e0] width 1920 pitch 7680 (/4 1920)
>[  9816.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288d810]
>[  9816.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288d810] width 1920 pitch 7680 (/4 1920)
>[  9818.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c92d0]
>[  9818.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c92d0] width 1920 pitch 7680 (/4 1920)
>[  9818.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5de60]
>[  9818.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5de60] width 1920 pitch 7680 (/4 1920)
>[  9818.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2926750]
>[  9818.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2926750] width 1920 pitch 7680 (/4 1920)
>[  9831.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a22550]
>[  9831.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a22550] width 1920 pitch 7680 (/4 1920)
>[  9846.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2926750]
>[  9846.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2926750] width 1920 pitch 7680 (/4 1920)
>[  9846.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef7c70]
>[  9846.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef7c70] width 1920 pitch 7680 (/4 1920)
>[  9846.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f267e0]
>[  9846.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f267e0] width 1920 pitch 7680 (/4 1920)
>[  9861.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d820]
>[  9861.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d820] width 1920 pitch 7680 (/4 1920)
>[  9876.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2f620]
>[  9876.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2f620] width 1920 pitch 7680 (/4 1920)
>[  9906.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2825140]
>[  9906.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2825140] width 1920 pitch 7680 (/4 1920)
>[  9921.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282ac20]
>[  9921.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282ac20] width 1920 pitch 7680 (/4 1920)
>[  9968.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[  9968.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[  9968.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[  9968.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[  9993.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9993.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9993.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9993.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9993.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9993.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9993.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9993.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9993.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9993.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9993.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9993.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9993.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9993.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9993.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9993.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9994.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9994.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9994.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9994.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9994.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a3db60]
>[  9994.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a3db60] width 1920 pitch 7680 (/4 1920)
>[  9994.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[  9994.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[  9994.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23300]
>[  9994.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23300] width 1920 pitch 7680 (/4 1920)
>[  9994.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6ea80]
>[  9994.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6ea80] width 1920 pitch 7680 (/4 1920)
>[  9995.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23300]
>[  9995.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23300] width 1920 pitch 7680 (/4 1920)
>[  9995.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6ea80]
>[  9995.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6ea80] width 1920 pitch 7680 (/4 1920)
>[  9995.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23300]
>[  9995.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23300] width 1920 pitch 7680 (/4 1920)
>[  9995.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f25110]
>[  9995.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f25110] width 1920 pitch 7680 (/4 1920)
>[  9995.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23300]
>[  9995.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23300] width 1920 pitch 7680 (/4 1920)
>[  9995.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f25110]
>[  9995.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f25110] width 1920 pitch 7680 (/4 1920)
>[  9997.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edb3a0]
>[  9997.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edb3a0] width 1920 pitch 7680 (/4 1920)
>[ 10005.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83210]
>[ 10005.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83210] width 1920 pitch 7680 (/4 1920)
>[ 10005.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f532a0]
>[ 10005.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f532a0] width 1920 pitch 7680 (/4 1920)
>[ 10005.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea4c00]
>[ 10005.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea4c00] width 1920 pitch 7680 (/4 1920)
>[ 10010.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9f010]
>[ 10010.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9f010] width 1920 pitch 7680 (/4 1920)
>[ 10011.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9ebc0]
>[ 10011.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9ebc0] width 1920 pitch 7680 (/4 1920)
>[ 10026.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e686d0]
>[ 10026.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e686d0] width 1920 pitch 7680 (/4 1920)
>[ 10036.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa08f0]
>[ 10036.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa08f0] width 1920 pitch 7680 (/4 1920)
>[ 10036.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa08f0]
>[ 10036.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa08f0] width 1920 pitch 7680 (/4 1920)
>[ 10036.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0540]
>[ 10036.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0540] width 1920 pitch 7680 (/4 1920)
>[ 10036.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2460]
>[ 10036.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2460] width 1920 pitch 7680 (/4 1920)
>[ 10036.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2460]
>[ 10036.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2460] width 1920 pitch 7680 (/4 1920)
>[ 10036.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebf580]
>[ 10036.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebf580] width 1920 pitch 7680 (/4 1920)
>[ 10036.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2460]
>[ 10036.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2460] width 1920 pitch 7680 (/4 1920)
>[ 10036.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facca0]
>[ 10036.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facca0] width 1920 pitch 7680 (/4 1920)
>[ 10036.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facca0]
>[ 10036.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facca0] width 1920 pitch 7680 (/4 1920)
>[ 10036.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facca0]
>[ 10036.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facca0] width 1920 pitch 7680 (/4 1920)
>[ 10036.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10036.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10036.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10037.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800ba0]
>[ 10037.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800ba0] width 1920 pitch 7680 (/4 1920)
>[ 10051.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81ee0]
>[ 10051.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81ee0] width 1920 pitch 7680 (/4 1920)
>[ 10101.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc05d0]
>[ 10101.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc05d0] width 1920 pitch 7680 (/4 1920)
>[ 10109.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9de20]
>[ 10109.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9de20] width 1920 pitch 7680 (/4 1920)
>[ 10109.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7bed0]
>[ 10109.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7bed0] width 1920 pitch 7680 (/4 1920)
>[ 10109.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9b110]
>[ 10109.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9b110] width 1920 pitch 7680 (/4 1920)
>[ 10109.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facef0]
>[ 10109.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facef0] width 1920 pitch 7680 (/4 1920)
>[ 10109.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9b110]
>[ 10109.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9b110] width 1920 pitch 7680 (/4 1920)
>[ 10109.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facef0]
>[ 10109.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facef0] width 1920 pitch 7680 (/4 1920)
>[ 10109.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9b110]
>[ 10109.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9b110] width 1920 pitch 7680 (/4 1920)
>[ 10109.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facef0]
>[ 10109.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facef0] width 1920 pitch 7680 (/4 1920)
>[ 10109.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9b110]
>[ 10109.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9b110] width 1920 pitch 7680 (/4 1920)
>[ 10109.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facef0]
>[ 10109.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facef0] width 1920 pitch 7680 (/4 1920)
>[ 10109.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9b110]
>[ 10109.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9b110] width 1920 pitch 7680 (/4 1920)
>[ 10109.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facef0]
>[ 10109.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facef0] width 1920 pitch 7680 (/4 1920)
>[ 10116.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10116.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b810]
>[ 10119.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b810] width 1920 pitch 7680 (/4 1920)
>[ 10119.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10119.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10119.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10119.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6950]
>[ 10119.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6950] width 1920 pitch 7680 (/4 1920)
>[ 10124.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec19d0]
>[ 10124.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec19d0] width 1920 pitch 7680 (/4 1920)
>[ 10124.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0db0]
>[ 10125.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0db0] width 1920 pitch 7680 (/4 1920)
>[ 10125.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0db0]
>[ 10125.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0db0] width 1920 pitch 7680 (/4 1920)
>[ 10125.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0db0]
>[ 10125.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0db0] width 1920 pitch 7680 (/4 1920)
>[ 10125.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0db0]
>[ 10125.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0db0] width 1920 pitch 7680 (/4 1920)
>[ 10125.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec19d0]
>[ 10125.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec19d0] width 1920 pitch 7680 (/4 1920)
>[ 10125.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec1820]
>[ 10125.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec1820] width 1920 pitch 7680 (/4 1920)
>[ 10125.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec19d0]
>[ 10125.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec19d0] width 1920 pitch 7680 (/4 1920)
>[ 10125.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec1820]
>[ 10125.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec1820] width 1920 pitch 7680 (/4 1920)
>[ 10125.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b4f0]
>[ 10125.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b4f0] width 1920 pitch 7680 (/4 1920)
>[ 10125.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec19d0]
>[ 10125.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec19d0] width 1920 pitch 7680 (/4 1920)
>[ 10131.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec19d0]
>[ 10131.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec19d0] width 1920 pitch 7680 (/4 1920)
>[ 10133.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b810]
>[ 10133.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b810] width 1920 pitch 7680 (/4 1920)
>[ 10133.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10133.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd8e0]
>[ 10133.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd8e0] width 1920 pitch 7680 (/4 1920)
>[ 10133.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f97fe0]
>[ 10133.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f97fe0] width 1920 pitch 7680 (/4 1920)
>[ 10161.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b810]
>[ 10161.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b810] width 1920 pitch 7680 (/4 1920)
>[ 10176.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7b810]
>[ 10176.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7b810] width 1920 pitch 7680 (/4 1920)
>[ 10191.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffd080]
>[ 10191.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffd080] width 1920 pitch 7680 (/4 1920)
>[ 10221.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281b0b0]
>[ 10221.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281b0b0] width 1920 pitch 7680 (/4 1920)
>[ 10236.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f552d0]
>[ 10236.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f552d0] width 1920 pitch 7680 (/4 1920)
>[ 10242.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10242.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4a0]
>[ 10242.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4a0] width 1920 pitch 7680 (/4 1920)
>[ 10242.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10242.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10254.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e210]
>[ 10254.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e210] width 1920 pitch 7680 (/4 1920)
>[ 10255.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7a0e0]
>[ 10255.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7a0e0] width 1920 pitch 7680 (/4 1920)
>[ 10255.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10255.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10255.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10255.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10255.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10255.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53660]
>[ 10255.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53660] width 1920 pitch 7680 (/4 1920)
>[ 10255.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f536c0]
>[ 10255.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f536c0] width 1920 pitch 7680 (/4 1920)
>[ 10261.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec540]
>[ 10261.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec540] width 1920 pitch 7680 (/4 1920)
>[ 10261.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10261.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9af10]
>[ 10261.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9af10] width 1920 pitch 7680 (/4 1920)
>[ 10261.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10261.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9af10]
>[ 10261.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9af10] width 1920 pitch 7680 (/4 1920)
>[ 10261.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10261.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9af10]
>[ 10261.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9af10] width 1920 pitch 7680 (/4 1920)
>[ 10261.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10261.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9af10]
>[ 10261.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9af10] width 1920 pitch 7680 (/4 1920)
>[ 10261.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10261.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9af10]
>[ 10261.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9af10] width 1920 pitch 7680 (/4 1920)
>[ 10261.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34e10]
>[ 10261.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34e10] width 1920 pitch 7680 (/4 1920)
>[ 10264.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10264.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10264.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10264.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10264.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10265.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10265.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10265.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10265.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10265.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[ 10265.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[ 10265.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10265.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10296.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0ea0]
>[ 10296.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0ea0] width 1920 pitch 7680 (/4 1920)
>[ 10311.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbe5e0]
>[ 10311.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbe5e0] width 1920 pitch 7680 (/4 1920)
>[ 10326.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10326.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10341.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10341.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10386.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f83430]
>[ 10386.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f83430] width 1920 pitch 7680 (/4 1920)
>[ 10401.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b060]
>[ 10401.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b060] width 1920 pitch 7680 (/4 1920)
>[ 10416.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10416.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10420.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10420.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0dd0]
>[ 10420.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0dd0] width 1920 pitch 7680 (/4 1920)
>[ 10420.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10420.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10420.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10420.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10420.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10420.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10421.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0dd0]
>[ 10421.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0dd0] width 1920 pitch 7680 (/4 1920)
>[ 10421.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbe5e0]
>[ 10421.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbe5e0] width 1920 pitch 7680 (/4 1920)
>[ 10421.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10421.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10421.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0dd0]
>[ 10421.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0dd0] width 1920 pitch 7680 (/4 1920)
>[ 10421.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbe5e0]
>[ 10421.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbe5e0] width 1920 pitch 7680 (/4 1920)
>[ 10421.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f34f00]
>[ 10421.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f34f00] width 1920 pitch 7680 (/4 1920)
>[ 10421.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0dd0]
>[ 10421.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0dd0] width 1920 pitch 7680 (/4 1920)
>[ 10421.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbe5e0]
>[ 10421.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbe5e0] width 1920 pitch 7680 (/4 1920)
>[ 10427.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10427.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10427.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10427.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10427.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10428.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10428.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10428.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10428.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10431.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e140]
>[ 10431.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e140] width 1920 pitch 7680 (/4 1920)
>[ 10446.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec0f80]
>[ 10446.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec0f80] width 1920 pitch 7680 (/4 1920)
>[ 10475.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93610]
>[ 10475.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93610] width 1920 pitch 7680 (/4 1920)
>[ 10476.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1f690]
>[ 10476.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1f690] width 1920 pitch 7680 (/4 1920)
>[ 10487.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f36330]
>[ 10487.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f36330] width 1920 pitch 7680 (/4 1920)
>[ 10536.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f988a0]
>[ 10536.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f988a0] width 1920 pitch 7680 (/4 1920)
>[ 10551.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4250]
>[ 10551.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4250] width 1920 pitch 7680 (/4 1920)
>[ 10592.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10592.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6510]
>[ 10592.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6510] width 1920 pitch 7680 (/4 1920)
>[ 10592.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc96f0]
>[ 10592.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc96f0] width 1920 pitch 7680 (/4 1920)
>[ 10618.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbebc0]
>[ 10618.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbebc0] width 1920 pitch 7680 (/4 1920)
>[ 10618.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39970]
>[ 10618.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39970] width 1920 pitch 7680 (/4 1920)
>[ 10618.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbebc0]
>[ 10618.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbebc0] width 1920 pitch 7680 (/4 1920)
>[ 10618.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39970]
>[ 10618.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39970] width 1920 pitch 7680 (/4 1920)
>[ 10618.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbebc0]
>[ 10618.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbebc0] width 1920 pitch 7680 (/4 1920)
>[ 10618.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83eb0]
>[ 10618.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83eb0] width 1920 pitch 7680 (/4 1920)
>[ 10618.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbebc0]
>[ 10618.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbebc0] width 1920 pitch 7680 (/4 1920)
>[ 10618.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83eb0]
>[ 10618.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83eb0] width 1920 pitch 7680 (/4 1920)
>[ 10618.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbebc0]
>[ 10619.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbebc0] width 1920 pitch 7680 (/4 1920)
>[ 10619.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39970]
>[ 10619.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39970] width 1920 pitch 7680 (/4 1920)
>[ 10619.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39970]
>[ 10619.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39970] width 1920 pitch 7680 (/4 1920)
>[ 10619.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83eb0]
>[ 10619.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83eb0] width 1920 pitch 7680 (/4 1920)
>[ 10625.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10625.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6c30]
>[ 10625.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6c30] width 1920 pitch 7680 (/4 1920)
>[ 10625.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb72a0]
>[ 10625.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb72a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4d0]
>[ 10651.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4d0] width 1920 pitch 7680 (/4 1920)
>[ 10651.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8eee0]
>[ 10651.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8eee0] width 1920 pitch 7680 (/4 1920)
>[ 10651.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4d0]
>[ 10651.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4d0] width 1920 pitch 7680 (/4 1920)
>[ 10651.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6850]
>[ 10651.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6850] width 1920 pitch 7680 (/4 1920)
>[ 10651.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc86a0]
>[ 10651.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc86a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6850]
>[ 10651.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6850] width 1920 pitch 7680 (/4 1920)
>[ 10651.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc86a0]
>[ 10651.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc86a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6850]
>[ 10651.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6850] width 1920 pitch 7680 (/4 1920)
>[ 10651.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc86a0]
>[ 10651.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc86a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6850]
>[ 10651.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6850] width 1920 pitch 7680 (/4 1920)
>[ 10651.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc86a0]
>[ 10651.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc86a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa6850]
>[ 10651.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa6850] width 1920 pitch 7680 (/4 1920)
>[ 10651.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc86a0]
>[ 10651.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc86a0] width 1920 pitch 7680 (/4 1920)
>[ 10651.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4d0]
>[ 10651.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4d0] width 1920 pitch 7680 (/4 1920)
>[ 10651.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eee590]
>[ 10651.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eee590] width 1920 pitch 7680 (/4 1920)
>[ 10651.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9e4d0]
>[ 10651.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9e4d0] width 1920 pitch 7680 (/4 1920)
>[ 10677.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb68b0]
>[ 10677.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb68b0] width 1920 pitch 7680 (/4 1920)
>[ 10677.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb09c0]
>[ 10677.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb09c0] width 1920 pitch 7680 (/4 1920)
>[ 10677.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f89ee0]
>[ 10677.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f89ee0] width 1920 pitch 7680 (/4 1920)
>[ 10677.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb68b0]
>[ 10677.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb68b0] width 1920 pitch 7680 (/4 1920)
>[ 10677.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f89ee0]
>[ 10677.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f89ee0] width 1920 pitch 7680 (/4 1920)
>[ 10677.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb68b0]
>[ 10677.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb68b0] width 1920 pitch 7680 (/4 1920)
>[ 10677.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f89ee0]
>[ 10677.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f89ee0] width 1920 pitch 7680 (/4 1920)
>[ 10677.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb68b0]
>[ 10677.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb68b0] width 1920 pitch 7680 (/4 1920)
>[ 10677.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f89ee0]
>[ 10677.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f89ee0] width 1920 pitch 7680 (/4 1920)
>[ 10677.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb68b0]
>[ 10677.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb68b0] width 1920 pitch 7680 (/4 1920)
>[ 10677.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5d190]
>[ 10677.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5d190] width 1920 pitch 7680 (/4 1920)
>[ 10677.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faba80]
>[ 10677.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faba80] width 1920 pitch 7680 (/4 1920)
>[ 10677.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbbd20]
>[ 10677.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbbd20] width 1920 pitch 7680 (/4 1920)
>[ 10677.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faba80]
>[ 10677.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faba80] width 1920 pitch 7680 (/4 1920)
>[ 10701.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f53480]
>[ 10701.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f53480] width 1920 pitch 7680 (/4 1920)
>[ 10716.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faeae0]
>[ 10716.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faeae0] width 1920 pitch 7680 (/4 1920)
>[ 10731.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc35c0]
>[ 10731.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc35c0] width 1920 pitch 7680 (/4 1920)
>[ 10761.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff33f0]
>[ 10761.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff33f0] width 1920 pitch 7680 (/4 1920)
>[ 10794.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10794.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10795.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb5a70]
>[ 10795.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb5a70] width 1920 pitch 7680 (/4 1920)
>[ 10795.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10795.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10796.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fec0c0]
>[ 10796.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fec0c0] width 1920 pitch 7680 (/4 1920)
>[ 10797.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff19a0]
>[ 10798.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff19a0] width 1920 pitch 7680 (/4 1920)
>[ 10798.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe56e0]
>[ 10798.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe56e0] width 1920 pitch 7680 (/4 1920)
>[ 10798.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2feb2b0]
>[ 10798.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2feb2b0] width 1920 pitch 7680 (/4 1920)
>[ 10798.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadeb0]
>[ 10798.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadeb0] width 1920 pitch 7680 (/4 1920)
>[ 10798.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe88f0]
>[ 10798.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe88f0] width 1920 pitch 7680 (/4 1920)
>[ 10799.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaf8d0]
>[ 10799.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaf8d0] width 1920 pitch 7680 (/4 1920)
>[ 10805.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10805.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10805.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10805.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10805.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10805.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10805.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10805.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10805.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10805.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10805.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10805.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10805.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10805.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10805.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10805.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10805.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10805.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10806.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10806.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10806.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10806.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10806.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10806.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10806.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f93ed0]
>[ 10806.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f93ed0] width 1920 pitch 7680 (/4 1920)
>[ 10807.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4d10]
>[ 10807.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4d10] width 1920 pitch 7680 (/4 1920)
>[ 10807.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10807.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10811.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7cb0]
>[ 10811.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7cb0] width 1920 pitch 7680 (/4 1920)
>[ 10811.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10812.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10812.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 10812.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 10812.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10812.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10812.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 10812.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 10812.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10812.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10812.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 10812.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 10812.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10812.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10821.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2be9210]
>[ 10821.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2be9210] width 1920 pitch 7680 (/4 1920)
>[ 10829.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb3d10]
>[ 10829.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb3d10] width 1920 pitch 7680 (/4 1920)
>[ 10836.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f89ab0]
>[ 10836.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f89ab0] width 1920 pitch 7680 (/4 1920)
>[ 10949.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb3e30]
>[ 10949.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb3e30] width 1920 pitch 7680 (/4 1920)
>[ 10949.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10949.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10949.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8d9c0]
>[ 10949.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8d9c0] width 1920 pitch 7680 (/4 1920)
>[ 10949.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb59d0]
>[ 10949.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb59d0] width 1920 pitch 7680 (/4 1920)
>[ 10971.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 10971.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 10986.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2be9210]
>[ 10986.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2be9210] width 1920 pitch 7680 (/4 1920)
>[ 10986.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a0c0]
>[ 10986.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a0c0] width 1920 pitch 7680 (/4 1920)
>[ 10989.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8c3f0]
>[ 10989.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8c3f0] width 1920 pitch 7680 (/4 1920)
>[ 11002.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11002.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11004.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94070]
>[ 11004.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94070] width 1920 pitch 7680 (/4 1920)
>[ 11004.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11004.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11021.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caa630]
>[ 11021.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caa630] width 1920 pitch 7680 (/4 1920)
>[ 11021.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11021.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11023.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94070]
>[ 11023.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94070] width 1920 pitch 7680 (/4 1920)
>[ 11023.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94070]
>[ 11024.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94070] width 1920 pitch 7680 (/4 1920)
>[ 11024.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11024.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11024.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94070]
>[ 11024.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94070] width 1920 pitch 7680 (/4 1920)
>[ 11024.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11024.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11024.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caa630]
>[ 11024.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caa630] width 1920 pitch 7680 (/4 1920)
>[ 11031.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11031.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11035.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11035.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11035.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb10c0]
>[ 11035.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb10c0] width 1920 pitch 7680 (/4 1920)
>[ 11046.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c76b00]
>[ 11046.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c76b00] width 1920 pitch 7680 (/4 1920)
>[ 11046.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1f00]
>[ 11046.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1f00] width 1920 pitch 7680 (/4 1920)
>[ 11076.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c76b00]
>[ 11076.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c76b00] width 1920 pitch 7680 (/4 1920)
>[ 11091.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caa630]
>[ 11091.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caa630] width 1920 pitch 7680 (/4 1920)
>[ 11121.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6b1a0]
>[ 11121.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6b1a0] width 1920 pitch 7680 (/4 1920)
>[ 11151.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300df20]
>[ 11151.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300df20] width 1920 pitch 7680 (/4 1920)
>[ 11166.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30070]
>[ 11166.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30070] width 1920 pitch 7680 (/4 1920)
>[ 11181.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc28b0]
>[ 11181.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc28b0] width 1920 pitch 7680 (/4 1920)
>[ 11196.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30070]
>[ 11196.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30070] width 1920 pitch 7680 (/4 1920)
>[ 11211.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9930]
>[ 11211.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9930] width 1920 pitch 7680 (/4 1920)
>[ 11271.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd07a0]
>[ 11271.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd07a0] width 1920 pitch 7680 (/4 1920)
>[ 11286.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd42e0]
>[ 11286.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd42e0] width 1920 pitch 7680 (/4 1920)
>[ 11316.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd42e0]
>[ 11316.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd42e0] width 1920 pitch 7680 (/4 1920)
>[ 11331.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd32d0]
>[ 11331.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd32d0] width 1920 pitch 7680 (/4 1920)
>[ 11346.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6b1a0]
>[ 11346.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6b1a0] width 1920 pitch 7680 (/4 1920)
>[ 11391.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9930]
>[ 11391.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9930] width 1920 pitch 7680 (/4 1920)
>[ 11406.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe9020]
>[ 11406.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe9020] width 1920 pitch 7680 (/4 1920)
>[ 11616.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd32d0]
>[ 11616.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd32d0] width 1920 pitch 7680 (/4 1920)
>[ 11631.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a30070]
>[ 11631.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a30070] width 1920 pitch 7680 (/4 1920)
>[ 11677.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2e20]
>[ 11677.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2e20] width 1920 pitch 7680 (/4 1920)
>[ 11677.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[ 11677.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[ 11677.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 11677.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 11677.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b0e5e0]
>[ 11677.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b0e5e0] width 1920 pitch 7680 (/4 1920)
>[ 11752.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a39760]
>[ 11752.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a39760] width 1920 pitch 7680 (/4 1920)
>[ 11753.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x284b290]
>[ 11753.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x284b290] width 1920 pitch 7680 (/4 1920)
>[ 11871.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2858a40]
>[ 11871.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2858a40] width 1920 pitch 7680 (/4 1920)
>[ 11899.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 11899.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 11899.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 11899.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 11916.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27d03f0]
>[ 11916.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27d03f0] width 1920 pitch 7680 (/4 1920)
>[ 11922.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7fd20]
>[ 11922.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7fd20] width 1920 pitch 7680 (/4 1920)
>[ 11927.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc00c0]
>[ 11927.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc00c0] width 1920 pitch 7680 (/4 1920)
>[ 11931.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd72f0]
>[ 11931.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd72f0] width 1920 pitch 7680 (/4 1920)
>[ 11933.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95f40]
>[ 11933.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95f40] width 1920 pitch 7680 (/4 1920)
>[ 11961.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95f40]
>[ 11961.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95f40] width 1920 pitch 7680 (/4 1920)
>[ 11961.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4550]
>[ 11961.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4550] width 1920 pitch 7680 (/4 1920)
>[ 11976.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4530]
>[ 11976.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4530] width 1920 pitch 7680 (/4 1920)
>[ 11991.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95f40]
>[ 11991.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95f40] width 1920 pitch 7680 (/4 1920)
>[ 12006.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe1e70]
>[ 12006.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe1e70] width 1920 pitch 7680 (/4 1920)
>[ 12021.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95f40]
>[ 12021.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95f40] width 1920 pitch 7680 (/4 1920)
>[ 12036.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95d80]
>[ 12036.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95d80] width 1920 pitch 7680 (/4 1920)
>[ 12040.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x284b290]
>[ 12040.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x284b290] width 1920 pitch 7680 (/4 1920)
>[ 12041.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12041.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12041.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12041.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12041.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12041.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12041.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12041.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12041.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12041.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12041.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12041.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12041.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12041.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12041.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12041.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12041.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12041.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12041.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12041.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12042.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12042.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12042.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12042.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12042.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cacc60]
>[ 12042.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cacc60] width 1920 pitch 7680 (/4 1920)
>[ 12042.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d5010]
>[ 12042.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d5010] width 1920 pitch 7680 (/4 1920)
>[ 12042.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b42200]
>[ 12042.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b42200] width 1920 pitch 7680 (/4 1920)
>[ 12042.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef80]
>[ 12043.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef80] width 1920 pitch 7680 (/4 1920)
>[ 12043.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x284b290]
>[ 12043.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x284b290] width 1920 pitch 7680 (/4 1920)
>[ 12043.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbb400]
>[ 12043.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbb400] width 1920 pitch 7680 (/4 1920)
>[ 12066.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbb400]
>[ 12066.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbb400] width 1920 pitch 7680 (/4 1920)
>[ 12096.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f390c0]
>[ 12096.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f390c0] width 1920 pitch 7680 (/4 1920)
>[ 12111.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe3330]
>[ 12111.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe3330] width 1920 pitch 7680 (/4 1920)
>[ 12111.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb83f0]
>[ 12111.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb83f0] width 1920 pitch 7680 (/4 1920)
>[ 12126.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1af0]
>[ 12126.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1af0] width 1920 pitch 7680 (/4 1920)
>[ 12141.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8edd0]
>[ 12141.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8edd0] width 1920 pitch 7680 (/4 1920)
>[ 12156.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28597e0]
>[ 12156.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28597e0] width 1920 pitch 7680 (/4 1920)
>[ 12171.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7250]
>[ 12171.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7250] width 1920 pitch 7680 (/4 1920)
>[ 12171.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f170]
>[ 12171.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f170] width 1920 pitch 7680 (/4 1920)
>[ 12186.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x286d760]
>[ 12186.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x286d760] width 1920 pitch 7680 (/4 1920)
>[ 12201.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5d500]
>[ 12201.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5d500] width 1920 pitch 7680 (/4 1920)
>[ 12201.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46300]
>[ 12201.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46300] width 1920 pitch 7680 (/4 1920)
>[ 12216.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f957e0]
>[ 12216.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f957e0] width 1920 pitch 7680 (/4 1920)
>[ 12227.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95c20]
>[ 12227.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95c20] width 1920 pitch 7680 (/4 1920)
>[ 12231.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95c20]
>[ 12231.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95c20] width 1920 pitch 7680 (/4 1920)
>[ 12231.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12231.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12237.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12237.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12238.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f95c20]
>[ 12238.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f95c20] width 1920 pitch 7680 (/4 1920)
>[ 12246.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12246.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12261.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12261.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12261.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12261.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12321.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12321.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12321.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12321.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12336.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12336.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12360.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12360.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12360.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12360.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12360.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12360.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12360.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12360.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12360.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12360.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12360.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12360.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12361.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12361.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12361.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12361.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12361.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12361.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12361.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12361.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12362.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12362.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12362.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12362.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12363.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93ec0]
>[ 12363.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93ec0] width 1920 pitch 7680 (/4 1920)
>[ 12363.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12363.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12363.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12363.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12363.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12363.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12363.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12363.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12363.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 12363.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 12363.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12363.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12381.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12381.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12396.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7f420]
>[ 12396.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7f420] width 1920 pitch 7680 (/4 1920)
>[ 12411.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1380]
>[ 12411.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1380] width 1920 pitch 7680 (/4 1920)
>[ 12415.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f881c0]
>[ 12415.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f881c0] width 1920 pitch 7680 (/4 1920)
>[ 12426.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbae00]
>[ 12426.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbae00] width 1920 pitch 7680 (/4 1920)
>[ 12514.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc9d00]
>[ 12514.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc9d00] width 1920 pitch 7680 (/4 1920)
>[ 12516.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b350]
>[ 12516.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b350] width 1920 pitch 7680 (/4 1920)
>[ 12531.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1f0f0]
>[ 12531.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1f0f0] width 1920 pitch 7680 (/4 1920)
>[ 12546.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbb270]
>[ 12546.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbb270] width 1920 pitch 7680 (/4 1920)
>[ 12621.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11e70]
>[ 12621.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11e70] width 1920 pitch 7680 (/4 1920)
>[ 12636.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca670]
>[ 12636.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca670] width 1920 pitch 7680 (/4 1920)
>[ 12643.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11150]
>[ 12643.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11150] width 1920 pitch 7680 (/4 1920)
>[ 12643.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a3d0]
>[ 12643.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a3d0] width 1920 pitch 7680 (/4 1920)
>[ 12643.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd12c0]
>[ 12644.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd12c0] width 1920 pitch 7680 (/4 1920)
>[ 12644.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a3d0]
>[ 12644.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a3d0] width 1920 pitch 7680 (/4 1920)
>[ 12696.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 12696.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 12711.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8b2f0]
>[ 12711.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8b2f0] width 1920 pitch 7680 (/4 1920)
>[ 12726.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba240]
>[ 12726.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba240] width 1920 pitch 7680 (/4 1920)
>[ 12741.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba680]
>[ 12741.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba680] width 1920 pitch 7680 (/4 1920)
>[ 12756.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1380]
>[ 12756.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1380] width 1920 pitch 7680 (/4 1920)
>[ 12771.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1b7c0]
>[ 12771.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1b7c0] width 1920 pitch 7680 (/4 1920)
>[ 12786.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba240]
>[ 12786.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba240] width 1920 pitch 7680 (/4 1920)
>[ 12801.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa80c0]
>[ 12801.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa80c0] width 1920 pitch 7680 (/4 1920)
>[ 12816.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6ed90]
>[ 12816.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6ed90] width 1920 pitch 7680 (/4 1920)
>[ 12831.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae4c0]
>[ 12831.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae4c0] width 1920 pitch 7680 (/4 1920)
>[ 12861.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd12c0]
>[ 12861.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd12c0] width 1920 pitch 7680 (/4 1920)
>[ 12876.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba680]
>[ 12876.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba680] width 1920 pitch 7680 (/4 1920)
>[ 12936.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 12936.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 12951.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caa3f0]
>[ 12951.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caa3f0] width 1920 pitch 7680 (/4 1920)
>[ 12981.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1fc90]
>[ 12981.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1fc90] width 1920 pitch 7680 (/4 1920)
>[ 12996.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efa370]
>[ 12996.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efa370] width 1920 pitch 7680 (/4 1920)
>[ 13008.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d140]
>[ 13008.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d140] width 1920 pitch 7680 (/4 1920)
>[ 13011.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300f730]
>[ 13011.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300f730] width 1920 pitch 7680 (/4 1920)
>[ 13041.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1ec00]
>[ 13041.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1ec00] width 1920 pitch 7680 (/4 1920)
>[ 13056.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19b10]
>[ 13056.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19b10] width 1920 pitch 7680 (/4 1920)
>[ 13071.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300e990]
>[ 13071.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300e990] width 1920 pitch 7680 (/4 1920)
>[ 13116.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7dba0]
>[ 13116.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7dba0] width 1920 pitch 7680 (/4 1920)
>[ 13131.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7e380]
>[ 13131.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7e380] width 1920 pitch 7680 (/4 1920)
>[ 13140.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2ee0]
>[ 13140.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2ee0] width 1920 pitch 7680 (/4 1920)
>[ 13140.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1ca40]
>[ 13140.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1ca40] width 1920 pitch 7680 (/4 1920)
>[ 13140.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd15b0]
>[ 13140.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd15b0] width 1920 pitch 7680 (/4 1920)
>[ 13140.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1ca40]
>[ 13140.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1ca40] width 1920 pitch 7680 (/4 1920)
>[ 13206.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a020]
>[ 13206.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a020] width 1920 pitch 7680 (/4 1920)
>[ 13206.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 13206.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 13221.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2e1c0]
>[ 13221.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2e1c0] width 1920 pitch 7680 (/4 1920)
>[ 13251.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caa3f0]
>[ 13251.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caa3f0] width 1920 pitch 7680 (/4 1920)
>[ 13266.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4e4a0]
>[ 13266.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4e4a0] width 1920 pitch 7680 (/4 1920)
>[ 13281.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1380]
>[ 13281.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1380] width 1920 pitch 7680 (/4 1920)
>[ 13296.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa80c0]
>[ 13296.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa80c0] width 1920 pitch 7680 (/4 1920)
>[ 13326.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8950]
>[ 13326.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8950] width 1920 pitch 7680 (/4 1920)
>[ 13341.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efa370]
>[ 13341.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efa370] width 1920 pitch 7680 (/4 1920)
>[ 13356.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 13356.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 13371.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f860f0]
>[ 13371.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f860f0] width 1920 pitch 7680 (/4 1920)
>[ 13386.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a020]
>[ 13386.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a020] width 1920 pitch 7680 (/4 1920)
>[ 13401.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2e1c0]
>[ 13401.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2e1c0] width 1920 pitch 7680 (/4 1920)
>[ 13446.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295ae30]
>[ 13446.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295ae30] width 1920 pitch 7680 (/4 1920)
>[ 13476.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1ff60]
>[ 13476.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1ff60] width 1920 pitch 7680 (/4 1920)
>[ 13521.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300f0d0]
>[ 13521.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300f0d0] width 1920 pitch 7680 (/4 1920)
>[ 13536.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89f10]
>[ 13536.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89f10] width 1920 pitch 7680 (/4 1920)
>[ 13757.691] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 13757.691] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13757.691] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 13848.117] (II) RADEON(0): RADEONSaveScreen(2)
>[ 13848.117] (II) RADEON(0): RADEONSaveScreen(0)
>[ 14450.607] (II) RADEON(0): RADEONSaveScreen(1)
>[ 14451.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x160f1c0]
>[ 14451.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x160f1c0] width 1920 pitch 7680 (/4 1920)
>[ 14451.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc43b0]
>[ 14451.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc43b0] width 1920 pitch 7680 (/4 1920)
>[ 14541.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba180]
>[ 14541.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba180] width 1920 pitch 7680 (/4 1920)
>[ 14556.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1fc90]
>[ 14556.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1fc90] width 1920 pitch 7680 (/4 1920)
>[ 14661.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2853820]
>[ 14661.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2853820] width 1920 pitch 7680 (/4 1920)
>[ 14676.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e50c60]
>[ 14676.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e50c60] width 1920 pitch 7680 (/4 1920)
>[ 14721.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc43b0]
>[ 14721.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc43b0] width 1920 pitch 7680 (/4 1920)
>[ 14736.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1920]
>[ 14736.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1920] width 1920 pitch 7680 (/4 1920)
>[ 14781.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a0a0]
>[ 14781.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a0a0] width 1920 pitch 7680 (/4 1920)
>[ 14796.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efa370]
>[ 14796.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efa370] width 1920 pitch 7680 (/4 1920)
>[ 14811.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efa370]
>[ 14811.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efa370] width 1920 pitch 7680 (/4 1920)
>[ 14841.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 14841.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 14856.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cba240]
>[ 14856.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cba240] width 1920 pitch 7680 (/4 1920)
>[ 14871.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd15b0]
>[ 14871.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd15b0] width 1920 pitch 7680 (/4 1920)
>[ 14886.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd12c0]
>[ 14886.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd12c0] width 1920 pitch 7680 (/4 1920)
>[ 15006.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295ae30]
>[ 15006.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295ae30] width 1920 pitch 7680 (/4 1920)
>[ 15021.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c884d0]
>[ 15021.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c884d0] width 1920 pitch 7680 (/4 1920)
>[ 15036.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe8610]
>[ 15036.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe8610] width 1920 pitch 7680 (/4 1920)
>[ 15051.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c884d0]
>[ 15051.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c884d0] width 1920 pitch 7680 (/4 1920)
>[ 15051.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe8610]
>[ 15051.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe8610] width 1920 pitch 7680 (/4 1920)
>[ 15066.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c884d0]
>[ 15066.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c884d0] width 1920 pitch 7680 (/4 1920)
>[ 15156.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe8610]
>[ 15156.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe8610] width 1920 pitch 7680 (/4 1920)
>[ 15186.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c884d0]
>[ 15186.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c884d0] width 1920 pitch 7680 (/4 1920)
>[ 15366.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1380]
>[ 15366.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1380] width 1920 pitch 7680 (/4 1920)
>[ 15396.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe8610]
>[ 15396.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe8610] width 1920 pitch 7680 (/4 1920)
>[ 15426.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985ea0]
>[ 15426.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985ea0] width 1920 pitch 7680 (/4 1920)
>[ 15456.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fed4d0]
>[ 15456.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fed4d0] width 1920 pitch 7680 (/4 1920)
>[ 15471.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fed4d0]
>[ 15471.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fed4d0] width 1920 pitch 7680 (/4 1920)
>[ 15486.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc69d0]
>[ 15486.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc69d0] width 1920 pitch 7680 (/4 1920)
>[ 15494.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccb300]
>[ 15494.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccb300] width 1920 pitch 7680 (/4 1920)
>[ 15494.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985ea0]
>[ 15494.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985ea0] width 1920 pitch 7680 (/4 1920)
>[ 15501.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc0850]
>[ 15501.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc0850] width 1920 pitch 7680 (/4 1920)
>[ 15516.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985ea0]
>[ 15516.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985ea0] width 1920 pitch 7680 (/4 1920)
>[ 15561.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c803f0]
>[ 15561.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c803f0] width 1920 pitch 7680 (/4 1920)
>[ 15576.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c803f0]
>[ 15576.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c803f0] width 1920 pitch 7680 (/4 1920)
>[ 15756.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cce700]
>[ 15756.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cce700] width 1920 pitch 7680 (/4 1920)
>[ 15771.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cce700]
>[ 15771.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cce700] width 1920 pitch 7680 (/4 1920)
>[ 15846.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cce700]
>[ 15846.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cce700] width 1920 pitch 7680 (/4 1920)
>[ 15861.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c803f0]
>[ 15861.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c803f0] width 1920 pitch 7680 (/4 1920)
>[ 15891.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efc7b0]
>[ 15891.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efc7b0] width 1920 pitch 7680 (/4 1920)
>[ 15906.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd5b0]
>[ 15906.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd5b0] width 1920 pitch 7680 (/4 1920)
>[ 15966.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd540]
>[ 15966.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd540] width 1920 pitch 7680 (/4 1920)
>[ 15981.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd540]
>[ 15981.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd540] width 1920 pitch 7680 (/4 1920)
>[ 16041.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd5b0]
>[ 16041.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd5b0] width 1920 pitch 7680 (/4 1920)
>[ 16056.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd5b0]
>[ 16056.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd5b0] width 1920 pitch 7680 (/4 1920)
>[ 16071.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccd5b0]
>[ 16071.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccd5b0] width 1920 pitch 7680 (/4 1920)
>[ 16086.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cce770]
>[ 16086.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cce770] width 1920 pitch 7680 (/4 1920)
>[ 16341.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efbe10]
>[ 16341.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efbe10] width 1920 pitch 7680 (/4 1920)
>[ 16356.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efbe10]
>[ 16356.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efbe10] width 1920 pitch 7680 (/4 1920)
>[ 16491.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efbe10]
>[ 16491.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efbe10] width 1920 pitch 7680 (/4 1920)
>[ 16506.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cce770]
>[ 16506.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cce770] width 1920 pitch 7680 (/4 1920)
>[ 16581.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00180]
>[ 16581.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00180] width 1920 pitch 7680 (/4 1920)
>[ 16596.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb86d0]
>[ 16596.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb86d0] width 1920 pitch 7680 (/4 1920)
>[ 16656.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16656.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16671.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 16671.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 16716.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16716.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16731.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c851d0]
>[ 16731.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c851d0] width 1920 pitch 7680 (/4 1920)
>[ 16746.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16746.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16761.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c851d0]
>[ 16761.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c851d0] width 1920 pitch 7680 (/4 1920)
>[ 16761.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16761.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16806.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c851d0]
>[ 16806.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c851d0] width 1920 pitch 7680 (/4 1920)
>[ 16821.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16821.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16821.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c851d0]
>[ 16821.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c851d0] width 1920 pitch 7680 (/4 1920)
>[ 16911.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16911.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16926.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c851d0]
>[ 16926.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c851d0] width 1920 pitch 7680 (/4 1920)
>[ 16971.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 16971.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 16986.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f019e0]
>[ 16986.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f019e0] width 1920 pitch 7680 (/4 1920)
>[ 17016.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17016.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17046.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17046.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17076.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11230]
>[ 17076.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11230] width 1920 pitch 7680 (/4 1920)
>[ 17091.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17091.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17181.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17181.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17211.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17211.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17226.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17226.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17241.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17241.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17286.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17286.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17316.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17316.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17331.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17331.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17376.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17376.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17436.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17436.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17451.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17451.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17451.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17451.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17466.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17466.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17496.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17496.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17541.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17541.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17556.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17556.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17586.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17586.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17601.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17601.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17616.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17616.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17631.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17631.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17676.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe270]
>[ 17676.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe270] width 1920 pitch 7680 (/4 1920)
>[ 17691.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 17691.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 17706.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17706.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17721.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c84850]
>[ 17721.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c84850] width 1920 pitch 7680 (/4 1920)
>[ 17744.195] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 17744.195] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 17744.195] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 17766.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 17766.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 17781.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17781.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17796.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 17796.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 17811.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 17811.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 17871.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17871.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17901.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17901.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17976.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 17976.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 17976.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 17976.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 17991.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 17991.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18036.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18036.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18036.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18036.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18051.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18051.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18051.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18051.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18096.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18096.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18096.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18096.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18111.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18111.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18186.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18186.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18186.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18186.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18201.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18201.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18306.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f129f0]
>[ 18306.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f129f0] width 1920 pitch 7680 (/4 1920)
>[ 18306.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18306.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18321.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11c00]
>[ 18321.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11c00] width 1920 pitch 7680 (/4 1920)
>[ 18351.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5cc50]
>[ 18351.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5cc50] width 1920 pitch 7680 (/4 1920)
>[ 18366.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caac40]
>[ 18366.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caac40] width 1920 pitch 7680 (/4 1920)
>[ 18381.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f410]
>[ 18381.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f410] width 1920 pitch 7680 (/4 1920)
>[ 18396.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0fd30]
>[ 18396.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0fd30] width 1920 pitch 7680 (/4 1920)
>[ 18456.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e090]
>[ 18456.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e090] width 1920 pitch 7680 (/4 1920)
>[ 18456.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e9d0]
>[ 18456.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e9d0] width 1920 pitch 7680 (/4 1920)
>[ 18471.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caba10]
>[ 18471.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caba10] width 1920 pitch 7680 (/4 1920)
>[ 18486.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0fac0]
>[ 18486.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0fac0] width 1920 pitch 7680 (/4 1920)
>[ 18501.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb9c0]
>[ 18501.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb9c0] width 1920 pitch 7680 (/4 1920)
>[ 18516.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb7b0]
>[ 18516.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb7b0] width 1920 pitch 7680 (/4 1920)
>[ 18561.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb8d0]
>[ 18561.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb8d0] width 1920 pitch 7680 (/4 1920)
>[ 18576.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cff8e0]
>[ 18576.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cff8e0] width 1920 pitch 7680 (/4 1920)
>[ 18591.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cffb20]
>[ 18591.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cffb20] width 1920 pitch 7680 (/4 1920)
>[ 18606.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb7c0]
>[ 18606.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb7c0] width 1920 pitch 7680 (/4 1920)
>[ 18648.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1af40]
>[ 18648.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1af40] width 1920 pitch 7680 (/4 1920)
>[ 18651.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1aa80]
>[ 18651.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1aa80] width 1920 pitch 7680 (/4 1920)
>[ 18661.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21770]
>[ 18661.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21770] width 1920 pitch 7680 (/4 1920)
>[ 18661.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fef8e0]
>[ 18661.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fef8e0] width 1920 pitch 7680 (/4 1920)
>[ 18661.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f87490]
>[ 18661.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f87490] width 1920 pitch 7680 (/4 1920)
>[ 18661.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fef8e0]
>[ 18661.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fef8e0] width 1920 pitch 7680 (/4 1920)
>[ 18666.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d01410]
>[ 18666.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d01410] width 1920 pitch 7680 (/4 1920)
>[ 18711.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fbc0]
>[ 18711.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fbc0] width 1920 pitch 7680 (/4 1920)
>[ 18741.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2feddb0]
>[ 18741.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2feddb0] width 1920 pitch 7680 (/4 1920)
>[ 18756.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2feddb0]
>[ 18756.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2feddb0] width 1920 pitch 7680 (/4 1920)
>[ 18846.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f009a0]
>[ 18846.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f009a0] width 1920 pitch 7680 (/4 1920)
>[ 18891.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f009a0]
>[ 18891.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f009a0] width 1920 pitch 7680 (/4 1920)
>[ 18921.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d046b0]
>[ 18921.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d046b0] width 1920 pitch 7680 (/4 1920)
>[ 18936.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fecc50]
>[ 18936.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fecc50] width 1920 pitch 7680 (/4 1920)
>[ 18951.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f009a0]
>[ 18951.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f009a0] width 1920 pitch 7680 (/4 1920)
>[ 18951.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1f450]
>[ 18951.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1f450] width 1920 pitch 7680 (/4 1920)
>[ 18981.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f009a0]
>[ 18981.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f009a0] width 1920 pitch 7680 (/4 1920)
>[ 19011.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19011.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19056.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07fd0]
>[ 19056.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07fd0] width 1920 pitch 7680 (/4 1920)
>[ 19071.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d046b0]
>[ 19071.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d046b0] width 1920 pitch 7680 (/4 1920)
>[ 19116.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19116.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19131.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fecc50]
>[ 19131.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fecc50] width 1920 pitch 7680 (/4 1920)
>[ 19131.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19131.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19191.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e260]
>[ 19191.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e260] width 1920 pitch 7680 (/4 1920)
>[ 19221.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fecc50]
>[ 19221.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fecc50] width 1920 pitch 7680 (/4 1920)
>[ 19236.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e260]
>[ 19236.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e260] width 1920 pitch 7680 (/4 1920)
>[ 19251.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d046b0]
>[ 19251.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d046b0] width 1920 pitch 7680 (/4 1920)
>[ 19311.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19311.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19326.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07fd0]
>[ 19326.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07fd0] width 1920 pitch 7680 (/4 1920)
>[ 19356.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fecc50]
>[ 19356.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fecc50] width 1920 pitch 7680 (/4 1920)
>[ 19371.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19371.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19401.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07fd0]
>[ 19401.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07fd0] width 1920 pitch 7680 (/4 1920)
>[ 19416.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19416.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19536.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e260]
>[ 19536.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e260] width 1920 pitch 7680 (/4 1920)
>[ 19551.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19551.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19625.335] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 19625.335] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 19625.335] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 19715.114] (II) RADEON(0): RADEONSaveScreen(2)
>[ 19715.114] (II) RADEON(0): RADEONSaveScreen(0)
>[ 19915.891] (II) RADEON(0): RADEONSaveScreen(1)
>[ 19916.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ae0]
>[ 19916.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ae0] width 1920 pitch 7680 (/4 1920)
>[ 19932.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fec9d0]
>[ 19932.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fec9d0] width 1920 pitch 7680 (/4 1920)
>[ 19932.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9c060]
>[ 19932.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9c060] width 1920 pitch 7680 (/4 1920)
>[ 19947.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e200]
>[ 19947.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e200] width 1920 pitch 7680 (/4 1920)
>[ 20007.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d138a0]
>[ 20007.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d138a0] width 1920 pitch 7680 (/4 1920)
>[ 20022.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06920]
>[ 20022.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06920] width 1920 pitch 7680 (/4 1920)
>[ 20022.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d068c0]
>[ 20022.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d068c0] width 1920 pitch 7680 (/4 1920)
>[ 20037.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d07140]
>[ 20037.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d07140] width 1920 pitch 7680 (/4 1920)
>[ 20052.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe00]
>[ 20052.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe00] width 1920 pitch 7680 (/4 1920)
>[ 20112.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0a440]
>[ 20112.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0a440] width 1920 pitch 7680 (/4 1920)
>[ 20127.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fd50]
>[ 20127.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fd50] width 1920 pitch 7680 (/4 1920)
>[ 20142.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d08b20]
>[ 20142.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d08b20] width 1920 pitch 7680 (/4 1920)
>[ 20142.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fd50]
>[ 20142.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fd50] width 1920 pitch 7680 (/4 1920)
>[ 20157.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d08b20]
>[ 20157.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d08b20] width 1920 pitch 7680 (/4 1920)
>[ 20202.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05a50]
>[ 20202.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05a50] width 1920 pitch 7680 (/4 1920)
>[ 20202.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fd50]
>[ 20202.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fd50] width 1920 pitch 7680 (/4 1920)
>[ 20217.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05a50]
>[ 20217.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05a50] width 1920 pitch 7680 (/4 1920)
>[ 20217.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fd50]
>[ 20217.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fd50] width 1920 pitch 7680 (/4 1920)
>[ 20247.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d08b20]
>[ 20247.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d08b20] width 1920 pitch 7680 (/4 1920)
>[ 20277.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efea60]
>[ 20277.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efea60] width 1920 pitch 7680 (/4 1920)
>[ 20307.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05a50]
>[ 20307.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05a50] width 1920 pitch 7680 (/4 1920)
>[ 20322.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20322.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20322.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d12080]
>[ 20322.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d12080] width 1920 pitch 7680 (/4 1920)
>[ 20337.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20337.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20342.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25350]
>[ 20342.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25350] width 1920 pitch 7680 (/4 1920)
>[ 20343.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20343.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20343.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20343.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20343.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20343.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20343.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20343.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20343.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20343.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20343.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20343.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20343.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20343.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20344.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20344.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20344.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20344.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20344.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20344.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20344.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20344.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20345.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20345.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20345.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fda460]
>[ 20345.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fda460] width 1920 pitch 7680 (/4 1920)
>[ 20345.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37920]
>[ 20345.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37920] width 1920 pitch 7680 (/4 1920)
>[ 20352.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37920]
>[ 20352.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37920] width 1920 pitch 7680 (/4 1920)
>[ 20355.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389d010]
>[ 20355.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389d010] width 1920 pitch 7680 (/4 1920)
>[ 20356.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c930]
>[ 20356.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c930] width 1920 pitch 7680 (/4 1920)
>[ 20356.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389d280]
>[ 20356.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389d280] width 1920 pitch 7680 (/4 1920)
>[ 20356.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c930]
>[ 20356.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c930] width 1920 pitch 7680 (/4 1920)
>[ 20356.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389d280]
>[ 20356.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389d280] width 1920 pitch 7680 (/4 1920)
>[ 20356.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c930]
>[ 20356.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c930] width 1920 pitch 7680 (/4 1920)
>[ 20367.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949630]
>[ 20367.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949630] width 1920 pitch 7680 (/4 1920)
>[ 20394.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a1a0]
>[ 20394.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a1a0] width 1920 pitch 7680 (/4 1920)
>[ 20394.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922c00]
>[ 20394.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922c00] width 1920 pitch 7680 (/4 1920)
>[ 20394.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987920]
>[ 20394.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987920] width 1920 pitch 7680 (/4 1920)
>[ 20394.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389ca40]
>[ 20394.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389ca40] width 1920 pitch 7680 (/4 1920)
>[ 20394.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987920]
>[ 20394.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987920] width 1920 pitch 7680 (/4 1920)
>[ 20394.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389ca40]
>[ 20394.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389ca40] width 1920 pitch 7680 (/4 1920)
>[ 20394.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987920]
>[ 20394.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987920] width 1920 pitch 7680 (/4 1920)
>[ 20394.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389ca40]
>[ 20395.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389ca40] width 1920 pitch 7680 (/4 1920)
>[ 20395.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987920]
>[ 20395.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987920] width 1920 pitch 7680 (/4 1920)
>[ 20395.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988240]
>[ 20395.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988240] width 1920 pitch 7680 (/4 1920)
>[ 20395.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396b470]
>[ 20395.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396b470] width 1920 pitch 7680 (/4 1920)
>[ 20397.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20397.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20412.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20412.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20427.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efe6b0]
>[ 20427.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efe6b0] width 1920 pitch 7680 (/4 1920)
>[ 20442.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05a50]
>[ 20442.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05a50] width 1920 pitch 7680 (/4 1920)
>[ 20457.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e21190]
>[ 20457.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e21190] width 1920 pitch 7680 (/4 1920)
>[ 20472.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e21190]
>[ 20472.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e21190] width 1920 pitch 7680 (/4 1920)
>[ 20487.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390ed10]
>[ 20487.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390ed10] width 1920 pitch 7680 (/4 1920)
>[ 20517.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20517.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20517.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20517.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20517.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20517.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20517.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20517.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20517.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20517.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20517.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20517.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20517.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20518.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20518.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20518.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20518.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20518.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20518.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20518.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20518.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20518.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20518.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20518.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20519.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20519.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20519.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20519.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20519.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20519.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20519.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20519.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20519.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20519.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20520.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39215b0]
>[ 20520.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39215b0] width 1920 pitch 7680 (/4 1920)
>[ 20520.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20520.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20520.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39215b0]
>[ 20520.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39215b0] width 1920 pitch 7680 (/4 1920)
>[ 20520.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20520.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20520.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20520.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20520.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39215b0]
>[ 20520.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39215b0] width 1920 pitch 7680 (/4 1920)
>[ 20520.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20520.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20520.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39215b0]
>[ 20520.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39215b0] width 1920 pitch 7680 (/4 1920)
>[ 20520.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22b70]
>[ 20520.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22b70] width 1920 pitch 7680 (/4 1920)
>[ 20520.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 20520.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 20521.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39215b0]
>[ 20521.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39215b0] width 1920 pitch 7680 (/4 1920)
>[ 20521.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 20521.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 20521.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c960]
>[ 20521.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c960] width 1920 pitch 7680 (/4 1920)
>[ 20521.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20521.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20521.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390efb0]
>[ 20521.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390efb0] width 1920 pitch 7680 (/4 1920)
>[ 20522.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a53f80]
>[ 20522.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a53f80] width 1920 pitch 7680 (/4 1920)
>[ 20532.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20532.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20537.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910670]
>[ 20537.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910670] width 1920 pitch 7680 (/4 1920)
>[ 20537.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20537.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20537.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 20537.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 20540.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d7f0]
>[ 20540.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d7f0] width 1920 pitch 7680 (/4 1920)
>[ 20543.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20543.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20543.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 20543.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 20543.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20543.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20543.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 20543.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 20543.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20543.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20543.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 20543.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 20543.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20543.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20543.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 20543.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 20543.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20543.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20547.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc220]
>[ 20547.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc220] width 1920 pitch 7680 (/4 1920)
>[ 20547.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20547.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20547.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ad40]
>[ 20547.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ad40] width 1920 pitch 7680 (/4 1920)
>[ 20548.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e1b0e0]
>[ 20548.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e1b0e0] width 1920 pitch 7680 (/4 1920)
>[ 20562.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933b60]
>[ 20562.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933b60] width 1920 pitch 7680 (/4 1920)
>[ 20577.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3986300]
>[ 20577.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3986300] width 1920 pitch 7680 (/4 1920)
>[ 20577.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399a770]
>[ 20577.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399a770] width 1920 pitch 7680 (/4 1920)
>[ 20592.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399a770]
>[ 20592.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399a770] width 1920 pitch 7680 (/4 1920)
>[ 20607.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a0cd0]
>[ 20607.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a0cd0] width 1920 pitch 7680 (/4 1920)
>[ 20637.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39109d0]
>[ 20637.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39109d0] width 1920 pitch 7680 (/4 1920)
>[ 20652.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392e340]
>[ 20652.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392e340] width 1920 pitch 7680 (/4 1920)
>[ 20667.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392df20]
>[ 20667.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392df20] width 1920 pitch 7680 (/4 1920)
>[ 20714.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae050]
>[ 20714.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae050] width 1920 pitch 7680 (/4 1920)
>[ 20715.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c70]
>[ 20715.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c70] width 1920 pitch 7680 (/4 1920)
>[ 20716.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c70]
>[ 20716.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c70] width 1920 pitch 7680 (/4 1920)
>[ 20716.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39618e0]
>[ 20716.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39618e0] width 1920 pitch 7680 (/4 1920)
>[ 20716.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c70]
>[ 20716.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c70] width 1920 pitch 7680 (/4 1920)
>[ 20716.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39618e0]
>[ 20716.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39618e0] width 1920 pitch 7680 (/4 1920)
>[ 20727.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daebe0]
>[ 20727.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daebe0] width 1920 pitch 7680 (/4 1920)
>[ 20742.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 20742.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 20757.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dba860]
>[ 20757.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dba860] width 1920 pitch 7680 (/4 1920)
>[ 20802.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f020]
>[ 20802.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f020] width 1920 pitch 7680 (/4 1920)
>[ 20817.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbfbc0]
>[ 20817.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbfbc0] width 1920 pitch 7680 (/4 1920)
>[ 20817.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3962b00]
>[ 20817.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3962b00] width 1920 pitch 7680 (/4 1920)
>[ 20847.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95800]
>[ 20847.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95800] width 1920 pitch 7680 (/4 1920)
>[ 20861.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b311c0]
>[ 20861.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b311c0] width 1920 pitch 7680 (/4 1920)
>[ 20881.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7d20]
>[ 20881.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7d20] width 1920 pitch 7680 (/4 1920)
>[ 20881.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc9780]
>[ 20881.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc9780] width 1920 pitch 7680 (/4 1920)
>[ 20881.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc9780]
>[ 20881.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc9780] width 1920 pitch 7680 (/4 1920)
>[ 20881.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc9780]
>[ 20881.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc9780] width 1920 pitch 7680 (/4 1920)
>[ 20881.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc9780]
>[ 20881.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc9780] width 1920 pitch 7680 (/4 1920)
>[ 20881.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b34c70]
>[ 20881.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b34c70] width 1920 pitch 7680 (/4 1920)
>[ 20881.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc9780]
>[ 20881.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc9780] width 1920 pitch 7680 (/4 1920)
>[ 20881.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaace0]
>[ 20882.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaace0] width 1920 pitch 7680 (/4 1920)
>[ 20888.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6c9e0]
>[ 20888.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6c9e0] width 1920 pitch 7680 (/4 1920)
>[ 20907.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17f20]
>[ 20907.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17f20] width 1920 pitch 7680 (/4 1920)
>[ 20922.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de9660]
>[ 20922.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de9660] width 1920 pitch 7680 (/4 1920)
>[ 20937.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb610]
>[ 20937.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb610] width 1920 pitch 7680 (/4 1920)
>[ 20967.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1a2f0]
>[ 20967.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1a2f0] width 1920 pitch 7680 (/4 1920)
>[ 20968.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6c9a0]
>[ 20968.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6c9a0] width 1920 pitch 7680 (/4 1920)
>[ 20968.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaace0]
>[ 20968.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaace0] width 1920 pitch 7680 (/4 1920)
>[ 20968.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aca1c0]
>[ 20968.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aca1c0] width 1920 pitch 7680 (/4 1920)
>[ 21012.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f700]
>[ 21012.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f700] width 1920 pitch 7680 (/4 1920)
>[ 21012.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf830]
>[ 21012.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf830] width 1920 pitch 7680 (/4 1920)
>[ 21087.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9890]
>[ 21087.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9890] width 1920 pitch 7680 (/4 1920)
>[ 21088.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b740]
>[ 21088.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b740] width 1920 pitch 7680 (/4 1920)
>[ 21116.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b680d0]
>[ 21116.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b680d0] width 1920 pitch 7680 (/4 1920)
>[ 21116.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c54870]
>[ 21116.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c54870] width 1920 pitch 7680 (/4 1920)
>[ 21116.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39430]
>[ 21116.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39430] width 1920 pitch 7680 (/4 1920)
>[ 21117.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39430]
>[ 21117.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39430] width 1920 pitch 7680 (/4 1920)
>[ 21119.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c54870]
>[ 21119.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c54870] width 1920 pitch 7680 (/4 1920)
>[ 21119.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b30970]
>[ 21119.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b30970] width 1920 pitch 7680 (/4 1920)
>[ 21119.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9f8c0]
>[ 21119.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9f8c0] width 1920 pitch 7680 (/4 1920)
>[ 21119.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abab40]
>[ 21119.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abab40] width 1920 pitch 7680 (/4 1920)
>[ 21119.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394e180]
>[ 21119.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394e180] width 1920 pitch 7680 (/4 1920)
>[ 21120.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba740]
>[ 21120.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba740] width 1920 pitch 7680 (/4 1920)
>[ 21123.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39af910]
>[ 21123.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39af910] width 1920 pitch 7680 (/4 1920)
>[ 21137.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e030a0]
>[ 21137.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e030a0] width 1920 pitch 7680 (/4 1920)
>[ 21162.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396b070]
>[ 21162.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396b070] width 1920 pitch 7680 (/4 1920)
>[ 21162.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a7c0]
>[ 21162.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a7c0] width 1920 pitch 7680 (/4 1920)
>[ 21177.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396b010]
>[ 21177.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396b010] width 1920 pitch 7680 (/4 1920)
>[ 21192.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a7c0]
>[ 21192.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a7c0] width 1920 pitch 7680 (/4 1920)
>[ 21192.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396b010]
>[ 21192.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396b010] width 1920 pitch 7680 (/4 1920)
>[ 21209.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db7360]
>[ 21209.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db7360] width 1920 pitch 7680 (/4 1920)
>[ 21267.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4437a40]
>[ 21267.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4437a40] width 1920 pitch 7680 (/4 1920)
>[ 21316.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409efb0]
>[ 21316.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409efb0] width 1920 pitch 7680 (/4 1920)
>[ 21316.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0520]
>[ 21316.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0520] width 1920 pitch 7680 (/4 1920)
>[ 21342.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0520]
>[ 21342.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0520] width 1920 pitch 7680 (/4 1920)
>[ 21351.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0bff0]
>[ 21351.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0bff0] width 1920 pitch 7680 (/4 1920)
>[ 21351.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0bff0]
>[ 21351.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0bff0] width 1920 pitch 7680 (/4 1920)
>[ 21352.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a1610]
>[ 21352.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a1610] width 1920 pitch 7680 (/4 1920)
>[ 21352.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38feb90]
>[ 21352.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38feb90] width 1920 pitch 7680 (/4 1920)
>[ 21352.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c32da0]
>[ 21352.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c32da0] width 1920 pitch 7680 (/4 1920)
>[ 21353.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38feb90]
>[ 21353.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38feb90] width 1920 pitch 7680 (/4 1920)
>[ 21357.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e01820]
>[ 21357.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e01820] width 1920 pitch 7680 (/4 1920)
>[ 21360.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443a2b0]
>[ 21360.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443a2b0] width 1920 pitch 7680 (/4 1920)
>[ 21372.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f220]
>[ 21372.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f220] width 1920 pitch 7680 (/4 1920)
>[ 21384.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443a180]
>[ 21384.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443a180] width 1920 pitch 7680 (/4 1920)
>[ 21387.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1bc0]
>[ 21387.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1bc0] width 1920 pitch 7680 (/4 1920)
>[ 21447.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c889f0]
>[ 21447.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c889f0] width 1920 pitch 7680 (/4 1920)
>[ 21462.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab05b0]
>[ 21462.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab05b0] width 1920 pitch 7680 (/4 1920)
>[ 21488.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x384cd60]
>[ 21488.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x384cd60] width 1920 pitch 7680 (/4 1920)
>[ 21488.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396abf0]
>[ 21488.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396abf0] width 1920 pitch 7680 (/4 1920)
>[ 21488.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8260]
>[ 21488.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8260] width 1920 pitch 7680 (/4 1920)
>[ 21488.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396abf0]
>[ 21488.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396abf0] width 1920 pitch 7680 (/4 1920)
>[ 21499.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c594f0]
>[ 21499.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c594f0] width 1920 pitch 7680 (/4 1920)
>[ 21499.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20bb0]
>[ 21499.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20bb0] width 1920 pitch 7680 (/4 1920)
>[ 21500.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f220]
>[ 21500.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f220] width 1920 pitch 7680 (/4 1920)
>[ 21502.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396bd90]
>[ 21502.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396bd90] width 1920 pitch 7680 (/4 1920)
>[ 21503.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a300]
>[ 21503.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a300] width 1920 pitch 7680 (/4 1920)
>[ 21503.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d30]
>[ 21503.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d30] width 1920 pitch 7680 (/4 1920)
>[ 21503.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931110]
>[ 21503.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931110] width 1920 pitch 7680 (/4 1920)
>[ 21503.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396abf0]
>[ 21503.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396abf0] width 1920 pitch 7680 (/4 1920)
>[ 21503.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d30]
>[ 21503.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d30] width 1920 pitch 7680 (/4 1920)
>[ 21503.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d30]
>[ 21503.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d30] width 1920 pitch 7680 (/4 1920)
>[ 21505.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396abf0]
>[ 21505.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396abf0] width 1920 pitch 7680 (/4 1920)
>[ 21505.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20bb0]
>[ 21505.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20bb0] width 1920 pitch 7680 (/4 1920)
>[ 21524.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44385b0]
>[ 21524.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44385b0] width 1920 pitch 7680 (/4 1920)
>[ 21524.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21524.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21524.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21524.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21524.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39157b0]
>[ 21524.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39157b0] width 1920 pitch 7680 (/4 1920)
>[ 21524.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21524.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21524.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39157b0]
>[ 21524.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39157b0] width 1920 pitch 7680 (/4 1920)
>[ 21524.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21524.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21524.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e98240]
>[ 21524.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e98240] width 1920 pitch 7680 (/4 1920)
>[ 21524.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21524.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21524.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e98240]
>[ 21524.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e98240] width 1920 pitch 7680 (/4 1920)
>[ 21524.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21525.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21525.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e98240]
>[ 21525.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e98240] width 1920 pitch 7680 (/4 1920)
>[ 21525.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39314a0]
>[ 21525.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39314a0] width 1920 pitch 7680 (/4 1920)
>[ 21526.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21526.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21526.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21526.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21526.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21526.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21526.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21526.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21526.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21526.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21526.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21526.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21526.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21526.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21526.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21526.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21526.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21526.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21527.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21527.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21527.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21527.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21527.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x300d430]
>[ 21527.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x300d430] width 1920 pitch 7680 (/4 1920)
>[ 21528.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21528.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21528.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f220]
>[ 21528.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f220] width 1920 pitch 7680 (/4 1920)
>[ 21528.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21528.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21528.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f220]
>[ 21528.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f220] width 1920 pitch 7680 (/4 1920)
>[ 21528.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39172e0]
>[ 21528.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39172e0] width 1920 pitch 7680 (/4 1920)
>[ 21528.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392e340]
>[ 21528.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392e340] width 1920 pitch 7680 (/4 1920)
>[ 21528.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941110]
>[ 21528.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941110] width 1920 pitch 7680 (/4 1920)
>[ 21567.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d04970]
>[ 21567.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d04970] width 1920 pitch 7680 (/4 1920)
>[ 21582.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392e340]
>[ 21582.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392e340] width 1920 pitch 7680 (/4 1920)
>[ 21612.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d23a80]
>[ 21612.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d23a80] width 1920 pitch 7680 (/4 1920)
>[ 21627.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39363e0]
>[ 21627.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39363e0] width 1920 pitch 7680 (/4 1920)
>[ 21642.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e68650]
>[ 21642.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e68650] width 1920 pitch 7680 (/4 1920)
>[ 21657.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392acd0]
>[ 21657.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392acd0] width 1920 pitch 7680 (/4 1920)
>[ 21672.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f841c0]
>[ 21672.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f841c0] width 1920 pitch 7680 (/4 1920)
>[ 21687.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d870]
>[ 21687.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d870] width 1920 pitch 7680 (/4 1920)
>[ 21739.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28644e0]
>[ 21739.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28644e0] width 1920 pitch 7680 (/4 1920)
>[ 21739.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288eb40]
>[ 21739.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288eb40] width 1920 pitch 7680 (/4 1920)
>[ 21740.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21740.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21740.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21740.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21740.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21740.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21740.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21740.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21740.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21740.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21740.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21740.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21741.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21741.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21741.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21741.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21741.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21741.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21741.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21741.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21741.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21741.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21741.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21741.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21741.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21742.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21742.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21742.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21742.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21742.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21742.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd29e0]
>[ 21742.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd29e0] width 1920 pitch 7680 (/4 1920)
>[ 21742.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930870]
>[ 21742.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930870] width 1920 pitch 7680 (/4 1920)
>[ 21742.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392d990]
>[ 21742.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392d990] width 1920 pitch 7680 (/4 1920)
>[ 21757.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad70]
>[ 21757.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad70] width 1920 pitch 7680 (/4 1920)
>[ 21759.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef7c70]
>[ 21759.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef7c70] width 1920 pitch 7680 (/4 1920)
>[ 21762.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 21762.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 21764.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a80ed0]
>[ 21764.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a80ed0] width 1920 pitch 7680 (/4 1920)
>[ 21777.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a150]
>[ 21777.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a150] width 1920 pitch 7680 (/4 1920)
>[ 21777.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edcc50]
>[ 21777.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edcc50] width 1920 pitch 7680 (/4 1920)
>[ 21882.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21882.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21883.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a21670]
>[ 21883.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a21670] width 1920 pitch 7680 (/4 1920)
>[ 21883.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21883.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21883.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21883.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21883.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21883.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21883.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21883.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21883.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21883.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21883.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21883.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21884.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21884.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21884.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21884.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21884.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21884.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21884.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21884.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21884.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21884.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21884.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21884.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21884.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 21884.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 21884.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b5950]
>[ 21884.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b5950] width 1920 pitch 7680 (/4 1920)
>[ 21885.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 21885.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 21885.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 21885.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 21885.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 21885.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 21885.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 21885.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 21894.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21895.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21895.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21895.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21895.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21895.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21895.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21895.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21895.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21895.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21895.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21895.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21895.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21896.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21896.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21896.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21896.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21896.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21897.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21897.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21897.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409f5d0]
>[ 21897.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409f5d0] width 1920 pitch 7680 (/4 1920)
>[ 21897.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21897.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21897.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409f5d0]
>[ 21897.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409f5d0] width 1920 pitch 7680 (/4 1920)
>[ 21897.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21897.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21897.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409f5d0]
>[ 21897.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409f5d0] width 1920 pitch 7680 (/4 1920)
>[ 21897.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b4a1a0]
>[ 21897.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b4a1a0] width 1920 pitch 7680 (/4 1920)
>[ 21897.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21897.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21901.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57380]
>[ 21901.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57380] width 1920 pitch 7680 (/4 1920)
>[ 21906.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21906.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21906.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21906.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21906.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db89b0]
>[ 21906.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db89b0] width 1920 pitch 7680 (/4 1920)
>[ 21906.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21906.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21906.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db89b0]
>[ 21906.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db89b0] width 1920 pitch 7680 (/4 1920)
>[ 21906.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b670]
>[ 21906.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b670] width 1920 pitch 7680 (/4 1920)
>[ 21906.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21906.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21906.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b670]
>[ 21906.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b670] width 1920 pitch 7680 (/4 1920)
>[ 21906.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db89b0]
>[ 21906.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db89b0] width 1920 pitch 7680 (/4 1920)
>[ 21906.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21906.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21906.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db89b0]
>[ 21906.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db89b0] width 1920 pitch 7680 (/4 1920)
>[ 21906.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21906.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21906.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b670]
>[ 21906.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b670] width 1920 pitch 7680 (/4 1920)
>[ 21906.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21906.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21906.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2b670]
>[ 21906.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2b670] width 1920 pitch 7680 (/4 1920)
>[ 21912.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21912.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21942.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2a40]
>[ 21942.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2a40] width 1920 pitch 7680 (/4 1920)
>[ 21947.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21947.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21947.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21947.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21947.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21947.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21947.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21947.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21947.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21947.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21947.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21947.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea0b0]
>[ 21947.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea0b0] width 1920 pitch 7680 (/4 1920)
>[ 21947.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4420]
>[ 21947.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4420] width 1920 pitch 7680 (/4 1920)
>[ 21954.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21954.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21954.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21954.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21954.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21954.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21954.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21954.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21954.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21954.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21954.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21954.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21954.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21954.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21954.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21955.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21955.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21955.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21955.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21955.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21955.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21955.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21955.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21955.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21955.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21955.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21955.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21955.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21955.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21955.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21955.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29794d0]
>[ 21955.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29794d0] width 1920 pitch 7680 (/4 1920)
>[ 21955.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb54f0]
>[ 21955.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb54f0] width 1920 pitch 7680 (/4 1920)
>[ 21966.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21966.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21966.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21966.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21966.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21966.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21966.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21966.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21966.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21966.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21966.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21966.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21967.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21967.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21967.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21967.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21967.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21967.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21967.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21967.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21967.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21967.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21967.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21967.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21967.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21967.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21967.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2eca0]
>[ 21967.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2eca0] width 1920 pitch 7680 (/4 1920)
>[ 21967.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39986e0]
>[ 21967.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39986e0] width 1920 pitch 7680 (/4 1920)
>[ 21972.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db7d80]
>[ 21972.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db7d80] width 1920 pitch 7680 (/4 1920)
>[ 21979.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21979.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cf10]
>[ 21979.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cf10] width 1920 pitch 7680 (/4 1920)
>[ 21979.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e3a0]
>[ 21979.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e3a0] width 1920 pitch 7680 (/4 1920)
>[ 21987.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0c6a0]
>[ 21987.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0c6a0] width 1920 pitch 7680 (/4 1920)
>[ 22017.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadea0]
>[ 22017.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadea0] width 1920 pitch 7680 (/4 1920)
>[ 22021.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f762e0]
>[ 22021.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f762e0] width 1920 pitch 7680 (/4 1920)
>[ 22021.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f52b00]
>[ 22021.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f52b00] width 1920 pitch 7680 (/4 1920)
>[ 22021.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f25090]
>[ 22021.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f25090] width 1920 pitch 7680 (/4 1920)
>[ 22026.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399cd80]
>[ 22026.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399cd80] width 1920 pitch 7680 (/4 1920)
>[ 22026.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22026.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb52e0]
>[ 22026.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb52e0] width 1920 pitch 7680 (/4 1920)
>[ 22026.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ffad0]
>[ 22026.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ffad0] width 1920 pitch 7680 (/4 1920)
>[ 22062.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f614d0]
>[ 22062.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f614d0] width 1920 pitch 7680 (/4 1920)
>[ 22077.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa3e80]
>[ 22077.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa3e80] width 1920 pitch 7680 (/4 1920)
>[ 22092.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9a370]
>[ 22092.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9a370] width 1920 pitch 7680 (/4 1920)
>[ 22107.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a285a0]
>[ 22107.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a285a0] width 1920 pitch 7680 (/4 1920)
>[ 22122.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a285a0]
>[ 22122.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a285a0] width 1920 pitch 7680 (/4 1920)
>[ 22141.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22141.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cfb0]
>[ 22141.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cfb0] width 1920 pitch 7680 (/4 1920)
>[ 22141.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443d130]
>[ 22141.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443d130] width 1920 pitch 7680 (/4 1920)
>[ 22145.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f614e0]
>[ 22145.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f614e0] width 1920 pitch 7680 (/4 1920)
>[ 22145.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22145.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4433a60]
>[ 22145.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4433a60] width 1920 pitch 7680 (/4 1920)
>[ 22145.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399b8b0]
>[ 22145.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399b8b0] width 1920 pitch 7680 (/4 1920)
>[ 22152.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab6b0]
>[ 22152.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab6b0] width 1920 pitch 7680 (/4 1920)
>[ 22158.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7c570]
>[ 22158.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7c570] width 1920 pitch 7680 (/4 1920)
>[ 22158.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea9c0]
>[ 22158.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea9c0] width 1920 pitch 7680 (/4 1920)
>[ 22158.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39238a0]
>[ 22159.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39238a0] width 1920 pitch 7680 (/4 1920)
>[ 22159.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea9c0]
>[ 22159.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea9c0] width 1920 pitch 7680 (/4 1920)
>[ 22159.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39238a0]
>[ 22159.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39238a0] width 1920 pitch 7680 (/4 1920)
>[ 22159.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea9c0]
>[ 22159.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea9c0] width 1920 pitch 7680 (/4 1920)
>[ 22159.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39238a0]
>[ 22159.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39238a0] width 1920 pitch 7680 (/4 1920)
>[ 22159.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea9c0]
>[ 22159.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea9c0] width 1920 pitch 7680 (/4 1920)
>[ 22159.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39238a0]
>[ 22159.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39238a0] width 1920 pitch 7680 (/4 1920)
>[ 22159.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eea9c0]
>[ 22159.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eea9c0] width 1920 pitch 7680 (/4 1920)
>[ 22159.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39238a0]
>[ 22159.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39238a0] width 1920 pitch 7680 (/4 1920)
>[ 22163.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facc70]
>[ 22163.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facc70] width 1920 pitch 7680 (/4 1920)
>[ 22163.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff2630]
>[ 22163.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff2630] width 1920 pitch 7680 (/4 1920)
>[ 22163.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22163.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22163.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22163.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22163.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22163.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22163.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22163.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22163.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22163.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22163.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22163.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22163.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22164.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22164.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22164.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22164.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22164.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22164.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22164.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22164.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22164.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22164.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ba7b0]
>[ 22164.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ba7b0] width 1920 pitch 7680 (/4 1920)
>[ 22164.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39065f0]
>[ 22164.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39065f0] width 1920 pitch 7680 (/4 1920)
>[ 22167.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2facc70]
>[ 22167.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2facc70] width 1920 pitch 7680 (/4 1920)
>[ 22182.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22182.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22187.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846580]
>[ 22187.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846580] width 1920 pitch 7680 (/4 1920)
>[ 22187.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa0d20]
>[ 22187.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa0d20] width 1920 pitch 7680 (/4 1920)
>[ 22214.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22214.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22215.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22215.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22215.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22215.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22227.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff2390]
>[ 22227.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff2390] width 1920 pitch 7680 (/4 1920)
>[ 22271.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22271.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22271.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22271.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22271.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22271.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22271.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22271.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22271.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22271.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22271.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22271.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22271.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22272.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22272.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22272.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22272.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22272.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22272.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22272.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22272.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22272.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22272.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22272.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22272.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22272.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22272.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6800]
>[ 22272.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6800] width 1920 pitch 7680 (/4 1920)
>[ 22272.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39334f0]
>[ 22272.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39334f0] width 1920 pitch 7680 (/4 1920)
>[ 22283.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39335a0]
>[ 22283.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39335a0] width 1920 pitch 7680 (/4 1920)
>[ 22283.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22283.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848920]
>[ 22283.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848920] width 1920 pitch 7680 (/4 1920)
>[ 22283.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a830]
>[ 22283.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a830] width 1920 pitch 7680 (/4 1920)
>[ 22302.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22302.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22313.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22313.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22313.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22313.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22313.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22313.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22313.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22313.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22313.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22313.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22313.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22313.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22313.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22314.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22314.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22314.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22314.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22314.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22314.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22314.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22314.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22314.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22315.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22315.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22315.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a532b0]
>[ 22315.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a532b0] width 1920 pitch 7680 (/4 1920)
>[ 22315.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910eb0]
>[ 22316.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910eb0] width 1920 pitch 7680 (/4 1920)
>[ 22316.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0a10]
>[ 22316.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0a10] width 1920 pitch 7680 (/4 1920)
>[ 22316.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff24d0]
>[ 22316.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff24d0] width 1920 pitch 7680 (/4 1920)
>[ 22316.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b80]
>[ 22316.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b80] width 1920 pitch 7680 (/4 1920)
>[ 22316.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910eb0]
>[ 22316.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910eb0] width 1920 pitch 7680 (/4 1920)
>[ 22347.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faebe0]
>[ 22347.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faebe0] width 1920 pitch 7680 (/4 1920)
>[ 22362.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ead0]
>[ 22362.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ead0] width 1920 pitch 7680 (/4 1920)
>[ 22362.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3905560]
>[ 22362.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3905560] width 1920 pitch 7680 (/4 1920)
>[ 22374.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a980]
>[ 22374.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a980] width 1920 pitch 7680 (/4 1920)
>[ 22374.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989760]
>[ 22374.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989760] width 1920 pitch 7680 (/4 1920)
>[ 22374.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a980]
>[ 22374.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a980] width 1920 pitch 7680 (/4 1920)
>[ 22374.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989760]
>[ 22374.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989760] width 1920 pitch 7680 (/4 1920)
>[ 22374.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a980]
>[ 22374.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a980] width 1920 pitch 7680 (/4 1920)
>[ 22374.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989760]
>[ 22374.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989760] width 1920 pitch 7680 (/4 1920)
>[ 22392.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad67c0]
>[ 22392.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad67c0] width 1920 pitch 7680 (/4 1920)
>[ 22407.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987260]
>[ 22407.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987260] width 1920 pitch 7680 (/4 1920)
>[ 22422.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987260]
>[ 22422.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987260] width 1920 pitch 7680 (/4 1920)
>[ 22422.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad67c0]
>[ 22422.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad67c0] width 1920 pitch 7680 (/4 1920)
>[ 22437.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22437.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22452.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22452.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22452.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eec7d0]
>[ 22452.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eec7d0] width 1920 pitch 7680 (/4 1920)
>[ 22455.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22455.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22455.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22455.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22455.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22455.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22455.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22455.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22455.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22455.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22455.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22455.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22455.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22455.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22455.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22455.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22455.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22455.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22455.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22456.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22456.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22456.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22456.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22456.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22456.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22456.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22456.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22456.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22456.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906af0]
>[ 22456.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906af0] width 1920 pitch 7680 (/4 1920)
>[ 22456.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[ 22456.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[ 22458.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948500]
>[ 22458.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948500] width 1920 pitch 7680 (/4 1920)
>[ 22482.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff5390]
>[ 22482.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff5390] width 1920 pitch 7680 (/4 1920)
>[ 22482.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949f30]
>[ 22482.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949f30] width 1920 pitch 7680 (/4 1920)
>[ 22496.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916f90]
>[ 22496.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916f90] width 1920 pitch 7680 (/4 1920)
>[ 22497.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ed50]
>[ 22497.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ed50] width 1920 pitch 7680 (/4 1920)
>[ 22498.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22498.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22498.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22498.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22498.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22498.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22498.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22498.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22503.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22503.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22503.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22503.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22503.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22503.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22503.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22503.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22503.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22503.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22503.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22503.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22503.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22503.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22503.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22503.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22503.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22503.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22503.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22503.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22504.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22504.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22504.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22504.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22504.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22504.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22504.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22504.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22504.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22504.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22505.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faccc0]
>[ 22505.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faccc0] width 1920 pitch 7680 (/4 1920)
>[ 22505.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22506.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22506.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22506.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22506.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1ebc0]
>[ 22506.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1ebc0] width 1920 pitch 7680 (/4 1920)
>[ 22506.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22506.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22506.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1ebc0]
>[ 22506.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1ebc0] width 1920 pitch 7680 (/4 1920)
>[ 22506.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4370]
>[ 22506.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4370] width 1920 pitch 7680 (/4 1920)
>[ 22506.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1ebc0]
>[ 22506.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1ebc0] width 1920 pitch 7680 (/4 1920)
>[ 22527.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912a90]
>[ 22527.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912a90] width 1920 pitch 7680 (/4 1920)
>[ 22542.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942260]
>[ 22542.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942260] width 1920 pitch 7680 (/4 1920)
>[ 22587.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aaf2d0]
>[ 22587.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aaf2d0] width 1920 pitch 7680 (/4 1920)
>[ 22602.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aaf2d0]
>[ 22602.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aaf2d0] width 1920 pitch 7680 (/4 1920)
>[ 22679.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4950]
>[ 22679.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4950] width 1920 pitch 7680 (/4 1920)
>[ 22679.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22679.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a240]
>[ 22679.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a240] width 1920 pitch 7680 (/4 1920)
>[ 22679.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22679.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a240]
>[ 22679.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a240] width 1920 pitch 7680 (/4 1920)
>[ 22679.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22679.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a240]
>[ 22679.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a240] width 1920 pitch 7680 (/4 1920)
>[ 22679.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22679.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a240]
>[ 22679.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a240] width 1920 pitch 7680 (/4 1920)
>[ 22679.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22679.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7a240]
>[ 22679.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7a240] width 1920 pitch 7680 (/4 1920)
>[ 22679.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa4810]
>[ 22679.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa4810] width 1920 pitch 7680 (/4 1920)
>[ 22681.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971480]
>[ 22681.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971480] width 1920 pitch 7680 (/4 1920)
>[ 22681.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971420]
>[ 22681.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971420] width 1920 pitch 7680 (/4 1920)
>[ 22681.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971480]
>[ 22681.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971480] width 1920 pitch 7680 (/4 1920)
>[ 22681.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971420]
>[ 22681.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971420] width 1920 pitch 7680 (/4 1920)
>[ 22681.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971480]
>[ 22681.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971480] width 1920 pitch 7680 (/4 1920)
>[ 22681.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971420]
>[ 22681.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971420] width 1920 pitch 7680 (/4 1920)
>[ 22681.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971480]
>[ 22681.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971480] width 1920 pitch 7680 (/4 1920)
>[ 22681.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971420]
>[ 22681.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971420] width 1920 pitch 7680 (/4 1920)
>[ 22681.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988250]
>[ 22681.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988250] width 1920 pitch 7680 (/4 1920)
>[ 22682.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead440]
>[ 22682.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead440] width 1920 pitch 7680 (/4 1920)
>[ 22682.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46210]
>[ 22682.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46210] width 1920 pitch 7680 (/4 1920)
>[ 22682.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead440]
>[ 22682.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead440] width 1920 pitch 7680 (/4 1920)
>[ 22682.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46210]
>[ 22682.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46210] width 1920 pitch 7680 (/4 1920)
>[ 22682.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46210]
>[ 22682.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46210] width 1920 pitch 7680 (/4 1920)
>[ 22682.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead440]
>[ 22682.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead440] width 1920 pitch 7680 (/4 1920)
>[ 22682.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46210]
>[ 22682.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46210] width 1920 pitch 7680 (/4 1920)
>[ 22682.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988250]
>[ 22682.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988250] width 1920 pitch 7680 (/4 1920)
>[ 22682.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e910]
>[ 22682.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e910] width 1920 pitch 7680 (/4 1920)
>[ 22692.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05280]
>[ 22692.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05280] width 1920 pitch 7680 (/4 1920)
>[ 22695.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39341f0]
>[ 22695.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39341f0] width 1920 pitch 7680 (/4 1920)
>[ 22695.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccb9c0]
>[ 22695.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccb9c0] width 1920 pitch 7680 (/4 1920)
>[ 22697.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab8690]
>[ 22697.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab8690] width 1920 pitch 7680 (/4 1920)
>[ 22697.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb3990]
>[ 22697.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb3990] width 1920 pitch 7680 (/4 1920)
>[ 22697.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ead0]
>[ 22697.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ead0] width 1920 pitch 7680 (/4 1920)
>[ 22697.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949c50]
>[ 22697.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949c50] width 1920 pitch 7680 (/4 1920)
>[ 22697.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949c50]
>[ 22697.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949c50] width 1920 pitch 7680 (/4 1920)
>[ 22697.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98220]
>[ 22697.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98220] width 1920 pitch 7680 (/4 1920)
>[ 22697.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949c50]
>[ 22697.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949c50] width 1920 pitch 7680 (/4 1920)
>[ 22697.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98220]
>[ 22697.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98220] width 1920 pitch 7680 (/4 1920)
>[ 22699.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22699.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db91e0]
>[ 22699.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db91e0] width 1920 pitch 7680 (/4 1920)
>[ 22699.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39379d0]
>[ 22699.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39379d0] width 1920 pitch 7680 (/4 1920)
>[ 22701.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3971ed0]
>[ 22701.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3971ed0] width 1920 pitch 7680 (/4 1920)
>[ 22707.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391fab0]
>[ 22707.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391fab0] width 1920 pitch 7680 (/4 1920)
>[ 22767.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914210]
>[ 22767.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914210] width 1920 pitch 7680 (/4 1920)
>[ 22797.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f28f30]
>[ 22797.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f28f30] width 1920 pitch 7680 (/4 1920)
>[ 22809.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef7c70]
>[ 22809.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef7c70] width 1920 pitch 7680 (/4 1920)
>[ 22809.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39275e0]
>[ 22809.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39275e0] width 1920 pitch 7680 (/4 1920)
>[ 22809.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 22809.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 22809.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39275e0]
>[ 22809.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39275e0] width 1920 pitch 7680 (/4 1920)
>[ 22811.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 22811.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 22820.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22820.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22820.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22820.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22820.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22820.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22820.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22820.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22820.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22820.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22820.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22820.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22820.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22820.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22820.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22820.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22820.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22821.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22821.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22821.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x443f850]
>[ 22821.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x443f850] width 1920 pitch 7680 (/4 1920)
>[ 22821.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea59f0]
>[ 22821.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea59f0] width 1920 pitch 7680 (/4 1920)
>[ 22822.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cae00]
>[ 22822.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cae00] width 1920 pitch 7680 (/4 1920)
>[ 22822.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 22822.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 22822.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cae00]
>[ 22822.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cae00] width 1920 pitch 7680 (/4 1920)
>[ 22822.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 22822.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 22822.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cae00]
>[ 22822.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cae00] width 1920 pitch 7680 (/4 1920)
>[ 22822.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 22822.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 22822.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cae00]
>[ 22822.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cae00] width 1920 pitch 7680 (/4 1920)
>[ 22822.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e43be0]
>[ 22822.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e43be0] width 1920 pitch 7680 (/4 1920)
>[ 22825.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b7af0]
>[ 22825.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b7af0] width 1920 pitch 7680 (/4 1920)
>[ 22827.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 22827.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 22832.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22832.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22832.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22832.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22832.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f670e0]
>[ 22832.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f670e0] width 1920 pitch 7680 (/4 1920)
>[ 22832.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22832.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22832.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22832.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22832.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22832.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22832.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22832.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22833.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22833.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22833.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22833.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22833.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fff50]
>[ 22833.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fff50] width 1920 pitch 7680 (/4 1920)
>[ 22833.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6100]
>[ 22833.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6100] width 1920 pitch 7680 (/4 1920)
>[ 22833.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22833.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22833.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22833.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22833.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22833.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22833.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22833.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22833.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22833.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22844.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948b20]
>[ 22844.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948b20] width 1920 pitch 7680 (/4 1920)
>[ 22844.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22844.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22844.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22844.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948c20]
>[ 22844.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948c20] width 1920 pitch 7680 (/4 1920)
>[ 22846.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22846.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22846.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22846.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22846.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22847.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22847.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38750]
>[ 22847.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38750] width 1920 pitch 7680 (/4 1920)
>[ 22847.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38990]
>[ 22847.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38990] width 1920 pitch 7680 (/4 1920)
>[ 22857.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2f210]
>[ 22857.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2f210] width 1920 pitch 7680 (/4 1920)
>[ 22863.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924d00]
>[ 22863.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924d00] width 1920 pitch 7680 (/4 1920)
>[ 22863.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22863.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22863.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22863.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22863.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22863.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22863.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22863.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22863.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22863.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22863.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22863.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22863.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22863.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22863.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22863.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22863.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22863.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22863.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22864.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22864.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22864.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22864.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3fa0]
>[ 22864.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3fa0] width 1920 pitch 7680 (/4 1920)
>[ 22874.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f262a0]
>[ 22874.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f262a0] width 1920 pitch 7680 (/4 1920)
>[ 22874.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4000]
>[ 22874.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4000] width 1920 pitch 7680 (/4 1920)
>[ 22874.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4000]
>[ 22874.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4000] width 1920 pitch 7680 (/4 1920)
>[ 22874.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4000]
>[ 22874.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4000] width 1920 pitch 7680 (/4 1920)
>[ 22874.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab89f0]
>[ 22874.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab89f0] width 1920 pitch 7680 (/4 1920)
>[ 22874.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22874.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22874.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22874.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22874.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22874.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22874.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4000]
>[ 22874.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4000] width 1920 pitch 7680 (/4 1920)
>[ 22874.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4000]
>[ 22874.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4000] width 1920 pitch 7680 (/4 1920)
>[ 22887.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58890]
>[ 22887.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58890] width 1920 pitch 7680 (/4 1920)
>[ 22962.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3900740]
>[ 22962.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3900740] width 1920 pitch 7680 (/4 1920)
>[ 22962.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22962.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22973.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6b60]
>[ 22973.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6b60] width 1920 pitch 7680 (/4 1920)
>[ 22973.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0ca20]
>[ 22973.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0ca20] width 1920 pitch 7680 (/4 1920)
>[ 22973.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6b60]
>[ 22973.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6b60] width 1920 pitch 7680 (/4 1920)
>[ 22973.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 22973.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 22973.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0ca20]
>[ 22973.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0ca20] width 1920 pitch 7680 (/4 1920)
>[ 22973.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[ 22973.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[ 22973.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22973.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22973.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[ 22973.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[ 22973.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22973.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22973.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[ 22973.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[ 22973.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22973.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22973.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[ 22973.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[ 22973.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944b60]
>[ 22973.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944b60] width 1920 pitch 7680 (/4 1920)
>[ 22977.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4e360]
>[ 22977.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4e360] width 1920 pitch 7680 (/4 1920)
>[ 22977.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6b60]
>[ 22977.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6b60] width 1920 pitch 7680 (/4 1920)
>[ 22980.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22980.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22980.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22980.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22980.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22980.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22980.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22980.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22980.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22980.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22980.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22980.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22980.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22980.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22980.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22980.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22980.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22980.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22980.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22981.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22981.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22981.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22981.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22981.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22981.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22981.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22981.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906c90]
>[ 22981.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906c90] width 1920 pitch 7680 (/4 1920)
>[ 22981.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f29640]
>[ 22981.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f29640] width 1920 pitch 7680 (/4 1920)
>[ 22990.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22990.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 22990.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 22990.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 22990.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 22992.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 22992.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c130]
>[ 22992.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c130] width 1920 pitch 7680 (/4 1920)
>[ 22992.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eada60]
>[ 22992.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eada60] width 1920 pitch 7680 (/4 1920)
>[ 23033.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23033.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e40d0]
>[ 23033.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e40d0] width 1920 pitch 7680 (/4 1920)
>[ 23033.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a60]
>[ 23033.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a60] width 1920 pitch 7680 (/4 1920)
>[ 23037.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946660]
>[ 23037.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946660] width 1920 pitch 7680 (/4 1920)
>[ 23037.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f67fb0]
>[ 23037.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f67fb0] width 1920 pitch 7680 (/4 1920)
>[ 23037.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23037.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffafa0]
>[ 23037.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffafa0] width 1920 pitch 7680 (/4 1920)
>[ 23037.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eee170]
>[ 23037.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eee170] width 1920 pitch 7680 (/4 1920)
>[ 23037.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39697a0]
>[ 23037.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39697a0] width 1920 pitch 7680 (/4 1920)
>[ 23037.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23037.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23037.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23037.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23037.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846d60]
>[ 23037.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846d60] width 1920 pitch 7680 (/4 1920)
>[ 23037.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3949db0]
>[ 23037.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3949db0] width 1920 pitch 7680 (/4 1920)
>[ 23052.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16db0]
>[ 23052.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16db0] width 1920 pitch 7680 (/4 1920)
>[ 23052.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffafa0]
>[ 23052.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffafa0] width 1920 pitch 7680 (/4 1920)
>[ 23081.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2bda0]
>[ 23082.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2bda0] width 1920 pitch 7680 (/4 1920)
>[ 23082.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23082.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c350]
>[ 23082.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c350] width 1920 pitch 7680 (/4 1920)
>[ 23082.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23082.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c350]
>[ 23082.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c350] width 1920 pitch 7680 (/4 1920)
>[ 23082.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23082.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c350]
>[ 23082.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c350] width 1920 pitch 7680 (/4 1920)
>[ 23082.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23082.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2bda0]
>[ 23082.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2bda0] width 1920 pitch 7680 (/4 1920)
>[ 23082.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2e5a0]
>[ 23082.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2e5a0] width 1920 pitch 7680 (/4 1920)
>[ 23082.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c350]
>[ 23082.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c350] width 1920 pitch 7680 (/4 1920)
>[ 23082.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23082.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281c350]
>[ 23082.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281c350] width 1920 pitch 7680 (/4 1920)
>[ 23082.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5bd0]
>[ 23082.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5bd0] width 1920 pitch 7680 (/4 1920)
>[ 23090.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6b910]
>[ 23090.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6b910] width 1920 pitch 7680 (/4 1920)
>[ 23090.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96320]
>[ 23090.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96320] width 1920 pitch 7680 (/4 1920)
>[ 23090.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a962c0]
>[ 23090.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a962c0] width 1920 pitch 7680 (/4 1920)
>[ 23090.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96320]
>[ 23090.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96320] width 1920 pitch 7680 (/4 1920)
>[ 23090.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a962c0]
>[ 23090.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a962c0] width 1920 pitch 7680 (/4 1920)
>[ 23090.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96320]
>[ 23090.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96320] width 1920 pitch 7680 (/4 1920)
>[ 23090.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a962c0]
>[ 23090.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a962c0] width 1920 pitch 7680 (/4 1920)
>[ 23090.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96320]
>[ 23090.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96320] width 1920 pitch 7680 (/4 1920)
>[ 23090.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6b910]
>[ 23090.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6b910] width 1920 pitch 7680 (/4 1920)
>[ 23090.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b1210]
>[ 23090.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b1210] width 1920 pitch 7680 (/4 1920)
>[ 23090.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6b910]
>[ 23090.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6b910] width 1920 pitch 7680 (/4 1920)
>[ 23090.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b1210]
>[ 23090.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b1210] width 1920 pitch 7680 (/4 1920)
>[ 23090.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6b910]
>[ 23090.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6b910] width 1920 pitch 7680 (/4 1920)
>[ 23090.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a962c0]
>[ 23090.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a962c0] width 1920 pitch 7680 (/4 1920)
>[ 23090.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23090.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23094.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23094.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23094.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23094.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23094.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23094.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23094.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23094.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23094.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23094.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23094.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23094.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23094.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23094.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23095.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23095.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23095.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23095.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e30]
>[ 23095.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e30] width 1920 pitch 7680 (/4 1920)
>[ 23095.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23095.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23097.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23097.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff5e80]
>[ 23098.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff5e80] width 1920 pitch 7680 (/4 1920)
>[ 23098.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23098.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d4f0]
>[ 23098.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d4f0] width 1920 pitch 7680 (/4 1920)
>[ 23098.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3999a00]
>[ 23098.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3999a00] width 1920 pitch 7680 (/4 1920)
>[ 23127.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff5e80]
>[ 23127.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff5e80] width 1920 pitch 7680 (/4 1920)
>[ 23150.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23150.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39222a0]
>[ 23150.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39222a0] width 1920 pitch 7680 (/4 1920)
>[ 23150.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2ab00]
>[ 23150.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2ab00] width 1920 pitch 7680 (/4 1920)
>[ 23157.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5470]
>[ 23157.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5470] width 1920 pitch 7680 (/4 1920)
>[ 23187.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399dc40]
>[ 23187.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399dc40] width 1920 pitch 7680 (/4 1920)
>[ 23187.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399df20]
>[ 23187.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399df20] width 1920 pitch 7680 (/4 1920)
>[ 23187.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x399dc40]
>[ 23187.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x399dc40] width 1920 pitch 7680 (/4 1920)
>[ 23192.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23192.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b950]
>[ 23192.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b950] width 1920 pitch 7680 (/4 1920)
>[ 23192.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b8f0]
>[ 23192.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b8f0] width 1920 pitch 7680 (/4 1920)
>[ 23207.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23207.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23207.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23207.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23207.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23207.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23207.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23207.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23207.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23207.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23207.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23208.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23208.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23208.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23208.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23208.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23208.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23208.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23208.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23208.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23208.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23208.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23208.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b93a0]
>[ 23208.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b93a0] width 1920 pitch 7680 (/4 1920)
>[ 23208.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a810e0]
>[ 23208.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a810e0] width 1920 pitch 7680 (/4 1920)
>[ 23232.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23232.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23257.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96f40]
>[ 23257.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96f40] width 1920 pitch 7680 (/4 1920)
>[ 23257.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 23257.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 23260.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c917e0]
>[ 23260.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c917e0] width 1920 pitch 7680 (/4 1920)
>[ 23297.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 23297.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 23297.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397dd90]
>[ 23297.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397dd90] width 1920 pitch 7680 (/4 1920)
>[ 23297.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 23297.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 23297.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397dd90]
>[ 23297.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397dd90] width 1920 pitch 7680 (/4 1920)
>[ 23301.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391dce0]
>[ 23301.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391dce0] width 1920 pitch 7680 (/4 1920)
>[ 23302.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918a50]
>[ 23302.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918a50] width 1920 pitch 7680 (/4 1920)
>[ 23302.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c91600]
>[ 23302.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c91600] width 1920 pitch 7680 (/4 1920)
>[ 23303.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a80f30]
>[ 23303.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a80f30] width 1920 pitch 7680 (/4 1920)
>[ 23303.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a80f30]
>[ 23303.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a80f30] width 1920 pitch 7680 (/4 1920)
>[ 23308.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef7c70]
>[ 23308.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef7c70] width 1920 pitch 7680 (/4 1920)
>[ 23313.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23313.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23313.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23313.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23313.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23313.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23313.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23313.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23313.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23313.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23313.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23313.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23313.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23313.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23314.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23314.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23314.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23314.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23314.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23314.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23314.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23314.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23315.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23315.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23316.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23316.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23316.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc810]
>[ 23316.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc810] width 1920 pitch 7680 (/4 1920)
>[ 23316.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f281b0]
>[ 23316.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f281b0] width 1920 pitch 7680 (/4 1920)
>[ 23316.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f28f30]
>[ 23316.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f28f30] width 1920 pitch 7680 (/4 1920)
>[ 23316.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f281b0]
>[ 23316.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f281b0] width 1920 pitch 7680 (/4 1920)
>[ 23316.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f28f30]
>[ 23316.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f28f30] width 1920 pitch 7680 (/4 1920)
>[ 23316.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f281b0]
>[ 23316.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f281b0] width 1920 pitch 7680 (/4 1920)
>[ 23316.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f28f30]
>[ 23317.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f28f30] width 1920 pitch 7680 (/4 1920)
>[ 23317.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f281b0]
>[ 23317.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f281b0] width 1920 pitch 7680 (/4 1920)
>[ 23352.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad70]
>[ 23352.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad70] width 1920 pitch 7680 (/4 1920)
>[ 23367.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad70]
>[ 23367.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad70] width 1920 pitch 7680 (/4 1920)
>[ 23382.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964e30]
>[ 23382.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964e30] width 1920 pitch 7680 (/4 1920)
>[ 23397.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c55180]
>[ 23397.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c55180] width 1920 pitch 7680 (/4 1920)
>[ 23412.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39382f0]
>[ 23412.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39382f0] width 1920 pitch 7680 (/4 1920)
>[ 23422.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4434e00]
>[ 23422.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4434e00] width 1920 pitch 7680 (/4 1920)
>[ 23427.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f660d0]
>[ 23427.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f660d0] width 1920 pitch 7680 (/4 1920)
>[ 23442.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b70c0]
>[ 23442.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b70c0] width 1920 pitch 7680 (/4 1920)
>[ 23457.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b70c0]
>[ 23457.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b70c0] width 1920 pitch 7680 (/4 1920)
>[ 23472.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44355f0]
>[ 23472.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44355f0] width 1920 pitch 7680 (/4 1920)
>[ 23487.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23487.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23493.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e38ca0]
>[ 23493.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e38ca0] width 1920 pitch 7680 (/4 1920)
>[ 23493.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade830]
>[ 23493.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade830] width 1920 pitch 7680 (/4 1920)
>[ 23493.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e820]
>[ 23493.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e820] width 1920 pitch 7680 (/4 1920)
>[ 23493.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade830]
>[ 23493.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade830] width 1920 pitch 7680 (/4 1920)
>[ 23517.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4434cc0]
>[ 23517.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4434cc0] width 1920 pitch 7680 (/4 1920)
>[ 23532.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973320]
>[ 23532.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973320] width 1920 pitch 7680 (/4 1920)
>[ 23607.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973320]
>[ 23607.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973320] width 1920 pitch 7680 (/4 1920)
>[ 23622.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ade830]
>[ 23622.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ade830] width 1920 pitch 7680 (/4 1920)
>[ 23637.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973320]
>[ 23637.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973320] width 1920 pitch 7680 (/4 1920)
>[ 23667.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973320]
>[ 23667.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973320] width 1920 pitch 7680 (/4 1920)
>[ 23682.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396f800]
>[ 23682.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396f800] width 1920 pitch 7680 (/4 1920)
>[ 23697.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa530]
>[ 23697.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa530] width 1920 pitch 7680 (/4 1920)
>[ 23731.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7f810]
>[ 23731.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7f810] width 1920 pitch 7680 (/4 1920)
>[ 23732.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6440]
>[ 23733.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6440] width 1920 pitch 7680 (/4 1920)
>[ 23733.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901860]
>[ 23733.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901860] width 1920 pitch 7680 (/4 1920)
>[ 23733.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23733.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23733.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23733.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23733.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23733.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23733.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23733.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23733.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23733.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23733.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23733.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23733.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23733.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23733.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23734.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23734.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23734.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23734.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23734.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23734.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23734.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23739.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23739.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23739.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23739.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23739.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44327a0]
>[ 23739.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44327a0] width 1920 pitch 7680 (/4 1920)
>[ 23739.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cada0]
>[ 23739.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cada0] width 1920 pitch 7680 (/4 1920)
>[ 23739.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ea80]
>[ 23739.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ea80] width 1920 pitch 7680 (/4 1920)
>[ 23742.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0be50]
>[ 23742.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0be50] width 1920 pitch 7680 (/4 1920)
>[ 23757.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c20]
>[ 23757.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c20] width 1920 pitch 7680 (/4 1920)
>[ 23772.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad6c40]
>[ 23772.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad6c40] width 1920 pitch 7680 (/4 1920)
>[ 23802.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906850]
>[ 23802.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906850] width 1920 pitch 7680 (/4 1920)
>[ 23832.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a1de0]
>[ 23832.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a1de0] width 1920 pitch 7680 (/4 1920)
>[ 23847.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845740]
>[ 23847.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845740] width 1920 pitch 7680 (/4 1920)
>[ 23862.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b5d870]
>[ 23862.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b5d870] width 1920 pitch 7680 (/4 1920)
>[ 23887.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3adf7d0]
>[ 23887.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3adf7d0] width 1920 pitch 7680 (/4 1920)
>[ 23892.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296d9e0]
>[ 23892.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296d9e0] width 1920 pitch 7680 (/4 1920)
>[ 23907.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b370]
>[ 23907.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b370] width 1920 pitch 7680 (/4 1920)
>[ 23937.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b370]
>[ 23937.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b370] width 1920 pitch 7680 (/4 1920)
>[ 23948.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d01a40]
>[ 23948.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d01a40] width 1920 pitch 7680 (/4 1920)
>[ 23952.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3845850]
>[ 23952.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3845850] width 1920 pitch 7680 (/4 1920)
>[ 23953.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 23953.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 23959.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983cc0]
>[ 23959.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983cc0] width 1920 pitch 7680 (/4 1920)
>[ 23982.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c010]
>[ 23982.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c010] width 1920 pitch 7680 (/4 1920)
>[ 24027.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f28c50]
>[ 24027.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f28c50] width 1920 pitch 7680 (/4 1920)
>[ 24087.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39474d0]
>[ 24087.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39474d0] width 1920 pitch 7680 (/4 1920)
>[ 24087.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffc4d0]
>[ 24087.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffc4d0] width 1920 pitch 7680 (/4 1920)
>[ 24102.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39474d0]
>[ 24102.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39474d0] width 1920 pitch 7680 (/4 1920)
>[ 24132.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc23f0]
>[ 24132.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc23f0] width 1920 pitch 7680 (/4 1920)
>[ 24147.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc1f50]
>[ 24147.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc1f50] width 1920 pitch 7680 (/4 1920)
>[ 24162.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae74b0]
>[ 24162.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae74b0] width 1920 pitch 7680 (/4 1920)
>[ 24222.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c864f0]
>[ 24222.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c864f0] width 1920 pitch 7680 (/4 1920)
>[ 24237.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6db0]
>[ 24237.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6db0] width 1920 pitch 7680 (/4 1920)
>[ 24282.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b31960]
>[ 24282.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b31960] width 1920 pitch 7680 (/4 1920)
>[ 24297.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33960]
>[ 24297.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33960] width 1920 pitch 7680 (/4 1920)
>[ 24312.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940cd0]
>[ 24312.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940cd0] width 1920 pitch 7680 (/4 1920)
>[ 24477.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1f90]
>[ 24477.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1f90] width 1920 pitch 7680 (/4 1920)
>[ 24488.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24488.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24488.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24488.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24488.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24490.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6e80]
>[ 24490.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6e80] width 1920 pitch 7680 (/4 1920)
>[ 24492.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24492.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24496.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24496.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24496.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24496.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24496.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24496.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24496.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24496.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24496.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24496.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24496.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24496.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24497.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24497.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24497.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24497.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24497.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24497.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24497.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24497.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24497.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24497.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24497.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24497.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24497.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b07cb0]
>[ 24497.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b07cb0] width 1920 pitch 7680 (/4 1920)
>[ 24498.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 24498.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 24498.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[ 24498.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[ 24498.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 24498.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 24498.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[ 24498.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[ 24498.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 24498.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 24498.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[ 24498.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[ 24498.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 24498.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 24498.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a48120]
>[ 24498.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a48120] width 1920 pitch 7680 (/4 1920)
>[ 24501.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397cbd0]
>[ 24502.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397cbd0] width 1920 pitch 7680 (/4 1920)
>[ 24505.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2803450]
>[ 24505.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2803450] width 1920 pitch 7680 (/4 1920)
>[ 24505.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b50b90]
>[ 24505.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b50b90] width 1920 pitch 7680 (/4 1920)
>[ 24505.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6e80]
>[ 24505.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6e80] width 1920 pitch 7680 (/4 1920)
>[ 24505.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[ 24505.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[ 24505.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39826b0]
>[ 24505.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39826b0] width 1920 pitch 7680 (/4 1920)
>[ 24505.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 24505.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 24505.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6e80]
>[ 24505.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6e80] width 1920 pitch 7680 (/4 1920)
>[ 24505.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24505.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24505.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 24505.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 24505.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[ 24505.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[ 24505.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3988290]
>[ 24505.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3988290] width 1920 pitch 7680 (/4 1920)
>[ 24505.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47120]
>[ 24505.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47120] width 1920 pitch 7680 (/4 1920)
>[ 24507.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 24507.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 24522.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b38520]
>[ 24522.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b38520] width 1920 pitch 7680 (/4 1920)
>[ 24524.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 24524.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 24524.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983090]
>[ 24524.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983090] width 1920 pitch 7680 (/4 1920)
>[ 24524.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 24524.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 24524.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 24524.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 24524.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 24524.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 24524.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 24524.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 24524.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 24524.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 24524.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 24524.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 24524.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 24524.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 24524.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 24524.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 24524.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a811f0]
>[ 24524.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a811f0] width 1920 pitch 7680 (/4 1920)
>[ 24524.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3973c60]
>[ 24524.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3973c60] width 1920 pitch 7680 (/4 1920)
>[ 24529.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24529.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929ef0]
>[ 24529.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929ef0] width 1920 pitch 7680 (/4 1920)
>[ 24529.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c62740]
>[ 24529.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c62740] width 1920 pitch 7680 (/4 1920)
>[ 24534.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24534.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24534.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24534.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24534.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24540.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24540.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24540.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f92bd0]
>[ 24540.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f92bd0] width 1920 pitch 7680 (/4 1920)
>[ 24597.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e99250]
>[ 24597.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e99250] width 1920 pitch 7680 (/4 1920)
>[ 24627.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864b20]
>[ 24627.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864b20] width 1920 pitch 7680 (/4 1920)
>[ 24657.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f81130]
>[ 24657.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f81130] width 1920 pitch 7680 (/4 1920)
>[ 24657.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57d30]
>[ 24657.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57d30] width 1920 pitch 7680 (/4 1920)
>[ 24657.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f81130]
>[ 24657.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f81130] width 1920 pitch 7680 (/4 1920)
>[ 24657.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57d30]
>[ 24657.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57d30] width 1920 pitch 7680 (/4 1920)
>[ 24657.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7cb30]
>[ 24657.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7cb30] width 1920 pitch 7680 (/4 1920)
>[ 24657.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906b40]
>[ 24657.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906b40] width 1920 pitch 7680 (/4 1920)
>[ 24657.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e192f0]
>[ 24657.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e192f0] width 1920 pitch 7680 (/4 1920)
>[ 24657.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fe60]
>[ 24657.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fe60] width 1920 pitch 7680 (/4 1920)
>[ 24657.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291fe10]
>[ 24657.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291fe10] width 1920 pitch 7680 (/4 1920)
>[ 24657.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fe60]
>[ 24657.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fe60] width 1920 pitch 7680 (/4 1920)
>[ 24657.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x291fe10]
>[ 24657.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x291fe10] width 1920 pitch 7680 (/4 1920)
>[ 24657.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fe60]
>[ 24657.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fe60] width 1920 pitch 7680 (/4 1920)
>[ 24659.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca6f0]
>[ 24659.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca6f0] width 1920 pitch 7680 (/4 1920)
>[ 24659.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24659.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca6f0]
>[ 24659.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca6f0] width 1920 pitch 7680 (/4 1920)
>[ 24659.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24659.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca6f0]
>[ 24659.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca6f0] width 1920 pitch 7680 (/4 1920)
>[ 24659.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24659.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca6f0]
>[ 24659.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca6f0] width 1920 pitch 7680 (/4 1920)
>[ 24659.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24659.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca6f0]
>[ 24659.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca6f0] width 1920 pitch 7680 (/4 1920)
>[ 24659.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24659.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5fd0]
>[ 24659.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5fd0] width 1920 pitch 7680 (/4 1920)
>[ 24659.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d169e0]
>[ 24659.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d169e0] width 1920 pitch 7680 (/4 1920)
>[ 24659.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3987580]
>[ 24659.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3987580] width 1920 pitch 7680 (/4 1920)
>[ 24659.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8b640]
>[ 24659.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8b640] width 1920 pitch 7680 (/4 1920)
>[ 24659.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b3080]
>[ 24659.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b3080] width 1920 pitch 7680 (/4 1920)
>[ 24734.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af18c0]
>[ 24734.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af18c0] width 1920 pitch 7680 (/4 1920)
>[ 24736.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3846e10]
>[ 24736.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3846e10] width 1920 pitch 7680 (/4 1920)
>[ 24736.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d080]
>[ 24736.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d080] width 1920 pitch 7680 (/4 1920)
>[ 24736.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe5ad0]
>[ 24736.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe5ad0] width 1920 pitch 7680 (/4 1920)
>[ 24736.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391cc90]
>[ 24736.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391cc90] width 1920 pitch 7680 (/4 1920)
>[ 24736.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 24736.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 24736.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fe5ad0]
>[ 24736.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fe5ad0] width 1920 pitch 7680 (/4 1920)
>[ 24736.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffaf00]
>[ 24736.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffaf00] width 1920 pitch 7680 (/4 1920)
>[ 24736.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391cc90]
>[ 24736.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391cc90] width 1920 pitch 7680 (/4 1920)
>[ 24736.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948b00]
>[ 24736.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948b00] width 1920 pitch 7680 (/4 1920)
>[ 24736.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391cc90]
>[ 24736.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391cc90] width 1920 pitch 7680 (/4 1920)
>[ 24736.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8f720]
>[ 24736.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8f720] width 1920 pitch 7680 (/4 1920)
>[ 24736.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f81130]
>[ 24736.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f81130] width 1920 pitch 7680 (/4 1920)
>[ 24736.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391cc90]
>[ 24736.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391cc90] width 1920 pitch 7680 (/4 1920)
>[ 24736.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fe60]
>[ 24736.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fe60] width 1920 pitch 7680 (/4 1920)
>[ 24736.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e219b0]
>[ 24736.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e219b0] width 1920 pitch 7680 (/4 1920)
>[ 24737.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0880]
>[ 24737.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0880] width 1920 pitch 7680 (/4 1920)
>[ 24737.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0880]
>[ 24737.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0880] width 1920 pitch 7680 (/4 1920)
>[ 24737.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24737.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24737.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24737.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24737.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24737.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937f60]
>[ 24737.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937f60] width 1920 pitch 7680 (/4 1920)
>[ 24737.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4920]
>[ 24737.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4920] width 1920 pitch 7680 (/4 1920)
>[ 24740.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9730]
>[ 24740.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9730] width 1920 pitch 7680 (/4 1920)
>[ 24773.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39781b0]
>[ 24773.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39781b0] width 1920 pitch 7680 (/4 1920)
>[ 24777.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e89c0]
>[ 24777.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e89c0] width 1920 pitch 7680 (/4 1920)
>[ 24802.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ce30]
>[ 24802.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ce30] width 1920 pitch 7680 (/4 1920)
>[ 24802.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eae40]
>[ 24802.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eae40] width 1920 pitch 7680 (/4 1920)
>[ 24810.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f81130]
>[ 24811.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f81130] width 1920 pitch 7680 (/4 1920)
>[ 24811.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24811.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24811.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24811.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24811.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24811.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24811.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24811.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab90]
>[ 24811.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab90] width 1920 pitch 7680 (/4 1920)
>[ 24814.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a530]
>[ 24814.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a530] width 1920 pitch 7680 (/4 1920)
>[ 24814.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aec110]
>[ 24814.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aec110] width 1920 pitch 7680 (/4 1920)
>[ 24814.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409d550]
>[ 24814.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409d550] width 1920 pitch 7680 (/4 1920)
>[ 24814.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aefa00]
>[ 24814.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aefa00] width 1920 pitch 7680 (/4 1920)
>[ 24814.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb600]
>[ 24814.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb600] width 1920 pitch 7680 (/4 1920)
>[ 24814.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24814.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd380]
>[ 24814.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd380] width 1920 pitch 7680 (/4 1920)
>[ 24814.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24814.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd380]
>[ 24814.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd380] width 1920 pitch 7680 (/4 1920)
>[ 24814.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24814.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd380]
>[ 24814.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd380] width 1920 pitch 7680 (/4 1920)
>[ 24814.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24814.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd380]
>[ 24814.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd380] width 1920 pitch 7680 (/4 1920)
>[ 24814.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24814.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd380]
>[ 24814.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd380] width 1920 pitch 7680 (/4 1920)
>[ 24814.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d720]
>[ 24814.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d720] width 1920 pitch 7680 (/4 1920)
>[ 24837.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e18f0]
>[ 24837.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e18f0] width 1920 pitch 7680 (/4 1920)
>[ 24849.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24849.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3848b70]
>[ 24849.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3848b70] width 1920 pitch 7680 (/4 1920)
>[ 24849.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24849.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24849.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24849.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24849.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90090]
>[ 24849.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90090] width 1920 pitch 7680 (/4 1920)
>[ 24849.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2870]
>[ 24849.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2870] width 1920 pitch 7680 (/4 1920)
>[ 24858.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aec110]
>[ 24858.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aec110] width 1920 pitch 7680 (/4 1920)
>[ 24858.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391cc90]
>[ 24858.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391cc90] width 1920 pitch 7680 (/4 1920)
>[ 24858.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff4a70]
>[ 24858.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff4a70] width 1920 pitch 7680 (/4 1920)
>[ 24858.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f70]
>[ 24859.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f70] width 1920 pitch 7680 (/4 1920)
>[ 24859.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24859.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff49f0]
>[ 24859.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff49f0] width 1920 pitch 7680 (/4 1920)
>[ 24867.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeab20]
>[ 24867.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeab20] width 1920 pitch 7680 (/4 1920)
>[ 24882.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ce30]
>[ 24882.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ce30] width 1920 pitch 7680 (/4 1920)
>[ 24932.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3979170]
>[ 24932.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3979170] width 1920 pitch 7680 (/4 1920)
>[ 24932.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9bf0]
>[ 24932.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9bf0] width 1920 pitch 7680 (/4 1920)
>[ 24932.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984ae0]
>[ 24932.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984ae0] width 1920 pitch 7680 (/4 1920)
>[ 24932.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9bf0]
>[ 24932.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9bf0] width 1920 pitch 7680 (/4 1920)
>[ 24932.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984ae0]
>[ 24932.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984ae0] width 1920 pitch 7680 (/4 1920)
>[ 24932.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9bf0]
>[ 24932.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9bf0] width 1920 pitch 7680 (/4 1920)
>[ 24932.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984ae0]
>[ 24932.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984ae0] width 1920 pitch 7680 (/4 1920)
>[ 24932.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9bf0]
>[ 24932.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9bf0] width 1920 pitch 7680 (/4 1920)
>[ 24932.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e3c0]
>[ 24932.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e3c0] width 1920 pitch 7680 (/4 1920)
>[ 24932.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9bf0]
>[ 24932.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9bf0] width 1920 pitch 7680 (/4 1920)
>[ 24932.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984ae0]
>[ 24932.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984ae0] width 1920 pitch 7680 (/4 1920)
>[ 24932.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e3c0]
>[ 24932.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e3c0] width 1920 pitch 7680 (/4 1920)
>[ 24932.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e3c0]
>[ 24932.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e3c0] width 1920 pitch 7680 (/4 1920)
>[ 24932.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984ae0]
>[ 24932.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984ae0] width 1920 pitch 7680 (/4 1920)
>[ 24932.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e3c0]
>[ 24932.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e3c0] width 1920 pitch 7680 (/4 1920)
>[ 24932.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e3c0]
>[ 24932.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e3c0] width 1920 pitch 7680 (/4 1920)
>[ 24936.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e91c0]
>[ 24936.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e91c0] width 1920 pitch 7680 (/4 1920)
>[ 24936.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4aa0]
>[ 24936.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4aa0] width 1920 pitch 7680 (/4 1920)
>[ 24936.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea8a0]
>[ 24936.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea8a0] width 1920 pitch 7680 (/4 1920)
>[ 24936.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4aa0]
>[ 24936.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4aa0] width 1920 pitch 7680 (/4 1920)
>[ 24936.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4aa0]
>[ 24936.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4aa0] width 1920 pitch 7680 (/4 1920)
>[ 24936.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1bd0]
>[ 24936.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1bd0] width 1920 pitch 7680 (/4 1920)
>[ 24936.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e18f0]
>[ 24936.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e18f0] width 1920 pitch 7680 (/4 1920)
>[ 24936.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff4940]
>[ 24936.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff4940] width 1920 pitch 7680 (/4 1920)
>[ 24936.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28e18f0]
>[ 24936.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28e18f0] width 1920 pitch 7680 (/4 1920)
>[ 24936.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ff4910]
>[ 24936.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ff4910] width 1920 pitch 7680 (/4 1920)
>[ 24936.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8af0]
>[ 24936.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8af0] width 1920 pitch 7680 (/4 1920)
>[ 24936.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8af0]
>[ 24936.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8af0] width 1920 pitch 7680 (/4 1920)
>[ 24936.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8af0]
>[ 24936.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8af0] width 1920 pitch 7680 (/4 1920)
>[ 24936.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4aa0]
>[ 24936.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4aa0] width 1920 pitch 7680 (/4 1920)
>[ 24978.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f81130]
>[ 24978.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f81130] width 1920 pitch 7680 (/4 1920)
>[ 24978.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24978.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbb890]
>[ 24978.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbb890] width 1920 pitch 7680 (/4 1920)
>[ 24978.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d250]
>[ 24978.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d250] width 1920 pitch 7680 (/4 1920)
>[ 24978.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24978.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d250]
>[ 24978.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d250] width 1920 pitch 7680 (/4 1920)
>[ 24978.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24978.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d250]
>[ 24978.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d250] width 1920 pitch 7680 (/4 1920)
>[ 24978.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24978.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d250]
>[ 24978.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d250] width 1920 pitch 7680 (/4 1920)
>[ 24978.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24978.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d250]
>[ 24978.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d250] width 1920 pitch 7680 (/4 1920)
>[ 24978.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396fd50]
>[ 24978.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396fd50] width 1920 pitch 7680 (/4 1920)
>[ 24987.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x44408c0]
>[ 24987.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x44408c0] width 1920 pitch 7680 (/4 1920)
>[ 24996.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24996.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24996.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24996.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24996.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5770]
>[ 24996.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5770] width 1920 pitch 7680 (/4 1920)
>[ 24996.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24997.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24997.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3240]
>[ 24997.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3240] width 1920 pitch 7680 (/4 1920)
>[ 24997.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24997.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24997.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3240]
>[ 24997.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3240] width 1920 pitch 7680 (/4 1920)
>[ 24997.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24997.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24997.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3240]
>[ 24997.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3240] width 1920 pitch 7680 (/4 1920)
>[ 24997.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24997.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24997.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3240]
>[ 24997.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3240] width 1920 pitch 7680 (/4 1920)
>[ 24997.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7720]
>[ 24997.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7720] width 1920 pitch 7680 (/4 1920)
>[ 24997.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3240]
>[ 24997.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3240] width 1920 pitch 7680 (/4 1920)
>[ 25002.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3978f00]
>[ 25002.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3978f00] width 1920 pitch 7680 (/4 1920)
>[ 25025.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397ed80]
>[ 25025.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397ed80] width 1920 pitch 7680 (/4 1920)
>[ 25025.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25025.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x409a060]
>[ 25025.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x409a060] width 1920 pitch 7680 (/4 1920)
>[ 25025.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad7bf0]
>[ 25025.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad7bf0] width 1920 pitch 7680 (/4 1920)
>[ 25031.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aec020]
>[ 25031.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aec020] width 1920 pitch 7680 (/4 1920)
>[ 25031.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25031.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25031.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25032.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25032.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25032.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25032.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25032.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae94c0]
>[ 25032.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae94c0] width 1920 pitch 7680 (/4 1920)
>[ 25032.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5750]
>[ 25032.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5750] width 1920 pitch 7680 (/4 1920)
>[ 25077.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aec020]
>[ 25077.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aec020] width 1920 pitch 7680 (/4 1920)
>[ 25092.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4aa0]
>[ 25092.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4aa0] width 1920 pitch 7680 (/4 1920)
>[ 25107.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391a6a0]
>[ 25107.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391a6a0] width 1920 pitch 7680 (/4 1920)
>[ 25111.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25111.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25111.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25111.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25111.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25111.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25111.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25111.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25111.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25122.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25122.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25143.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25143.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25143.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25143.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25143.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25152.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25152.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25167.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e140]
>[ 25167.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e140] width 1920 pitch 7680 (/4 1920)
>[ 25182.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25182.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25197.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e528d0]
>[ 25197.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e528d0] width 1920 pitch 7680 (/4 1920)
>[ 25197.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7d840]
>[ 25197.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7d840] width 1920 pitch 7680 (/4 1920)
>[ 25198.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25198.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25198.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25198.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25198.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25198.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25198.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25198.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25198.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25198.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25198.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25198.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25198.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25198.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25198.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25198.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25198.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25198.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25198.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25199.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25199.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25199.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25199.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25199.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25199.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25199.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25199.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25199.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25199.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb3f0]
>[ 25199.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb3f0] width 1920 pitch 7680 (/4 1920)
>[ 25199.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25199.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25204.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9040]
>[ 25204.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9040] width 1920 pitch 7680 (/4 1920)
>[ 25204.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25204.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25204.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25204.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25204.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25204.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25204.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25204.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25204.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25204.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25204.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25204.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25204.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25204.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25204.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25204.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25204.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25205.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25205.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25205.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25205.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25205.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25205.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25205.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25205.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25205.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25205.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25205.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25205.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25205.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25227.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25227.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25242.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25242.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25244.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8eb50]
>[ 25244.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8eb50] width 1920 pitch 7680 (/4 1920)
>[ 25257.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e98ca0]
>[ 25257.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e98ca0] width 1920 pitch 7680 (/4 1920)
>[ 25257.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391a550]
>[ 25257.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391a550] width 1920 pitch 7680 (/4 1920)
>[ 25272.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ab70]
>[ 25272.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ab70] width 1920 pitch 7680 (/4 1920)
>[ 25287.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39662c0]
>[ 25287.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39662c0] width 1920 pitch 7680 (/4 1920)
>[ 25290.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8c0e0]
>[ 25290.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8c0e0] width 1920 pitch 7680 (/4 1920)
>[ 25291.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9040]
>[ 25291.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9040] width 1920 pitch 7680 (/4 1920)
>[ 25291.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ad40]
>[ 25291.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ad40] width 1920 pitch 7680 (/4 1920)
>[ 25291.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25291.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25291.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25b50]
>[ 25291.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25b50] width 1920 pitch 7680 (/4 1920)
>[ 25295.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25295.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25295.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25295.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25295.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25295.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25295.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25295.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25295.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25295.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25295.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25295.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25295.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25295.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25295.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25295.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25295.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25296.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f8e0e0]
>[ 25296.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f8e0e0] width 1920 pitch 7680 (/4 1920)
>[ 25296.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2912df0]
>[ 25296.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2912df0] width 1920 pitch 7680 (/4 1920)
>[ 25296.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aedae0]
>[ 25296.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aedae0] width 1920 pitch 7680 (/4 1920)
>[ 25296.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9040]
>[ 25296.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9040] width 1920 pitch 7680 (/4 1920)
>[ 25297.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aedae0]
>[ 25297.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aedae0] width 1920 pitch 7680 (/4 1920)
>[ 25297.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9040]
>[ 25297.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9040] width 1920 pitch 7680 (/4 1920)
>[ 25297.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aedae0]
>[ 25297.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aedae0] width 1920 pitch 7680 (/4 1920)
>[ 25298.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25298.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25302.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25302.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25306.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7e670]
>[ 25306.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7e670] width 1920 pitch 7680 (/4 1920)
>[ 25306.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25306.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25307.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25307.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25307.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25307.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25307.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f147e0]
>[ 25307.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f147e0] width 1920 pitch 7680 (/4 1920)
>[ 25307.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25307.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25307.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f147e0]
>[ 25307.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f147e0] width 1920 pitch 7680 (/4 1920)
>[ 25307.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8fcc0]
>[ 25307.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8fcc0] width 1920 pitch 7680 (/4 1920)
>[ 25307.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f147e0]
>[ 25307.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f147e0] width 1920 pitch 7680 (/4 1920)
>[ 25307.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25307.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25317.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e51a60]
>[ 25317.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e51a60] width 1920 pitch 7680 (/4 1920)
>[ 25332.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9040]
>[ 25332.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9040] width 1920 pitch 7680 (/4 1920)
>[ 25362.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8e480]
>[ 25362.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8e480] width 1920 pitch 7680 (/4 1920)
>[ 25377.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8e480]
>[ 25377.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8e480] width 1920 pitch 7680 (/4 1920)
>[ 25407.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8e480]
>[ 25407.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8e480] width 1920 pitch 7680 (/4 1920)
>[ 25437.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25437.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25452.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39539c0]
>[ 25452.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39539c0] width 1920 pitch 7680 (/4 1920)
>[ 25502.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25502.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25502.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25502.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25502.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25503.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25503.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25503.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25503.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25503.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25503.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25503.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25503.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25503.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25503.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25503.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25503.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25503.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25503.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25503.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25503.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25503.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25503.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918aa0]
>[ 25503.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918aa0] width 1920 pitch 7680 (/4 1920)
>[ 25504.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25504.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25504.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25504.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25504.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef96e0]
>[ 25504.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef96e0] width 1920 pitch 7680 (/4 1920)
>[ 25525.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25525.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25525.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2870ed0]
>[ 25525.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2870ed0] width 1920 pitch 7680 (/4 1920)
>[ 25525.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25525.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25525.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25525.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25525.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25525.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25525.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25525.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25525.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25525.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25526.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25526.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25526.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25526.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25526.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25526.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25527.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25527.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25527.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25527.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25527.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a90400]
>[ 25527.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a90400] width 1920 pitch 7680 (/4 1920)
>[ 25527.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25527.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25527.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25527.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25528.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25528.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25528.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25528.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25528.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25528.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25528.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25528.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25528.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25528.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25528.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25528.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25528.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25528.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25528.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25528.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25528.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25528.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25529.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25529.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25529.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25529.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25529.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25529.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25529.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28710b0]
>[ 25529.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28710b0] width 1920 pitch 7680 (/4 1920)
>[ 25530.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25530.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25530.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[ 25530.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[ 25530.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25530.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25530.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[ 25530.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[ 25530.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25530.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25530.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886ac0]
>[ 25530.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886ac0] width 1920 pitch 7680 (/4 1920)
>[ 25530.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d237a0]
>[ 25530.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d237a0] width 1920 pitch 7680 (/4 1920)
>[ 25535.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57d30]
>[ 25535.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57d30] width 1920 pitch 7680 (/4 1920)
>[ 25535.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b274f0]
>[ 25535.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b274f0] width 1920 pitch 7680 (/4 1920)
>[ 25535.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 25535.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 25535.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b274f0]
>[ 25535.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b274f0] width 1920 pitch 7680 (/4 1920)
>[ 25535.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3983130]
>[ 25535.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3983130] width 1920 pitch 7680 (/4 1920)
>[ 25536.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25536.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25536.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81230]
>[ 25536.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81230] width 1920 pitch 7680 (/4 1920)
>[ 25536.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25536.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25536.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 25536.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 25536.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25536.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25536.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 25536.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 25536.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25536.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25537.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 25537.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 25537.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25537.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25537.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 25537.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 25537.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aebd30]
>[ 25537.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aebd30] width 1920 pitch 7680 (/4 1920)
>[ 25538.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945cb0]
>[ 25538.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945cb0] width 1920 pitch 7680 (/4 1920)
>[ 25538.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2803450]
>[ 25538.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2803450] width 1920 pitch 7680 (/4 1920)
>[ 25538.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2903fc0]
>[ 25538.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2903fc0] width 1920 pitch 7680 (/4 1920)
>[ 25540.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901200]
>[ 25540.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901200] width 1920 pitch 7680 (/4 1920)
>[ 25540.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397a0e0]
>[ 25540.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397a0e0] width 1920 pitch 7680 (/4 1920)
>[ 25540.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa4170]
>[ 25540.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa4170] width 1920 pitch 7680 (/4 1920)
>[ 25542.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f8e60]
>[ 25542.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f8e60] width 1920 pitch 7680 (/4 1920)
>[ 25557.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca4e0]
>[ 25557.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca4e0] width 1920 pitch 7680 (/4 1920)
>[ 25587.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f37ec0]
>[ 25587.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f37ec0] width 1920 pitch 7680 (/4 1920)
>[ 25602.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebeeb0]
>[ 25602.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebeeb0] width 1920 pitch 7680 (/4 1920)
>[ 25617.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f67c90]
>[ 25617.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f67c90] width 1920 pitch 7680 (/4 1920)
>[ 25617.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902770]
>[ 25617.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902770] width 1920 pitch 7680 (/4 1920)
>[ 25617.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3929990]
>[ 25617.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3929990] width 1920 pitch 7680 (/4 1920)
>[ 25620.465] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25620.465] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25620.465] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25622.517] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25622.529] (II) RADEON(0): RADEONSaveScreen(0)
>[ 25623.818] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25623.818] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25623.819] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25629.160] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 25629.160] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 25629.161] (II) RADEON(0): Ok, leaving now...
>[ 25634.292] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 25634.349] (II) RADEON(0): RADEONEnterVT_KMS
>[ 25634.367] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25634.367] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25634.367] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25634.375] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25634.376] (II) RADEON(0): RADEONSaveScreen(1)
>[ 25634.670] (**) Option "Device" "/dev/input/event5"
>[ 25634.670] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 25635.755] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 25635.755] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25635.755] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 25642.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f56e80]
>[ 25642.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f56e80] width 1920 pitch 7680 (/4 1920)
>[ 25650.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c7cdc0]
>[ 25650.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c7cdc0] width 1920 pitch 7680 (/4 1920)
>[ 25680.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28480]
>[ 25680.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28480] width 1920 pitch 7680 (/4 1920)
>[ 25680.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395bac0]
>[ 25680.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395bac0] width 1920 pitch 7680 (/4 1920)
>[ 25695.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28480]
>[ 25695.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28480] width 1920 pitch 7680 (/4 1920)
>[ 25770.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395bac0]
>[ 25770.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395bac0] width 1920 pitch 7680 (/4 1920)
>[ 25800.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a28480]
>[ 25800.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a28480] width 1920 pitch 7680 (/4 1920)
>[ 25890.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78240]
>[ 25890.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78240] width 1920 pitch 7680 (/4 1920)
>[ 25905.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15e9670]
>[ 25905.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15e9670] width 1920 pitch 7680 (/4 1920)
>[ 25920.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a58750]
>[ 25920.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a58750] width 1920 pitch 7680 (/4 1920)
>[ 25950.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e821d0]
>[ 25950.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e821d0] width 1920 pitch 7680 (/4 1920)
>[ 25995.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3d70]
>[ 25995.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3d70] width 1920 pitch 7680 (/4 1920)
>[ 26010.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c518a0]
>[ 26010.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c518a0] width 1920 pitch 7680 (/4 1920)
>[ 26025.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984040]
>[ 26025.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984040] width 1920 pitch 7680 (/4 1920)
>[ 26040.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984040]
>[ 26040.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984040] width 1920 pitch 7680 (/4 1920)
>[ 26070.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81c20]
>[ 26070.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81c20] width 1920 pitch 7680 (/4 1920)
>[ 26085.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c518a0]
>[ 26085.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c518a0] width 1920 pitch 7680 (/4 1920)
>[ 26145.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae65d0]
>[ 26145.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae65d0] width 1920 pitch 7680 (/4 1920)
>[ 26160.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81c20]
>[ 26160.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81c20] width 1920 pitch 7680 (/4 1920)
>[ 26175.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3040]
>[ 26175.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3040] width 1920 pitch 7680 (/4 1920)
>[ 26190.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3d70]
>[ 26190.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3d70] width 1920 pitch 7680 (/4 1920)
>[ 26205.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984040]
>[ 26205.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984040] width 1920 pitch 7680 (/4 1920)
>[ 26235.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294d100]
>[ 26235.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294d100] width 1920 pitch 7680 (/4 1920)
>[ 26250.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f9f5d0]
>[ 26250.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f9f5d0] width 1920 pitch 7680 (/4 1920)
>[ 26265.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3985000]
>[ 26265.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3985000] width 1920 pitch 7680 (/4 1920)
>[ 26265.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3984fa0]
>[ 26265.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3984fa0] width 1920 pitch 7680 (/4 1920)
>[ 26294.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc7f60]
>[ 26294.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc7f60] width 1920 pitch 7680 (/4 1920)
>[ 26340.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec4410]
>[ 26340.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec4410] width 1920 pitch 7680 (/4 1920)
>[ 26400.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3fc0]
>[ 26400.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3fc0] width 1920 pitch 7680 (/4 1920)
>[ 26430.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3fc0]
>[ 26430.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3fc0] width 1920 pitch 7680 (/4 1920)
>[ 26460.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3fc0]
>[ 26460.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3fc0] width 1920 pitch 7680 (/4 1920)
>[ 26475.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0250]
>[ 26475.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0250] width 1920 pitch 7680 (/4 1920)
>[ 26520.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0250]
>[ 26520.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0250] width 1920 pitch 7680 (/4 1920)
>[ 26535.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3fc0]
>[ 26535.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3fc0] width 1920 pitch 7680 (/4 1920)
>[ 26580.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc7f60]
>[ 26580.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc7f60] width 1920 pitch 7680 (/4 1920)
>[ 26595.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab3fc0]
>[ 26595.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab3fc0] width 1920 pitch 7680 (/4 1920)
>[ 26612.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2ac0]
>[ 26612.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2ac0] width 1920 pitch 7680 (/4 1920)
>[ 26612.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2ac0]
>[ 26612.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2ac0] width 1920 pitch 7680 (/4 1920)
>[ 26612.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ffb740]
>[ 26612.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ffb740] width 1920 pitch 7680 (/4 1920)
>[ 26612.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2ac0]
>[ 26612.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2ac0] width 1920 pitch 7680 (/4 1920)
>[ 26617.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc7f60]
>[ 26617.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc7f60] width 1920 pitch 7680 (/4 1920)
>[ 26715.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e97ae0]
>[ 26715.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e97ae0] width 1920 pitch 7680 (/4 1920)
>[ 26726.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f9730]
>[ 26726.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f9730] width 1920 pitch 7680 (/4 1920)
>[ 26730.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985330]
>[ 26730.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985330] width 1920 pitch 7680 (/4 1920)
>[ 26850.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2978020]
>[ 26850.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2978020] width 1920 pitch 7680 (/4 1920)
>[ 26865.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a274b0]
>[ 26865.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a274b0] width 1920 pitch 7680 (/4 1920)
>[ 26955.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa1910]
>[ 26955.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa1910] width 1920 pitch 7680 (/4 1920)
>[ 26970.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa1910]
>[ 26970.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa1910] width 1920 pitch 7680 (/4 1920)
>[ 27180.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc720]
>[ 27180.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc720] width 1920 pitch 7680 (/4 1920)
>[ 27195.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3004080]
>[ 27195.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3004080] width 1920 pitch 7680 (/4 1920)
>[ 27273.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2f30]
>[ 27273.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2f30] width 1920 pitch 7680 (/4 1920)
>[ 27274.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2f30]
>[ 27274.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2f30] width 1920 pitch 7680 (/4 1920)
>[ 27274.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3936510]
>[ 27274.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3936510] width 1920 pitch 7680 (/4 1920)
>[ 27274.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ab2f30]
>[ 27274.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ab2f30] width 1920 pitch 7680 (/4 1920)
>[ 27405.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39b49e0]
>[ 27405.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39b49e0] width 1920 pitch 7680 (/4 1920)
>[ 27420.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7a530]
>[ 27420.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7a530] width 1920 pitch 7680 (/4 1920)
>[ 27495.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b37590]
>[ 27495.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b37590] width 1920 pitch 7680 (/4 1920)
>[ 27510.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee480]
>[ 27510.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee480] width 1920 pitch 7680 (/4 1920)
>[ 27525.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2922480]
>[ 27525.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2922480] width 1920 pitch 7680 (/4 1920)
>[ 27540.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78c30]
>[ 27540.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78c30] width 1920 pitch 7680 (/4 1920)
>[ 27555.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987fa0]
>[ 27555.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987fa0] width 1920 pitch 7680 (/4 1920)
>[ 27570.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987fa0]
>[ 27570.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987fa0] width 1920 pitch 7680 (/4 1920)
>[ 27585.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95b40]
>[ 27585.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95b40] width 1920 pitch 7680 (/4 1920)
>[ 27600.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2843b80]
>[ 27600.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2843b80] width 1920 pitch 7680 (/4 1920)
>[ 27645.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 27645.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 27660.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 27660.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 27662.157] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 27662.157] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27662.157] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 27662.269] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27662.269] (II) RADEON(0): RADEONSaveScreen(0)
>[ 27663.252] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 27663.252] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27663.252] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 27666.243] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 27666.243] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 27666.243] (II) RADEON(0): Ok, leaving now...
>[ 27670.982] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 27670.982] (II) RADEON(0): RADEONEnterVT_KMS
>[ 27671.000] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 27671.000] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27671.000] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 27671.009] (II) RADEON(0): RADEONSaveScreen(2)
>[ 27671.009] (II) RADEON(0): RADEONSaveScreen(1)
>[ 27671.010] (**) Option "Device" "/dev/input/event5"
>[ 27671.010] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 27671.912] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event11)
>[ 27671.949] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[ 27671.949] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[ 27671.949] 	Option "XkbRules" "evdev"
>[ 27671.949] 	Option "XkbModel" "evdev"
>[ 27671.949] 	Option "XkbLayout" "us"
>[ 27671.949] 	Option "_source" "server/udev"
>[ 27671.949] 	Option "name" "Dell Dell USB Optical Mouse"
>[ 27671.949] 	Option "path" "/dev/input/event11"
>[ 27671.949] 	Option "device" "/dev/input/event11"
>[ 27671.949] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[ 27671.949] 	Option "driver" "evdev"
>[ 27671.949] (**) Dell Dell USB Optical Mouse: always reports core events
>[ 27671.949] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event11"
>[ 27671.949] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[ 27671.949] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[ 27671.949] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[ 27671.949] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[ 27671.949] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[ 27671.949] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[ 27671.949] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[ 27671.949] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[ 27671.949] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27671.949] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input11/event11"
>[ 27671.949] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 14)
>[ 27671.949] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[ 27671.950] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[ 27671.950] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[ 27671.950] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[ 27671.950] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[ 27671.988] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[ 27671.988] (II) No input driver specified, ignoring this device.
>[ 27671.988] (II) This device may have been added with another device file.
>[ 27672.230] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 27672.230] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 27672.230] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 27719.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 27719.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 27795.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 27795.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 27795.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 27795.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 27825.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29889f0]
>[ 27825.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29889f0] width 1920 pitch 7680 (/4 1920)
>[ 27825.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 27825.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 27915.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 27915.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 27915.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 27915.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 27945.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78b50]
>[ 27945.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78b50] width 1920 pitch 7680 (/4 1920)
>[ 27960.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78b50]
>[ 27960.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78b50] width 1920 pitch 7680 (/4 1920)
>[ 27975.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 27975.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 27990.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 27990.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 28005.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 28005.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 28005.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 28005.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 28020.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 28020.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 28035.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 28035.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 28035.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854890]
>[ 28035.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854890] width 1920 pitch 7680 (/4 1920)
>[ 28065.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 28065.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 28080.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78b50]
>[ 28080.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78b50] width 1920 pitch 7680 (/4 1920)
>[ 28110.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172a780]
>[ 28110.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172a780] width 1920 pitch 7680 (/4 1920)
>[ 28155.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 28155.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 28155.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 28155.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 28170.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172a780]
>[ 28170.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172a780] width 1920 pitch 7680 (/4 1920)
>[ 28185.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 28185.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 28185.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 28185.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 28200.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 28200.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 28215.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 28215.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 28215.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 28215.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 28245.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 28245.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 28275.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 28275.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 28335.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 28335.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 28335.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78b50]
>[ 28335.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78b50] width 1920 pitch 7680 (/4 1920)
>[ 28365.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 28365.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 28380.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 28380.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 28395.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854890]
>[ 28395.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854890] width 1920 pitch 7680 (/4 1920)
>[ 28410.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 28410.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 28434.664] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 28434.664] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 28434.664] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 28525.124] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28525.124] (II) RADEON(0): RADEONSaveScreen(0)
>[ 30903.727] (II) RADEON(0): RADEONSaveScreen(1)
>[ 30907.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 30907.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 30919.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 30919.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 30979.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 30979.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 31009.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 31009.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 31039.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 31039.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 31054.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31054.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31069.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 31069.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 31084.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 31084.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 31114.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31114.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31234.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 31234.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 31249.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 31249.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 31279.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 31279.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 31309.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172a780]
>[ 31309.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172a780] width 1920 pitch 7680 (/4 1920)
>[ 31324.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854890]
>[ 31324.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854890] width 1920 pitch 7680 (/4 1920)
>[ 31339.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31339.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31354.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 31354.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 31384.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 31384.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 31399.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172a780]
>[ 31399.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172a780] width 1920 pitch 7680 (/4 1920)
>[ 31414.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 31414.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 31444.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854890]
>[ 31444.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854890] width 1920 pitch 7680 (/4 1920)
>[ 31459.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 31459.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 31474.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 31474.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 31594.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31594.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31624.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b15230]
>[ 31624.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b15230] width 1920 pitch 7680 (/4 1920)
>[ 31639.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 31639.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 31684.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 31684.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 31699.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 31699.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 31759.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2854890]
>[ 31759.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2854890] width 1920 pitch 7680 (/4 1920)
>[ 31804.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 31804.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 31819.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31819.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31864.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aad1c0]
>[ 31864.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aad1c0] width 1920 pitch 7680 (/4 1920)
>[ 31879.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 31879.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 31894.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 31894.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 31954.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 31954.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 31969.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 31969.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 31969.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aad1c0]
>[ 31969.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aad1c0] width 1920 pitch 7680 (/4 1920)
>[ 31984.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 31984.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 31999.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf920]
>[ 31999.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf920] width 1920 pitch 7680 (/4 1920)
>[ 31999.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 31999.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 32014.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 32014.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 32029.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 32029.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 32029.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 32029.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 32089.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 32089.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 32239.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aad1c0]
>[ 32239.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aad1c0] width 1920 pitch 7680 (/4 1920)
>[ 32284.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf920]
>[ 32284.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf920] width 1920 pitch 7680 (/4 1920)
>[ 32299.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 32299.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 32329.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca7e0]
>[ 32329.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca7e0] width 1920 pitch 7680 (/4 1920)
>[ 32394.786] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 32394.786] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 32394.786] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 32404.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 32404.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 32485.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32485.111] (II) RADEON(0): RADEONSaveScreen(0)
>[ 35728.846] (II) RADEON(0): RADEONSaveScreen(1)
>[ 35852.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 35852.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 35865.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 35865.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 35895.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 35895.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 35895.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 35895.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 35910.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bcd0]
>[ 35910.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bcd0] width 1920 pitch 7680 (/4 1920)
>[ 35925.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 35925.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 35955.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 35955.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 35970.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 35970.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 35985.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfd0]
>[ 35985.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfd0] width 1920 pitch 7680 (/4 1920)
>[ 36000.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36000.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36045.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 36045.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 36060.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 36060.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 36075.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 36075.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 36090.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 36090.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 36120.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 36120.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 36150.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bcd0]
>[ 36150.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bcd0] width 1920 pitch 7680 (/4 1920)
>[ 36165.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 36165.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 36180.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 36180.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 36195.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bcd0]
>[ 36195.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bcd0] width 1920 pitch 7680 (/4 1920)
>[ 36210.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 36210.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 36225.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 36225.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 36255.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 36255.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 36285.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36285.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36345.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 36345.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 36390.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f98840]
>[ 36390.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f98840] width 1920 pitch 7680 (/4 1920)
>[ 36405.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 36405.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 36420.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36420.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36435.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 36435.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 36450.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 36450.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 36452.005] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 36452.005] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 36452.005] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 36465.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b490]
>[ 36465.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b490] width 1920 pitch 7680 (/4 1920)
>[ 36495.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36495.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36525.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b490]
>[ 36525.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b490] width 1920 pitch 7680 (/4 1920)
>[ 36600.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7b50]
>[ 36600.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7b50] width 1920 pitch 7680 (/4 1920)
>[ 36600.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 36600.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 36630.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36630.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36645.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 36645.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 36675.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 36675.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 36705.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 36705.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 36720.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7160]
>[ 36720.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7160] width 1920 pitch 7680 (/4 1920)
>[ 36720.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb400]
>[ 36720.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb400] width 1920 pitch 7680 (/4 1920)
>[ 36750.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 36750.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 36750.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36750.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36780.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 36780.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 36795.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb400]
>[ 36795.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb400] width 1920 pitch 7680 (/4 1920)
>[ 36810.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 36810.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 36810.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b790]
>[ 36810.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b790] width 1920 pitch 7680 (/4 1920)
>[ 36855.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7160]
>[ 36855.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7160] width 1920 pitch 7680 (/4 1920)
>[ 36885.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 36885.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 36900.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2800320]
>[ 36900.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2800320] width 1920 pitch 7680 (/4 1920)
>[ 36900.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 36900.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 36960.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36960.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 36975.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ec02e0]
>[ 36975.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ec02e0] width 1920 pitch 7680 (/4 1920)
>[ 37035.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb400]
>[ 37035.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb400] width 1920 pitch 7680 (/4 1920)
>[ 37050.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b790]
>[ 37050.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b790] width 1920 pitch 7680 (/4 1920)
>[ 37061.263] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 37061.263] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 37061.263] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 37065.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 37065.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 37151.108] (II) RADEON(0): RADEONSaveScreen(2)
>[ 37151.108] (II) RADEON(0): RADEONSaveScreen(0)
>[ 37608.460] (II) RADEON(0): RADEONSaveScreen(1)
>[ 37609.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 37609.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 37609.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 37609.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 37624.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa4e30]
>[ 37624.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa4e30] width 1920 pitch 7680 (/4 1920)
>[ 37625.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81310]
>[ 37625.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81310] width 1920 pitch 7680 (/4 1920)
>[ 37654.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37654.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37669.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37669.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37669.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37669.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37684.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37684.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37744.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37744.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37819.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37819.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37834.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37834.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37864.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37864.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37879.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37879.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37909.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37909.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37924.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37924.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37939.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37939.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 37954.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 37954.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 37999.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 37999.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38014.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 38014.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 38029.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 38029.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38044.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 38044.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 38074.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 38074.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38089.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 38089.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 38104.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 38104.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38149.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 38149.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 38164.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 38164.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38179.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38179.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38194.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38194.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38209.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38209.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38224.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38224.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38231.229] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 38231.229] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 38231.229] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 38239.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38239.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38297.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 38297.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 38314.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38314.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38344.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38344.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38374.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38374.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38389.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38389.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38419.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38419.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38434.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38434.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38449.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 38449.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 38464.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 38464.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 38569.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38569.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38584.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 38584.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 38599.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38599.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38614.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 38614.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 38629.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38629.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38659.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 38659.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 38689.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38689.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38734.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 38734.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 38749.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38749.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38764.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 38764.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 38824.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38824.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38839.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38839.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38854.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38854.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38869.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38869.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38884.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38884.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38899.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38899.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38929.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38929.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38944.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38944.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38959.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38959.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 38974.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 38974.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 38989.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 38989.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 39004.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3af40]
>[ 39004.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3af40] width 1920 pitch 7680 (/4 1920)
>[ 39019.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 39019.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 39049.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 39049.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 39079.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39079.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39184.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39184.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39199.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39199.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39214.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39214.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39259.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39259.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39274.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39274.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39304.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39304.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39319.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39319.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39334.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39334.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39394.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39394.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39424.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39424.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39454.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39454.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39469.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39469.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39484.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39484.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39529.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39529.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39544.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39544.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39544.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 39544.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 39662.956] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 39662.956] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 39662.956] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 39664.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed9330]
>[ 39664.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed9330] width 1920 pitch 7680 (/4 1920)
>[ 39753.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 39753.111] (II) RADEON(0): RADEONSaveScreen(0)
>[ 39755.154] (II) RADEON(0): RADEONSaveScreen(1)
>[ 39755.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e406c0]
>[ 39755.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e406c0] width 1920 pitch 7680 (/4 1920)
>[ 39771.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 39771.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 39801.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5cbc0]
>[ 39801.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5cbc0] width 1920 pitch 7680 (/4 1920)
>[ 39831.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 39831.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 39846.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281e9e0]
>[ 39846.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281e9e0] width 1920 pitch 7680 (/4 1920)
>[ 40026.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 40026.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 40041.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 40041.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 40056.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 40056.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 40071.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 40071.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 40191.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 40191.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 40206.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 40206.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 40206.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281e9e0]
>[ 40206.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281e9e0] width 1920 pitch 7680 (/4 1920)
>[ 40296.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281e9e0]
>[ 40296.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281e9e0] width 1920 pitch 7680 (/4 1920)
>[ 40311.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 40311.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 40326.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 40326.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 40341.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 40341.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 40371.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 40371.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 40384.481] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 40384.481] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 40384.481] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 40475.124] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40475.124] (II) RADEON(0): RADEONSaveScreen(0)
>[ 40902.255] (II) RADEON(0): RADEONSaveScreen(1)
>[ 40903.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 40903.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 40918.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e1860]
>[ 40918.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e1860] width 1920 pitch 7680 (/4 1920)
>[ 40918.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed9330]
>[ 40918.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed9330] width 1920 pitch 7680 (/4 1920)
>[ 40963.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 40963.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 40978.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 40978.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 40978.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 40978.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 40993.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 40993.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41128.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41128.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41143.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41143.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41158.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41158.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41248.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41248.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41293.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41293.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41323.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41323.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41338.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41338.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41398.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41398.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41413.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41413.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41413.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41413.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41428.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41428.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41458.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41458.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41473.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41473.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41473.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41473.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41488.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41488.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41503.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41503.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41503.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41503.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41503.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41503.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41533.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 41533.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 41533.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41533.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41539.621] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 41539.621] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 41539.622] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 41548.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 41548.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 41630.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 41630.112] (II) RADEON(0): RADEONSaveScreen(0)
>[ 41632.864] (II) RADEON(0): RADEONSaveScreen(1)
>[ 41633.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 41633.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 41638.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 41638.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 41653.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281ff20]
>[ 41653.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281ff20] width 1920 pitch 7680 (/4 1920)
>[ 41668.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 41668.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 41683.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281ff20]
>[ 41683.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281ff20] width 1920 pitch 7680 (/4 1920)
>[ 41803.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 41803.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 41818.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5cbc0]
>[ 41818.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5cbc0] width 1920 pitch 7680 (/4 1920)
>[ 41833.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988940]
>[ 41833.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988940] width 1920 pitch 7680 (/4 1920)
>[ 41848.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 41848.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 41863.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 41863.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 41878.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 41878.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 41908.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 41908.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 41923.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 41923.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 41953.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 41953.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 42013.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 42013.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 42043.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 42043.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 42058.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 42058.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 42088.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 42088.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 42118.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e980d0]
>[ 42118.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e980d0] width 1920 pitch 7680 (/4 1920)
>[ 42163.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 42163.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 42178.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42178.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42193.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42193.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42208.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42208.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42238.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42238.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42253.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42253.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42283.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42283.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42328.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42328.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42343.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42343.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42358.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42358.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42373.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42373.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42388.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42388.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42403.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42403.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42403.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42403.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42448.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42448.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42463.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42463.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42493.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42493.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42508.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42508.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42553.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42553.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42568.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42568.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42583.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42583.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42598.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42598.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42613.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42613.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42643.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42643.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42703.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42703.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42703.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42703.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42748.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42748.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42763.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 42763.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 42769.536] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 42769.536] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 42769.536] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 42778.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 42778.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 42860.124] (II) RADEON(0): RADEONSaveScreen(2)
>[ 42860.124] (II) RADEON(0): RADEONSaveScreen(0)
>[ 42871.741] (II) RADEON(0): RADEONSaveScreen(1)
>[ 42872.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15040]
>[ 42872.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15040] width 1920 pitch 7680 (/4 1920)
>[ 42887.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42887.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42917.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15040]
>[ 42917.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15040] width 1920 pitch 7680 (/4 1920)
>[ 42947.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 42947.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 42962.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15040]
>[ 42962.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15040] width 1920 pitch 7680 (/4 1920)
>[ 43022.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 43022.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 43037.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15040]
>[ 43037.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15040] width 1920 pitch 7680 (/4 1920)
>[ 43082.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43082.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43097.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43097.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43112.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43112.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43127.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43127.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43142.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43142.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43157.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43157.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43172.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43172.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43187.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43187.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43217.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43217.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43232.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43232.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43247.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43247.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43262.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43262.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43277.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43277.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43292.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43292.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43367.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43367.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43382.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43382.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43397.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43397.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43412.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43412.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43457.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43457.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43472.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 43472.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 43472.369] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 43472.369] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 43472.370] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 43562.113] (II) RADEON(0): RADEONSaveScreen(2)
>[ 43562.113] (II) RADEON(0): RADEONSaveScreen(0)
>[ 43589.155] (II) RADEON(0): RADEONSaveScreen(1)
>[ 43589.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 43589.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 43635.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 43635.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 43650.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 43650.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 43665.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43665.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43695.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 43695.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 43725.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 43725.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 43725.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 43725.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 43770.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 43770.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 43785.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 43785.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 43890.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 43890.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 43950.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 43950.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 43950.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 43950.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 44115.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 44115.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 44145.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 44145.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 44235.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 44235.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 44250.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 44250.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 44265.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 44265.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 44280.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 44280.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 44340.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 44340.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 44355.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 44355.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 44640.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 44640.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 44670.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 44670.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 44685.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 44685.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 44715.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 44715.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 44745.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 44745.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 44760.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 44760.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 44775.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 44775.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 44820.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 44820.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 44835.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 44835.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 44850.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 44850.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 44925.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 44925.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 44925.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 44925.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 44985.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 44985.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 45000.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 45000.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 45030.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 45030.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 45060.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 45060.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 45075.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fff2b0]
>[ 45075.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fff2b0] width 1920 pitch 7680 (/4 1920)
>[ 45150.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef3840]
>[ 45150.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef3840] width 1920 pitch 7680 (/4 1920)
>[ 45165.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 45165.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 45220.525] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 45220.525] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 45220.526] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 45311.113] (II) RADEON(0): RADEONSaveScreen(2)
>[ 45311.113] (II) RADEON(0): RADEONSaveScreen(0)
>[ 46580.514] (II) RADEON(0): RADEONSaveScreen(1)
>[ 46581.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 46581.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 46596.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30024c0]
>[ 46596.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30024c0] width 1920 pitch 7680 (/4 1920)
>[ 46641.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 46641.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 46686.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ba60]
>[ 46686.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ba60] width 1920 pitch 7680 (/4 1920)
>[ 46701.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b6a0]
>[ 46701.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b6a0] width 1920 pitch 7680 (/4 1920)
>[ 46731.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b6a0]
>[ 46731.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b6a0] width 1920 pitch 7680 (/4 1920)
>[ 46746.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9ba60]
>[ 46746.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9ba60] width 1920 pitch 7680 (/4 1920)
>[ 46761.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 46761.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 46776.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 46776.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 46791.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b6a0]
>[ 46791.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b6a0] width 1920 pitch 7680 (/4 1920)
>[ 46821.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 46821.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 46836.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 46836.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 46851.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e37150]
>[ 46851.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e37150] width 1920 pitch 7680 (/4 1920)
>[ 46866.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 46866.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 46881.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299b490]
>[ 46881.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299b490] width 1920 pitch 7680 (/4 1920)
>[ 46896.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 46896.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 46911.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 46911.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 46926.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 46926.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 46941.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b6a0]
>[ 46941.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b6a0] width 1920 pitch 7680 (/4 1920)
>[ 47091.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 47091.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 47106.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c54110]
>[ 47106.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c54110] width 1920 pitch 7680 (/4 1920)
>[ 47199.500] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 47199.500] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 47199.500] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 47290.121] (II) RADEON(0): RADEONSaveScreen(2)
>[ 47290.121] (II) RADEON(0): RADEONSaveScreen(0)
>[ 47291.394] (II) RADEON(0): RADEONSaveScreen(1)
>[ 47292.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 47292.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 47571.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0170]
>[ 47571.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0170] width 1920 pitch 7680 (/4 1920)
>[ 47586.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299b490]
>[ 47586.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299b490] width 1920 pitch 7680 (/4 1920)
>[ 47676.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 47676.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 47706.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299b490]
>[ 47706.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299b490] width 1920 pitch 7680 (/4 1920)
>[ 47811.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 47811.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 47826.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c880]
>[ 47826.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c880] width 1920 pitch 7680 (/4 1920)
>[ 47871.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299b490]
>[ 47871.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299b490] width 1920 pitch 7680 (/4 1920)
>[ 47886.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fe70]
>[ 47886.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fe70] width 1920 pitch 7680 (/4 1920)
>[ 47892.021] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 47892.021] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 47892.021] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 47901.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 47901.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 47982.111] (II) RADEON(0): RADEONSaveScreen(2)
>[ 47982.112] (II) RADEON(0): RADEONSaveScreen(0)
>[ 48326.443] (II) RADEON(0): RADEONSaveScreen(1)
>[ 48327.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 48327.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 48357.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51130]
>[ 48357.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51130] width 1920 pitch 7680 (/4 1920)
>[ 48372.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 48372.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 48402.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a88de0]
>[ 48402.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a88de0] width 1920 pitch 7680 (/4 1920)
>[ 48417.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 48417.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 48432.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 48432.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 48447.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 48447.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 48462.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a88de0]
>[ 48462.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a88de0] width 1920 pitch 7680 (/4 1920)
>[ 48477.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 48477.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 48486.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c880]
>[ 48486.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c880] width 1920 pitch 7680 (/4 1920)
>[ 48487.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c880]
>[ 48487.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c880] width 1920 pitch 7680 (/4 1920)
>[ 48490.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12ff0]
>[ 48490.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12ff0] width 1920 pitch 7680 (/4 1920)
>[ 48492.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a88de0]
>[ 48492.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a88de0] width 1920 pitch 7680 (/4 1920)
>[ 48537.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3b0b0]
>[ 48537.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3b0b0] width 1920 pitch 7680 (/4 1920)
>[ 48552.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16ae0]
>[ 48552.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16ae0] width 1920 pitch 7680 (/4 1920)
>[ 48627.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 48627.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 48657.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c68440]
>[ 48657.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c68440] width 1920 pitch 7680 (/4 1920)
>[ 48665.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fde0]
>[ 48665.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fde0] width 1920 pitch 7680 (/4 1920)
>[ 48666.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fde0]
>[ 48666.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fde0] width 1920 pitch 7680 (/4 1920)
>[ 48717.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b50630]
>[ 48717.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b50630] width 1920 pitch 7680 (/4 1920)
>[ 48747.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862510]
>[ 48747.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862510] width 1920 pitch 7680 (/4 1920)
>[ 48792.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b50630]
>[ 48792.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b50630] width 1920 pitch 7680 (/4 1920)
>[ 48807.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b50630]
>[ 48807.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b50630] width 1920 pitch 7680 (/4 1920)
>[ 48882.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862510]
>[ 48882.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862510] width 1920 pitch 7680 (/4 1920)
>[ 48912.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862510]
>[ 48912.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862510] width 1920 pitch 7680 (/4 1920)
>[ 48927.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862510]
>[ 48927.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862510] width 1920 pitch 7680 (/4 1920)
>[ 48942.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2862510]
>[ 48942.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2862510] width 1920 pitch 7680 (/4 1920)
>[ 48987.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 48987.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49002.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49002.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49062.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49062.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49092.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49092.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49099.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c69ba0]
>[ 49099.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c69ba0] width 1920 pitch 7680 (/4 1920)
>[ 49099.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c69ba0]
>[ 49099.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c69ba0] width 1920 pitch 7680 (/4 1920)
>[ 49137.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c120]
>[ 49137.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c120] width 1920 pitch 7680 (/4 1920)
>[ 49167.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c120]
>[ 49167.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c120] width 1920 pitch 7680 (/4 1920)
>[ 49212.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28637b0]
>[ 49212.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28637b0] width 1920 pitch 7680 (/4 1920)
>[ 49227.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9a40]
>[ 49227.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9a40] width 1920 pitch 7680 (/4 1920)
>[ 49242.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28637b0]
>[ 49242.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28637b0] width 1920 pitch 7680 (/4 1920)
>[ 49362.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c2c0]
>[ 49362.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c2c0] width 1920 pitch 7680 (/4 1920)
>[ 49377.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c2c0]
>[ 49377.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c2c0] width 1920 pitch 7680 (/4 1920)
>[ 49482.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9a00]
>[ 49482.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9a00] width 1920 pitch 7680 (/4 1920)
>[ 49512.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c2c0]
>[ 49512.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c2c0] width 1920 pitch 7680 (/4 1920)
>[ 49527.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c2c0]
>[ 49527.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c2c0] width 1920 pitch 7680 (/4 1920)
>[ 49557.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28637b0]
>[ 49557.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28637b0] width 1920 pitch 7680 (/4 1920)
>[ 49572.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28637b0]
>[ 49572.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28637b0] width 1920 pitch 7680 (/4 1920)
>[ 49602.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 49602.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 49617.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 49617.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 49647.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 49647.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 49662.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28637b0]
>[ 49662.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28637b0] width 1920 pitch 7680 (/4 1920)
>[ 49672.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9a00]
>[ 49672.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9a00] width 1920 pitch 7680 (/4 1920)
>[ 49672.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2863150]
>[ 49672.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2863150] width 1920 pitch 7680 (/4 1920)
>[ 49677.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9a00]
>[ 49677.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9a00] width 1920 pitch 7680 (/4 1920)
>[ 49692.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2863150]
>[ 49692.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2863150] width 1920 pitch 7680 (/4 1920)
>[ 49703.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a7d0]
>[ 49703.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a7d0] width 1920 pitch 7680 (/4 1920)
>[ 49703.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49703.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49707.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a7d0]
>[ 49707.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a7d0] width 1920 pitch 7680 (/4 1920)
>[ 49722.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49722.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49737.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63570]
>[ 49737.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63570] width 1920 pitch 7680 (/4 1920)
>[ 49752.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49752.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49767.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63570]
>[ 49767.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63570] width 1920 pitch 7680 (/4 1920)
>[ 49782.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49782.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49797.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49797.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49812.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a81d90]
>[ 49812.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a81d90] width 1920 pitch 7680 (/4 1920)
>[ 49827.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b66b90]
>[ 49827.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b66b90] width 1920 pitch 7680 (/4 1920)
>[ 49842.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b66b90]
>[ 49842.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b66b90] width 1920 pitch 7680 (/4 1920)
>[ 49857.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63570]
>[ 49857.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63570] width 1920 pitch 7680 (/4 1920)
>[ 49931.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e806c0]
>[ 49931.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e806c0] width 1920 pitch 7680 (/4 1920)
>[ 49931.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 49931.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 49931.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 49931.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 49931.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 49931.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 49962.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51130]
>[ 49962.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51130] width 1920 pitch 7680 (/4 1920)
>[ 50007.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 50007.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 50022.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 50022.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 50037.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 50037.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 50067.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc2b0]
>[ 50067.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc2b0] width 1920 pitch 7680 (/4 1920)
>[ 50097.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51130]
>[ 50097.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51130] width 1920 pitch 7680 (/4 1920)
>[ 50112.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 50112.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 50142.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 50142.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 50172.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63370]
>[ 50172.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63370] width 1920 pitch 7680 (/4 1920)
>[ 50172.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f510]
>[ 50172.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f510] width 1920 pitch 7680 (/4 1920)
>[ 50427.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52d90]
>[ 50427.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52d90] width 1920 pitch 7680 (/4 1920)
>[ 50457.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f510]
>[ 50457.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f510] width 1920 pitch 7680 (/4 1920)
>[ 50502.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e27c0]
>[ 50502.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e27c0] width 1920 pitch 7680 (/4 1920)
>[ 50532.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52d90]
>[ 50532.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52d90] width 1920 pitch 7680 (/4 1920)
>[ 50697.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d130]
>[ 50697.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d130] width 1920 pitch 7680 (/4 1920)
>[ 50712.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285f510]
>[ 50712.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285f510] width 1920 pitch 7680 (/4 1920)
>[ 50745.858] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 50745.858] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 50745.858] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 50907.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53a50]
>[ 50907.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53a50] width 1920 pitch 7680 (/4 1920)
>[ 50937.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52d90]
>[ 50937.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52d90] width 1920 pitch 7680 (/4 1920)
>[ 51102.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b69c40]
>[ 51102.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b69c40] width 1920 pitch 7680 (/4 1920)
>[ 51117.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53a50]
>[ 51117.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53a50] width 1920 pitch 7680 (/4 1920)
>[ 51117.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cf00]
>[ 51117.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cf00] width 1920 pitch 7680 (/4 1920)
>[ 51207.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a85040]
>[ 51207.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a85040] width 1920 pitch 7680 (/4 1920)
>[ 51222.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52d90]
>[ 51222.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52d90] width 1920 pitch 7680 (/4 1920)
>[ 51297.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 51297.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 51327.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e27c0]
>[ 51327.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e27c0] width 1920 pitch 7680 (/4 1920)
>[ 51342.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b69c40]
>[ 51342.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b69c40] width 1920 pitch 7680 (/4 1920)
>[ 51352.028] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 51352.028] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 51352.028] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 51357.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 51357.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 51402.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a828e0]
>[ 51402.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a828e0] width 1920 pitch 7680 (/4 1920)
>[ 51432.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 51432.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 51702.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52d90]
>[ 51702.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52d90] width 1920 pitch 7680 (/4 1920)
>[ 51717.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65320]
>[ 51717.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65320] width 1920 pitch 7680 (/4 1920)
>[ 51732.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a828e0]
>[ 51732.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a828e0] width 1920 pitch 7680 (/4 1920)
>[ 51762.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 51762.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 51792.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65020]
>[ 51792.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65020] width 1920 pitch 7680 (/4 1920)
>[ 51822.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 51822.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 51852.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65020]
>[ 51852.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65020] width 1920 pitch 7680 (/4 1920)
>[ 51927.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 51927.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 51942.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65020]
>[ 51942.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65020] width 1920 pitch 7680 (/4 1920)
>[ 52032.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 52032.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 52047.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65020]
>[ 52047.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65020] width 1920 pitch 7680 (/4 1920)
>[ 52062.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 52062.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 52077.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82e40]
>[ 52077.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82e40] width 1920 pitch 7680 (/4 1920)
>[ 52137.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52137.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52212.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e26c0]
>[ 52212.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e26c0] width 1920 pitch 7680 (/4 1920)
>[ 52227.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 52227.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 52242.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e26c0]
>[ 52242.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e26c0] width 1920 pitch 7680 (/4 1920)
>[ 52272.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82e40]
>[ 52272.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82e40] width 1920 pitch 7680 (/4 1920)
>[ 52287.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 52287.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 52302.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81890]
>[ 52302.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81890] width 1920 pitch 7680 (/4 1920)
>[ 52512.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e26c0]
>[ 52512.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e26c0] width 1920 pitch 7680 (/4 1920)
>[ 52512.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81890]
>[ 52512.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81890] width 1920 pitch 7680 (/4 1920)
>[ 52557.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52557.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52572.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 52572.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 52572.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82e40]
>[ 52572.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82e40] width 1920 pitch 7680 (/4 1920)
>[ 52587.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e26c0]
>[ 52587.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e26c0] width 1920 pitch 7680 (/4 1920)
>[ 52602.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52602.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52602.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81890]
>[ 52602.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81890] width 1920 pitch 7680 (/4 1920)
>[ 52617.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82e40]
>[ 52617.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82e40] width 1920 pitch 7680 (/4 1920)
>[ 52673.470] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 52673.471] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 52673.471] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 52722.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 52722.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 52737.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52737.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52752.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285bcb0]
>[ 52752.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285bcb0] width 1920 pitch 7680 (/4 1920)
>[ 52782.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52782.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52797.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52797.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52827.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81ef0]
>[ 52827.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81ef0] width 1920 pitch 7680 (/4 1920)
>[ 52842.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285bcb0]
>[ 52842.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285bcb0] width 1920 pitch 7680 (/4 1920)
>[ 52962.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81ef0]
>[ 52962.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81ef0] width 1920 pitch 7680 (/4 1920)
>[ 52977.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 52977.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 52992.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285b9b0]
>[ 52992.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285b9b0] width 1920 pitch 7680 (/4 1920)
>[ 53022.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf130]
>[ 53022.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf130] width 1920 pitch 7680 (/4 1920)
>[ 53037.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81ef0]
>[ 53037.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81ef0] width 1920 pitch 7680 (/4 1920)
>[ 53282.219] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 53282.219] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 53282.219] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 53292.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c960]
>[ 53292.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c960] width 1920 pitch 7680 (/4 1920)
>[ 53352.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53352.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53367.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53367.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53397.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ca60]
>[ 53397.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ca60] width 1920 pitch 7680 (/4 1920)
>[ 53397.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53397.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53412.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ca60]
>[ 53412.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ca60] width 1920 pitch 7680 (/4 1920)
>[ 53427.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ca60]
>[ 53427.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ca60] width 1920 pitch 7680 (/4 1920)
>[ 53442.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ca60]
>[ 53442.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ca60] width 1920 pitch 7680 (/4 1920)
>[ 53472.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53472.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53517.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53517.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53712.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53712.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53772.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ca60]
>[ 53772.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ca60] width 1920 pitch 7680 (/4 1920)
>[ 53847.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53847.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53877.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53877.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53892.577] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 53892.577] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 53892.577] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 53905.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c689a0]
>[ 53905.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c689a0] width 1920 pitch 7680 (/4 1920)
>[ 53905.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53905.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53944.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ca40]
>[ 53944.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ca40] width 1920 pitch 7680 (/4 1920)
>[ 53944.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 53944.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 53997.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5da10]
>[ 53997.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5da10] width 1920 pitch 7680 (/4 1920)
>[ 54012.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2844310]
>[ 54012.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2844310] width 1920 pitch 7680 (/4 1920)
>[ 54282.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 54282.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 54297.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba230]
>[ 54297.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba230] width 1920 pitch 7680 (/4 1920)
>[ 54552.186] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 54552.186] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 54552.186] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 54566.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b21f20]
>[ 54566.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b21f20] width 1920 pitch 7680 (/4 1920)
>[ 54627.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54627.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54672.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65930]
>[ 54672.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65930] width 1920 pitch 7680 (/4 1920)
>[ 54702.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65930]
>[ 54702.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65930] width 1920 pitch 7680 (/4 1920)
>[ 54717.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54717.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54777.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54777.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54792.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54792.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54822.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65930]
>[ 54822.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65930] width 1920 pitch 7680 (/4 1920)
>[ 54852.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54852.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54897.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54897.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 54912.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 54912.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 55137.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b65930]
>[ 55137.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b65930] width 1920 pitch 7680 (/4 1920)
>[ 55167.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ff80]
>[ 55167.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ff80] width 1920 pitch 7680 (/4 1920)
>[ 55175.261] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 55175.261] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 55175.261] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 55182.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c930]
>[ 55182.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c930] width 1920 pitch 7680 (/4 1920)
>[ 55265.116] (II) RADEON(0): RADEONSaveScreen(2)
>[ 55265.116] (II) RADEON(0): RADEONSaveScreen(0)
>[ 56384.133] (II) RADEON(0): RADEONSaveScreen(1)
>[ 56384.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87ec0]
>[ 56384.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87ec0] width 1920 pitch 7680 (/4 1920)
>[ 56385.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b810]
>[ 56385.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b810] width 1920 pitch 7680 (/4 1920)
>[ 56415.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5fb60]
>[ 56415.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5fb60] width 1920 pitch 7680 (/4 1920)
>[ 56430.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ca40]
>[ 56430.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ca40] width 1920 pitch 7680 (/4 1920)
>[ 56475.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ca40]
>[ 56475.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ca40] width 1920 pitch 7680 (/4 1920)
>[ 56490.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285cf80]
>[ 56490.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285cf80] width 1920 pitch 7680 (/4 1920)
>[ 56520.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ca40]
>[ 56520.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ca40] width 1920 pitch 7680 (/4 1920)
>[ 56535.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5fb60]
>[ 56535.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5fb60] width 1920 pitch 7680 (/4 1920)
>[ 56550.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8c560]
>[ 56550.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8c560] width 1920 pitch 7680 (/4 1920)
>[ 56565.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90200]
>[ 56565.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90200] width 1920 pitch 7680 (/4 1920)
>[ 56580.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8c560]
>[ 56580.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8c560] width 1920 pitch 7680 (/4 1920)
>[ 56610.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6a7b0]
>[ 56610.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6a7b0] width 1920 pitch 7680 (/4 1920)
>[ 56996.626] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 56996.626] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 56996.626] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57087.112] (II) RADEON(0): RADEONSaveScreen(2)
>[ 57087.112] (II) RADEON(0): RADEONSaveScreen(0)
>[ 57294.641] (II) RADEON(0): RADEONSaveScreen(1)
>[ 57295.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57295.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57565.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57565.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57595.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f4f10]
>[ 57595.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f4f10] width 1920 pitch 7680 (/4 1920)
>[ 57625.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57625.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57655.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57655.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57850.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57850.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57865.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x285d100]
>[ 57865.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x285d100] width 1920 pitch 7680 (/4 1920)
>[ 57910.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f4f10]
>[ 57910.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f4f10] width 1920 pitch 7680 (/4 1920)
>[ 57933.301] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 57933.301] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 57933.301] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 57940.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1160]
>[ 57940.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1160] width 1920 pitch 7680 (/4 1920)
>[ 58023.107] (II) RADEON(0): RADEONSaveScreen(2)
>[ 58023.107] (II) RADEON(0): RADEONSaveScreen(0)
>[ 58126.889] (II) RADEON(0): RADEONSaveScreen(1)
>[ 58127.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58127.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58158.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5b810]
>[ 58158.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5b810] width 1920 pitch 7680 (/4 1920)
>[ 58173.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a936f0]
>[ 58173.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a936f0] width 1920 pitch 7680 (/4 1920)
>[ 58233.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92ea0]
>[ 58233.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92ea0] width 1920 pitch 7680 (/4 1920)
>[ 58248.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92ea0]
>[ 58248.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92ea0] width 1920 pitch 7680 (/4 1920)
>[ 58263.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58263.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58263.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58263.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58263.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58263.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58263.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58263.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58263.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58263.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58263.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58263.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58263.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58263.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58267.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58267.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58267.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58267.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58267.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58267.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58267.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58267.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58267.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58267.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58267.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58267.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58267.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58267.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58267.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58267.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58267.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58267.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58267.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58267.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58267.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58268.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58268.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58268.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58268.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58268.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58268.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58268.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58268.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58268.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58268.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58268.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58268.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58268.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58268.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58268.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58268.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58353.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58353.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58368.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58368.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58383.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58383.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58398.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58398.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58488.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58488.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58503.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91c70]
>[ 58503.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91c70] width 1920 pitch 7680 (/4 1920)
>[ 58623.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58623.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58638.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82dc0]
>[ 58638.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82dc0] width 1920 pitch 7680 (/4 1920)
>[ 58656.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58657.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29efdd0]
>[ 58657.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29efdd0] width 1920 pitch 7680 (/4 1920)
>[ 58657.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a830b0]
>[ 58657.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a830b0] width 1920 pitch 7680 (/4 1920)
>[ 58661.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f06d0]
>[ 58661.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f06d0] width 1920 pitch 7680 (/4 1920)
>[ 58661.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58661.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58661.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d020]
>[ 58661.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d020] width 1920 pitch 7680 (/4 1920)
>[ 58661.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58661.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58661.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58661.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58661.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 58661.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 58661.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64d00]
>[ 58661.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64d00] width 1920 pitch 7680 (/4 1920)
>[ 58661.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 58661.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 58661.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b627a0]
>[ 58661.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b627a0] width 1920 pitch 7680 (/4 1920)
>[ 58661.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58661.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58661.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64d00]
>[ 58661.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64d00] width 1920 pitch 7680 (/4 1920)
>[ 58661.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b627a0]
>[ 58661.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b627a0] width 1920 pitch 7680 (/4 1920)
>[ 58698.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 58698.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 58713.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58713.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58773.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 58773.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 58788.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58788.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 58818.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 58818.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 58818.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 58818.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59013.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59013.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59028.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 59028.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59028.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59028.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59103.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 59103.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59133.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59133.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59178.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 59178.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59178.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59178.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59193.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 59193.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59223.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59223.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59238.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eeea0]
>[ 59238.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eeea0] width 1920 pitch 7680 (/4 1920)
>[ 59238.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59238.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59262.849] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 59262.849] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 59262.849] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 59283.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59283.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59298.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59298.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59298.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59298.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59313.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59313.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59328.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59328.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59343.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59343.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59373.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59373.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59388.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59388.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59403.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59403.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59433.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59433.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59448.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59448.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59463.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59463.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59478.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59478.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59493.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59493.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59508.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59508.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59523.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59523.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59538.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59538.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59553.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d150]
>[ 59553.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d150] width 1920 pitch 7680 (/4 1920)
>[ 59568.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59568.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59598.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59598.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59643.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59643.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59658.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59658.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59673.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59673.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59688.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59688.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59703.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59703.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59748.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59748.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59763.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59763.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59778.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59778.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59793.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7cf80]
>[ 59793.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7cf80] width 1920 pitch 7680 (/4 1920)
>[ 59823.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c8c0]
>[ 59823.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c8c0] width 1920 pitch 7680 (/4 1920)
>[ 59872.884] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 59872.884] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 59872.884] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 59898.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5dff0]
>[ 59898.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5dff0] width 1920 pitch 7680 (/4 1920)
>[ 59913.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59913.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 59943.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 59943.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 59958.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 59958.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60063.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60063.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60078.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60078.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60093.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60093.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60108.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60108.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60168.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60168.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60183.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60183.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60258.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60258.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60273.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60273.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60273.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60273.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60288.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60288.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60303.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60303.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60348.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60348.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60363.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60363.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60423.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60423.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60438.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30122f0]
>[ 60438.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30122f0] width 1920 pitch 7680 (/4 1920)
>[ 60468.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83420]
>[ 60468.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83420] width 1920 pitch 7680 (/4 1920)
>[ 60479.078] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 60479.078] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 60479.078] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 60498.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eef190]
>[ 60498.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eef190] width 1920 pitch 7680 (/4 1920)
>[ 60513.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c517b0]
>[ 60513.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c517b0] width 1920 pitch 7680 (/4 1920)
>[ 60528.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eef190]
>[ 60528.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eef190] width 1920 pitch 7680 (/4 1920)
>[ 60543.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c517b0]
>[ 60543.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c517b0] width 1920 pitch 7680 (/4 1920)
>[ 60603.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eef190]
>[ 60603.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eef190] width 1920 pitch 7680 (/4 1920)
>[ 60633.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 60633.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 60828.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90800]
>[ 60828.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90800] width 1920 pitch 7680 (/4 1920)
>[ 60843.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 60843.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 60948.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90800]
>[ 60948.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90800] width 1920 pitch 7680 (/4 1920)
>[ 60993.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 60993.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 61038.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90800]
>[ 61038.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90800] width 1920 pitch 7680 (/4 1920)
>[ 61053.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 61053.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 61188.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 61188.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 61203.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c0e0]
>[ 61203.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c0e0] width 1920 pitch 7680 (/4 1920)
>[ 61239.559] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 61239.559] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 61239.559] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 61330.121] (II) RADEON(0): RADEONSaveScreen(2)
>[ 61330.121] (II) RADEON(0): RADEONSaveScreen(0)
>[ 61414.004] (II) RADEON(0): RADEONSaveScreen(1)
>[ 61414.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a4c0]
>[ 61414.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a4c0] width 1920 pitch 7680 (/4 1920)
>[ 61436.067] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 61436.067] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 61436.067] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 61436.418] (II) RADEON(0): RADEONSaveScreen(2)
>[ 61436.418] (II) RADEON(0): RADEONSaveScreen(0)
>[ 61437.467] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61437.467] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61437.547] 
>[ 61437.547] Backtrace:
>[ 61437.927] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61437.927] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61437.927] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61437.927] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61437.927] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61437.927] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61437.927] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61437.927] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[ 61437.927] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61437.927] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[ 61437.927] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[ 61437.927] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[ 61437.927] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0x7b7dc) [0x7fbea94bf7dc]
>[ 61437.927] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xd3583) [0x7fbea9517583]
>[ 61437.927] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[ 61437.927] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[ 61437.946] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7fbeaa61a000+0x1aec6) [0x7fbeaa634ec6]
>[ 61437.946] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61437.946] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61437.946] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61437.946] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61437.946] 
>[ 61437.946] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61437.946] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61437.946] 
>[ 61437.946] Backtrace:
>[ 61437.946] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61437.946] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61437.946] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61437.946] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61437.946] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61437.946] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61437.946] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61437.946] 7: /usr/bin/Xorg (0x400000+0x6ac20) [0x46ac20]
>[ 61437.946] 8: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61437.946] 9: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[ 61437.946] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[ 61437.946] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x3023a076fd]
>[ 61437.946] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0x7b7dc) [0x7fbea94bf7dc]
>[ 61437.946] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xd3583) [0x7fbea9517583]
>[ 61437.946] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461bae]
>[ 61437.946] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x480617]
>[ 61437.946] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7fbeaa61a000+0x1aec6) [0x7fbeaa634ec6]
>[ 61437.946] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61437.946] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61437.946] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61437.946] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61437.946] 
>[ 61438.019] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.019] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.019] 
>[ 61438.019] Backtrace:
>[ 61438.102] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.102] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.102] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.102] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.102] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.102] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.102] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.102] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[ 61438.102] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[ 61438.102] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x3023a058cc]
>[ 61438.102] 10: /lib64/libdrm_radeon.so.1 (0x7fbea9239000+0x2009) [0x7fbea923b009]
>[ 61438.102] 11: /lib64/libdrm_radeon.so.1 (0x7fbea9239000+0x2234) [0x7fbea923b234]
>[ 61438.102] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb4a) [0x7fbea94f0b4a]
>[ 61438.102] 13: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.102] 14: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.102] 15: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.102] 16: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.102] 17: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.102] 18: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.102] 19: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.102] 20: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.102] 21: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.102] 22: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.102] 
>[ 61438.102] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.102] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.102] 
>[ 61438.102] Backtrace:
>[ 61438.102] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.102] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.102] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.102] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.102] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.103] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.103] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.103] 7: /lib64/libc.so.6 (ioctl+0x7) [0x30090ea307]
>[ 61438.103] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x3023a03658]
>[ 61438.103] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x3023a058cc]
>[ 61438.103] 10: /lib64/libdrm_radeon.so.1 (0x7fbea9239000+0x2009) [0x7fbea923b009]
>[ 61438.103] 11: /lib64/libdrm_radeon.so.1 (0x7fbea9239000+0x2234) [0x7fbea923b234]
>[ 61438.103] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb4a) [0x7fbea94f0b4a]
>[ 61438.103] 13: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.103] 14: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.103] 15: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.103] 16: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.103] 17: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.103] 18: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.103] 19: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.103] 20: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.103] 21: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.103] 22: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.103] 
>[ 61438.346] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.346] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.346] 
>[ 61438.346] Backtrace:
>[ 61438.365] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.365] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.365] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.365] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.365] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.365] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.365] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.365] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.365] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.365] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.365] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.365] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.365] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.365] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.365] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.365] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.365] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.365] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.365] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.365] 
>[ 61438.365] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.365] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.365] 
>[ 61438.365] Backtrace:
>[ 61438.366] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.366] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.366] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.366] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.366] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.366] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.366] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.366] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.366] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.366] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.366] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.366] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.366] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.366] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.366] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.366] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.366] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.366] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.366] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.366] 
>[ 61438.405] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.405] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.405] 
>[ 61438.405] Backtrace:
>[ 61438.405] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.405] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.405] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.405] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.405] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.405] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.405] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.405] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.405] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.405] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.405] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.405] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.405] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.406] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.406] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.406] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.406] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.406] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.406] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.406] 
>[ 61438.406] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.406] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.406] 
>[ 61438.406] Backtrace:
>[ 61438.406] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.406] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.406] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.406] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.406] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.406] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.406] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.406] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.406] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.406] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.406] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.406] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.406] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.406] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.406] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.406] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.406] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.406] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.406] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.406] 
>[ 61438.507] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.507] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.507] 
>[ 61438.507] Backtrace:
>[ 61438.507] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.507] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.507] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.507] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.507] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.507] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.507] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.507] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.507] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.507] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.507] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.507] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.507] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.507] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.507] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.507] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.507] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.507] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.507] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.507] 
>[ 61438.507] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.507] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.507] 
>[ 61438.507] Backtrace:
>[ 61438.507] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.507] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.507] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.507] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.507] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.507] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.507] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.507] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.507] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.507] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.507] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.507] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.507] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.507] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.507] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.507] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.507] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.507] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.507] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.507] 
>[ 61438.549] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.549] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.549] 
>[ 61438.549] Backtrace:
>[ 61438.549] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.549] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.549] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.549] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.549] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.549] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.549] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.549] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.549] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.549] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.549] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.549] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.549] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.549] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.549] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.549] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.549] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.549] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.549] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.549] 
>[ 61438.549] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.549] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.549] 
>[ 61438.549] Backtrace:
>[ 61438.549] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.549] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.549] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.549] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.549] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.549] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.549] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.549] 7: /lib64/libc.so.6 (0x3009000000+0x144a4b) [0x3009144a4b]
>[ 61438.549] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xacb9d) [0x7fbea94f0b9d]
>[ 61438.549] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.549] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x806a) [0x7fbea8a1806a]
>[ 61438.549] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x11ed8) [0x7fbea8a21ed8]
>[ 61438.549] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xe828) [0x7fbea8a1e828]
>[ 61438.550] 13: /usr/bin/Xorg (0x400000+0x102019) [0x502019]
>[ 61438.550] 14: /usr/bin/Xorg (0x400000+0xfaf74) [0x4faf74]
>[ 61438.550] 15: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.550] 16: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.550] 17: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.550] 18: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.550] 
>[ 61438.595] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 61438.595] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 61438.595] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 61438.620] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.620] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.620] 
>[ 61438.620] Backtrace:
>[ 61438.620] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.620] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.620] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.620] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.620] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.620] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.620] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.620] 7: /lib64/libc.so.6 (0x3009000000+0x1449fc) [0x30091449fc]
>[ 61438.620] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xad167) [0x7fbea94f1167]
>[ 61438.620] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.620] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x7c75) [0x7fbea8a17c75]
>[ 61438.620] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x8ff7) [0x7fbea8a18ff7]
>[ 61438.620] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xaad9) [0x7fbea8a1aad9]
>[ 61438.620] 13: /usr/bin/Xorg (0x400000+0x10354d) [0x50354d]
>[ 61438.620] 14: /usr/bin/Xorg (0x400000+0xf32f8) [0x4f32f8]
>[ 61438.620] 15: /usr/bin/Xorg (miCompositeRects+0x8b) [0x4f33fb]
>[ 61438.620] 16: /usr/bin/Xorg (0x400000+0xfb035) [0x4fb035]
>[ 61438.621] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.621] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.621] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.621] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.621] 
>[ 61438.621] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.621] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.621] 
>[ 61438.621] Backtrace:
>[ 61438.621] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.621] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.621] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.621] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.621] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.621] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.621] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.621] 7: /lib64/libc.so.6 (0x3009000000+0x1449fc) [0x30091449fc]
>[ 61438.621] 8: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fbea9444000+0xad167) [0x7fbea94f1167]
>[ 61438.621] 9: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x5a7b) [0x7fbea8a15a7b]
>[ 61438.621] 10: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x7c75) [0x7fbea8a17c75]
>[ 61438.621] 11: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0x8ff7) [0x7fbea8a18ff7]
>[ 61438.621] 12: /usr/lib64/xorg/modules/libexa.so (0x7fbea8a10000+0xaad9) [0x7fbea8a1aad9]
>[ 61438.621] 13: /usr/bin/Xorg (0x400000+0x10354d) [0x50354d]
>[ 61438.621] 14: /usr/bin/Xorg (0x400000+0xf32f8) [0x4f32f8]
>[ 61438.621] 15: /usr/bin/Xorg (miCompositeRects+0x8b) [0x4f33fb]
>[ 61438.621] 16: /usr/bin/Xorg (0x400000+0xfb035) [0x4fb035]
>[ 61438.621] 17: /usr/bin/Xorg (0x400000+0x3446a) [0x43446a]
>[ 61438.621] 18: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.621] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.621] 20: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.621] 
>[ 61438.824] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.824] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.824] 
>[ 61438.824] Backtrace:
>[ 61438.824] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.824] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.824] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.824] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.824] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.824] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.824] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.825] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61438.825] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61438.825] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61438.825] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.825] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.825] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.825] 
>[ 61438.825] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.825] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.825] 
>[ 61438.825] Backtrace:
>[ 61438.825] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.825] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.825] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.825] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.825] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.825] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.825] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.825] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61438.825] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61438.825] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61438.825] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.825] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.825] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.825] 
>[ 61438.897] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.897] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.897] 
>[ 61438.897] Backtrace:
>[ 61438.897] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.897] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.897] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.897] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.897] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.897] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.897] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.897] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61438.897] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61438.897] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61438.897] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.898] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.898] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.898] 
>[ 61438.898] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61438.898] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61438.898] 
>[ 61438.898] Backtrace:
>[ 61438.898] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61438.898] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61438.898] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61438.898] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61438.898] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61438.898] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61438.898] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61438.898] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61438.898] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61438.898] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61438.898] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61438.898] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61438.898] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61438.898] 
>[ 61439.149] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61439.149] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61439.149] 
>[ 61439.149] Backtrace:
>[ 61439.149] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61439.149] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61439.149] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61439.149] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61439.149] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61439.150] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61439.150] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61439.150] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61439.150] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61439.150] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61439.150] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61439.150] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61439.150] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61439.150] 
>[ 61439.150] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61439.150] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61439.150] 
>[ 61439.150] Backtrace:
>[ 61439.150] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61439.150] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61439.150] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61439.150] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61439.150] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61439.150] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61439.150] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61439.150] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61439.150] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61439.150] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61439.150] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61439.150] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61439.150] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61439.151] 
>[ 61439.221] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61439.221] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61439.221] 
>[ 61439.221] Backtrace:
>[ 61439.221] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61439.221] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61439.221] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61439.221] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61439.221] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61439.221] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61439.221] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61439.221] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61439.221] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61439.221] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61439.221] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61439.221] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61439.221] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61439.221] 
>[ 61439.221] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61439.221] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61439.221] 
>[ 61439.221] Backtrace:
>[ 61439.221] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61439.221] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61439.221] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61439.221] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61439.221] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61439.221] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61439.221] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61439.221] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61439.221] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61439.221] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61439.221] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61439.221] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61439.222] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61439.222] 
>[ 61440.038] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.038] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.038] 
>[ 61440.038] Backtrace:
>[ 61440.038] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.039] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.039] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.039] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.039] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.039] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.039] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.039] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.039] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.039] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.039] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.039] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.039] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.039] 
>[ 61440.039] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.039] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.039] 
>[ 61440.039] Backtrace:
>[ 61440.039] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.039] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.039] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.039] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.039] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.039] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.039] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.039] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.039] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.039] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.039] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.039] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.039] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.039] 
>[ 61440.075] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.075] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.075] 
>[ 61440.075] Backtrace:
>[ 61440.075] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.075] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.075] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.075] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.075] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.075] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.075] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.075] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.075] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.075] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.075] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.075] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.075] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.075] 
>[ 61440.075] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.075] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.075] 
>[ 61440.075] Backtrace:
>[ 61440.076] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.076] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.076] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.076] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.076] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.076] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.076] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.076] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.076] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.076] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.076] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.076] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.076] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.076] 
>[ 61440.111] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.111] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.111] 
>[ 61440.111] Backtrace:
>[ 61440.111] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.111] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.111] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.111] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.111] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.111] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.111] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.111] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.111] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.111] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.111] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.111] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.111] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.111] 
>[ 61440.111] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.111] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.111] 
>[ 61440.111] Backtrace:
>[ 61440.111] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.112] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.112] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.112] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.112] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.112] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.112] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.112] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.112] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.112] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.112] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.112] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.112] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.112] 
>[ 61440.363] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.363] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.363] 
>[ 61440.363] Backtrace:
>[ 61440.363] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.363] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.363] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.363] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.363] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.363] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.363] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.363] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.363] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.363] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.363] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.363] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.363] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.363] 
>[ 61440.363] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.363] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.363] 
>[ 61440.363] Backtrace:
>[ 61440.364] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.364] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.364] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.364] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.364] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.364] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.364] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.364] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.364] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.364] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.364] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.364] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.364] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.364] 
>[ 61440.411] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.411] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.411] 
>[ 61440.411] Backtrace:
>[ 61440.411] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.411] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.411] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.411] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.411] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.411] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.411] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.411] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.411] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.411] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.411] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.411] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.411] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.411] 
>[ 61440.411] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.411] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.411] 
>[ 61440.411] Backtrace:
>[ 61440.411] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.411] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.411] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.411] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.411] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.411] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.411] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.411] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.411] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.411] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.411] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.411] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.411] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.412] 
>[ 61440.464] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.464] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.464] 
>[ 61440.464] Backtrace:
>[ 61440.464] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.464] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.464] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.464] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.464] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.464] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.464] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.464] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.464] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.464] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.464] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.464] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.464] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.464] 
>[ 61440.464] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.464] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.464] 
>[ 61440.464] Backtrace:
>[ 61440.464] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.464] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.465] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.465] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.465] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.465] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.465] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.465] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.465] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.465] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.465] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.465] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.465] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.465] 
>[ 61440.519] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.519] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.519] 
>[ 61440.519] Backtrace:
>[ 61440.519] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.519] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.519] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.519] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.519] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.519] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.519] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.519] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.519] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.519] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.519] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.519] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.519] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.519] 
>[ 61440.519] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61440.519] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61440.519] 
>[ 61440.519] Backtrace:
>[ 61440.519] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61440.519] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61440.519] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61440.519] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61440.519] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61440.519] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61440.519] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61440.519] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61440.519] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61440.519] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61440.519] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61440.519] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61440.519] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61440.519] 
>[ 61441.288] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.288] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.288] 
>[ 61441.288] Backtrace:
>[ 61441.288] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.288] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.288] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.288] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.288] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.288] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.288] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.288] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.288] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.288] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.288] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.289] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.289] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.289] 
>[ 61441.289] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.289] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.289] 
>[ 61441.289] Backtrace:
>[ 61441.289] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.289] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.289] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.289] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.289] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.289] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.289] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.289] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.289] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.289] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.289] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.289] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.289] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.289] 
>[ 61441.336] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.336] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.336] 
>[ 61441.336] Backtrace:
>[ 61441.336] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.336] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.336] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.336] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.336] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.336] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.337] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.337] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.337] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.337] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.337] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.337] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.337] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.337] 
>[ 61441.337] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.337] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.337] 
>[ 61441.337] Backtrace:
>[ 61441.337] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.337] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.337] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.337] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.337] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.338] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.338] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.338] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.338] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.338] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.338] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.338] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.338] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.338] 
>[ 61441.485] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.486] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.486] 
>[ 61441.486] Backtrace:
>[ 61441.486] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.486] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.486] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.486] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.486] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.486] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.486] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.486] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.486] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.486] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.486] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.487] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.487] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.487] 
>[ 61441.487] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.487] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.487] 
>[ 61441.487] Backtrace:
>[ 61441.487] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.487] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.487] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.487] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.487] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.487] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.487] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.487] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.487] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.487] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.488] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.488] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.488] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.488] 
>[ 61441.697] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.697] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.697] 
>[ 61441.697] Backtrace:
>[ 61441.697] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.697] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.697] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.697] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.697] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.697] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.697] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.697] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.697] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.697] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.697] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.697] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.697] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.697] 
>[ 61441.697] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.697] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.697] 
>[ 61441.697] Backtrace:
>[ 61441.698] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.698] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.698] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.698] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.698] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.698] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.698] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.698] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.698] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.698] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.698] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.698] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.698] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.698] 
>[ 61441.758] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.758] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.758] 
>[ 61441.758] Backtrace:
>[ 61441.758] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.758] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.758] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.758] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.758] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.758] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.758] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.759] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.759] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.759] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.759] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.759] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.759] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.759] 
>[ 61441.759] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61441.759] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61441.759] 
>[ 61441.759] Backtrace:
>[ 61441.759] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61441.759] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61441.759] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61441.759] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61441.759] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61441.759] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61441.759] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61441.759] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61441.759] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61441.759] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61441.759] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61441.759] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61441.759] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61441.759] 
>[ 61442.010] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.010] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.010] 
>[ 61442.010] Backtrace:
>[ 61442.010] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.010] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.010] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.010] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.011] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.011] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.011] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.011] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.011] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.011] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.011] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.011] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.011] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.011] 
>[ 61442.011] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.011] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.011] 
>[ 61442.011] Backtrace:
>[ 61442.011] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.011] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.011] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.011] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.011] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.012] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.012] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.012] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.012] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.012] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.012] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.012] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.012] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.012] 
>[ 61442.082] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.082] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.082] 
>[ 61442.082] Backtrace:
>[ 61442.082] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.082] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.082] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.083] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.083] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.083] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.083] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.083] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.083] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.083] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.083] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.083] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.083] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.083] 
>[ 61442.083] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.083] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.083] 
>[ 61442.083] Backtrace:
>[ 61442.083] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.083] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.083] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.083] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.083] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.083] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.083] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.083] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.083] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.083] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.083] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.083] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.083] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.083] 
>[ 61442.130] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.130] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.130] 
>[ 61442.130] Backtrace:
>[ 61442.130] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.130] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.130] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.130] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.130] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.130] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.130] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.130] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.130] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.130] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.131] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.131] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.131] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.131] 
>[ 61442.131] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.131] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.131] 
>[ 61442.131] Backtrace:
>[ 61442.131] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.131] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.131] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.131] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.131] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.131] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.131] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.131] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.131] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.131] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.131] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.131] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.131] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.131] 
>[ 61442.238] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.238] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.238] 
>[ 61442.238] Backtrace:
>[ 61442.238] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.238] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.238] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.238] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.238] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.238] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.238] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.239] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.239] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.239] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.239] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.239] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.239] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.239] 
>[ 61442.239] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.239] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.239] 
>[ 61442.239] Backtrace:
>[ 61442.239] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.239] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.239] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.239] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.239] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.239] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.239] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.239] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.239] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.239] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.239] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.239] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.239] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.239] 
>[ 61442.455] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.455] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.455] 
>[ 61442.455] Backtrace:
>[ 61442.455] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.455] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.455] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.455] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.455] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.455] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.455] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.455] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.455] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.455] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.455] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.455] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.455] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.455] 
>[ 61442.455] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61442.455] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61442.455] 
>[ 61442.455] Backtrace:
>[ 61442.455] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61442.456] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61442.456] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61442.456] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61442.456] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61442.456] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61442.456] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61442.456] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61442.456] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61442.456] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61442.456] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61442.456] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61442.456] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61442.456] 
>[ 61443.211] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61443.212] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61443.212] 
>[ 61443.212] Backtrace:
>[ 61443.212] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61443.212] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61443.212] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61443.212] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61443.212] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61443.212] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61443.212] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61443.212] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61443.212] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61443.212] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61443.212] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61443.212] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61443.212] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61443.212] 
>[ 61443.212] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 61443.212] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 61443.212] 
>[ 61443.212] Backtrace:
>[ 61443.212] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x465326]
>[ 61443.212] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x2e77) [0x7fbea650ae77]
>[ 61443.212] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x4563) [0x7fbea650c563]
>[ 61443.212] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7fbea6508000+0x6fa4) [0x7fbea650efa4]
>[ 61443.212] 4: /usr/bin/Xorg (0x400000+0x80817) [0x480817]
>[ 61443.212] 5: /usr/bin/Xorg (0x400000+0xa4b00) [0x4a4b00]
>[ 61443.212] 6: /lib64/libpthread.so.0 (0x3009400000+0xefe0) [0x300940efe0]
>[ 61443.212] 7: /lib64/libc.so.6 (__select+0x13) [0x30090ea9d3]
>[ 61443.212] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x4628a0]
>[ 61443.212] 9: /usr/bin/Xorg (0x400000+0x34131) [0x434131]
>[ 61443.212] 10: /usr/bin/Xorg (0x400000+0x23475) [0x423475]
>[ 61443.212] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3009021735]
>[ 61443.212] 12: /usr/bin/Xorg (0x400000+0x2374d) [0x42374d]
>[ 61443.212]

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Attachments on bug 888400: 665575 | 665576 | 665578 | 665579 | 665580 | 665581