Attachment 671134 Details for Bug 891120 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 225.72 KB, created by jordan on 2013-01-01 21:20:15 UTC

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Creator: jordan

Created: 2013-01-01 21:20:15 UTC

Size: 225.72 KB

patch

obsolete

>[    34.942] 
>X.Org X Server 1.12.4
>Release Date: 2012-08-27
>[    34.942] X Protocol Version 11, Revision 0
>[    34.942] Build Operating System:  2.6.32-279.9.1.el6.x86_64 
>[    34.942] Current Operating System: Linux wy009-001ls.aut.ac.nz 3.6.10-2.fc17.x86_64 #1 SMP Tue Dec 11 18:07:34 UTC 2012 x86_64
>[    34.942] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.10-2.fc17.x86_64 root=/dev/mapper/vg_wy009--001ls-lv_root ro rd.md=0 rd.dm=0 SYSFONT=True KEYTABLE=us rd.lvm.lv=vg_wy009-001ls/lv_root rd.lvm.lv=vg_wy009-001ls/lv_swap rd.luks=0 LANG=en_US.UTF-8 rhgb quiet
>[    34.942] Build Date: 28 November 2012  05:10:39PM
>[    34.942] Build ID: xorg-x11-server 1.12.4-1.fc17 
>[    34.942] Current version of pixman: 0.24.4
>[    34.942] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    34.943] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    34.943] (==) Log file: "/var/log/Xorg.0.log", Time: Wed Jan  2 09:20:00 2013
>[    34.958] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    34.958] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    34.958] (==) No Layout section.  Using the first Screen section.
>[    34.958] (==) No screen section available. Using defaults.
>[    34.958] (**) |-->Screen "Default Screen Section" (0)
>[    34.958] (**) |   |-->Monitor "<default monitor>"
>[    34.958] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    34.958] (==) Automatically adding devices
>[    34.958] (==) Automatically enabling devices
>[    34.958] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    34.958] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    34.958] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    34.958] (II) Loader magic: 0x7c6ac0
>[    34.958] (II) Module ABI versions:
>[    34.958] 	X.Org ANSI C Emulation: 0.4
>[    34.958] 	X.Org Video Driver: 12.1
>[    34.958] 	X.Org XInput driver : 16.0
>[    34.958] 	X.Org Server Extension : 6.0
>[    34.958] (--) PCI:*(0:1:0:0) 1002:6760:103c:161a rev 0, Mem @ 0xc0000000/268435456, 0xd4400000/131072, I/O @ 0x00004000/256, BIOS @ 0x????????/131072
>[    34.958] (II) LoadModule: "extmod"
>[    34.958] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    34.959] (II) Module extmod: vendor="X.Org Foundation"
>[    34.959] 	compiled for 1.12.4, module version = 1.0.0
>[    34.959] 	Module class: X.Org Server Extension
>[    34.959] 	ABI class: X.Org Server Extension, version 6.0
>[    34.959] (II) Loading extension SELinux
>[    34.959] (II) Loading extension MIT-SCREEN-SAVER
>[    34.959] (II) Loading extension XFree86-VidModeExtension
>[    34.959] (II) Loading extension XFree86-DGA
>[    34.959] (II) Loading extension DPMS
>[    34.959] (II) Loading extension XVideo
>[    34.959] (II) Loading extension XVideo-MotionCompensation
>[    34.959] (II) Loading extension X-Resource
>[    34.959] (II) LoadModule: "dbe"
>[    34.959] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    34.959] (II) Module dbe: vendor="X.Org Foundation"
>[    34.959] 	compiled for 1.12.4, module version = 1.0.0
>[    34.959] 	Module class: X.Org Server Extension
>[    34.959] 	ABI class: X.Org Server Extension, version 6.0
>[    34.959] (II) Loading extension DOUBLE-BUFFER
>[    34.959] (II) LoadModule: "glx"
>[    34.959] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    34.959] (II) Module glx: vendor="X.Org Foundation"
>[    34.959] 	compiled for 1.12.4, module version = 1.0.0
>[    34.959] 	ABI class: X.Org Server Extension, version 6.0
>[    34.959] (==) AIGLX enabled
>[    34.959] (II) Loading extension GLX
>[    34.959] (II) LoadModule: "record"
>[    34.959] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    34.959] (II) Module record: vendor="X.Org Foundation"
>[    34.959] 	compiled for 1.12.4, module version = 1.13.0
>[    34.959] 	Module class: X.Org Server Extension
>[    34.959] 	ABI class: X.Org Server Extension, version 6.0
>[    34.959] (II) Loading extension RECORD
>[    34.959] (II) LoadModule: "dri"
>[    34.959] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    34.959] (II) Module dri: vendor="X.Org Foundation"
>[    34.959] 	compiled for 1.12.4, module version = 1.0.0
>[    34.959] 	ABI class: X.Org Server Extension, version 6.0
>[    34.959] (II) Loading extension XFree86-DRI
>[    34.959] (II) LoadModule: "dri2"
>[    34.960] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    34.960] (II) Module dri2: vendor="X.Org Foundation"
>[    34.960] 	compiled for 1.12.4, module version = 1.2.0
>[    34.960] 	ABI class: X.Org Server Extension, version 6.0
>[    34.960] (II) Loading extension DRI2
>[    34.960] (==) Matched ati as autoconfigured driver 0
>[    34.960] (==) Matched vesa as autoconfigured driver 1
>[    34.960] (==) Matched modesetting as autoconfigured driver 2
>[    34.960] (==) Matched fbdev as autoconfigured driver 3
>[    34.960] (==) Assigned the driver to the xf86ConfigLayout
>[    34.960] (II) LoadModule: "ati"
>[    34.960] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    34.960] (II) Module ati: vendor="X.Org Foundation"
>[    34.960] 	compiled for 1.12.0, module version = 6.14.99
>[    34.960] 	Module class: X.Org Video Driver
>[    34.960] 	ABI class: X.Org Video Driver, version 12.0
>[    34.960] (II) LoadModule: "radeon"
>[    34.960] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    34.960] (II) Module radeon: vendor="X.Org Foundation"
>[    34.960] 	compiled for 1.12.0, module version = 6.14.99
>[    34.960] 	Module class: X.Org Video Driver
>[    34.960] 	ABI class: X.Org Video Driver, version 12.0
>[    34.960] (II) LoadModule: "vesa"
>[    34.960] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    34.960] (II) Module vesa: vendor="X.Org Foundation"
>[    34.960] 	compiled for 1.12.0, module version = 2.3.1
>[    34.960] 	Module class: X.Org Video Driver
>[    34.960] 	ABI class: X.Org Video Driver, version 12.0
>[    34.960] (II) LoadModule: "modesetting"
>[    34.961] (WW) Warning, couldn't open module modesetting
>[    34.961] (II) UnloadModule: "modesetting"
>[    34.961] (II) Unloading modesetting
>[    34.961] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    34.961] (II) LoadModule: "fbdev"
>[    34.961] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    34.961] (II) Module fbdev: vendor="X.Org Foundation"
>[    34.961] 	compiled for 1.11.99.901, module version = 0.4.2
>[    34.961] 	ABI class: X.Org Video Driver, version 12.0
>[    34.961] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    34.963] (II) VESA: driver for VESA chipsets: vesa
>[    34.963] (II) FBDEV: driver for framebuffer: fbdev
>[    34.963] (++) using VT number 1
>
>[    34.963] (II) [KMS] Kernel modesetting enabled.
>[    34.963] (WW) Falling back to old probe method for vesa
>[    34.963] (WW) Falling back to old probe method for fbdev
>[    34.963] (II) Loading sub module "fbdevhw"
>[    34.963] (II) LoadModule: "fbdevhw"
>[    34.963] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    34.963] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    34.963] 	compiled for 1.12.4, module version = 0.0.2
>[    34.963] 	ABI class: X.Org Video Driver, version 12.1
>[    34.963] (II) RADEON(0): RADEONPreInit_KMS
>[    34.963] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    34.963] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    34.963] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    34.963] (==) RADEON(0): Default visual is TrueColor
>[    34.964] (==) RADEON(0): RGB weight 888
>[    34.964] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    34.964] (--) RADEON(0): Chipset: "CAICOS" (ChipID = 0x6760)
>[    34.964] (II) RADEON(0): PCIE card detected
>[    34.964] drmOpenDevice: node name is /dev/dri/card0
>[    34.964] drmOpenDevice: open result is 8, (OK)
>[    34.964] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[    34.964] drmOpenDevice: node name is /dev/dri/card0
>[    34.964] drmOpenDevice: open result is 8, (OK)
>[    34.964] drmOpenByBusid: drmOpenMinor returns 8
>[    34.964] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[    34.964] (II) Loading sub module "exa"
>[    34.964] (II) LoadModule: "exa"
>[    34.964] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    34.964] (II) Module exa: vendor="X.Org Foundation"
>[    34.964] 	compiled for 1.12.4, module version = 2.5.0
>[    34.964] 	ABI class: X.Org Video Driver, version 12.1
>[    34.964] (II) RADEON(0): KMS Color Tiling: enabled
>[    34.964] (II) RADEON(0): KMS Pageflipping: enabled
>[    34.964] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    34.964] (II) RADEON(0): Output LVDS has no monitor section
>[    34.970] (II) RADEON(0): Output DisplayPort-0 has no monitor section
>[    34.976] (II) RADEON(0): Output DisplayPort-1 has no monitor section
>[    34.982] (II) RADEON(0): Output DisplayPort-2 has no monitor section
>[    34.996] (II) RADEON(0): Output VGA-0 has no monitor section
>[    34.996] (II) RADEON(0): EDID for output LVDS
>[    34.996] (II) RADEON(0): Manufacturer: SEC  Model: 5244  Serial#: 0
>[    34.996] (II) RADEON(0): Year: 2010  Week: 0
>[    34.996] (II) RADEON(0): EDID Version: 1.3
>[    34.996] (II) RADEON(0): Digital Display Input
>[    34.996] (II) RADEON(0): Max Image Size [cm]: horiz.: 36  vert.: 21
>[    34.996] (II) RADEON(0): Gamma: 2.20
>[    34.996] (II) RADEON(0): No DPMS capabilities specified
>[    34.996] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    34.996] (II) RADEON(0): First detailed timing is preferred mode
>[    34.996] (II) RADEON(0): redX: 0.600 redY: 0.340   greenX: 0.310 greenY: 0.560
>[    34.996] (II) RADEON(0): blueX: 0.150 blueY: 0.130   whiteX: 0.313 whiteY: 0.329
>[    34.997] (II) RADEON(0): Manufacturer's mask: 0
>[    34.997] (II) RADEON(0): Supported detailed timing:
>[    34.997] (II) RADEON(0): clock: 107.8 MHz   Image Size:  360 x 210 mm
>[    34.997] (II) RADEON(0): h_active: 1600  h_sync: 1648  h_sync_end 1680 h_blank_end 1932 h_border: 0
>[    34.997] (II) RADEON(0): v_active: 900  v_sync: 902  v_sync_end 907 v_blanking: 930 v_border: 0
>[    34.997] (II) RADEON(0): Unknown vendor-specific block f
>[    34.997] (II) RADEON(0):  SAMSUNG
>[    34.997] (II) RADEON(0):  156KT02-301
>[    34.997] (II) RADEON(0): EDID (in hex):
>[    34.997] (II) RADEON(0): 	00ffffffffffff004ca3445200000000
>[    34.997] (II) RADEON(0): 	00140103802415780a859599574f8f26
>[    34.997] (II) RADEON(0): 	21505400000001010101010101010101
>[    34.997] (II) RADEON(0): 	0101010101011c2a404c61841e303020
>[    34.997] (II) RADEON(0): 	250068d2100000190000000f00000000
>[    34.997] (II) RADEON(0): 	00000000002efa067800000000fe0053
>[    34.997] (II) RADEON(0): 	414d53554e470a2020202020000000fe
>[    34.997] (II) RADEON(0): 	003135364b5430322d3330310a20006d
>[    34.997] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    34.997] (II) RADEON(0): Printing DDC gathered Modelines:
>[    34.997] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    34.997] (II) RADEON(0): Printing probed modes for output LVDS
>[    34.997] (II) RADEON(0): Modeline "1600x900"x60.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    34.997] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    34.997] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    34.997] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    34.997] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    34.998] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    34.998] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    34.998] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    34.998] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    34.998] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    34.998] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    34.998] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    34.998] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    34.998] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    34.998] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    34.998] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    34.998] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    34.998] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    34.998] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    34.998] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    34.998] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    34.998] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    34.998] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    34.998] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    34.998] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    34.998] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    34.998] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    35.004] (II) RADEON(0): EDID for output DisplayPort-0
>[    35.010] (II) RADEON(0): EDID for output DisplayPort-1
>[    35.016] (II) RADEON(0): EDID for output DisplayPort-2
>[    35.030] (II) RADEON(0): EDID for output VGA-0
>[    35.030] (II) RADEON(0): Output LVDS connected
>[    35.030] (II) RADEON(0): Output DisplayPort-0 disconnected
>[    35.030] (II) RADEON(0): Output DisplayPort-1 disconnected
>[    35.030] (II) RADEON(0): Output DisplayPort-2 disconnected
>[    35.030] (II) RADEON(0): Output VGA-0 disconnected
>[    35.030] (II) RADEON(0): Using exact sizes for initial modes
>[    35.030] (II) RADEON(0): Output LVDS using initial mode 1600x900 +0+0
>[    35.030] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    35.030] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:40000000 visible:fa3b000
>[    35.030] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    35.030] (**) RADEON(0): Display dimensions: (360, 210) mm
>[    35.030] (**) RADEON(0): DPI set to (112, 108)
>[    35.030] (II) Loading sub module "fb"
>[    35.030] (II) LoadModule: "fb"
>[    35.030] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    35.031] (II) Module fb: vendor="X.Org Foundation"
>[    35.031] 	compiled for 1.12.4, module version = 1.0.0
>[    35.031] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    35.031] (II) Loading sub module "ramdac"
>[    35.031] (II) LoadModule: "ramdac"
>[    35.031] (II) Module "ramdac" already built-in
>[    35.031] (II) UnloadModule: "vesa"
>[    35.031] (II) Unloading vesa
>[    35.031] (II) UnloadModule: "fbdev"
>[    35.031] (II) Unloading fbdev
>[    35.031] (II) UnloadSubModule: "fbdevhw"
>[    35.031] (II) Unloading fbdevhw
>[    35.031] (--) Depth 24 pixmap format is 32 bpp
>[    35.031] (II) RADEON(0): [DRI2] Setup complete
>[    35.031] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    35.031] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    35.032] (II) RADEON(0): Front buffer size: 5652K
>[    35.032] (II) RADEON(0): VRAM usage limit set to 225525K
>[    35.032] (II) RADEON(0): Initializing backing store
>[    35.032] (==) RADEON(0): Backing store disabled
>[    35.032] (II) RADEON(0): Direct rendering enabled
>[    35.032] (II) RADEON(0): Initializing Acceleration
>[    35.032] (II) RADEON(0): Setting EXA maxPitchBytes
>[    35.032] (II) EXA(0): Driver allocated offscreen pixmaps
>[    35.032] (II) EXA(0): Driver registered support for the following operations:
>[    35.032] (II)         Solid
>[    35.032] (II)         Copy
>[    35.032] (II)         Composite (RENDER acceleration)
>[    35.032] (II)         UploadToScreen
>[    35.032] (II)         DownloadFromScreen
>[    35.032] (II) RADEON(0): Acceleration enabled
>[    35.032] (II) RADEON(0): Initializing DPMS
>[    35.032] (==) RADEON(0): DPMS enabled
>[    35.032] (II) RADEON(0): Initializing Cursor
>[    35.032] (==) RADEON(0): Silken mouse enabled
>[    35.032] (II) RADEON(0): Initializing Xv
>[    35.032] (II) RADEON(0): Set up textured video
>[    35.032] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    35.033] (II) RADEON(0): [XvMC] Extension initialized.
>[    35.033] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    35.033] (II) RADEON(0): Initializing kms color map
>[    35.033] (II) RADEON(0): RADEONScreenInit finished
>[    35.033] (--) RandR disabled
>[    35.033] (II) Initializing built-in extension Generic Event Extension
>[    35.033] (II) Initializing built-in extension SHAPE
>[    35.033] (II) Initializing built-in extension MIT-SHM
>[    35.033] (II) Initializing built-in extension XInputExtension
>[    35.033] (II) Initializing built-in extension XTEST
>[    35.033] (II) Initializing built-in extension BIG-REQUESTS
>[    35.033] (II) Initializing built-in extension SYNC
>[    35.033] (II) Initializing built-in extension XKEYBOARD
>[    35.033] (II) Initializing built-in extension XC-MISC
>[    35.033] (II) Initializing built-in extension XINERAMA
>[    35.033] (II) Initializing built-in extension XFIXES
>[    35.033] (II) Initializing built-in extension RENDER
>[    35.033] (II) Initializing built-in extension RANDR
>[    35.033] (II) Initializing built-in extension COMPOSITE
>[    35.033] (II) Initializing built-in extension DAMAGE
>[    35.033] (II) SELinux: Disabled on system
>[    35.913] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    35.913] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    35.913] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    35.913] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    35.913] (II) AIGLX: Loaded and initialized r600
>[    35.913] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    35.913] (II) RADEON(0): Setting screen physical size to 423 x 238
>[    36.023] (II) XKB: Reusing cached keymap
>[    36.027] (II) config/udev: Adding input device Power Button (/dev/input/event2)
>[    36.027] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    36.027] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    36.027] (II) LoadModule: "evdev"
>[    36.027] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    36.028] (II) Module evdev: vendor="X.Org Foundation"
>[    36.028] 	compiled for 1.12.0, module version = 2.7.0
>[    36.028] 	Module class: X.Org XInput Driver
>[    36.028] 	ABI class: X.Org XInput driver, version 16.0
>[    36.028] (II) Using input driver 'evdev' for 'Power Button'
>[    36.028] 	Option "XkbRules" "evdev"
>[    36.028] 	Option "XkbModel" "pc105+inet"
>[    36.028] 	Option "XkbLayout" "us"
>[    36.028] 	Option "_source" "server/udev"
>[    36.028] 	Option "name" "Power Button"
>[    36.028] 	Option "path" "/dev/input/event2"
>[    36.028] 	Option "device" "/dev/input/event2"
>[    36.028] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[    36.028] 	Option "driver" "evdev"
>[    36.028] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.028] (**) Power Button: always reports core events
>[    36.028] (**) evdev: Power Button: Device: "/dev/input/event2"
>[    36.028] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    36.028] (--) evdev: Power Button: Found keys
>[    36.028] (II) evdev: Power Button: Configuring as keyboard
>[    36.028] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[    36.028] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    36.028] (**) Option "xkb_rules" "evdev"
>[    36.028] (**) Option "xkb_model" "pc105+inet"
>[    36.028] (**) Option "xkb_layout" "us"
>[    36.028] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.061] (II) config/udev: Adding input device Video Bus (/dev/input/event6)
>[    36.061] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    36.061] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    36.061] (II) Using input driver 'evdev' for 'Video Bus'
>[    36.061] 	Option "XkbRules" "evdev"
>[    36.061] 	Option "XkbModel" "pc105+inet"
>[    36.061] 	Option "XkbLayout" "us"
>[    36.061] 	Option "_source" "server/udev"
>[    36.061] 	Option "name" "Video Bus"
>[    36.061] 	Option "path" "/dev/input/event6"
>[    36.061] 	Option "device" "/dev/input/event6"
>[    36.061] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    36.061] 	Option "driver" "evdev"
>[    36.061] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.062] (**) Video Bus: always reports core events
>[    36.062] (**) evdev: Video Bus: Device: "/dev/input/event6"
>[    36.062] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    36.062] (--) evdev: Video Bus: Found keys
>[    36.062] (II) evdev: Video Bus: Configuring as keyboard
>[    36.062] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[    36.062] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    36.062] (**) Option "xkb_rules" "evdev"
>[    36.062] (**) Option "xkb_model" "pc105+inet"
>[    36.062] (**) Option "xkb_layout" "us"
>[    36.062] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.062] (II) XKB: Reusing cached keymap
>[    36.063] (II) config/udev: Adding input device Lid Switch (/dev/input/event1)
>[    36.063] (II) No input driver specified, ignoring this device.
>[    36.063] (II) This device may have been added with another device file.
>[    36.064] (II) config/udev: Adding input device Sleep Button (/dev/input/event0)
>[    36.064] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    36.064] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    36.064] (II) Using input driver 'evdev' for 'Sleep Button'
>[    36.064] 	Option "XkbRules" "evdev"
>[    36.064] 	Option "XkbModel" "pc105+inet"
>[    36.064] 	Option "XkbLayout" "us"
>[    36.064] 	Option "_source" "server/udev"
>[    36.064] 	Option "name" "Sleep Button"
>[    36.064] 	Option "path" "/dev/input/event0"
>[    36.064] 	Option "device" "/dev/input/event0"
>[    36.064] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[    36.064] 	Option "driver" "evdev"
>[    36.064] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.064] (**) Sleep Button: always reports core events
>[    36.064] (**) evdev: Sleep Button: Device: "/dev/input/event0"
>[    36.064] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    36.064] (--) evdev: Sleep Button: Found keys
>[    36.064] (II) evdev: Sleep Button: Configuring as keyboard
>[    36.064] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[    36.064] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 8)
>[    36.064] (**) Option "xkb_rules" "evdev"
>[    36.064] (**) Option "xkb_model" "pc105+inet"
>[    36.064] (**) Option "xkb_layout" "us"
>[    36.064] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.064] (II) XKB: Reusing cached keymap
>[    36.065] (II) config/udev: Adding input device HD-Audio Generic HDMI/DP,pcm=3 (/dev/input/event13)
>[    36.065] (II) No input driver specified, ignoring this device.
>[    36.065] (II) This device may have been added with another device file.
>[    36.066] (II) config/udev: Adding input device HDA Intel PCH Mic (/dev/input/event10)
>[    36.066] (II) No input driver specified, ignoring this device.
>[    36.066] (II) This device may have been added with another device file.
>[    36.066] (II) config/udev: Adding input device HDA Intel PCH Headphone (/dev/input/event11)
>[    36.066] (II) No input driver specified, ignoring this device.
>[    36.066] (II) This device may have been added with another device file.
>[    36.067] (II) config/udev: Adding input device HDA Intel PCH Dock Line Out (/dev/input/event12)
>[    36.067] (II) No input driver specified, ignoring this device.
>[    36.067] (II) This device may have been added with another device file.
>[    36.067] (II) config/udev: Adding input device HDA Intel PCH Line (/dev/input/event9)
>[    36.067] (II) No input driver specified, ignoring this device.
>[    36.067] (II) This device may have been added with another device file.
>[    36.068] (II) config/udev: Adding input device HP HD Webcam [Fixed] (/dev/input/event14)
>[    36.068] (**) HP HD Webcam [Fixed]: Applying InputClass "evdev keyboard catchall"
>[    36.068] (**) HP HD Webcam [Fixed]: Applying InputClass "system-setup-keyboard"
>[    36.068] (II) Using input driver 'evdev' for 'HP HD Webcam [Fixed]'
>[    36.068] 	Option "XkbRules" "evdev"
>[    36.068] 	Option "XkbModel" "pc105+inet"
>[    36.068] 	Option "XkbLayout" "us"
>[    36.068] 	Option "_source" "server/udev"
>[    36.068] 	Option "name" "HP HD Webcam [Fixed]"
>[    36.068] 	Option "path" "/dev/input/event14"
>[    36.068] 	Option "device" "/dev/input/event14"
>[    36.068] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.4/2-1.4:1.0/input/input14/event14"
>[    36.068] 	Option "driver" "evdev"
>[    36.068] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.068] (**) HP HD Webcam [Fixed]: always reports core events
>[    36.068] (**) evdev: HP HD Webcam [Fixed]: Device: "/dev/input/event14"
>[    36.068] (--) evdev: HP HD Webcam [Fixed]: Vendor 0x461 Product 0x4dce
>[    36.068] (--) evdev: HP HD Webcam [Fixed]: Found keys
>[    36.068] (II) evdev: HP HD Webcam [Fixed]: Configuring as keyboard
>[    36.068] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.4/2-1.4:1.0/input/input14/event14"
>[    36.069] (II) XINPUT: Adding extended input device "HP HD Webcam [Fixed]" (type: KEYBOARD, id 9)
>[    36.069] (**) Option "xkb_rules" "evdev"
>[    36.069] (**) Option "xkb_model" "pc105+inet"
>[    36.069] (**) Option "xkb_layout" "us"
>[    36.069] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.069] (II) XKB: Reusing cached keymap
>[    36.070] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event3)
>[    36.070] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    36.070] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    36.070] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    36.070] 	Option "XkbRules" "evdev"
>[    36.070] 	Option "XkbModel" "pc105+inet"
>[    36.070] 	Option "XkbLayout" "us"
>[    36.070] 	Option "_source" "server/udev"
>[    36.070] 	Option "name" "AT Translated Set 2 keyboard"
>[    36.070] 	Option "path" "/dev/input/event3"
>[    36.070] 	Option "device" "/dev/input/event3"
>[    36.070] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input3/event3"
>[    36.070] 	Option "driver" "evdev"
>[    36.070] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.070] (**) AT Translated Set 2 keyboard: always reports core events
>[    36.070] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event3"
>[    36.070] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    36.070] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    36.070] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    36.070] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input3/event3"
>[    36.070] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 10)
>[    36.070] (**) Option "xkb_rules" "evdev"
>[    36.070] (**) Option "xkb_model" "pc105+inet"
>[    36.070] (**) Option "xkb_layout" "us"
>[    36.070] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.070] (II) XKB: Reusing cached keymap
>[    36.071] (II) config/udev: Adding input device PS/2 Generic Mouse (/dev/input/event4)
>[    36.072] (**) PS/2 Generic Mouse: Applying InputClass "evdev pointer catchall"
>[    36.072] (II) Using input driver 'evdev' for 'PS/2 Generic Mouse'
>[    36.072] 	Option "XkbRules" "evdev"
>[    36.072] 	Option "XkbModel" "evdev"
>[    36.072] 	Option "XkbLayout" "us"
>[    36.072] 	Option "_source" "server/udev"
>[    36.072] 	Option "name" "PS/2 Generic Mouse"
>[    36.072] 	Option "path" "/dev/input/event4"
>[    36.072] 	Option "device" "/dev/input/event4"
>[    36.072] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input4/event4"
>[    36.072] 	Option "driver" "evdev"
>[    36.072] (**) PS/2 Generic Mouse: always reports core events
>[    36.072] (**) evdev: PS/2 Generic Mouse: Device: "/dev/input/event4"
>[    36.072] (--) evdev: PS/2 Generic Mouse: Vendor 0x2 Product 0x1
>[    36.072] (--) evdev: PS/2 Generic Mouse: Found 3 mouse buttons
>[    36.072] (--) evdev: PS/2 Generic Mouse: Found relative axes
>[    36.072] (--) evdev: PS/2 Generic Mouse: Found x and y relative axes
>[    36.072] (II) evdev: PS/2 Generic Mouse: Configuring as mouse
>[    36.072] (**) evdev: PS/2 Generic Mouse: YAxisMapping: buttons 4 and 5
>[    36.072] (**) evdev: PS/2 Generic Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    36.072] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input4/event4"
>[    36.072] (II) XINPUT: Adding extended input device "PS/2 Generic Mouse" (type: MOUSE, id 11)
>[    36.072] (II) evdev: PS/2 Generic Mouse: initialized for relative axes.
>[    36.073] (**) PS/2 Generic Mouse: (accel) keeping acceleration scheme 1
>[    36.073] (**) PS/2 Generic Mouse: (accel) acceleration profile 0
>[    36.073] (**) PS/2 Generic Mouse: (accel) acceleration factor: 2.000
>[    36.073] (**) PS/2 Generic Mouse: (accel) acceleration threshold: 4
>[    36.073] (II) config/udev: Adding input device PS/2 Generic Mouse (/dev/input/mouse0)
>[    36.073] (II) No input driver specified, ignoring this device.
>[    36.073] (II) This device may have been added with another device file.
>[    36.073] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    36.073] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    36.073] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    36.073] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    36.073] (II) LoadModule: "synaptics"
>[    36.073] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    36.073] (II) Module synaptics: vendor="X.Org Foundation"
>[    36.073] 	compiled for 1.12.3, module version = 1.6.2
>[    36.073] 	Module class: X.Org XInput Driver
>[    36.073] 	ABI class: X.Org XInput driver, version 16.0
>[    36.073] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    36.073] 	Option "_source" "server/udev"
>[    36.073] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    36.073] 	Option "path" "/dev/input/event5"
>[    36.073] 	Option "device" "/dev/input/event5"
>[    36.073] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio4/input/input5/event5"
>[    36.073] 	Option "driver" "synaptics"
>[    36.073] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    36.073] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    36.073] (**) Option "Device" "/dev/input/event5"
>[    36.096] (**) Option "Device" "/dev/input/event5"
>[    36.096] port opened successfully
>[    36.096] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5690
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4854
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    36.096] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    36.096] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    36.106] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio4/input/input5/event5"
>[    36.106] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 12)
>[    36.106] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    36.106] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    36.106] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.037
>[    36.106] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    36.106] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    36.106] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    36.106] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    36.106] (**) Option "Device" "/dev/input/event5"
>[    36.107] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    36.107] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse1)
>[    36.107] (II) No input driver specified, ignoring this device.
>[    36.107] (II) This device may have been added with another device file.
>[    36.108] (II) config/udev: Adding input device ST LIS3LV02DL Accelerometer (/dev/input/event7)
>[    36.108] (II) No input driver specified, ignoring this device.
>[    36.108] (II) This device may have been added with another device file.
>[    36.109] (II) config/udev: Adding input device HP WMI hotkeys (/dev/input/event8)
>[    36.109] (**) HP WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    36.109] (**) HP WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    36.109] (II) Using input driver 'evdev' for 'HP WMI hotkeys'
>[    36.109] 	Option "XkbRules" "evdev"
>[    36.109] 	Option "XkbModel" "pc105+inet"
>[    36.109] 	Option "XkbLayout" "us"
>[    36.109] 	Option "_source" "server/udev"
>[    36.109] 	Option "name" "HP WMI hotkeys"
>[    36.109] 	Option "path" "/dev/input/event8"
>[    36.109] 	Option "device" "/dev/input/event8"
>[    36.109] 	Option "config_info" "udev:/sys/devices/virtual/input/input8/event8"
>[    36.109] 	Option "driver" "evdev"
>[    36.109] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    36.109] (**) HP WMI hotkeys: always reports core events
>[    36.109] (**) evdev: HP WMI hotkeys: Device: "/dev/input/event8"
>[    36.109] (--) evdev: HP WMI hotkeys: Vendor 0 Product 0
>[    36.109] (--) evdev: HP WMI hotkeys: Found keys
>[    36.109] (II) evdev: HP WMI hotkeys: Configuring as keyboard
>[    36.109] (**) Option "config_info" "udev:/sys/devices/virtual/input/input8/event8"
>[    36.109] (II) XINPUT: Adding extended input device "HP WMI hotkeys" (type: KEYBOARD, id 13)
>[    36.109] (**) Option "xkb_rules" "evdev"
>[    36.109] (**) Option "xkb_model" "pc105+inet"
>[    36.109] (**) Option "xkb_layout" "us"
>[    36.109] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    36.109] (II) XKB: Reusing cached keymap
>[    36.117] (II) RADEON(0): RADEONSaveScreen(2)
>[    36.119] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    36.119] (II) RADEON(0): Printing DDC gathered Modelines:
>[    36.119] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    39.252] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    39.252] (II) RADEON(0): Printing DDC gathered Modelines:
>[    39.252] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    40.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    40.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    40.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    40.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    40.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    40.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    40.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    40.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    40.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    40.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    40.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    40.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    40.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    40.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    40.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    40.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    40.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    40.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    40.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    41.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    41.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    41.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    41.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b680]
>[    41.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b680] width 1600 pitch 6400 (/4 1600)
>[    41.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110b6e0]
>[    41.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110b6e0] width 1600 pitch 6400 (/4 1600)
>[    41.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    41.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d550]
>[    41.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d550] width 1600 pitch 6400 (/4 1600)
>[    41.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d4f0]
>[    41.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d4f0] width 1600 pitch 6400 (/4 1600)
>[    42.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    42.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    42.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    42.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    42.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    42.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    42.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    42.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    42.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    42.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    42.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    42.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    42.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    42.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    42.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    42.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    42.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    42.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    42.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    42.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    42.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d480]
>[    43.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d480] width 1600 pitch 6400 (/4 1600)
>[    43.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    43.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    43.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    43.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    43.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    44.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    44.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    45.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    45.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    45.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    45.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    45.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    45.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    46.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    46.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    46.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    46.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    46.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    46.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    46.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110cd20]
>[    46.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110cd20] width 1600 pitch 6400 (/4 1600)
>[    47.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x110d510]
>[    47.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x110d510] width 1600 pitch 6400 (/4 1600)
>[    49.979] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    49.980] (II) RADEON(0): Printing DDC gathered Modelines:
>[    49.980] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    51.403] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    51.404] (II) RADEON(0): Printing DDC gathered Modelines:
>[    51.404] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    53.809] (II) RADEON(0): EDID vendor "SEC", prod id 21060
>[    53.809] (II) RADEON(0): Printing DDC gathered Modelines:
>[    53.809] (II) RADEON(0): Modeline "1600x900"x0.0  107.80  1600 1648 1680 1932  900 902 907 930 -hsync -vsync (55.8 kHz eP)
>[    87.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113ee60]
>[    87.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113ee60] width 1600 pitch 6400 (/4 1600)
>[    87.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e3c0]
>[    87.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e3c0] width 1600 pitch 6400 (/4 1600)
>[    87.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113ee10]
>[    87.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113ee10] width 1600 pitch 6400 (/4 1600)
>[    87.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e3c0]
>[    87.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e3c0] width 1600 pitch 6400 (/4 1600)
>[    87.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113ee10]
>[    87.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113ee10] width 1600 pitch 6400 (/4 1600)
>[    88.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    88.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142a50]
>[    88.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142a50] width 1600 pitch 6400 (/4 1600)
>[    88.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    88.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    89.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xe5ce00]
>[    89.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xe5ce00] width 1600 pitch 6400 (/4 1600)
>[    89.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1142850]
>[    89.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1142850] width 1600 pitch 6400 (/4 1600)
>[    90.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11428d0]
>[    90.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11428d0] width 1600 pitch 6400 (/4 1600)
>[    90.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x10652b0]
>[    90.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x10652b0] width 1600 pitch 6400 (/4 1600)
>[    90.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11449b0]
>[    90.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11449b0] width 1600 pitch 6400 (/4 1600)
>[    90.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x10652b0]
>[    90.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x10652b0] width 1600 pitch 6400 (/4 1600)
>[    90.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1064e50]
>[    90.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1064e50] width 1600 pitch 6400 (/4 1600)
>[    92.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1192e10]
>[    92.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1192e10] width 1600 pitch 6400 (/4 1600)
>[    93.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1192e10]
>[    93.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1192e10] width 1600 pitch 6400 (/4 1600)
>[    94.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143a60]
>[    94.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143a60] width 1600 pitch 6400 (/4 1600)
>[    94.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    94.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1189df0]
>[    94.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1189df0] width 1600 pitch 6400 (/4 1600)
>[    94.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1143970]
>[    94.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1143970] width 1600 pitch 6400 (/4 1600)
>[    95.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    95.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    95.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a260]
>[    95.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a260] width 1600 pitch 6400 (/4 1600)
>[    95.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    95.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    95.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a260]
>[    96.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a260] width 1600 pitch 6400 (/4 1600)
>[    96.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a260]
>[    96.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a260] width 1600 pitch 6400 (/4 1600)
>[    96.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a260]
>[    96.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a260] width 1600 pitch 6400 (/4 1600)
>[    96.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a260]
>[    96.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a260] width 1600 pitch 6400 (/4 1600)
>[    96.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    96.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    96.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    96.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    96.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    97.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    97.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    97.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    97.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    97.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[    97.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[    97.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[    97.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x118a200]
>[    97.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x118a200] width 1600 pitch 6400 (/4 1600)
>[   100.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1139160]
>[   100.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1139160] width 1600 pitch 6400 (/4 1600)
>[   101.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1139000]
>[   101.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1139000] width 1600 pitch 6400 (/4 1600)
>[   101.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1156680]
>[   101.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1156680] width 1600 pitch 6400 (/4 1600)
>[   101.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   101.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115c420]
>[   101.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115c420] width 1600 pitch 6400 (/4 1600)
>[   101.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   101.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   108.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1161de0]
>[   108.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1161de0] width 1600 pitch 6400 (/4 1600)
>[   119.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1213810]
>[   119.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1213810] width 1600 pitch 6400 (/4 1600)
>[   119.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x120dc30]
>[   119.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x120dc30] width 1600 pitch 6400 (/4 1600)
>[   119.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   119.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   119.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   119.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   119.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   119.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   119.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   119.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   119.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   119.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   119.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   119.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   119.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   119.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   119.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   119.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   119.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   119.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   119.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   120.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   120.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   120.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   120.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   120.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   120.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   120.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   120.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1219950]
>[   120.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1219950] width 1600 pitch 6400 (/4 1600)
>[   120.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1223bf0]
>[   120.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1223bf0] width 1600 pitch 6400 (/4 1600)
>[   138.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1228fa0]
>[   138.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1228fa0] width 1600 pitch 6400 (/4 1600)
>[   144.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1600]
>[   144.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1600] width 1600 pitch 6400 (/4 1600)
>[   145.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x112e930]
>[   145.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x112e930] width 1600 pitch 6400 (/4 1600)
>[   145.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12ac4f0]
>[   145.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12ac4f0] width 1600 pitch 6400 (/4 1600)
>[   145.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12ac4f0]
>[   145.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12ac4f0] width 1600 pitch 6400 (/4 1600)
>[   145.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12ac690]
>[   145.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12ac690] width 1600 pitch 6400 (/4 1600)
>[   176.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11b8930]
>[   176.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11b8930] width 1600 pitch 6400 (/4 1600)
>[   176.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   176.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12b1a00]
>[   176.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12b1a00] width 1600 pitch 6400 (/4 1600)
>[   176.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1227980]
>[   176.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1227980] width 1600 pitch 6400 (/4 1600)
>[   179.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12131d0]
>[   179.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12131d0] width 1600 pitch 6400 (/4 1600)
>[   179.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1144130]
>[   179.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1144130] width 1600 pitch 6400 (/4 1600)
>[   179.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1214e20]
>[   179.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1214e20] width 1600 pitch 6400 (/4 1600)
>[   179.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1217dc0]
>[   179.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1217dc0] width 1600 pitch 6400 (/4 1600)
>[   179.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1218930]
>[   179.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1218930] width 1600 pitch 6400 (/4 1600)
>[   179.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11af0d0]
>[   179.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11af0d0] width 1600 pitch 6400 (/4 1600)
>[   179.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1218930]
>[   179.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1218930] width 1600 pitch 6400 (/4 1600)
>[   179.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11af0d0]
>[   179.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11af0d0] width 1600 pitch 6400 (/4 1600)
>[   179.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1218930]
>[   179.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1218930] width 1600 pitch 6400 (/4 1600)
>[   179.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11af0d0]
>[   179.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11af0d0] width 1600 pitch 6400 (/4 1600)
>[   179.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1218930]
>[   179.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1218930] width 1600 pitch 6400 (/4 1600)
>[   179.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11af0d0]
>[   179.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11af0d0] width 1600 pitch 6400 (/4 1600)
>[   179.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1218930]
>[   179.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1218930] width 1600 pitch 6400 (/4 1600)
>[   179.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11af0d0]
>[   179.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11af0d0] width 1600 pitch 6400 (/4 1600)
>[   554.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x168c810]
>[   554.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x168c810] width 1600 pitch 6400 (/4 1600)
>[   555.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1215660]
>[   555.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1215660] width 1600 pitch 6400 (/4 1600)
>[   555.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1215600]
>[   555.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1215600] width 1600 pitch 6400 (/4 1600)
>[   555.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1215660]
>[   555.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1215660] width 1600 pitch 6400 (/4 1600)
>[   555.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1215600]
>[   555.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1215600] width 1600 pitch 6400 (/4 1600)
>[   556.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   556.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   557.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   557.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   557.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   557.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   557.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   557.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   558.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   558.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   558.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   558.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   558.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   558.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   559.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   559.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   559.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   559.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   559.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   559.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   559.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   559.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   559.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   559.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   560.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   560.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   560.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   560.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   560.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   560.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   561.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   561.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   561.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   561.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   562.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   562.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   562.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   562.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   562.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   562.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   563.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   563.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   563.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   563.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   563.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14e9ac0]
>[   563.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14e9ac0] width 1600 pitch 6400 (/4 1600)
>[   563.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12162f0]
>[   563.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12162f0] width 1600 pitch 6400 (/4 1600)
>[   564.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113b1c0]
>[   564.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113b1c0] width 1600 pitch 6400 (/4 1600)
>[   564.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11b4470]
>[   564.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11b4470] width 1600 pitch 6400 (/4 1600)
>[   564.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11b3fe0]
>[   564.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11b3fe0] width 1600 pitch 6400 (/4 1600)
>[   564.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x129d240]
>[   564.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x129d240] width 1600 pitch 6400 (/4 1600)
>[   616.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1229f90]
>[   616.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1229f90] width 1600 pitch 6400 (/4 1600)
>[   616.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   616.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1221f80]
>[   616.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1221f80] width 1600 pitch 6400 (/4 1600)
>[   616.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x115bb30]
>[   616.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x115bb30] width 1600 pitch 6400 (/4 1600)
>[   642.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x13852a0]
>[   642.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x13852a0] width 1600 pitch 6400 (/4 1600)
>[   642.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d980]
>[   642.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d980] width 1600 pitch 6400 (/4 1600)
>[   642.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   642.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d990]
>[   642.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d990] width 1600 pitch 6400 (/4 1600)
>[   642.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d900]
>[   642.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d900] width 1600 pitch 6400 (/4 1600)
>[   651.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1294b80]
>[   651.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1294b80] width 1600 pitch 6400 (/4 1600)
>[   688.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x12869e0]
>[   688.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x12869e0] width 1600 pitch 6400 (/4 1600)
>[   689.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x121d270]
>[   689.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x121d270] width 1600 pitch 6400 (/4 1600)
>[   689.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11c9300]
>[   689.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11c9300] width 1600 pitch 6400 (/4 1600)
>[   689.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11c5480]
>[   689.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11c5480] width 1600 pitch 6400 (/4 1600)
>[   689.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11c92c0]
>[   689.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11c92c0] width 1600 pitch 6400 (/4 1600)
>[   689.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11c5480]
>[   689.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11c5480] width 1600 pitch 6400 (/4 1600)
>[   788.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x15804e0]
>[   788.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x15804e0] width 1600 pitch 6400 (/4 1600)
>[   801.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11d3f50]
>[   801.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11d3f50] width 1600 pitch 6400 (/4 1600)
>[   802.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11c7630]
>[   802.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11c7630] width 1600 pitch 6400 (/4 1600)
>[   822.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f410]
>[   822.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f410] width 1600 pitch 6400 (/4 1600)
>[  1224.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651100]
>[  1224.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651100] width 1600 pitch 6400 (/4 1600)
>[  1224.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6a80]
>[  1224.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6a80] width 1600 pitch 6400 (/4 1600)
>[  1224.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651100]
>[  1224.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651100] width 1600 pitch 6400 (/4 1600)
>[  1224.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6a80]
>[  1224.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6a80] width 1600 pitch 6400 (/4 1600)
>[  1225.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651100]
>[  1225.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651100] width 1600 pitch 6400 (/4 1600)
>[  1228.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6a80]
>[  1228.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6a80] width 1600 pitch 6400 (/4 1600)
>[  1228.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651100]
>[  1228.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651100] width 1600 pitch 6400 (/4 1600)
>[  1228.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e4cd0]
>[  1228.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e4cd0] width 1600 pitch 6400 (/4 1600)
>[  1229.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6a80]
>[  1229.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6a80] width 1600 pitch 6400 (/4 1600)
>[  1229.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2651100]
>[  1229.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2651100] width 1600 pitch 6400 (/4 1600)
>[  1229.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e4cd0]
>[  1229.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e4cd0] width 1600 pitch 6400 (/4 1600)
>[  1229.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6a80]
>[  1230.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6a80] width 1600 pitch 6400 (/4 1600)
>[  1230.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1230.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260fca0]
>[  1230.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260fca0] width 1600 pitch 6400 (/4 1600)
>[  1230.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f1530]
>[  1230.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f1530] width 1600 pitch 6400 (/4 1600)
>[  1231.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7790]
>[  1231.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7790] width 1600 pitch 6400 (/4 1600)
>[  1231.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e96d0]
>[  1231.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e96d0] width 1600 pitch 6400 (/4 1600)
>[  1231.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1231.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1286.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1286.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1287.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1287.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1287.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1287.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164be00]
>[  1288.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164be00] width 1600 pitch 6400 (/4 1600)
>[  1288.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e6ae0]
>[  1288.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e6ae0] width 1600 pitch 6400 (/4 1600)
>[  1288.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824aa0]
>[  1288.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824aa0] width 1600 pitch 6400 (/4 1600)
>[  1288.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2829fa0]
>[  1289.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2829fa0] width 1600 pitch 6400 (/4 1600)
>[  1289.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824c90]
>[  1289.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824c90] width 1600 pitch 6400 (/4 1600)
>[  1289.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1289.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1289.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824c90]
>[  1289.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824c90] width 1600 pitch 6400 (/4 1600)
>[  1289.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1289.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1289.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824c90]
>[  1289.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824c90] width 1600 pitch 6400 (/4 1600)
>[  1289.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1289.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1289.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824c90]
>[  1289.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824c90] width 1600 pitch 6400 (/4 1600)
>[  1290.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2824c90]
>[  1290.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2824c90] width 1600 pitch 6400 (/4 1600)
>[  1290.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1580920]
>[  1290.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1580920] width 1600 pitch 6400 (/4 1600)
>[  1290.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1580920]
>[  1290.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1580920] width 1600 pitch 6400 (/4 1600)
>[  1290.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1580920]
>[  1290.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1580920] width 1600 pitch 6400 (/4 1600)
>[  1290.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1580920]
>[  1290.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1580920] width 1600 pitch 6400 (/4 1600)
>[  1290.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1290.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1580920]
>[  1290.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1580920] width 1600 pitch 6400 (/4 1600)
>[  1290.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827450]
>[  1290.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827450] width 1600 pitch 6400 (/4 1600)
>[  1341.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1342.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1342.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1342.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1342.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1342.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1342.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1342.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1342.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1342.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1342.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1342.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1342.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1342.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1342.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1342.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1342.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1342.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1342.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1343.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1343.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1343.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1343.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1343.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1343.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1343.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1343.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1344.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1720]
>[  1344.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1720] width 1600 pitch 6400 (/4 1600)
>[  1344.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1344.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1344.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c45a0]
>[  1344.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c45a0] width 1600 pitch 6400 (/4 1600)
>[  1344.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1344.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1344.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c45a0]
>[  1344.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c45a0] width 1600 pitch 6400 (/4 1600)
>[  1344.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1344.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1344.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c45a0]
>[  1344.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c45a0] width 1600 pitch 6400 (/4 1600)
>[  1344.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2879eb0]
>[  1344.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2879eb0] width 1600 pitch 6400 (/4 1600)
>[  1344.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c45a0]
>[  1344.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c45a0] width 1600 pitch 6400 (/4 1600)
>[  1351.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e410]
>[  1351.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e410] width 1600 pitch 6400 (/4 1600)
>[  1351.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295de00]
>[  1351.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295de00] width 1600 pitch 6400 (/4 1600)
>[  1351.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295ab20]
>[  1351.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295ab20] width 1600 pitch 6400 (/4 1600)
>[  1351.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1351.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cf940]
>[  1351.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cf940] width 1600 pitch 6400 (/4 1600)
>[  1351.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d1450]
>[  1351.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d1450] width 1600 pitch 6400 (/4 1600)
>[  1357.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d2510]
>[  1357.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d2510] width 1600 pitch 6400 (/4 1600)
>[  1357.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d2510]
>[  1357.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d2510] width 1600 pitch 6400 (/4 1600)
>[  1357.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1357.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1357.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1357.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1357.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1358.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1358.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1358.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1358.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1358.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1358.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1358.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1358.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1358.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1358.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1358.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1358.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1358.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1358.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1358.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1358.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb080]
>[  1358.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb080] width 1600 pitch 6400 (/4 1600)
>[  1358.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1358.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1365.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14c5340]
>[  1365.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14c5340] width 1600 pitch 6400 (/4 1600)
>[  1376.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x164a310]
>[  1376.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x164a310] width 1600 pitch 6400 (/4 1600)
>[  1376.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1376.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1376.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1376.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1376.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1376.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1376.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1376.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1376.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1377.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1377.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1377.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1377.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1377.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1377.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1377.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1377.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1378.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1378.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1379.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1379.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1379.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1379.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1380.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1380.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1380.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1380.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1380.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1380.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1380.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1380.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1380.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1380.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1380.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1380.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1380.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1380.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1380.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d0750]
>[  1380.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d0750] width 1600 pitch 6400 (/4 1600)
>[  1380.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146e720]
>[  1380.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146e720] width 1600 pitch 6400 (/4 1600)
>[  1380.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b2470]
>[  1380.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b2470] width 1600 pitch 6400 (/4 1600)
>[  1423.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb160]
>[  1423.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb160] width 1600 pitch 6400 (/4 1600)
>[  1426.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c13b0]
>[  1426.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c13b0] width 1600 pitch 6400 (/4 1600)
>[  1426.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1426.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1426.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1426.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1426.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1426.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1426.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1426.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1426.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1426.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1426.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1426.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1426.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1426.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1426.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1426.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1426.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1427.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1427.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1427.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1427.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1427.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1427.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1427.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1427.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1428.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1428.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1428.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1428.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1428.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1428.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1428.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1428.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1428.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bfd70]
>[  1428.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bfd70] width 1600 pitch 6400 (/4 1600)
>[  1428.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146cb40]
>[  1428.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146cb40] width 1600 pitch 6400 (/4 1600)
>[  1443.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1443.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae1b0]
>[  1443.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae1b0] width 1600 pitch 6400 (/4 1600)
>[  1443.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3750]
>[  1443.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3750] width 1600 pitch 6400 (/4 1600)
>[  1449.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a3b50]
>[  1449.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a3b50] width 1600 pitch 6400 (/4 1600)
>[  1463.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1463.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25cb020]
>[  1463.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25cb020] width 1600 pitch 6400 (/4 1600)
>[  1463.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2902e00]
>[  1463.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2902e00] width 1600 pitch 6400 (/4 1600)
>[  1485.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae970]
>[  1485.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae970] width 1600 pitch 6400 (/4 1600)
>[  1486.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1486.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1486.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ae970]
>[  1486.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ae970] width 1600 pitch 6400 (/4 1600)
>[  1486.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1486.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c4620]
>[  1489.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c4620] width 1600 pitch 6400 (/4 1600)
>[  1489.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1489.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1489.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1489.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1489.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1489.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1489.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1489.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1489.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1490.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1490.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1490.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1490.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1490.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1490.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1490.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1490.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1491.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1491.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1491.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1491.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1491.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1491.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1491.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1491.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1492.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1492.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1493.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1493.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1494.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1494.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1494.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1494.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1494.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1494.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1494.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1494.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1494.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1494.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1494.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1494.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1494.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1494.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1494.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1494.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1494.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2881050]
>[  1495.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2881050] width 1600 pitch 6400 (/4 1600)
>[  1495.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1661620]
>[  1495.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1661620] width 1600 pitch 6400 (/4 1600)
>[  1511.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e9ae0]
>[  1511.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e9ae0] width 1600 pitch 6400 (/4 1600)
>[  1512.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x146f660]
>[  1512.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x146f660] width 1600 pitch 6400 (/4 1600)
>[  1512.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b9270]
>[  1512.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b9270] width 1600 pitch 6400 (/4 1600)
>[  1512.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b96c0]
>[  1512.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b96c0] width 1600 pitch 6400 (/4 1600)
>[  1519.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2900710]
>[  1519.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2900710] width 1600 pitch 6400 (/4 1600)
>[  1532.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1055d80]
>[  1532.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1055d80] width 1600 pitch 6400 (/4 1600)
>[  1829.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898cb0]
>[  1829.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898cb0] width 1600 pitch 6400 (/4 1600)
>[  1831.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a73d0]
>[  1831.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a73d0] width 1600 pitch 6400 (/4 1600)
>[  1837.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df310]
>[  1837.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df310] width 1600 pitch 6400 (/4 1600)
>[  1842.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2892cd0]
>[  1842.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2892cd0] width 1600 pitch 6400 (/4 1600)
>[  1912.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1912.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1912.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1912.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1912.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1913.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1913.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1914.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1914.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1914.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1914.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1915.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1915.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1915.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1915.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1915.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1915.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1916.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1916.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1916.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1916.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1916.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1916.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1917.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2893400]
>[  1917.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2893400] width 1600 pitch 6400 (/4 1600)
>[  1917.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1917.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1917.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fba50]
>[  1917.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fba50] width 1600 pitch 6400 (/4 1600)
>[  1917.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1917.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1917.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fba50]
>[  1917.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fba50] width 1600 pitch 6400 (/4 1600)
>[  1917.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1917.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1917.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fba50]
>[  1917.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fba50] width 1600 pitch 6400 (/4 1600)
>[  1917.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1479bb0]
>[  1917.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1479bb0] width 1600 pitch 6400 (/4 1600)
>[  1917.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fba50]
>[  1917.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fba50] width 1600 pitch 6400 (/4 1600)
>[  1917.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e630]
>[  1917.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e630] width 1600 pitch 6400 (/4 1600)
>[  1942.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x287f140]
>[  1942.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x287f140] width 1600 pitch 6400 (/4 1600)
>[  1942.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28930a0]
>[  1942.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28930a0] width 1600 pitch 6400 (/4 1600)
>[  1942.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2911cb0]
>[  1942.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2911cb0] width 1600 pitch 6400 (/4 1600)
>[  1942.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x157cb50]
>[  1942.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x157cb50] width 1600 pitch 6400 (/4 1600)
>[  1943.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x287f140]
>[  1943.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x287f140] width 1600 pitch 6400 (/4 1600)
>[  1943.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1943.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1943.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1943.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1944.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1944.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1944.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1944.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1944.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1944.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1944.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1944.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1945.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1945.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1945.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1945.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1945.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1945.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1945.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1946.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1946.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1946.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1946.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1946.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1946.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1946.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1946.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1946.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1946.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1946.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1946.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1946.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d75f0]
>[  1946.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d75f0] width 1600 pitch 6400 (/4 1600)
>[  1946.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1946.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1946.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c0740]
>[  1946.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c0740] width 1600 pitch 6400 (/4 1600)
>[  1949.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a37080]
>[  1949.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a37080] width 1600 pitch 6400 (/4 1600)
>[  1969.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1969.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1969.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1969.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e88b0]
>[  1969.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e88b0] width 1600 pitch 6400 (/4 1600)
>[  1971.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1971.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1971.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1971.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1971.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1971.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1971.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1971.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1971.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1971.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1971.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1971.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1971.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1971.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1971.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1972.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1972.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1972.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1972.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1972.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1972.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1972.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1972.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1972.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1972.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1972.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1973.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1973.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1973.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1973.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1974.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1974.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1975.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1975.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1976.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1976.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1976.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1976.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1976.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1976.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1976.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1976.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1976.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1976.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1976.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1976.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  1976.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  1976.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28da6c0]
>[  1976.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28da6c0] width 1600 pitch 6400 (/4 1600)
>[  1976.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7650]
>[  1976.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7650] width 1600 pitch 6400 (/4 1600)
>[  1982.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29708c0]
>[  1982.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29708c0] width 1600 pitch 6400 (/4 1600)
>[  2003.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28fa400]
>[  2003.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28fa400] width 1600 pitch 6400 (/4 1600)
>[  2003.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2003.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2003.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2003.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2004.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29877c0]
>[  2004.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29877c0] width 1600 pitch 6400 (/4 1600)
>[  2004.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb590]
>[  2004.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb590] width 1600 pitch 6400 (/4 1600)
>[  2009.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296a810]
>[  2009.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296a810] width 1600 pitch 6400 (/4 1600)
>[  2009.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296a930]
>[  2009.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296a930] width 1600 pitch 6400 (/4 1600)
>[  2009.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2009.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2009.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2009.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2009.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2009.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2009.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2009.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2009.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2009.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2009.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2009.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2009.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2009.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2009.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2009.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2009.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2009.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2009.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2009.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2010.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2010.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2010.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2010.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2010.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2010.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2010.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2010.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2010.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2010.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2011.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2011.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2011.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2011.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2012.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2012.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2012.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2012.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2013.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df090]
>[  2013.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df090] width 1600 pitch 6400 (/4 1600)
>[  2013.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2013.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2023.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11f23b0]
>[  2023.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11f23b0] width 1600 pitch 6400 (/4 1600)
>[  2033.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eac60]
>[  2034.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eac60] width 1600 pitch 6400 (/4 1600)
>[  2034.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eac60]
>[  2034.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eac60] width 1600 pitch 6400 (/4 1600)
>[  2034.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1194410]
>[  2034.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1194410] width 1600 pitch 6400 (/4 1600)
>[  2034.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eac60]
>[  2034.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eac60] width 1600 pitch 6400 (/4 1600)
>[  2050.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11f23b0]
>[  2051.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11f23b0] width 1600 pitch 6400 (/4 1600)
>[  2051.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28d7940]
>[  2051.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28d7940] width 1600 pitch 6400 (/4 1600)
>[  2051.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[  2051.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[  2051.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[  2051.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[  2051.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[  2051.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[  2051.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[  2051.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[  2051.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x113e160]
>[  2051.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x113e160] width 1600 pitch 6400 (/4 1600)
>[  2051.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2051.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2051.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2051.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2051.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2051.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2051.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2051.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2051.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2051.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2051.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2052.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2052.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2052.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2052.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2052.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2052.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2052.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1198c60]
>[  2052.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1198c60] width 1600 pitch 6400 (/4 1600)
>[  2052.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2052.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2052.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2052.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2052.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f22e0]
>[  2053.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f22e0] width 1600 pitch 6400 (/4 1600)
>[  2053.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2053.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2053.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f22e0]
>[  2053.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f22e0] width 1600 pitch 6400 (/4 1600)
>[  2053.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2053.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2053.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f22e0]
>[  2053.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f22e0] width 1600 pitch 6400 (/4 1600)
>[  2053.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2053.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2053.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1187e60]
>[  2053.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1187e60] width 1600 pitch 6400 (/4 1600)
>[  2053.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1226230]
>[  2053.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1226230] width 1600 pitch 6400 (/4 1600)
>[  2068.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28f22e0]
>[  2068.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28f22e0] width 1600 pitch 6400 (/4 1600)
>[  2549.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295e450]
>[  2549.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295e450] width 1600 pitch 6400 (/4 1600)
>[  2564.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898ba0]
>[  2564.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898ba0] width 1600 pitch 6400 (/4 1600)
>[  3369.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2894950]
>[  3369.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2894950] width 1600 pitch 6400 (/4 1600)
>[  3371.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a39c0]
>[  3371.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a39c0] width 1600 pitch 6400 (/4 1600)
>[  3392.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3392.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3392.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3392.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3392.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3392.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3392.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3392.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3392.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3393.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3393.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3393.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3393.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3393.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3393.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3393.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3393.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3394.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3394.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3394.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3394.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3394.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3394.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3394.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3394.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3395.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3395.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3395.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3395.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3395.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3395.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3395.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3395.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3395.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3395.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3395.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3395.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3395.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3395.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3396.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3396.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3396.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3396.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3396.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3396.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3396.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3396.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3396.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3396.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3396.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3396.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3396.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3396.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3396.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3396.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3398.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3398.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3398.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3398.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3399.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3399.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3400.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3400.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3401.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3401.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3401.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3401.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3401.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3401.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3401.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3401.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3401.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3401.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3401.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3401.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3402.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3402.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3402.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ce4f0]
>[  3402.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ce4f0] width 1600 pitch 6400 (/4 1600)
>[  3405.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cfe80]
>[  3405.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cfe80] width 1600 pitch 6400 (/4 1600)
>[  3405.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28faa90]
>[  3405.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28faa90] width 1600 pitch 6400 (/4 1600)
>[  3405.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988010]
>[  3405.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988010] width 1600 pitch 6400 (/4 1600)
>[  3405.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28faa90]
>[  3405.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28faa90] width 1600 pitch 6400 (/4 1600)
>[  3405.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988010]
>[  3405.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988010] width 1600 pitch 6400 (/4 1600)
>[  3405.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988070]
>[  3405.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988070] width 1600 pitch 6400 (/4 1600)
>[  3405.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988010]
>[  3405.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988010] width 1600 pitch 6400 (/4 1600)
>[  3405.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988070]
>[  3405.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988070] width 1600 pitch 6400 (/4 1600)
>[  3405.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2988010]
>[  3405.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2988010] width 1600 pitch 6400 (/4 1600)
>[  3405.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3405.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3405.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3405.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3406.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x105d6e0]
>[  3406.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x105d6e0] width 1600 pitch 6400 (/4 1600)
>[  3412.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2980050]
>[  3412.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2980050] width 1600 pitch 6400 (/4 1600)
>[  3426.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297ce20]
>[  3426.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297ce20] width 1600 pitch 6400 (/4 1600)
>[  3510.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1194a30]
>[  3510.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1194a30] width 1600 pitch 6400 (/4 1600)
>[  3510.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3510.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0d50]
>[  3510.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0d50] width 1600 pitch 6400 (/4 1600)
>[  3510.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1193380]
>[  3510.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1193380] width 1600 pitch 6400 (/4 1600)
>[  3527.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x11b7a70]
>[  3527.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x11b7a70] width 1600 pitch 6400 (/4 1600)

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Attachments on bug 891120: 671132 | 671133 | 671134 | 671135 | 671136 | 671137